cospan/Sycamore_FPGA — Issue #4: Clock Agnostic problem
Author: cospan
Created: 2011-12-01 05:09:34+00:00
State: open

Somehow a clock master must be implemented.

As it is right now certain cores will not function correctly with any clock that is different than 50MHz

Possible solutions:

-always generate a 50MHz clock with something like a digital clock manager
-find a way to 'tell' each core what the clock rate is... there must be something that defines this somewhere like a `define CLOCK_RATE or something... I could make a script that determines the clock rate from the constraints file

There are multiple cores that depend on a specific clock rate.