MetaScale/nt2 — comment on commit fb22ca3decae0387db6fa0c418bd6cf47a4016b1
File: modules/sdk/include/nt2/sdk/config/cache.hpp line 45
By mgaunard:

The shared cache is L3, not L2.
And if we were to pad rows on the shared cache line size, then each thread wouldn't necessarily be on a different line since we would be using a cache that is shared among threads.
The only explanation I can find to what you're saying is that you're inverting the meaning of shared.

Otherwise I gave a look at previous x86 micro-architectures, and the L2 cache is shared on Core. Should we use L1 on this system then?