akafugu/Xmegaduino — comment on commit 13e661b632b112d86165b271543dbe3ef972f3bb
File: hardware/xmegaduino/cores/xmega/wiring_analog.c line 228
By brendan0powers:

With a prescaller of 64, the PWM frequency of channels on a split timer will be twice that of channels on a normal timer. This is because split timers are not phase correct. Event channel 7 with a peripheral clock divided by 128 can be used to fix this. I'm not sure it's worth it though.