We are going to analyze the behavior of this sequential circuit containing a D flip flop and a JK flip flop. And this analysis is based on the evolution of signals given in the right hand side. At the bottom we see the clock, and here we see different signals that are part of our circuit. The main observation here is that both flip flops make a transition when there is a raising edge of the clock. So the trick to analyze this type of circuit is to focus mainly on the value of the signals right at the instance before the raising edge of the clock. And this is precisely what we are going to do. So at this instance before the edge of the clock we know that X has the value 1. If X has the value 1 it is enough for us to deduce that D has also the value 1. We also know that A and B has given here half initially value 0. A value 0 on the output of this latch implies that the opposite value is coming out of this output. And therefore we have a value 1 in both the J and K signals of this flip flop. After making these analysis we can translate this data to the diagram. So we say that D becomes 1 right before the edge. We know that J and K have the value 1. And therefore we can draw them like this J and K. And now what we have to do is apply the transition rules for both flip flops. So in the case of the D flip flop a 1 in the input means that this one will become the output immediately after the edge of the clock. In the case of the J K a 1 1 value in the inputs means that in the next stage the value of the flip flop will go to the opposite value that had before. Therefore what we know now is that A will become 1 so we can deduce this transition immediately after the edge. And this 0 will become 1 because the 1 1 combination here inverts the value of the output. So this is the value of AMB after the clock. And we can reflect that also in the diagram. Now from here what we do is reevaluate again the entire circuit. But now we have to go to the second edge of the clock right here. And we go precisely to the value before the edge. In that value before the edge the value of X switches from 1 to 0. And now we can recalculate the additional signals. Like for example if we have 1 coming out of this output the opposite value that is 0 will come out of this output. And therefore it enters the J K flip flop both entries are set to 0. And as we can see this value 1 over here when going through this gate produces also a value of 1 in the input of the D flip flop. So we can reflect this change in here saying that D remains 1 J K go to 0. And A remains to 1 all the way through here as well as B. And now we apply the same rules again. Now with this in mind whenever the edge of the clock comes again we know that this flip flop will maintain this value because it has a 1 in the input which will be translated to the output. And very important this flip flop J K has the value 0 in both of its inputs. And therefore what it's going to do it's going to remain with the value 1 at the output. And therefore in the instant immediately after the clock edge this is the status of these 3 signals A, B and X. And as we can see X will remain 0 this is an input A and B will remain 1. And the only thing missing is to recalculate the values but as we can check they both remain exactly the same. That is D remains 1 and J K remain the value 0. And this is the end of the analysis.