Thank you, Shandra. I'm John Bowers, Director of the Institute for Energy Efficiency, and I'd like to talk about some ways that UCSV has been using the MPW process within AIM. There's a number of professors listed here in students and it's a collaboration of a bunch of us. There have been four main directions we focused on. The first is very high capacity interconnects to collaboration with SUNY and Logan Siena, and there are several papers listed here. And I don't really have time to go into much detail, so you can find these on my website or online. Second project is WebLink Selective Photonics Witches. Again, several generations we've designed in the MPW process. Then the last two, we haven't had time to describe here today, but one is inverse design with Stanford, Professor Rookovic's group. And again, they came up with a novel design and we laid it out in the MPW process and it worked perfectly. The final project is Quantum Bat Lasers on Silicon. So this is a longer term project where we're trying to integrate lasers and S.O.A.'s into the standard SUNY process, and this will hopefully be an offering in the future. So here's the first chip that we have fabricated with analog photonics. It's a fairly complicated chip. It's a one-terribute per second transceiver. So as you can see here, there's 20 ring modulators, 10 in a row. So you need very low loss, very high uniformity of the rings, combined with interleavers, WebLink division multiplexers, and polarization multiplexers. There's a transmit side and a receive side. Then this is mated with 3D bonding to an electronic IC that drives this circuit. So it's fairly complex. This shows a picture of that chip and sort of lots of wire bonds. There's hundreds of devices. The ring residences are tightly controlled. You can see in the right-hand side, the variation across the wafer of how the resonance is a for all ring one across the wafer, they're actually quite tightly grouped. You can see as you go from channel one through channel 20, how that varies. On the lower right you can see a EIC that's bonded onto this pick in a 3D manner, so it's to drive it. Again, there's hundreds of lot-quick connections. It's a very high-speed connections and they're very low capacitance. It's a challenging process. The ring power consumption is very low, just 18 femtage-jules per bit. The bump density is very high, 36 microns. It's beyond a typical pick you could buy from anywhere else. The second project I want to talk about are large switches, typically cross-bar switches, N by N by some number of wavelengths. Typically, you get a lot more capacity by having WDM multiplexion on here. Rather than a single wavelength switch in the left, you go to a fast switch with WDM on in the middle. On the right is what's really valuable. The ability to change some number of wavelengths off each of these channels from one to the other. You can show that actually having ability to change just two wavelengths per cross-point is sufficient at almost all real applications. That gives you low latency and low walking in the switch. The number of rings here could be quite large as N by N gets large. And the number of wavelengths gets large. In this case, we have two rings per cross-bar and that's per wavelength. That's because we want flat tops and steep slopes in the side. We've also integrated here our wavelength monitors on all the waveguides. And so that allows us to monitor how the rings are aligned with the wavelength presidencies. So again, it's self-standing that we don't need an external wavelength source to do that. Here's a picture of what one of those chips looks like. Again, very dense array of rings in the center here. Three levels of metal and pads on the outside. And again, it was fabricated in name, came out in standard time on time. And with actually quite high yield. And this shows one of these picks packaged up over here inside. So again, the path through here, depending upon which one you go out, gets longer and longer. And so you see the path often increased. And then as you go back to the shorter path that goes down, the really important point here is that the loss per element is quite low less than a dB. So again, it's very, very high quality structures. What you can see in this slide is the variation, for instance, in resident wavelengths across the different chips. And again, quite tight grouping of the residence wavelengths, which means we only need very small tuning to put them on residents. This shows the experiment where we put 60 gigaball data through this optical switch. And so it's, again, it's Pam 4, so it's aggregate, 111 gigabit per second. And again, we can get below the hard fact limit with this structure. So to summarize, we're making really very complex picks with hundreds of devices integrated together. BDK performed as expected flawlessly, delivery was on time. Format is actually quite good, 60 gigabod per second from modulators and detectors. And we've used this to integrate together to achieve a one terabyte per second transceiver. Thank you. It's been my pleasure to work in this MPW project.