omniomni/omni-engineering huggingface dataset:
Jim Woodcock. James Charles Paul Woodcock is a British computer scientist.

Woodcock gained his PhD from the University of Liverpool. Until 2001 he was Professor of Software Engineering at the Oxford University Computing Laboratory, where he was also a Fellow of Kellogg College. He then joined the University of Kent and is now based at the University of York, where, since October 2012, he has been head of the Department of Computer Science.

His research interests include: strong software engineering, Grand Challenge in dependable systems evolution, unifying theories of programming, formal specification, refinement, concurrency, state-rich systems, mobile and reconfigurable processes, nanotechnology, Grand Challenge in the railway domain. He has a background in formal methods, especially the Z notation and CSP.

Woodcock worked on applying the Z notation to the IBM CICS project, helping to gain a Queen's Award for Technological Achievement, and Mondex, helping to gain the highest ITSEC classification level.

Prof. Woodcock is editor-in-chief of the Formal Aspects of Computing journal.

Books
 Jim Woodcock and Jim Davies, Using Z: Specification, Refinement, and Proof. Prentice-Hall International Series in Computer Science, 1996. .
 Jim Woodcock and Martin Loomes, Software Engineering Mathematics: Formal Methods Demystified. Kindle Edition, Taylor & Francis, 2007.

References

External links
 Official homepage
 Personal homepage
 Research profile
 
 

1956 births
Living people
Alumni of the University of Liverpool
British computer scientists
Formal methods people
Members of the Department of Computer Science, University of Oxford
Fellows of Kellogg College, Oxford
Academics of the University of Kent
Academics of the University of York
Fellows of the British Computer Society
Fellows of the Royal Academy of Engineering
Computer science writers
British textbook writers
British academic journal editors
ALCO RSC-2. The ALCO RSC-2 was a diesel-electric locomotive that rode on three-axle trucks, having an A1A-A1A wheel arrangement.

91 locomotives were produced — Used in much the same manner as its four-axle counterpart, the ALCO RS-2, though the wheel arrangement lowered the axle load for operation on light rail such as are found on branch lines.

The Milwaukee Road was the first railroad to take delivery of the RSC-2, initially assigning them to their Valley Division (headquartered near Wausau, Wisconsin) in November 1946. This was done in order to study the effects of an all-diesel roster (i.e. no steam locomotives available as a backup). The experiment was deemed a success and soon all steam locomotives were gone from the Valley Division. RSC-2s would faithfully serve the Milwaukee Road for many years, until being replaced in turn by the EMD SDL39.

ALCO also exported these units to the state railway of Portugal, where Portuguese Railways (CP) designated them Série 1500. These locomotives were built for the Iberian track gauge of (). The last units in Portugal served in regular passenger service into the first decade of the 21st century. Of these, five are still running today, 70 years after their arrival (one is a museum locomotive, while the other four are owned by track maintenance companies). 
Five units were exported to the Algerian National Railways where they were used in passenger train service.

Original buyers

References

 

A1A-A1A locomotives
RSC-2
Diesel–electric locomotives of the United States
Railway locomotives introduced in 1946
Standard gauge locomotives of the United States
5 ft 6 in gauge locomotives
Standard gauge locomotives of Algeria
Diesel–electric locomotives of Portugal
Diesel–electric locomotives of Algeria
Hawker P.1081. The Hawker P.1081, also known as the "Australian Fighter" was a prototype British jet aircraft from the mid-twentieth century. The single example built was destroyed in a crash in 1951.

Design and development
In 1949, the Royal Australian Air Force (RAAF) began assessing replacements for two fighters built in Australia: the Mustangs built by Commonwealth Aircraft Corporation (CAC) and Vampires of De Havilland Australia (DHA). A series of designs were considered, including the Grumman F9F Panther and the CAC CA-23 – an unconventional, twin-jet all-weather design by CAC.

Hawker Aircraft also submitted a proposal, for a swept-wing, swept-tail fighter based on the Hawker P.1052, but using a Rolls-Royce Tay engine. Work began to modify the second prototype of the P.1052 (VX279) along these lines, although the Rolls-Royce Nene engine already fitted was initially retained.  To allow an afterburner, the bifurcated  tail-pipes of the P.1052 was replaced by a  single  tail-exit  pipe.   

VX279, which was now the prototype P.1081, took to the air on 19 June 1950. CAC, evidently planning to build any design accepted by the Australian government, assigned the serial number CA-24 to the P.1081.

By mid-1950, however, the RAAF urgently required a replacement for its Mustangs, some of which were in action in Korea and faced the possibility of clashes with MiG-15s. The P.1081 could not realistically become operational for at least a few years, so a ready-made fighter was required. While the North American F-86 Sabre was operational with the US Air Force in Korea, the USAF had complete priority and the F-86 could not be delivered to the RAAF for at least a few years. (After the war, CAC in Australia built a more powerful, Rolls-Royce Avon-engined variant of the F-86, known as the CAC Sabre.) To replace its Mustangs in Korea, the Australian government ordered the F.8 variant of the Gloster Meteor, which was already in service with the RAF.

In November 1950, evidently anticipating that orders for the P.1081 would not eventuate, Hawker decided to cease development. The prototype, which had remained in the UK, was handed over by Hawker to the Royal Aircraft Establishment (RAE). Its swept tail increased the Mach number above that of the P.1052 into the Mach 0.9-0.95 region, providing valuable data that contributed to the design of the axially-powered Hawker Hunter.

On 3 April 1951, the P.1081 prototype was lost with its pilot, Squadron Leader T. S. "Wimpy" Wade.

Operators

Royal Aircraft Establishment

Specifications

See also

References

Notes

Bibliography

 Hannah, Donald. Hawker FlyPast Reference Library. Stamford, Lincolnshire, UK: Key Publishing Ltd., 1982. .
 James, Derek N. Hawker, an Aircraft Album No. 5. New York: Arco Publishing Company, 1973. . (First published in the UK by Ian Allan in 1972)
 Mason, Francis K. Hawker Aircraft since 1920. London: Putnam, 1991. 

1950s British fighter aircraft
P1081
Cancelled military aircraft projects of the United Kingdom
Single-engined jet aircraft
Mid-wing aircraft
Cruciform tail aircraft
Aircraft first flown in 1950
7800. 7800 may refer to:

Technology 
 Atari 7800, a third-generation video game console
 GeForce 7800 series, a line of graphics processing units from Nvidia
 Radeon HD 7800 series, a line of graphics processing units from AMD released 2012
 Radeon RX 7800 XT, a graphics processing unit from AMD released 2023

Other 
 7800, the 800th year of the 8th millennium
 NGC 7800, an irregular galaxy in the Pegasus constellation
 PCC 7800, a streetcar type

See also 
 7800 series
Infineon TriCore. TriCore is a 32-bit microcontroller architecture from Infineon. It unites the elements of a RISC processor core, a microcontroller and a DSP in one chip package.

History and background
In 1999, Infineon launched the first generation of AUDO (Automotive unified processor) which is based on what the company describes as a 32-bit "unified RISC/MCU/DSP microcontroller core", called TriCore, which as of 2011 is on its fourth generation, called AUDO MAX (version 1.6).

TriCore is a heterogeneous, asymmetric dual core architecture with a peripheral control processor that enables user modes and core system protection.

Infineon's AUDO families target gasoline and diesel engine control units (ECUs), applications in hybrid and electric vehicles as well as transmission, active and passive safety and chassis applications. It also targets industrial applications, e.g. optimized motor control applications and signal processing.

Different models offer different combinations of memories, peripheral sets, frequencies, temperatures and packaging. Infineon also offers software
claimed to help manufacturers meet SIL/ASIL safety standards. All members of the AUDO family are binary-compatible and share the same development tools. An AUTOSAR library that enables existing code to be integrated is also available.

Safety
Infineon's portfolio includes microcontrollers with additional hardware features as well as SafeTcore safety software and a watchdog IC.

AUDO families cover safety applications including active suspension and driver assistant systems and also EPS and chassis domain control. Some features of the product portfolio are memory protection, redundant peripherals, MemCheck units with integrated CRCs, ECC on memories, integrated test and debug functionality and FlexRay.

References

External links
 Infineon official website for Microcontroller
 Port of GCC 3.3 to TriCore by HighTec 

Microcontrollers
Digital signal processors
FEP. FEP may refer to

 Features, events, and processes, in radioactive waste management
 Federação Escotista de Portugal, the Scouting Federation of Portugal
 Federation of European Professional Photographers
 Federation of European Publishers
 FEP Sports, a paintball equipment manufacturer
 Fluorinated ethylene propylene
 Filaments evaluation protocol, a 3D printing methodology
 Foreign education provider, in India
 Fort Edmonton Park, in Edmonton, Alberta, Canada
 Forum for European Philosophy
 Franklin Electronic Publishers, an American electronics manufacturer
 Free energy perturbation
 Free Egyptians Party, a political party in Egypt
 Free erythrocyte porphyrin
 Front endpaper
 Front-end processor
 Full electric propulsion
 Tuen Mun Ferry Pier stop, Hong Kong (MTR station code)

See also 
 FeP, iron phosphide
Osteotome. An osteotome is an instrument used for cutting or preparing bone. Osteotomes are similar to a chisel but bevelled on both sides. They are used today in plastic surgery, orthopedic surgery and dental implantation. 

The chain osteotome, originally referred to simply as the osteotome, was invented by the German physician Bernhard Heine in 1830.  This device is essentially a small chainsaw.

See also
Instruments used in general surgery

References

Orthopaedic instruments
Interrupt vector table. An interrupt vector table (IVT) is a data structure that associates a list of interrupt handlers with a list of interrupt requests in a table of interrupt vectors. Each entry of the interrupt vector table, called an interrupt vector, is the address of an interrupt handler (also known as ISR). While the concept is common across processor architectures, IVTs may be implemented in architecture-specific fashions. For example, a dispatch table is one method of implementing an interrupt vector table.

Background

Most processors have an interrupt vector table, including chips from Intel, AMD, Infineon, Microchip Atmel, NXP, ARM, etc.

Interrupt handlers

Handling methods

An interrupt vector table is used in the three most popular methods of finding the starting address of the interrupt service routine:

"Predefined"

The "predefined" method loads the program counter (PC) directly with the address of some entry inside the interrupt vector table. The jump table itself contains executable code. While in principle an extremely short interrupt handler could be stored entirely inside the interrupt vector table, in practice the code at each entry is a single jump instruction that jumps to the full interrupt service routine (ISR) for that interrupt. The Intel 8080, Atmel AVR and all 8051 and Microchip microcontrollers use the predefined approach.

"Fetch"

The "fetch" method loads the PC indirectly, using the address of some entry inside the interrupt vector table to pull an address out of that table, and then loading the PC with that address. Each and every entry of the IVT is the address of an interrupt service routine. All Motorola/Freescale microcontrollers use the fetch method.

"Interrupt acknowledge"

For the "interrupt acknowledge" method, the external device gives the CPU an interrupt handler number. The interrupt acknowledge method is used by the Intel Pentium and many older microprocessors.

When the CPU is affected by an interrupt, it looks up the interrupt handler in the interrupt vector table, and transfers control to it.

See also 

 Interrupt descriptor table (x86 Architecture implementation)

References

External links 
Intel® Architecture Software Developer's Manual, Volume 3: System Programming Guide 
 Intel 64 and IA-32 Architectures Software Developer’s Manual, Volume 3A:System Programming Guide, Part 1 (see CHAPTER 6, INTERRUPT AND EXCEPTION HANDLING and CHAPTER 10, ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER)]

Interrupts
Ecodynamics. Ecodynamics is a part of applied economics. It covers knowledge on monetary value, the usage of money, and the money flow. It deals with labor, and capital.

See also 
 Thermoeconomics
 System Dynamics

External links
 M. King Hubbert on the Nature of Growth. Testimony to Hearing on the National Energy Conservation Policy Act of 1974, Subcommittee on the Environment of the committee on Interior and Insular Affairs House of Representatives, June 6, 1974.
 Herman E. Daly: Economics in a Full World, Scientific American, September 2005, Vol. 293, Issue 3.
 System Dynamics Society

Recommended reading

References 
 

Monetary economics
Fred Baker (engineer). Frederick J. Baker (born February 28, 1952), is an American engineer, specializing in developing computer network protocols for the Internet.

Biography
Baker attended the New Mexico Institute of Mining and Technology from 1970 to 1973. He developed computer network technology starting in 1978 at Control Data Corporation (CDC), Vitalink Communications Corporation, and Advanced Computer Communications.

He joined Cisco Systems in 1994.
He became a Cisco Fellow in 1998, working in university relations and as a research ambassador, and in the IETF. He left Cisco Systems in 2016.

Since 1989, Baker has been involved with the Internet Engineering Task Force (IETF), the body that develops standards for the Internet.
He chaired a number of IETF working groups, including several that specified the management information bases (MIB) used to manage network bridges and popular telecommunications links.
Baker served as IETF chair from 1996 to 2001, when he was succeeded by Harald Tveit Alvestrand. 
He served on the Internet Architecture Board from 1996 through 2002. He has co-authored or edited over fifty Request for Comments (RFC) documents on Internet protocols and contributed to others. The subjects covered include network management, Open Shortest Path First (OSPF) and Routing Information Protocol (RIPv2) routing, quality of service (using both the Integrated services and Differentiated Services models), Lawful Interception, precedence-based services on the Internet, and others.

In addition, he served as a member of the Board of Trustees of the Internet Society 2002 through 2008, and as its chair from 2002 through 2006. He was a member of the Technical Advisory Council of the US Federal Communications Commission from 2005 through 2009.
He has worked as liaison to other standards organizations such as the ITU-T.
In 2009 he became chair of the RFC Series Oversight Committee.

He co-chaired the IPv6 Operations Working Group in the IETF, represented the IETF on the National Institute of Standards and Technology Smart Grid Smart Grid Interoperability Panel and Architecture Committee (until 2013), and was Cisco's representative to a Broadband Internet Technical Advisory Group.
Baker also has several patents.

References

External links
The Debate Over Internet Governance: A Snapshot in the Year 2000, The Berkman Center for Internet & Society at Harvard Law School. Retrieved on August 6, 2007.

1952 births
Living people
People in information technology
Internet Society people
NEC μPD7720. The NEC μPD7720 is the name of fixed point digital signal processors from NEC (currently Renesas Electronics).  Announced in 1980, it became, along with the Texas Instruments TMS32010, one of the most popular DSPs of its day.

Background
In the late 1970s, telephone engineers were attempting to create technology with sufficient performance to enable digital touch-tone dialing.  Existing digital signal processing solutions required over a hundred chips and consumed significant amounts of power. Intel responded to this potential market by introducing the Intel 2920, an integrated processor that, while it had both digital-to-analog and analog-to-digital converters, lacked additional features (such as a hardware multiplier) that would be found in later processors.  Announcements for the first "real" DSPs, the NEC μPD7720 and the Bell Labs DSP-1 chip, occurred the following year at the 1980 IEEE International Solid-State Circuits conference.  The μPD7720 first became available in 1981 and commercially available in late 1982 at a cost of ¥20.000 (around $82 and inflation corrected for 2023 dollars around $304). Beyond their initial use in telephony, these processors found applications in disk drive and graphics controllers, speech synthesis and modems.

Architecture
Detailed descriptions of the μPD7720 architecture are found in Chance (1990), Sweitzer (1984) and Simpson (1984).  Briefly, the NEC μPD7720 runs at 4 MHz frequency with 128-word 16-bit data RAM, 512-word 13-bit data ROM, and 512-word 23-bit program memory, which has VLIW-like instruction format, enabling all of ALU operation, address register increment/decrement operation, and move operation in one cycle.  The stack area, which is distinct from the main memory address space, is allocated in a separate address space. The stack, utilized during subroutine calls and interrupts, has a depth of four.

Variants

The NEC μPD77C25, which succeeded the μPD7720, runs at 8 MHz frequency with 256-word 16-bit data RAM, 1,024-word 16-bit data ROM, and 2,048-word 24-bit program memory. The stack, utilized during subroutine calls and interrupts, maintains the same depth of four as that of the μPD7720.
NEC μPD77C25 was succeeded by backwards compatible μPD96050 which runs at either 10 or 15 MHz frequency with 2,048 16-bit data RAM, 2,048-word 16-bit data ROM, and 16,384-word 24-bit program memory. Compared to its predecessor, call stack has been expanded to depth of 8, instruction set includes some additional instructions and it supports battery backup for data RAM.
Both μPD77C25 (DSP-1, DSP-2, DSP-3, DSP-4) and μPD96050 (ST010, ST011) were used as enhancement coprocessors in Super NES game cartridges.

References

External links
 Datasheets for the UPD7720A, UPD7720AC and UPD7720AD are available here.
 Datasheets for the UPD77C25C, UPD77C25GW and UPD77C25L are available here.

muPD07720
Digital signal processors
Bit banging. Bit banging is a term of art that describes a method of digital data transmission as using general-purpose input/output (GPIO) instead of computer hardware that is intended specifically for data communication.' Controlling software is responsible for satisfying protocol requirements including timing which can be challenging due to limited host system resources and competing demands on the software. 

In contrast, dedicated communication hardware (e.g., UART, SPI, I²C) satisfies protocol requirements which tends to reduce the runtime load on the controlling system  software and its host processor. In particular, some communication hardware provides data buffering to lower the runtime load of the controlling system.

The bit banging method may allow a computer to support a protocol with limited or no hardware changes and therefore bit banging can be a lower cost option since changing software is typically less expensive than changing hardware. 

Bit banging is commonly used in embedded systems. 

Choosing between bit banging and dedicated communication hardware involves a trade-offs between load, performance and reliability on one hand, and availability of hardware on the other. Bit banging consumes more processing resources than using dedicated hardware. The processor spends much of its time controlling data lines which precludes other processing. Also, bit banging typically results in a lower quality signal  with more jitter and glitches  especially if the processor is performing other tasks simultaneously. However, if the software is interrupt-driven by the signal, the signal quality may be better, especially if control signals such as RTS, CTS, or DCD are available. Bit banging may be the only solution when dedicated communication hardware is not available.

Example
The following C language code example transmits a byte of data on an SPI bus via bit banging.

void send_8bit_serial_data(unsigned char data) 
{
   // select device (active low)
   output_low(SD_CS);

   // send bits 7..0
   for (int i = 0; i < 8; i++)
   {
       // consider leftmost bit
       // set line high if bit is 1, low if bit is 0
       if (data & 0x80)
           output_high(SD_DI);
       else
           output_low(SD_DI);

       // pulse the clock state to indicate that bit value should be read
       output_low(SD_CLK);
       delay();
       output_high(SD_CLK);

       // shift byte left so next bit will be leftmost
       data <<= 1;
   }

   // deselect device
   output_high(SD_CS);
}

See also
 
 
 
 
 
 
 
  (IWM)

References

External links 
 Notes on bit-banging async serial
 Bit banging for Async Serial Communication
 Bit banging for RS-232
 I2C on AVR using bit banging
 Efficient bit-banged SPI for 8051 microcontroller

Data transmission
Signal processing
Digital circuits
Embedded systems
Hyundai Aero. The Hyundai Aero (hangul:현대 에어로) was a full-sized single-decker coach built by the Hyundai Motor Company. It was primarily used as an intercity bus.

It is distinguishable by a front 'Aero' badge by Aero Space, Aero Express, and Aero Queen, but the common Hyundai badge is usually used on the rear.

In Japan, Asia-Pacific, Mid-East, Africa, South America, its principal Korean competitors are Kia Granbird, Daewoo BH, SsangYong Transstar.

Models

The Aero was designed by Hyundai Motor Company and Mitsubishi Fuso. It was a rebadged Mitsubishi Fuso Aero Bus. The three variants are:
Aero Space: both available for diesel and CNG.
Aero Space LD: A short wheelbase, standard deck bus.
Aero Space LS: A short wheelbase, standard deck bus with air suspension.
Aero Hi-Space: A long wheelbase, standard deck bus with air suspension.
Aero Express: A long wheelbase bus with air suspension.
Aero Express LDX: standard deck bus with air suspension.
Aero Express HSX: high deck bus with air suspension.
Aero Express Hi-Class: high deck bus with air suspension.
Aero Queen: A luxurious long wheelbase, high deck bus with air suspension.
Aero Queen
Aero Queen Hi-Class

Engines

See also

Hyundai Motor Company
Hyundai Aero City
Hyundai RB
 List of buses

Rear-wheel-drive vehicles
Buses of South Korea
Intercity buses
Single-deck buses
Hyundai buses
Vehicles introduced in 1985
VPD. VPD may refer to:

Science and technology
 Vaccine-preventable diseases
 Vapour phase decomposition, a method used in the semiconductor industry
 Vapour-pressure deficit, a measure of the difference between air humidity and saturation

Computing
 Virtual private database, masks data in a larger database
 Virtual product development, developing and prototyping products in a completely digital 2D/3D environment
 Vital Product Data, in computer hardware or in AIX Object Data Manager terminology

Other uses
 Vancouver Police Department

See also