Design patterns inspired from the field of architecture, have a strong presence in software engineering, with the leading contribution by the gang of four, circuit design lacks formal architectural definitions and design patterns, definitions, although, BEAM or MFA I design has a modular design structure with design patterns. In this paper we introduce a Tensor definition for architectural patterns, with a stability analysis of large signal behaviour, leading to definitions of associative memory, state diagrams and digital architectural paradigms in analog design. In future work, we design natural language like grammars to tensor representations in a formal complexity theory of Lie Computability and monotonic functions. Keywords: design patterns, structural, functional, behavioural, architecture, analog design, design thinking, constructivism, BEAM robotics, gestalt. What: Structural and Functional architectural patterns in analog design, with small signal and large signal analysis in analog design, illustrated with Nv neuron architectures. How: Reconfigurable design blocks for opamps and BJT/FETs are explored with reconfigurable control buses, and complex impedances, a combination of capacitive, inductive and resistive elements, all amenable to low scale integrated design as FlexICs. With this modular core for use in reconfigurable BEAM robotics, as an illustration of the use of design patterns. Introduction. Opamp and transistor based circuits are designed with patterns using control loops and noise engineering, based on feedback control systems and many architectural patterns, behavioural, structural and functional. We describe several such patterns and illustrate examples with model and behaviour driven design, in Nv neuron based Tensor topologies. Small signal models of two port networks are translated into simple model based approximations of active impedances. In impedance transfer logic, the atomicity of analog design, we present a large signal analysis in tensor definitions of complexity, with a dynamical systems definition of two ports with noise engineering, for S/N ratios and gain bandwidth tradeoff in design architectures. Background. In the previous publications, we have defined a tensor architecture for Nv and Nu neurons for MFA I architectures, in this paper we generalize design patterns for architecture for fulfilment of tensor topologies. Architectural Patterns. Current Mirror Pattern. (“Chapter 11: The Current Mirror [Analog Devices Wiki]” n.d.) Patterns with a reconfigurable opamp (ROP). denoted in CaC is an opamp(in+,in-, out), impedence_mux_i, i = 1 to 4 , impedence_mux_opamp+(in, out), impedence_mux_opamp-(in,out), imepdence_feedback+(in,out) and impedence_feedback-(in,out). The circuit graph is straightforward from these elements with the impedance being a complex value with a multiplexed hard wired control bus, [in+,in-,fb+,fb-], with various values for various circuit topologies. Opamp Gain, Negative Feedback. An ROP with [in+,in-,fb+,fb-] = [1, 0, 1,0] Active Impedance, Negative Feedback. ROP with [in+,in-,fb+,fb-] = [1, 1, 1,0] Opamp, Differential Amplifier. ROP with [in+,in-,fb+,fb-] = [1, 1, 0,0] Active Impedance, Positive Feedback ROP with [in+,in-,fb+,fb-] = [1, 1, 0, 1] Transistor based patterns, both BJT and FET. (RTB) transistor(base,in , out), impedence_mux_i, i = 1 to 4 , impedence_base_1(in, out), impedence_base_2(in,out), imepdence_in( in,out) and impedence_out(in,out). The RTB allows for a biased reconfigurable transistor, allowing for many topologies on a control vector [b1, b2, in,out] and 4 port [b1, b2, in, out] for creation of Nv, Nu and n-core biomorphs as an illustration. Functional and structural patterns. 1. Frequency Modulation.(functional) with control [1, 1, 1, 0] or [1, 1, 1, 1] with an impedance_in value for an oscillator. 2. Amplitude Modulation (functional) with control [1, 1, 1, 1] and impedance_out with capacitive and resistive values. 3. Pulse code modulation.(functional) Bicore, multivibrator with variable duty cycle, two [1,1,1,1] with positive feedback. 4. Central pattern generator, many bicore designs, with positive feedback for noise engineering. 5. Master-slave pattern.: Bicore flip-flop designs, with a feedback control loop for master - slave following, with capacitive impedance. 6. Handshake Protocol Pattern.: multicore, state machine based design, with atomic bicore state unit. State machine for hand shake. 7. Shared Memory Pattern: Hysteresis based memory or limit cycles based bicore designs, for complex dynamical patterns. 8. I/O interrupt - asynchronous pattern.: State machine based multicore designs with interrupt controls. 9. Associative memory pattern.: bicore designs as dynamical systems with internal states and adaptive resonance theory for associative memory. ​ (Contributors to Wikimedia projects 2016) 10. Hysteresis Pattern. (Contributors to Wikimedia projects 2003) ​ Bicore with positive feedback. 11. State Machines. Bicore hysteresis forms a simple state machine, with a tandem n-core, creates a state machine. Each non schmitt trigger machine, with positive feedback has a rich state , phase diagram, with limit cycles for positive states and transitions from one state to another. Formal definitions in Large signal analysis. Large signal analysis of two port networks leads to non linear active impedances and tensor definitions for impedance transfer in opamp or transistor based designs, Stability theory in dynamical systems is well described in literature. ​ (Corinto, Lanza, and Gilli 2007) ​ (Bheemaiah, n.d.) Dc2Dc converters present a rich gamut of behaviours in stability analysis, leading to state machines with limit cycles and bifurcations of stable states and transitions ranging from ergodicity to bifurcations to persistence effects, in states. ​ (“[No Title]” n.d.) ​ (“[No Title]” n.d.) Discussion. Formal definitions of state systems in the context of stability theory, protocols for handshakes and maps, from lyapunov functions as the large signal solutions to field equations in two port networks for active impedance and impedance transfer have been described in this paper. The Tensor formulation , described as a generalized [T 𝜭 ], is implemetable directly in state machine definitions and maps. Formal theory of analog architectures is defined in monotonic functions and asymptotics in complexity definitions of convergence and stability. This is defined in a future paper on Lie computability and Lie lattice theories of circuit analysis.