IP-XACT. IP-XACT, also known as IEEE 1685, is an XML format that defines and describes individual, re-usable electronic circuit designs (individual pieces of intellectual property, or IPs) to facilitate their use in creating integrated circuits (i.e. microchips). IP-XACT was created by the SPIRIT Consortium as a standard to enable automated configuration and integration through tools and evolving into an IEEE standard.

The goals of the standard are
 to ensure delivery of compatible component descriptions, such as IPs, from multiple component vendors,
 to enable exchanging complex component libraries between electronic design automation (EDA) tools for SoC design (design environments),
 to describe configurable components using metadata, and
 to enable the provision of EDA vendor-neutral scripts for component creation and configuration (generators, configurators).

Approved as IEEE 1685-2009 on December 9, 2009, published on February 18, 2010.
Superseded by IEEE 1685-2014. IEEE 1685-2009 was adopted as IEC 62014-4:2015.  In June 2023, the supplemental material for standard IEEE 1685-2022 IP-XACT was approved by Accellera.

Overview 

Conformance checks for eXtensible Markup Language (XML) data designed to describe electronic systems are formulated by this standard. The meta-data forms that are standardized include components, systems, bus interfaces and connections, abstractions of those buses, and details of the components including address maps, register and field descriptions, and file set descriptions for use in automating design, verification, documentation, and use flows for electronic systems. A set of XML schemas of the form described by the World Wide Web Consortium (W3C(R)) and a set of semantic consistency rules (SCRs) are included. A generator interface that is portable across tool environments is provided. The specified combination of methodology-independent meta-data and the tool-independent mechanism for accessing that data provides for portability of design data, design methodologies, and environment implementations.

All documents will have the following basic titular attributes spirit:vendor, spirit:library, spirit:name, spirit:version.

A document typically represents one of:
 bus specification, giving its signals and protocol etc.;
 leaf IP block data sheet;
 or a hierarchic component wiring diagram that describes a sub-system by connecting up or abstracting other components made up of spirit:componentInstance and spirit:interconnection elements.

For each port of a component there will be a spirit:busInterface element in the document.  This may have a spirit:signalMap
that gives the mapping of the formal net names in the interface to the names used in a corresponding formal specification of the port.
A simple wiring tool will use the signal map to know which net on one interface to connect to which net on another instance
of the same formal port on another component.

There may be various versions of a component referenced in the document, each as a spirit:view element, relating to different versions of a design: typical levels are gate-level, RTL and TLM.
Each view typically contains a list of filenames as a spirit:fileSet that implement the design at that level of abstraction in appropriate language, like Verilog,
C++ or PSL.

Non-functional data present includes the programmer's view with a list of spirit:register declarations inside a spirit:memoryMap or spirit:addressBlock.

Supporting companies and software 
Arteris - Magillem Connectivity, Magillem Registers, CSRCompiler and FlexNoC5
Cadence - JasperGold  and Interconnect Workbench (IWB) 
Synopsys, Inc 
Agnisys 
Defacto Technologies 
EDAUtils 
Magillem (now part of Arteris) 
Semifore (now part of Arteris) 
Xilinx (now part of AMD)
Lattice

See also 
SystemRDL

References

Further reading
 SPIRIT IP-XACT Controlled ESL Design Tool Applied to a Network-on-Chip Platform

External links 
 IEEE 1685-2022
 IP-XACT at Accellera
 XML Schema at Accellera
 BusDefs at Accellera

Electronic engineering
IEEE DASC standards
IEC standards