—The following article provides an overview of the advancements made in the research of neuromorphic vision processors over the past few decades. It mainly focuses on two types of vision processors: frame-based (FB) and event- based (EB) vision processors. These two types differ in system architecture, image sensing techniques, image coding, image processing algorithms, and design methodologies. Neuromorphic vision processors have the ability to overcome the processing and transmission bottlenecks that limit traditional image processing systems. They can perform high-speed image capture and real- time image processing operations. This review paper introduces two representative vision processors, one from each category, to explain their architectures, image sensing schemes, image processing processors, and system operations. The FB neuro- morphic reconfigurable vision processor includes a high-speed image sensor, a processing element array, and a self-organizing map neural network. The FB vision processor has advantages in high-resolution imaging, static object detection, time-multiplex image processing, and a smaller chip area. The EB neuromorphic vision processor system utilizes an event-driven multi-kernel convolution network and an address-event-representation image sensor. The EB vision processor has advantages in fast sensing, low communication bandwidth, brain-inspired processing, and high energy efficiency. Finally, this article discusses the architec- ture and challenges of future neuromorphic vision processors, highlighting the trend towards developing reconfigurable vision processors that integrate left- and right-brain functions using three-dimensional large-scale integrated circuit (LSI) technology. I. Introduction We provide an overview of the advancements made in the research of neuromorphic vision processors over the past few decades. It mainly focuses on two types of vision processors: frame-based (FB) and event-based (EB) vision processors. These two types differ in system architecture, image sens- ing techniques, image coding, image processing algorithms, and design methodologies. Neuromorphic vision processors have the ability to overcome the processing and transmission bottlenecks that limit traditional image processing systems. They can perform high-speed image capture and real-time image processing operations. This review paper introduces two representative vision processors, one from each category, to explain their architectures, image sensing schemes, image processing processors, and system operations. The FB neu- romorphic reconfigurable vision processor includes a high- speed image sensor, a processing element array, and a self- organizing map neural network. The FB vision processor hasadvantages in high-resolution imaging, static object detection, time-multiplex image processing, and a smaller chip area. The EB neuromorphic vision processor system utilizes an event- driven multi-kernel convolution network and an address-event- representation image sensor. The EB vision processor has advantages in fast sensing, low communication bandwidth, brain-inspired processing, and high energy efficiency. Finally, this article discusses the architecture and challenges of fu- ture neuromorphic vision processors, highlighting the trend towards developing reconfigurable vision processors that in- tegrate left- and right-brain functions using three-dimensional large-scale integrated circuit (LSI) technology. The concept of neuromorphic vision chips involves integrating an image sensor and brain-inspired parallel processors on a single silicon die. The system mimics the human visual system by having the image sensor act as the retina and the processors function as the brain’s visual cortex. The image sensor captures the image data, while the processors perform intelligent image processing in parallel and output the result. Compared to traditional image processing systems, neuromorphic vision chips overcome serial data transmission and processing bot- tlenecks. They can perform image processing at high speeds of over 1000 frames per second, making them ideal for edge- computing applications that require quick response times and reduced communications bandwidth. This technology has many potential applications, includ- ing security monitoring, blind navigation, robotic vision, industry automation, visual object tracking, entertainment, and virtual reality/augmented reality. Using a single vision chip, the combination of an image sensor, transmission line, and powerful computer can be replaced, thereby reducing power consumption, size, and cost. Researchers have been focused on developing neuromorphic vision chips for nearly two decades, making significant progress. However, there are still research challenges to overcome, such as chip archi- tecture, photonic/microelectronic hybrid design, high-speed brain-inspired neural networks, fabrication technology, and online training algorithms. This review paper will summarize recent progress and research challenges related to both frame- driven (FD) and event-driven (ED) neuromorphic vision chips. Section 2 provides a brief summary of the research progress on both FD and ED vision chips, followed by examples of typical research results of FD and ED vision chips in Sections 3 and 4, respectively. Finally, Section 5 discusses the architecture and challenges of future neuromorphic vision chips. The convolution kernels on the chips are well tuned through Researchers have been working on neuromorphic vision chips for about 20 years and have achieved significant progress. These chips integrate an image sensor and brain-inspired processors on a single silicon die, with the sensor acting as the retina and the processors as the visual cortex. The processors perform intelligent image processing in parallel, enabling image processing at a speed of over 1000 frames per second and reducing the need for communications bandwidth between the sensor and central data center. As a result, the power consumption, size, and cost of the visual system are sig- nificantly reduced, making it suitable for various applications, such as security monitoring, blind navigation, robotic vision, industry automation, visual object tracking, entertainment, and virtual reality/augmented reality. However, there are still many research challenges in chip ar- chitecture, photonic/microelectronic hybrid design, high-speed brain-inspired neural networks, fabrication technology, and on- line training algorithms. For example, the reported chips only implement a single-kernel convolution and feature extraction, making it difficult to carry out object recognition. Moreover, they suffer from device mismatch and low computing precision due to weighted event integration by analog charge packet integration on pixel capacitors and computing circuits. To address these issues, a fully-digital convolutional neural network chip was developed for event-driven vision sensing and processing systems. This chip can perform the operation of kernels with arbitrary programmable shape and size up to 32x32, handle the forgetting mechanism, and distinguish between multiple simultaneous input flows. An intermediate solution involves training a frame-driven convolutional neural network using an image frame database and applying the learned parameters to an event-driven network. Another ap- proach involves using a leaky integrate-and-fire spiking neural network to extract cortex-like features and classify different patterns. A multi-kernel convolution processing module chip was also proposed, which can handle the leak/forgetting mech- anism and process different kernel convolutions in parallel for multiple input flows. These modules can be assembled to set up a hierarchical feed-forward convolutional neural network for complete event-driven vision processing. Addi- tionally, an event-driven image recognition system with a multiple-orientation detector for objects was proposed, which can extract features, track objects, and recognize patterns with arbitrary motion orientation. Researchers have been working on neuromorphic vision chips for about 20 years and have achieved significant progress. These chips integrate an image sensor and brain-inspired processors on a single silicon die, with the sensor acting as the retina and the processors as the visual cortex. The processors perform intelligent image processing in parallel, enabling image processing at a speed of over 1000 frames per second and reducing the need for communications bandwidth between the sensor and central data center. As a result, thepower consumption, size, and cost of the visual system are sig- nificantly reduced, making it suitable for various applications, such as security monitoring, blind navigation, robotic vision, industry automation, visual object tracking, entertainment, and virtual reality/augmented reality. However, there are still many research challenges in chip ar- chitecture, photonic/microelectronic hybrid design, high-speed brain-inspired neural networks, fabrication technology, and on- line training algorithms. For example, the reported chips only implement a single-kernel convolution and feature extraction, making it difficult to carry out object recognition. Moreover, they suffer from device mismatch and low computing precision due to weighted event integration by analog charge packet integration on pixel capacitors and computing circuits. To address these issues, a fully-digital convolutional neural network chip was developed for event-driven vision sensing and processing systems. This chip can perform the operation of kernels with arbitrary programmable shape and size up to 32x32, handle the forgetting mechanism, and distinguish between multiple simultaneous input flows. An intermediate solution involves training a frame-driven convolutional neural network using an image frame database and applying the learned parameters to an event-driven network. Another ap- proach involves using a leaky integrate-and-fire spiking neural network to extract cortex-like features and classify different patterns. A multi-kernel convolution processing module chip was also proposed, which can handle the leak/forgetting mech- anism and process different kernel convolutions in parallel for multiple input flows. These modules can be assembled to set up a hierarchical feed-forward convolutional neural network for complete event-driven vision processing. Addi- tionally, an event-driven image recognition system with a multiple-orientation detector for objects was proposed, which can extract features, track objects, and recognize patterns with arbitrary motion orientation. Researchers have been working on neuromorphic vision chips for about 20 years and have achieved significant progress. These chips integrate an image sensor and brain-inspired processors on a single silicon die, with the sensor acting as the retina and the processors as the visual cortex. The processors perform intelligent image processing in parallel, enabling image processing at a speed of over 1000 frames per second and reducing the need for communications bandwidth between the sensor and central data center. As a result, the power consumption, size, and cost of the visual system are sig- nificantly reduced, making it suitable for various applications, such as security monitoring, blind navigation, robotic vision, industry automation, visual object tracking, entertainment, and virtual reality/augmented reality. However, there are still many research challenges in chip ar- chitecture, photonic/microelectronic hybrid design, high-speed brain-inspired neural networks, fabrication technology, and on- line training algorithms. For example, the reported chips only implement a single-kernel convolution and feature extraction, making it difficult to carry out object recognition. Moreover, they suffer from device mismatch and low computing precision Fig. 1: Schematic figure of the Visual System. Fig. 2: FD vision chip. due to weighted event integration by analog charge packet integration on pixel capacitors and computing circuits. To address these issues, a fully-digital convolutional neural network chip was developed for event-driven vision sensing and processing systems. This chip can perform the operation of kernels with arbitrary programmable shape and size up to 32x32, handle the forgetting mechanism, and distinguish between multiple simultaneous input flows. An intermediate solution involves training a frame-driven convolutional neural network using an image frame database and applying the learned parameters to an event-driven network. Another ap- proach involves using a leaky integrate-and-fire spiking neural network to extract cortex-like features and classify different patterns. A multi-kernel convolution processing module chip was also proposed, which can handle the leak/forgetting mech- anism and process different kernel convolutions in parallel for multiple input flows. These modules can be assembled to set up a hierarchical feed-forward convolutional neural network for complete event-driven vision processing. Addi- tionally, an event-driven image recognition system with amultiple-orientation detector for objects was proposed, which can extract features, track objects, and recognize patterns with arbitrary motion orientation. The neuromorphic vision chip is an edge-computing device that processes data near the source, leading to improved performance and data security due to reduced network transfers. Unlike data center-oriented neuromorphic computing chips, it must be smaller, consume less power, and be cost-effective. Its application is limited to specific scenes, but it can be retrained for new ones. Devel- oping a real-time, large-scale brain-inspired processor with high processing speed and energy efficiency is a significant challenge in future neuromorphic vision chip technology. To achieve this, a novel vision chip architecture with left and right brain-inspired functions can be developed. The architecture comprises processors for left-brain and right- brain functions, where the former consists of an array of von Neumann-type processing cores and the latter is a neural net- work processor. The two processors can be reconfigured using circuit techniques. The novel vision chip can recognize visual features and estimate visual feature information for various Fig. 3: ED Vision Chip. applications using the left and right brain processors, respec- tively. However, integrating the imager and image processor on a single Silicon die in conventional 2D LSI technology is difficult due to the mismatch in process nodes. Hence, a 3D integrated circuit chip with different layers implemented using different semiconductor processes can be used. The trend in neuromorphic vision chip research is towards 3D integrated circuits. II. Conclusion The neuromorphic vision chip is an edge-computing device that processes data near the source, leading to improved per- formance and data security due to reduced network transfers. Unlike data center-oriented neuromorphic computing chips, it must be smaller, consume less power, and be cost-effective. Its application is limited to specific scenes, but it can be re- trained for new ones. Developing a real-time, large-scale brain- inspired processor with high processing speed and energy efficiency is a significant challenge in future neuromorphic vision chip technology. To achieve this, a novel vision chip architecture with left and right brain-inspired functions can be developed. The architecture comprises processors for left-brain and right- brain functions, where the former consists of an array of von Neumann-type processing cores and the latter is a neural net- work processor. The two processors can be reconfigured using circuit techniques. The novel vision chip can recognize visual features and estimate visual feature information for various applications using the left and right brain processors, respec- tively. However, integrating the imager and image processor on a single Silicon die in conventional 2D LSI technology isdifficult due to the mismatch in process nodes. Hence, a 3D integrated circuit chip with different layers implemented using different semiconductor processes can be used. The trend in neuromorphic vision chip research is towards 3D integrated circuits. As a paper, we showed some typical research results of FD and ED vision chips and gave a comparison of their advantages and disadvantages. We found that the ED vision chip has the advantages of fast sensing, low communication bandwidth, brain-like processing, and high energy efficiency. On the other hand, the FD vision chip has the advantages of image resolution, static object detection, time-multiplex image processing, and compact chip area. Finally, we discussed the architecture of the future vision chip and indicated that the left and right brain-function reconfigurable vision chip integrated in 3D LSI technology becomes a trend of the research on the neuromorphic vision chip in the future.