Power-on self-test. A power-on self-test (POST) is a process performed by firmware or software routines immediately after a computer or other digital electronic device is powered on.

POST processes may set the initial state of the device from firmware and detect if any hardware components are non-functional. The results of the POST may be displayed on a panel that is part of the device, output to an external device, or stored for future retrieval by a diagnostic tool. In some computers, an indicator lamp or a speaker may be provided to show error codes as a sequence of flashes or beeps in the event that a computer display malfunctions.

POST routines are part of a computer's pre-boot sequence. If they complete successfully, the bootstrap loader code is invoked to load an operating system.

In IBM PC compatible computers, the main duties of POST are handled by the BIOS or UEFI.

IBM-compatible PC POST

In IBM PC compatible computers, the main duties of POST are handled by the BIOS or UEFI, which may hand some of these duties to other programs designed to initialize very specific peripheral devices, notably for video and SCSI initialization. These other duty-specific programs are generally known collectively as option ROMs or individually as the video BIOS, SCSI BIOS, etc.

History 
In earlier BIOSes, up to around the turn of the millennium, the POST would perform a thorough test of all devices, including a complete memory test. This design by IBM was modeled after their larger mainframe systems, which would perform a complete hardware test as part of their cold-start process. As the PC platform evolved into more of a commodity consumer device, the mainframe and minicomputer-inspired high-reliability features such as parity memory and the thorough memory test in every POST were dropped from most models. The exponential growth of PC memory sizes, driven by the equally exponential drop in memory prices, was also a factor in this, as the duration of a memory test using a given CPU is directly proportional to the memory size.

The original IBM PC could be equipped with as little as 16 KB of RAM and typically had between 64 and 640 KB; depending on the amount of equipped memory, the computer's 4.77 MHz 8088 required between 5 seconds and 1.5 minutes to complete the POST and there was no way to skip it. Beginning with the IBM XT, a memory count was displayed during POST instead of a blank screen. A modern PC with a bus rate of around 1 GHz and a 32-bit bus might be 2000x or even 5000x faster, but might have many more gigabytes of memory. With boot times more of a concern now than in the 1980s, the 30- to 60-second memory test adds undesirable delay for a benefit of confidence that is not perceived to be worth that cost by most users. Most clone PC BIOSes allowed the user to skip the POST RAM check by pressing a key, and more modern machines often performed no RAM test at all unless it was enabled via the BIOS setup. In addition, modern DRAM is significantly more reliable than DRAM was in the 1980s.

Purposes 
During the POST, the BIOS must integrate multiple competing, changing, and even mutually exclusive standards and initiatives for the matrix of hardware and operating systems the PC is expected to support, although at most only simple memory tests and the setup screen are displayed. The principal duties of the main BIOS during POST include:
 verify CPU registers
 verify the integrity of the BIOS code itself
 verify some basic components like DMA, timer, interrupt controller
 initialize, size, and verify system main memory
 initialize BIOS
 pass control to other specialized extension BIOSes (if installed)
 identify, organize, and select which devices are available for booting
The functions above are served by the POST in all BIOS versions back to the very first. In later BIOS versions, POST will also:
 initialize chipset
 discover, initialize, and catalog all system buses and devices
 provide a user interface for system's configuration
 construct whatever system environment is required by the target operating system

In early BIOSes, POST did not organize or select boot devices, it simply identified floppy or hard disks, which the system would always try to boot in that order.

Process 
The BIOS begins its POST when the CPU is reset. The first memory location the CPU tries to execute is known as the reset vector. In the case of a hard reboot, the northbridge will direct a code fetch request to the BIOS located on the system flash memory. For a warm boot, the BIOS will be located in the proper place in RAM and the northbridge will direct the reset vector call to the RAM. In earlier PC systems, before chipsets were standard, the BIOS ROM would be located at an address range that included the reset vector, and BIOS ran directly out of ROM. This is why the motherboard BIOS ROM is in segment F000 in the conventional memory map.

During the POST flow of a contemporary BIOS, one of the first things a BIOS should do is determine the reason it is executing. For a cold boot, for example, it may need to execute all of its functionality. If, however, the system supports power saving or quick boot methods, the BIOS may be able to circumvent the standard POST device discovery, and simply program the devices from a preloaded system device table.

As part of the starting sequence the POST routines may display a prompt to the user for a key press to access built-in setup functions of the BIOS. This allows the user to set various options particular to the motherboard before the operating system is loaded. If no key is pressed, the POST will proceed on to the boot sequence required to load the installed operating system.

Many modern BIOS and UEFI implementations show a manufacturers logo during POST and hide the classic text screens unless an error occurs. The text screen can often be enabled in the BIOS settings by disabling the "Quiet Boot" option.

Progress and error reporting

The original IBM BIOS made POST diagnostic information available by outputting a number to I/O port 0x80 (a screen display was not possible with some failure modes). Both progress indication and error codes were generated; in the case of a failure which did not generate a code, the code of the last successful operation was available to aid in diagnosing the problem. Using a logic analyzer or a dedicated POST cardan interface card that shows port 0x80 output on a small displaya technician could determine the origin of the problem. Once an operating system is running on the computer the code displayed by such a board may become meaningless, since some OSes, e.g. Linux, use port 0x80 for I/O timing operations. The actual numeric codes for the possible stages and error conditions differ from one BIOS supplier to another. Codes for different BIOS versions from a single supplier may also vary, although many codes remain unchanged in different versions.

Later BIOSes used a sequence of beeps from the motherboard-attached PC speaker (if present and working) to signal error codes. Some vendors developed proprietary variants or enhancements, such as MSI's D-Bracket. POST beep codes vary from manufacturer to manufacturer.

Information on numeric and beep codes is available from manufacturers of BIOSes and motherboards. There are websites which collect codes for many BIOSes.

Original IBM POST beep codes

POST AMI BIOS beep codes

POST beep codes on CompTIA A+ certification exam

These POST beep codes are covered specifically on the CompTIA A+ Exam:

IBM POST diagnostic code descriptions

Macintosh POST

Apple's Macintosh computers also perform a POST after a cold boot. In the event of a fatal error, the Mac will not make its startup chime.

Old World Macs (until 1998)
Macs made prior to 1987, upon failing the POST, crashed silently without playing any sound and freeze, with a single hexadecimal string and a Sad Mac icon on the screen, if working. Macs made after 1987 but prior to 1998, upon failing the POST, will immediately halt with a "death chime", which is a sound that varies by model; it can be a simple beep, a car crash sound, the sound of shattering glass, a short musical tone, or more. On the screen, if working, will be the Sad Mac icon, along with two hexadecimal strings, which can be used to identify the problem. Some Macs made around this time do not use a death chime like Macs made prior to 1987, but retained the same format as those that used the death chimes, such as the presence of the Sad Mac icon and two hexadecimal strings on screen. Later Old World Macs based on PCI architecture prior to 1998 don’t display a Sad Mac icon nor the hexadecimal strings on screen and only plays the death chime.

New World Macs (1998–1999)
When Apple introduced the iMac in 1998, it was a radical departure from other Macs of the time. The iMac began the production of New World Macs, as they are called; New World Macs, such as the iMac G3, Power Macintosh G3 (Blue & White), Power Mac G4 (PCI Graphics), PowerBook G3 (bronze keyboard), and PowerBook G3 (FireWire), load the Mac OS ROM from the hard drive. In the event of an error that is not a fatal hardware error, they display the same screen as seen when holding  at startup but with the error message instead of the "0 >" prompt. In the event of a fatal hardware error, they give these beeps:

New World Macs (1999 onward)
The beep codes were revised in October 1999. In addition, on some models, the power LED will flash in cadence.

Intel-based Macs
With the introduction of Intel-based Macs with EFI-based firmware, the startup tones were changed again. These are not present in Intel-based Macs equipped with a T2 security chip, as its POST process is different from those without a T2 security chip.

Apple silicon-based Macs
The Mac transition to Apple silicon marked a radical change in the POST process in Macs. Unlike most Intel-based Macs that use EFI-based firmware, these Apple silicon-based Macs uses a boot ROM that loads the Low-Level Bootloader (LLB), similar to that of the firmware found in the iPhone and iPad. Like Intel-based Macs with a T2 security chip, the startup tones are absent. In the event of an error that is not a fatal hardware error, an exclamation mark will be displayed on the screen or the device will go into Device Firmware Update (DFU) mode. In the event of a fatal hardware error, nothing will be displayed on screen with no sound being heard. In addition, on some models, the power LED will flash in cadence.

Amiga POST

Amiga historical line of computers, from A1000 to 4000 present an interesting POST sequence that prompts the user with a sequence of flashing screens of different colors (rather than audible beeps as in other systems) to show if various hardware POST tests were correct or else if they failed:

POST sequence of Amiga
The Amiga system performs the following steps at boot:
 Delays beginning the tests a fraction of a second to allow the hardware to stabilize.
 Jumps to ROM code in diagnostic card (if found)
 Disables and clears all DMA and interrupts.
 Turns on the screen.
 Checks the general hardware configuration. If the screen remains a light gray color and the tests continue, the hardware is OK. If an error occurs, the system halts.
 Performs checksum test on ROMs.
If the system fails the ROM test, the screen display turns red and the system halts.

Sequence for all main Amiga models
Almost all Amiga models present the same color sequence when turned on: black screen, dark gray, light gray color screens filling all monitor screen in a rapid sequence (Amigas usually take between 2 and 3 seconds to turn on and boot).

Color screens scheme

Sequence for A4000

Correct tests color sequence scheme
A4000 presents just a light gray screen during its boot time (it just occurs in 2 or max 3 seconds)
 Light Gray
 = Initial hardware configuration tests passed
 = Initial system software tests passed
 = Final initialization test passed

Failed tests color scheme

Amiga keyboard LED error signals
The keyboards of historical Amiga models are not proprietary as it happened in early computer ages, but more pragmatically it was based on international standard ANSI/ISO 8859-1. The keyboard itself was an intelligent device and had its own processor and 4 kilobytes of RAM for keeping a buffer of the sequence of keys that were being pressed, thus can communicate with the user if a fault is found by flashing its main LED in sequence:

Embedded systems

Many embedded systems such as those in major appliances, avionics, communications, or medical equipment have built-in self-test routines that are automatically invoked at power-on.

See also
 POST card
 Serial presence detect

References

External links
 POST as part of the BIOS - by www.basicinputoutputsystem.com (wayback machine)
 AMIBIOS8 Check Point and Beep Code List, Version 1.71 
 AwardBios Version 4.51PG - POST Codes and Error Messages (wayback machine)
 Power poweronselftest.com - from www.poweronselftest.com
 Amiga Power On Self Test and Color Screens Schemes at Wayback Machine (originally on NewTek Inc. site)
 What your Amiga is telling you article at Amiga History Guide
 Power On Self Test Beep Codes for AMI and Phoenix BIOS - from PC Hell.
 Computer Hardware - Additional information on computer POST / Beep Codes - from Computer Hope.

BIOS
Unified Extensible Firmware Interface
Booting