AN/AYK-14. The AN/AYK-14(V) is a family of computers for use in military weapons systems. It is a general-purpose 16-bit microprogrammed computer, designed in 1976 by Control Data Corporation Aerospace Division in Bloomington, Minnesota intended for airborne vehicles and missions. Its modular design provides for common firmware and support software. It is still in use on Navy fleet aircraft including the F/A-18, and the AV-8B. The AN/AYK-14(V) family of systems is designed to meet MIL-E-5400 (airborne) requirements.

General information 
The AYK-14(V) computer was designed for military weapons systems, capable of operating at altitudes up to 70,000 feet and in temperatures ranging from from -54C to 71C. A complete AN/AYK-14(V) computer system is composed of processor, memory and input/output (I/O) modules. The 16-bit CPU is based on the AMD 2900 series chips, capable of running between 0.3 and 2.3 mega-instructions per second (MIPS).

Applications 

 Aircraft
 F-18 Central Mission Computers
 LAMPS MKIII Central Mission and ESM Processor
 EA-6B Electronic Warfare Computer
 E-2C Passive Detection System Computer
 AV-8B Central Mission Computer
 EP-3 Electronic Data Processor
 P-3C ESM Processor
 F-14 Avionics Improvement Program
 Special applications
 ALWT Torpedo Guidance Computer
 ACLS Landing System Processor
 DASS ASW Training Computer
 Firebrand Drone Guidance Computer

History
The AYK-14(V), designed in 1976, had an original unit price of $185,000. By 1986, it was designated as the US Navy's Standard Airborne Computer. In 1987, the computer was upgraded delivering twice the performance and eight times the memory. Upgraded again in 1991, the operational speed was improved to 18 MIPS. Over 10,000 units have been delivered.

Technical description 

The AN/AYK-14(V) series of systems are microprogrammed computers, intended for airborne vehicles and missions, but are also capable of shipboard and land use.

General characteristics 

The AN/AYK-14(V) is a general-purpose 16-bit computer capable of 675 thousand operations per second. Its modular design provides for common firmware and support software.

System specifications and features

General Features 
The AN/AYK-14(V) is designed to be physically and functionally modular. It can be expanded with plug-ins and additional enclosures. It's microprogrammed to emulate an extended AN/UYK-20. LSI components are used, and the system is packaged in ARINC Air Transport Rack (ATR) enclosures.

Central Processor 
 Microprogrammed
 2's complement arithmetic
 Executive and user states
 Two sets of 16-word by 16-bit general registers
 Two status registers
 Three-level interrupt system
 Addressing to 524,288 words
 Fixed and floating-point arithmetic
 4-, 8-, 16-, and 32-bit operands
 16-, and 32-bit instructions
 Direct, indirect, and indexed addressing
 Optional hardware floating-point module
 Loadable/readable 32-bit RTC clock, 1-MHz rate; 16-bit monitor clock, 10-KHz rate
 Built-in-test functions
 Bootstrap PROM memory
 Power failure shutdown/recovery
 I/O controller capability
 Chaining capability
 Control memory for each channel
 Up to 16 channels in various combinations
 Interface to support equipment
 Sample instruction times
 Shift 1.5 μsec
 Add, subtract 0.8
 Multiply 4.2
 Divide 8.4
 Basis: single GPM, core memory, overlapped access, interleaved addresses

Memory control and memory 
 Core memory module (CMM), 32K words of 18 bits
 Semiconductor memory module (SMM), 32K words of 18 bits
 Interchangeable core and semiconductor memory modules
 CMM has 900-nanosecond cycle time and 350-nanosecond access time
 SMM has 400-nanosecond cycle time and 200-nanosecond access time
 Interleaved or non-interleaved addressing
 Read/write expandable memory (RXM), 4K x 18-bit RAM with optional 4K PROM
 Parity bit per byte
 Protect features
 Write protect
 Read protect
 Execute protect
 Block protect in paging system
 Memory controller with paging to 524,288 words

I/O Processor (optional) 
 I/O controller capability
 Instruction subset compatible with central processor
 Microprogrammed
 Usable in conjunction with a central processor or as a stand-alone processor
 Real-time and system clocks
 16-word by 16-bit general register set
 Addressing to 65,536-words
 Fixed point 16-bit arithmetic
 Interface to support equipment

Subsystems

Processor 
The general processing control module (GPM) and the processor support module (PSM) make up a 16-bit central processor. for a general purpose computer. The extended arithmetic unit (EAU) is 32-bit floating-point hardware, controlled by the GPM. An input/output processor (IOP) can be added to increase processing throughput. It can function as an input/output controller (IOC) or as a single-module, 16-bit general purpose CPU.

Memory 
The memory subsystem includes two 32K-word with an 18-bit word length. The memory control module (MCM) provides the interface between the GPM and the memory modules. The read/write expandable memory module (RXM) is a 4K word module with an 18-bit word that serves as memory for the IOP.

Input / Output 

The AN/AYK-14(V) can support up to 16 I/O channels. A single chassis provides four to six I/O channels. XN-3 type enclosures can be added to expand the number of I/O channels. I/O module types include:

 MIL-STD-1553A avionics serial multiplex bus
 NTDS (fast, slow, ANEW, and serial) MIL-STD-1397
 RS-232-C
 PROTEUS

Environmental requirements 

The AN/AYK-14(V) family of systems is designed to meet MIL-E-5400 (airborne) requirements.

See also 

 AN/UYK-20
 AN/UYK-44
 CMS-2 programming language
List of military electronics of the United States

References 

Military computer systems of the U.S. Department of Defense
Equipment of the United States Navy
Military electronics of the United States
Military equipment introduced in the 1970s
16-bit computers
Aircraft components