Differential Hall Effect Metrology. Differential Hall Effect Metrology (DHEM) is an electrical depth profiling technique that measures all critical electrical parameters (resistivity, mobility and carriers) through an electrically active material at sub-nanometer depth resolution. DHEM is based on the previously developed Differential Hall Effect (DHE) method. In the traditional DHE method, successive sheet resistance and Hall effect measurements on a semiconductor layer are made using Van der Pauw and Hall effect techniques. The thickness of the layer is reduced through successive processing steps in between measurements. This typically involves thermal, chemical or electrochemical etching or oxidation to remove material from the measurement circuit. This data can be used to determine the depth profiles of carrier concentration, resistivity and mobility. DHE is a manual laboratory technique requiring wet chemical processing for etching and cleaning the sample between each measurement, and it has not been widely used in the semiconductor industry. Since the contact region is also affected by the material removal process, the traditional DHE approach requires that contacts be newly and repeatedly be made to collect data on the coupon. This introduces contact related noise and reduces the repeatability and stability of the data. The speed, accuracy and, depth resolution of DHE has been generally limited because of its manual nature. The DHEM technique is an improvement over the traditional DHE method in terms of automation, speed, data stability and, resolution (≤1nm depth resolution). DHEM technique had been deployed in a semi-automated or automated tools.

Since DHEM and DHE are both based on the Van der Pauw technique, the measurement does not rely on any reference materials and is thus applicable to all semiconductor material systems.

History 
The first attempt at automating the DHE measurement were made by Galloni, et al. However, reliability and depth resolution of this approach was not adequate. Recently, industry has shown renewed interest in high-resolution electrical data profiles (resistivity, mobility and carrier profiles) to understand the effects of various processes on semiconductor materials (silicon, silicon-germanium alloys, germanium, some III-V and II-VI materials) used in the CMOS, RF and power industries. Active Layer Parametrics (ALP) Inc. was established in 2014 to commercialize the technology and currently produces and deploys semi-automated and fully-automated DHEM equipment. ALP has successfully deployed the DHEM systems in the United States and Asia.

Need for Electrical Profiling 
Development of next-generation semiconductor technologies comes with escalated costs due to ever increasing technical challenges and extended development cycles needed to meet such challenges. Dependable, high-resolution electrical profiling techniques are crucial to accelerating film/device development efforts as well as for prediction and determination of device failure. Traditional techniques such as four-point probe (4PP), secondary ion mass spectrometry (SIMS) and Hall effect measurements do not measure electrical depth profiles and are, by themselves, not adequate to characterize semiconductor layers with electrical properties that vary as a function of depth through the film (i.e.; surface activation levels may be different than activation in the deeper, or 'bulk', layers).

SIMS is widely used but provides only chemical composition profile data which may be translated into electrical property information for the limited process conditions where all the dopants are fully activated in the layer. Advanced device structures (like <14nm nodes) need to use a very wide range of process conditions that do not satisfy this requirement, for example, ohmic contact formation for source/drain regions of transistors necessitates introduction of very high concentration of dopants (as much as 4-8%) much of which may not be electrically active near the surface. In such cases, 4PP and Hall effect measurements, which provide average resistivity and effective mobility values provide incomplete information since both resistivity and mobility values change throughout the film or structure, especially after anneal steps.

This need for depth profiling electrical parameters gave rise to development of techniques such as Scanning Spreading Resistance Microscopy (SSRM) and Electrochemical Capacitance-Voltage (E-CV) techniques. Both there techniques measure either the resistivity or carrier concentration values, and without providing mobility depth profiles. This necessitates assuming a mobility and/or resistivity profile values for the material, which are based on limited datasets and do not capture the electrical effect of new processing technologies developed in recent years. The silicon mobility models are based on a 1981 publication, while the germanium models are mostly taken from a 1961 paper. These models may not be absolutely relevant to materials produced today using modern processes such as atomic layer deposition (ALD) and advanced epitaxial growth techniques, which can introduce very high concentrations of dopants in the films and utilize non-equilibrium approaches such as laser annealing. Furthermore, models do not directly expand to include new materials such as Si-Ge alloys with varying amounts of Ge. There is also limited electrical data for thin films of III-V materials, such as GaN, grown by different approaches. Therefore, a technique that can directly measure depth profiles of carrier concentration, resistivity and mobility through layers in an integrated tool at high depth resolution is valuable.

DHEM Measurement Process 

In a DHEM measurement, a Van der Pauw cross is used as a test pattern. The pattern is prepared on the coupon sample to be characterized such that the Van der Pauw cross or shape is on a mesa structure which isolates the top film to be characterized from its surroundings. An insulating barrier is important to fully isolate the semiconductor layer of interest from the substrate below; otherwise the electrical measurements would be compromised by substrate effects (this is a requirement for all electrical measurements on thin films including four-point-probe and the traditional Hall Effect). This insulating layer may be an oxide layer, as is the case with buried-oxide (BOX) semiconductors, or it can be a p-n junction, which will naturally have a depleted region at the electrical junction or it may even be a very high resistivity semi-insulating substrate. The DHEM system then applies four electrical contacts to the Van der Pauw mesa structure in addition to a nozzle (or chamber) that can deliver chemical solutions, DI water or gases to a well-defined test region. The test region is the center of the test pattern. The dimensions of the test region may be changed to suit application and currently can be as small as 0.2-0.5mm square to 2mm square. At this point in the process, the electrically active thickness of the layer at the test region can be reduced in a step-wise or digitized manner using highly controllable chemical and/or electrochemical means. DHEM leverages two ways to achieve controlled removal of the material. The first method is to etch away material. The second method is to convert a portion of the material into an insulating oxide thereby removing it from the electrical circuit. As either process is carried out, measurements are collected from the remaining electrically active layer after each thickness reduction step using Hall effect and Van der Pauw techniques. This data can then be plotted to yield depth profiles of resistivity, mobility, and carrier concentration.

A highly controllable process is needed to achieve fine depth resolution. Electrochemical methods for both etching and oxidation are well suited for this purpose. In general, each new material needs a new recipe. For materials that form stable oxides, such as Si, oxidation approach is attractive. For materials that form poor oxide layers (such as Ge) an etch-based approach can be deployed. In any case, the thickness reduction process needs to be calibrated, highly controllable, and repeatable so that the thickness of the material can be controlled and monitored. It is possible to achieve depth resolutions in the 3-5 Angstrom range, making true sub-nm profiling of such materials possible.

Use cases 
Process engineers have used the DHEM technique to profile activated semiconductor materials typically associated with semiconductor device manufacturing such as silicon, silicon-germanium, germanium, etc. Directly measured carrier, resistivity and mobility depth profiles allow process engineers to correlate variations in electrical behavior of the material with process variations, both intentional or unintentional. Secondary Ion Mass Spectrometry (SIMS) is often used to complement the DHEM dataset – SIMS provides the total dopant profile while DHEM provides the activated portion of the total dopant along with mobility and resistivity profiles.

The DHEM technique has been applied across various material and process conditions. Some exemplary work on highly-doped epi films can be found here. This publication demonstrates application to laser-based anneal techniques. Implant and RTA condition splits evaluated using DHEM can be found here. Recently some work was published on using DHEM to complement data collected from the Atom Probe Tomography (APT) technique.

Comparison with Other Techniques 
Recently researchers presented data that demonstrated the robustness of the DHEM technique and compared the data collected with two other techniques: Scanning Spreading Resistance Microscopy (SSRM), which is based on the Scanning Probe Microscopy method, and Spreading Resistance Profiling (SRP). SRP and SSRM are both contact based methods that measure spreading resistance. DHEM carrier concentration profiles were in better agreement with the average carrier concentration values to a greater extent than the calibrated SSRM carrier profile. DHEM also measured surface features and the junction interface (between the n-type epi-layers and the p-type substrate). The technique also provided data profiles with correct depth scales when compared with SIMS or cross-sectional TEM data. It was found that SRP underestimated near-surface carrier concentration values and could not resolve near-junction carrier concentration profile sharpness. DHEM provided dependable results through the thickness of the samples measured. It is possible to integrate the DHEM carrier profiles and calculate sheet values, like sheet resistance, which are also measured routinely using four-point probe techniques providing an in-built check. Such a comparison showed sheet values calculated from DHEM profiles came within a few percent of four-point probe measurements, adding to the verifiability of DHEM data.

References 

Semiconductor analysis