Alexander Tetelbaum

Alexander Tetelbaum (born August 16, 1948) is an American-Ukrainian computer scientist , educator, academician , inventor , and novelist.
Tetelbaum has been recognized for his contributions to the fields of Electronic Design Automation (EDA) and Artificial Intelligence (AI), areas in which he has been active since the 1960s. He also served as the founding president of the International Solomon University, established in 1991 to support academic research and innovation 
He authored 43 U.S. patents and more than 250 publications—including 17 books, over 100 internationally refereed papers, and 150 conference proceedings.
==Early life and education==
Tetelbaum was born in Kyiv, Ukraine on August 16, 1948. Alexander graduated from the Kyiv Mathematical High School with a Silver medal. This and other documents, diplomas, etc. can be found on the Google Photo website.[Docs] Documents of Alexander Tetelbaum”, direct public link: goo.gl/o7ooafQghXFs4Gpr5 
Tetelbaum was enrolled in the National Technical University of Ukraine in 1966. In 1967, his department chair, Professor Vitaly Sigorsky, hired him as a part-time junior researcher. Tetelbaum wrote his first paper in 1968.Tetelbaum, A. "Some Theorems about Circuit Matrix Functions," in Electronic Design Automation Journal, Kyiv, 1971. In this paper, he figured out that computers could not only solve equations but also generate them. 
Tetelbaum graduated KPI in 1972 with an MS in Electronics with a high honor.
==Education==
After graduation, he worked as an engineer in the Kyiv Institute of Cybernetics (1972–1973) before entering a PhD program at the National Technical University of Ukraine. 
In 1975, he completed his PhD dissertation, titled “Research and Development of Computer Methods for Electronic Design Automation.” (based on 19 published papers). He was awarded a PhD in Electrical and Computer Engineering by the University’s Scientific Panel. 
Tetelbaum got his Doctor of Engineering Science (advanced PhD or Doctor of Science) in Computer Sciences and Engineering, National University of Radio-Engineering of Russia (Taganrog), 1986—title of Thesis: “Mathematical Foundations of Metrically Topological Design of VLSI in CAD Systems.”
==Academic career==
Administrative Appointments
President, International Solomon University, Kyiv, Ukraine, 1991- 1995
 Regular Appointments 
Professor, Distinguished Scientist[LI],[Docs], Computer and Electrical Engineering Department, National Technical University of Ukraine, 1980-1992
Professor , Electrical Engineering and Computer Science Department[LI],[Docs], Michigan State University, 1993-1996
==Corporate career==
Appointments
Engineer, CAD Department, Kiev Institute of Cybernetics, 1972-1973
Junior Scientist, Computer Science Department, National Technical University of Ukraine, 1973-1975
Head of Design Automation Lab, National Technical University of Ukraine, 1975-1987
EDA Manager, Silicon Graphics Corporation, 1996-1998
Principal Engineer, LSI Corporation, 1998-2012
CEO, Abelite Design Automation, Inc. , 2012-2022
Professional Memberships[LI],[Docs]
Member of the American Association for the Advancement of Science (AAAS), 1993-2012
Senior Member, Institute of Electrical and Electronics Engineers (IEEE), 1993-2010
Member of Gigascale Silicon Research Center, 2003-2014
Member, Silicon Integration Initiative (Si2), 2006-2015
==Awards and honors==
Three Soviet Union and Ukraine medals[Docs] (1985-1993)
“Best Technical Paper Award” by the SNUG Technical Committee[Docs] (2011)
"The Best Paper of the Year" of the magazine of Foreign Electronics[Docs] (1977), (1981)
Tetelbaum is featured on WorldAtlas.com as a notable Ukrainian figure native , acknowledged for his contributions as an inventor and scientist. A star has been named "Dr. Alexander Tetelbaum" in the constellation Leo (Right Ascension: 10h41m55.30s, Declination: +08.24.52.0) 
Tetelbaum is a Fellow and Honorary Doctor at several academic institutions and organizations, including[LI],[Docs]:
•	Foreign Fellow of the Russian Academy of Natural Sciences (1995) 
•	Foreign Fellow of the Russian Fuzzy Systems Association (since 1996) 
•	ABI Research Fellow at the American Biographical Institute (1996)
•	Honorary Doctor at Dneprodzerzhinsk State Technical University (1996)
== Contributions in computer science ==
Tetelbaum has been working in computer science since 1966. His primary research interests have been in Electronic Design Automation (EDA) and Artificial Intelligence (AI). In the 1960s, these fields were deeply intertwined, with EDA emerging as one of the earliest and most successful applications of AI. The 8 mentioned science books describe most of the contributions. Below, only additional sources like patents and major papers are cited.
Howard Baldwin, Executive Editor of Electronic Business magazine, highlighted Dr. Tetelbaum’s contributions in the 30th-anniversary issue) Baldwin wrote: “None of the Big 3 EDA companies—neither Cadence Design Systems, Mentor Graphics, nor Synopsys—were around back in 1975, so we turned to LSI Logic’s Alexander Tetelbaum to comment on its beginnings. Why? Because in 1975 he received his Ph.D. in computer engineering from Kiev Polytechnic University and later that year published a book based on his doctoral dissertation outlining electronic design problems and discussing several methods and algorithms to solve them. Its title: ‘Electronic Design Automation’.”
Tetelbaum made several contributions to the theory, methodology, and tools in Physical design (electronics). His work was mainly in Design flow,TETELBAUM, A., MOLINA, R. Method And Apparatus Of Core Timing Prediction Of Core Logic In The Chip-Level Implementation Process Through An Over-Core Window On A Chip-Level Routing Layer. Patent No. US 8,321,826. November 27, 2012. TETELBAUM, A., Integrated Circuit Design Flow With Capacitive Margin. Patent No. US 6,810,505. Oct. 26, 2004 placement and routing toolsTETELBAUM, A., CHAKRAVARTY, S. Electronic Design Automation Tool And Method For Optimizing The Placement Of Process Monitors In An Integrated Circuit. Patent No. US 8,010,935. August 30, 2011. TETELBAUM, A., MOLINA, R. Method and Apparatus of Core Timing Prediction of Core Logic in the Chip Level Implementation Process through an Over-Core Window on a Chip-Level Routing Layer. Patent No. US 7,739,639 B2. Jun. 15, 2010. TETELBAUM, A., Method and Computer Program for Detailed Routing of an Integrated Circuit Design with Multiple Routing Rules and Net Constraints. Patent No. US 7,370,309. May 6, 2008. 
TETELBAUM, A., MBOUOMBOUO, B., Method Of Floor-planning And Cell Placement For Integrated Circuit Chip Architecture With Internal I/O Rings. Patent No. US 7,174,524. Feb 6, 2007. TETELBAUM, A., Minimal Bends Connection Models for Wire Density Calculation. Patent No. US 7,076,406. Jul. 11, 2006. TETELBAUM, A., Wire delay distributed model. Patent No. US 6,880,141. Apr.12, 2005. TETELBAUM, A., Global Chip Interconnect. Patent No. US 6,842,042. Jan. 11, 2005. TETELBAUM, A., Method of Control Cell Placement To Minimize Connection Length And Cell Delay. Patent No. US 6,609,238. Aug. 19, 2003. TETELBAUM, A., Method Of Control Cell Placement For Datapath Macros In Integrated Circuit Designs. Patent No. US 6,588,003. Jul. 1, 2003. TETELBAUM, A., Method of Datapath Cell Placement For Bitwise and Non-Bitwise Integrated Circuit Designs. Patent No. US 6,560,761. May 6, 2003. TETELBAUM, A., Method Of Global Placement Of Control Cells And Hardmac Pins In A Datapath Macro For An Integrated Circuit Design. Patent No. US 6,507,937. Jan. 14, 2003. TETELBAUM, A., Method of Datapath Cell Placement For An Integrated Circuit. Patent No. US 6,496,967. Dec. 17, 2002. TETELBAUM, A., Pin Placement Method For Integrated Circuits. Patent No.: US 6,449,760. Sep. 10, 2002. Printed circuit and Layout designs, Integrated circuit design,TETELBAUM, A. Circuit Timing Analysis Incorporating the Effects of Temperature Inversion. Part 1. Patent No. US 8,645,888. February 4, 2014. TETELBAUM, A. Intelligent Dummy Metal Fill Process For Integrated Circuits. Patent No. US 8,397,196. March 12, 2013. TETELBAUM, A., Method for Estimating Porosity of Hardmacs. Patent No. US 6,532,572. Mar. 11, 2003. the Partitioning problem, Placement (electronic design automation).TETELBAUM, A., Method of Estimating a Total Path Delay in an Integrated Circuit Design with Stochastically Weighted Conservatism. Patent No. US 7,213,223. May 1, 2007. global and detailed Routing (electronic design automation), and Signal integrity,TETELBAUM, A. Reducing Path Delay Sensitivity to Temperature Variation in Timing-Critical Paths. Patent No. US 8,225,257. July 17, 2012. TETELBAUM, A., Method and Computer Program For Estimating Speed-Up And Slow-Down Net Delays For Integrated Circuit Design. Patent No. US 7,178,121. Feb 13, 2007. TETELBAUM, A., Method of Noise Analysis And Correction Of Noise Violations For An Integrated Circuit Design. Patent No. US 7,062,731. Jun. 13, 2006. TETELBAUM, A., Integrated design system and method for reducing and avoiding crosstalk. Patent No. US 6,907,586. Jun. 14, 2005. addressing issues such as Crosstalk, TETELBAUM, A., Method of Automated Repair of Crosstalk Violations And Timing Violations In An Integrated Circuit Design. Patent No. US 7,062,737. Jun. 13, 2006. TETELBAUM, A., Intelligent Crosstalk Delay Estimator For Integrated Circuit Design Flow. Patent No. US 7,043,708. May 9, 2006. Clock signal,TETELBAUM, A., Method of Finding Critical Nets in an Integrated Circuit Design. Patent No. US 7,107,558. Sep. 12, 2006. TETELBAUM, A., Method of Clock Driven Cell Placement and Clock Tree Synthesis for Integrated Circuit Design. Patent No. US 7,039,891. May 2, 2006. TETELBAUM, A., Method for minimizing clock skew by relocating a clock buffer until clock skew is within a tolerable limit. Patent No. US 6,725,389. Apr. 20, 2004. TETELBAUM, A., Method For Minimizing Clock Skew For An Integrated Circuit. Patent No. US 6,594,807. Jul. 15, 2003. TETELBAUM, A., Method of Generating An Optimal Clock Buffer Set For Minimizing Clock Skew In Balanced Clock Trees. Patent No.: US 6,442,737. Aug. 27, 2002. Noise reduction,TETELBAUM, A., Method and Apparatus For Implementing A Co-Axial Wire In A Semiconductor Chip. Patent No. US 7,015,569. Mar. 21, 2006. TETELBAUM, A., Intelligent engine for protection against injected crosstalk delay. Patent No. US 6,948,142. Sep. 20, 2005. TETELBAUM, A., Integrated design system and method for reducing and avoiding crosstalk. Patent No. US 6,907,590. Jun. 14, 2005. TETELBAUM, A., Integrated Design System and Method for Reducing and Avoiding Crosstalk. Patent No. US 6,594,805. Jul. 15, 2003. and Clock signal implementation. TETELBAUM, A., et al. Method and Computer Program for Static Timing Analysis with Delay De-Rating and Clock Conservatism Reduction. Patent No. US 7,480,881. Jan. 20, 2009. TETELBAUM, A., Method of Clock Buffer Partitioning To Minimize Clock Skew For An Integrated Circuit Design. Patent No. US 6,502,222. Date of Patent: Dec. 31, 2002. TETELBAUM, A., Balanced Clock Placement for Integrated Circuits Containing Megacells. Patent No.: US 6,480,994. Nov. 12, 2002. 
He also contributed to methods for Electronic circuit simulation,TETELBAUM, A. Circuit Timing Analysis Incorporating the Effects of Temperature Inversion. Part 1. Patent No. US 8,181,144. May 15, 2012. TETELBAUM, A., Elmore Model Enhancement. Patent No. US 6,543,038. Apr. 1, 2003. Static timing analysis , Logic simulation, and VLSI Testing. 
The developed force-directed placement methodTETELBAUM, A. "The Force Placement of a Planar Graph", Academy of Science of the USSR News Engineering Cybernetics, 1988, No. 3, pp.131 137. [Translated in English in the USA: Journal of Computer and Systems Sciences International. and topological routing method achieved high-quality results. One of his contributions was the generalization of Rent’s rule , which accounted for scenarios where blocks grew extraordinarily large, even becoming autonomous systems, as well as for hierarchical systems . He also contributed to the study and handling of temperature inversion . 
In the late 1960s, Tetelbaum began developing methods in one of the initial AI fields known as Electronic design automation. His work in this area yielded useful results, as the Soviet Union military complex invested in the development of advanced design tools to address the growing complexity of military electronic systems. 
Focusing on a narrower scope of AI, he developed programsTETELBAUM, A. ., CHAKRAVARTY, S. Timing error sampling generator and a method of timing testing. Patent No. US8,473,890B2. June 25, 2013. TETELBAUM, A., JAMANN, J., LAUBHAN, R., ZAHN, B. Implementing And Checking Electronic Circuits With Flexible Ramptime Limits And Tools For Performing The Same. Patent No. US 8,332,792. December 11, 2012. TETELBAUM, A., CHAKRAVARTY, S. System And Method For Reducing The Generation Of Inconsequential Violations Resulting From Timing Analyses. Patent No. US 7,971,169. Date of Patent: Jun. 28, 2011. TETELBAUM, A., Method for Estimating Cell Porosity of Hardmacs. Patent No. US 6,611,951. Aug. 26, 2003. that served as building blocks for EDA tools. 
AI projects under his purview also included the design of aircraft (at the Antonov plant) , as well as navy military submarines and ships. 
Dr. Tetelbaum developed methods that enabled computers to perform fast Search in Graphs.TETELBAUM, A. "Optimal Graph Path Search in the State Space", Academy of Science of the USSR News Engineering Cybernetics, 1980, No. 6, pp.119 125. [Translated in English by Plenum Publishing Corporation (USA). TETELBAUM, A. "A General Algorithm of the Optimal Path Search", in Proc. of Intern. AM SE Conf. on Systems Analysis, Control & Design--SYS'94, Lyon, France, 1994, Vol. 1, pp. 131-140. and Search spaceTETELBAUM, A. "Generalized Optimum Path Search", IEEE Trans. of Computer Aided Design of Integrated Circuits and Systems, CAD/ICAS, Vol. 14. NO. 12, December 1995, pp. 1586-1590. It included handling complex search functions.TETELBAUM, A. "Complicated Path Function Search", in Proc. of 37th Midwest Symp. on Circuits and Systems, Lafayette, Louisiana, USA, August 1994, pp. 385-388. TETELBAUM, A. "Path Search for Complicated Function", in Proc. of 1995 IEEE International Symposium on Circuits and Systems, Seattle, Washington, USA, April-May, 1995, pp.245-248 
Other AI contributions include methods and programs for Mathematical optimization,TETELBAUM, A. "Optimization of Layout with the Simplex Method", Electronic Design Automation, Kiev, 1982, No. 25. where an optimal solution could involve subpaths that were themselves non-optimal leveraging generating Decision tree.TETELBAUM, A., "Elements of Learning in CAD Systems", Proc. of the Conference on Physical Design Automation, Kaunas, 1984.
He also delved into Object recognition.TETELBAUM A.,"Formation of Graphic Objects", Control Systems and Machines, Kiev, 1975, No. 1. and Image classification.TETELBAUM, A., "A Program for Structure Selecting of a Graphic System", Research Works in Universities, Kiev, 1975, No. 1. TETELBAUM, A. "Models of Electronic Devices in Solving Design Problems", Cybernetics. 1978, No. 2, pp.47 54. [Translated in English by Plenum Publishing Corporation (USA).]), applying these methods specifically to microchip layouts.
During his three-year tenure at Michigan State University (MSU), Dr. Tetelbaum contributed to the field of Evolutionary computation and Evolutionary algorithm
TETELBAUM, A., “Genetic Compaction”, in Proc. of Int. Conf. on Intelligent CAD, Gelenzhik, 1995, in Collection of Papers “Int. CAD”, TSURE Press, vol. 6, 1996. KUREICHIK, V.M., TETELBAUM, A.Y., "Combined Genetic and Local Search Algorithm for the Quadratic Assignment Problem" in Proc. of the First International Conference on Evolutionary Computation and Its Applications, June 24-27, 1996, Moscow, Russia, pp. 335-341. as part of a research group led by Dr. Erik Goodman in the renowned “Garage” program[GARAGE]. His work included advancements in Genetic algorithm,
KUREICHIK, V. M., TETELBAUM A., “Hybrid Genetic and Local Search Heuristic for the Quadratic Assignment Problem”, in Proc. of Computer-Aided Design International Conference in Russia, Gelengick, 1996, pp. 41-46. and Bin packing.TETELBAUM, A. "A Partitioning Algorithm with the Characteristic Function Analysis", Electronic Design Automation, Kiev, 1977, No. 16. TETELBAUM, A. "Estimation of the Graph Partitioning for a Hierarchical System", in Proc. of the Seventh SIAM Conference on Parallel Processing for Scientific Computing, San Francisco, California, USA, February 1995, pp. 500-502.
Additionally, Tetelbaum’s work encompassed applied CombinatoricsTETELBAUM, A. "The Probability Approach for Size Estimation of Printed Circuits", Transaction of Soviet Higher Education Radioelectronics, 1979, Vol. 22, No. 3, pp.35 40. [Translated in English by RCS Journals, Inc. (USA), Title: Radio Electronics and Communications Systems. algorithms on graphs and Hypergraphs. TETELBAUM, A. and SHRAMCHENKO, B.L. "Hypergraphs for Planar Analysis of Electronic Circuits", Academy of Science of the USSR News Engineering Cybernetics, 1978, No. 5, pp.127 136. [Translated in English by RCS Journals, Inc. (USA), Title: Radio Electronics and Communications Systems.] TETELBAUM, A. "Imbedding of a Graph with the Quasiminimal Edge Intersection Number", Academy of Science of the USSR News Engineering Cybernetics, 1989, No. 2, pp.173 175. [Translated in English in the USA: Journal of Computer and Systems Sciences International]. 
Also, some of Dr. Tetelbaum’s contributions were in the domain of Weak artificial intelligence. These included work in Parallel computing.TETELBAUM, A. "A Sequential-Parallel Algorithm for Placement ", Control Systems and Machines, Kiev, 1977, No. 5. TETELBAUM, A. "The Adequate Topological IC Model, Parallel Planarization and Embedding", Micro Electronics, Moscow, 1985, No.2 (50). TETELBAUM, A. "Acceleration of the Graphic Information Processing", Programming, Varna, 1989, No. 14. 
Dr. Tetelbaum was instrumental in analyzing the Computational complexityPETRENKO, A.I. and TETELBAUM, A. "Reduction of CAD Problems to Bivalent Programming", Cybernetics, 1976, No. 3, pp.64 69. [Translated in English in the USA: Journal of Computer and Systems Sciences International. PETRENKO, A.I., TETELBAUM, A. "The Algebraic Formulation of CAD Problems", Cybernetics. 1981, No. 2, pp.49 55. [Translated in English by Plenum Publishing Corporation (USA)]. and developing problem solvers for AI. His commitment to reasoning, puzzle-solving, and Deduction led to progress in nonstandard Problem solving[4 educational books], with a strong focus on nonformal task formulation.
==Books==
* 8 Science books cited in (Top) section 
* 4 Educational books dedicated to methodologies for solving creative and non-standard problems
* Yes-No Puzzles-Games 
* Puzzle Games for Kids	 	
* Solving Non-Standard Problems	 
* Solving Non-Standard Very Hard Problems 	 
* 3 Novels blending fiction with thought-provoking themes
* Omerta Operations
* Executive Director >
* Eruption Yacht >
* Entertaining books
* Artificially Intelligent Humor >
==Personal life==
In 1993, Dr. Tetelbaum arrived in the United States as a visiting professor at Michigan State University (MSU). He obtained his U.S. Green card in 1993 under the classification of “alien of extraordinary ability in Science and Education” [Section 203(b)(1)(A)].
In 2000, he became a U.S. citizen[Docs]. Tetelbaum was openly critical of the Soviet system, as reflected in his writings about PerestroikaTETELBAUM, A. "CAD Education and Science in Ukraine after Perestroika", in Proc. of EURO-DAC'94, Grenoble, France, September 1994, pp.688-693, where he detailed its unhealthy socio-political climate. 
===Hobbies and Interests===
Dr. Tetelbaum enjoys oil painting, table tennis, volleyball, Fast chess, and solving or creating nonstandard problems. 
Dr. Tetelbaum is fluent in four languages: English, Russian, Ukrainian, and French
Aliases. Dr. Tetelbaum is known by various names across languages:
* English: Alexander Y. Tetelbaum and Alexander Y. Tetelbaum
* Russian: Алеκсандр Яковлевич Тетельбаум
* Ukrainian: Олеκсандр Якович Тетельбаум
Category:1948 births
Category:Computer scientists
Category:Educators
Category:Academics
Category:Inventors