FFRISC

FFRISC is a RISC architecture with an 8-bit instruction width created by User:Oshaboy in 2020. The 8-bit instruction width means there are only 256 possible instructions. 
== Overview ==
FFRISC uses 4 General Purpose(-ish) 8-bit registers named A,B,X and Y. And 3 16-bit Z80 style Shadow Registers. And a 16 bit frame register DP (Which can also be used as a stack pointer with some extra code). all instructions work on those registers except loads and stores. There is a 1 bit flag f that sometimes acts as a carry flag, sometimes a zero flag and sometimes a mode flag. 
== Instruction list ==
There are about 250 instructions but all can be divided into a few categories. 
==== Binary Operations ====
 MOVE D,R - copies D to R (MOVE A,A being NOP)
 XOR D,R - XORs D and R and puts the result in D. (XOR R,R clearing R). f is set if the result is 0 or 255 and reset otherwise.
 AND D,R - ANDs D and R and puts the result in D. (XOR R,R clearing R). f is set if the result is 0 and reset otherwise.
 OR D,R - ORs D and R and puts the result in D. (XOR R,R clearing R). f is set if the result is 255 and reset otherwise.
 ADD D,R - Adds D and R and puts the result in D. f is the carry bit. 
 ADDF D,R - Same as ADD but ADDs the flag aswell. 
 SUBF D,R - Subracts R and the carry flag from D. f is the borrow bit. 
==== Unary Operations ====
 NOT D - bitwise nots a register and f. 
 RR D - Rotates D into f and f into d. 
 JUMP D - adds D (as a signed byte) to PC
 JUMPLINK D - same as JUMP D but also puts the return address in YX. 
 INCF D - if the flag is set, increments D. carrying into f
 DECF D - if the flag is reset, decrements D. borrowing from f. 
==== Memory Operations ====
These operations store when the flag is set and load when the flag is reset. There are 3 addressing modes. 
 MEMORY R,[PC+S]
 MEMORY R,[DP+S]
 MEMORY R,[YX]
==== Other Instructions ====
 SWAP AB - Swaps AB with its shadow register. 
 SWAP YX - Swaps YX with its shadow register.
 SWAP DP - Swaps DP with its shadow register. 
 XYDP - swaps YX with DP. 
 INC DP - Increments DP regardless of f. 
 DEC DP - Decrements DP regardless of f
 SKIPF - Skips next instruction if flag is set. 
 SET - Sets f to 1
 RESET - resets f to 0
 FLIPF - Sets the flag to 0 if the flag is 1 and vica versa. 
 LONGJUMP - Jumps unconditionally to YX 
 MULT - Multiplies A and B and puts the result into AB. The operation is signed if f is 1 and unsigned if f is 0. 
 IN - inputs a bit to f.
 OUT - outputs a bit to f. 
 COMPRESSED - Sets the execution mode to a subset of the instructions encoded with 4 bits per instruction (this was never completed). Joke on ARM's "Thumb mode"
== I/O Details ==
All I/O is done serially. You can pretend the CPU has 1 I/O pin and you can decide what to do with it. In Reality the source code for the interpreter has a header called "IO.h" and you link code corresponding with how you want the I/O to work at compile time. The reference implementation gives you character and number output. 
== Further Reading ==
GitHub repo of Interpreter and Assembler (without labels)
 
This google sheet of every instruction.
Category:Languages
Category:Low-level
Category:Turing complete
Category:Implemented
Category:2020
Category:Self-modifying