Authiik Computing Technology

= Fundamental Concepts =
== Structure of Data ==
The way authiik computers measure data is different from how human digital computers do. Humans and authiik have a shared concept of the bit, a base unit that is either true or false, on or off, a one or a zero. That is where the shared measurements end. Where human computers had standardized on the use of the eight-bit word, early authiik computing standardized on a length of six bits, a unit called the "vash" in ukitii. 
A vash could store one of 64 characters in its address, or 127 if the character set uses a shift symbol, which for most applications was not required. Ukitii, which was a language taught in schools in more than half off the world's countries by the time computers entered the consumer space, had only 24 characters in its alphasyllabary, plus eight digits. Combined with commonly used symbols and operators, this number hardly ever exceeded 64 in most sets of characters, allowing for block and line drawing characters to be added for simple graphical interfaces. Shifting symbols caused the loss of one character in the set, limiting the set to a maximum of 63 characters, but allowed the computer to shift over to using to a second set of 63, making a full maximum of 126 individual characters. 
Shift character sets could be were extended by the use of the shift up and shift down characters, which could be used to move up and down in a stack of character sets to a maximum of 64 sets. This allowed a theoretical maximum of 4032 characters.
Later computers were capable of interpreting pairs of adavash in 12-bit words called "dehvash". This was more efficient for complex data, such as those with extended character sets without requiring coding space to be wasted on shifting back and forth between different sets of characters, and allowing more possible instructions. Modern computers are technically capable of reading both, with 12-bit word sets being used in most cases, and 6-bit words being used when 12 bits is not required. This allows for two characters to be stored on one memory address in simple files like text. 
Every 512 vash was recorded as a "shavash", or, "thousand words". The multiples of dehvash were counted similarly, with the unit "dehshavash" translating to "two thousand words". The total amount of data contained in a shavash would be equal to 384 bytes. Other data sizes can be found below.
Unit 	Number of Vash	Equivalent in Bytes
Vash 	1 Vash 	0.75 Bytes (6 bits)
Dehvash 	2 Vash 	1.5 Bytes (12 Bits)
Shavash 	512 Vash 	384 Bytes
Dehshavash 	1,024 Vash
2 Shavash	768 Bytes
Kotiivash 	262,144 Vash
512 Shavash	196.6 Kilobytes
Dehkotiivash 	524,288 Vash
1,024 Shavash
512 Dehshavash
2 Kotiivash	393.2 Kilobytes
Nikvash 	134,217,728 Vash
512 Kotiivash	100.66 Megabytes
Dehnikvash 	268,435,456 Vash
1,024 Kotiivash
512 Dehkotiivash
2 Nikvash	201.33 Megabytes
Antavash 	68,719,476,736 Vash
512 Nikvash	51.53 Gigabytes
Dehantavash 	137,438,953,472 Vash
1,024 Nikvash
512 Dehnikvash
2 Antavash	103.1 Gigabytes
Xanavash 	35,184,372,088,832 Vash
512 Antavash	26.38 Terabytes
Dehxanavash 	70,368,744,177,664 Vash
1,024 Antavash
512 Dehantavash
2 Xanavash	52.76 Terabytes
Shaxanavash 	18,014,398,509,481,984 Vash
512 Xanavash	13.5 Petabytes
Dehshaxanavash	36,028,797,018,963,968 Vash
1,024 Xanavash
512 Dehxanavash
2 Shaxanavash	27 Petabytes
== Chip Packaging Techniques ==
Early authiik digital computers were electro-mechanical in nature, relying on physical relays and large amounts of electrical current to perform computations. As a result, these machines were also extremely large, filling entire floors of buildings to obtain any sort of functionality that would be more useful to businesses than a floor full of authiik doing the operations by hand. Machines that required analog components, such as oscilloscopes and other sorts of displays, relied on vacuum tubes as early human computers did. With the invention of the transistor, they were packaged similarly in cylindrical packages, as they were not only faster, they were more power efficient and more reliable equivalents of the relays and tubes already being used. 
=== Inline Packages ===
Through time, these cylindrical packages shrank and became combined with other gates of the same type, but cylindrical packages proved limiting in terms of the number of connecting pins a component could have on it. The creation of inline packages, both single and dual inline packages, allowed circuits to become further integrated and the mainframe computer transitioned to the minicomputer, utilizing many cards with discrete logic components rather than a distinct cabinet for each. Further as time went on, and complicated items such as microprocessors needed more than a few dozen inputs and outputs, square chip carriers came to be, much as they had early in the history of computing on Earth. 
Single and dual inline packages and their high density, surface mounted successors simply used small metal pins punched from a frame that, when the die of the chip was attached to each one, would be encased in resin, plastic, or ceramic compounds to insulate and protect them from damage. The standard pitch of pins on ICs such as these is 2 aka, or 2.44 millimeters. Square chip carriers started as square versions of inline packages, but would quickly turn into something more like human plastic leaded chip carriers, or PLCC packages, and were most often socketed to allow for ease of upgrade and repair, except for where costs were concerned. Through hole models of the chips could be soldered directly to the board, and as surface mounting became more common, J-Pin Carrier Packages would be soldered down as well, before being replaced with high density surface mounted square packages. 
As pin densities continued to increase, the design benefit of being able to have all connections available around the edge of the chip were outweighed by the sizes needed to achieve this, and so the pin grid array package was created. 
=== Array Packages ===
Array package chips are distinguished from inline packages by having multiple rows of pins in a grid pattern, or "array" to increase density while maintaining a small footprint. 
The first type of these packages is the Pin Grid Array Package, or PGA. Earlier in their history, they were formed from a ceramic PCB with pins affixed through holes and attached to each trace before being leveled flat. The chip's die is soldered to the pads, and then the upper ceramic layer is applied with adhesive so it may not be removed. A thermally conductive resin seals the die in place inside, and then a gold lid is placed on top to act as a heat spreader. Later PGA CPUs were build using more cost effective methods such as more standard fiberglass PCB based substrates either with plastic covers, where the thermal load was expected to be low, or nickel plated copper heat spreaders where a heatsink would be required. 
Ball Grid Array, or BGA packages, are intended for permanently installed chips such as motherboard chipsets, graphics processors on expansion cards, or high bandwidth memory ICs. These were most often made using single piece plastic housings as had previously been used on other types of chips, but on processors with a very high pin count or density, the die will be set on a PCB substrate to run traces to their respective pads. 
Less expensive PGA processors were often simply low power BGA processors affixed to interposers allowing them to be adapted for use in desktop sockets with smaller heatsinks, or even no heatsink at all. 
The fusion of the PGA and BGA technologies was made in LGA CPUs. Their pins were on the side of the motherboard, while the bottom of the CPU was covered in flat lands. Early on, and for lower density applications, the pogo pin was used for its more impact resistant build, but where compactness was required, small leaf pins were used in their place. 
= Common Brands =
== Hardware Manufacturers ==
=== Muxiya ===
Muxiya, named for its founder Zhakii Muxiya, was a company that produced business mainframes, office machines, servers, and workstations. Their most successful line of machines has been the Abiya line, which use NiveDa processors. Muxiya was responsible for the motherboards, BIOS, operating systems, and case designs, but they also had proprietary system bus standards early on for expansion capability that were abandoned for PEP slots when they became available. 
=== Maya ===
Maya Computer, or Star Computer, produced hardware of all kinds. Home computers, servers, workstations, IGDs, as well as peripherals, software, and portable media devices. They once used a common series of processors designed by VizvayuTanta, transitioned to using their own proprietary CISC processors, but eventually started using their own variant of the Udyana Open RISC standard known as the Maya Flare series. They also created the MVB bus used for video cards when the exPEP standard became a bottleneck. Their operating system, Vision, was not officially available on third party hardware, but there is a community of users who have forced it to work on other UO-RISC machines, as well as a software compatible open-source reimplementation known as Eternity. 
=== VizvayuTanta ===
VizvayuTanta, or "Commander Technology", often abbreviated to VVT, produced hardware for the consumer market as well as the office environment. While they once produced their own processors and operating systems, they quickly shifted to producing UO-RISC desktop workstations and processors as their ShKV desktops fell in popularity. They are one of the founding members of the UO-RISC consortium, contributing the majority of the core computing architecture. 
=== NiveDa ===
NiveDa, or Information Company (InfoCom), produced the first viable hard disk drives early in the history of authiik computing. Their Pavega line of processors became the most widespread CISC standard on Udyana thanks to their usage in Muxiya machines and compatibles. They still specialize in storage devices, memory, and processors. 
=== Madama Naviikana ===
Madama Naviikana, or "Media Innovation", was one of the foremost companies who produced storage media and drives, including the 7.4azh rigid magnetic diskette form factor and the majority of the foundation for the standard storage format that would be used on them later, as well as their replacement, the 10.6azh optical diskette, and the widespread SN-12 network interface protocol. They were a founding member of the UO-RISC consortium, contributing their ideas for efficient disk controller architecture and high-bandwidth storage.
=== Alma Zhaman ===
Alma Zhaman, named for its founder, produced many types of desktop machines for home and office use. They used both NiveDa and various RISC architectures over the years and saw an opportunity to contribute improvements they had theorized upon after having to code for many different architectures. 
== System Integrators ==
TBD
== Software Vendors ==
=== Muxiya ===
Muxiya produced the most widespread operating systems on Udyana, reaching a 57% market share with their ShKV for 24 and 48-bit machines, which succeded their earlier MaUVaKeh command-line interface for high-end 12-bit computers and ZhuVaKeh system for low-power 12-bit machines. This wide market share was achieved by way of fairly open hardware standards as well as relatively open licensing standards. The vast majority of pre-built home desktop machines used ShKV. 
== Peripheral Manufacturers ==
TBD
= Personal Computers =
With the invention of the microprocessor by authiik on Udyana in RZh 1431, the microcomputer was born. Relatively small and portable computers descended from the appliance-sized mini computer, and further derived from the processing arrays that filled entire floors of buildings.
Beginning with many different hardware, software, and architecture standards as many organizations produced competing machines for sale on the market, people and businesses would eventually grow to rely on certain pieces of software to do work. As they did, the age of having dozens of competing standards and abandoning them as systems were replaced ended, and the market came to a unified standard for the modular computer.
== Late Minicomputers, 12-Bit Era ==
While the mainframe computer had vanished for all but the most intensive of tasks, such as tracking massive amounts of data in applications such as financial institutions and military or scientific programs, minicomputers quickly became more widespread as they allowed smaller businesses to begin digitizing their workplaces. With a number of terminals and a single computer in a closet nearby, dozens of workers could use one machine to perform their duties. Of course, over time, even these began to shrink to sizes that would not be out of the ordinary to see occupying space beside one's desk for use as a personal workstation. 
=== Model 3 BPS Standard ===
The Model 3 BPS standard was a backplane computer architecture pioneered by Muxiya and VVT, intended for interoperability for system control cards via common locations for control signals and voltages on the bus, even if their processor card architectures functioned differently. It was comprised of a chassis that had three compartments, a rear compartment that housed the card cage, which could accommodate up to twenty cards roughly 15.6x31.2 centimeters in size, spaced roughly 19.5mm between slots, a side compartment which housed the power supply, and the front compartment which housed up to two removable or static storage drives, with 4-track tape cassette, several sizes of floppy diskette drives, and eventually low-capacity hard disks all being available. These machines made advanced 12-bit computers and bleeding edge 24-bit computers more accessible to businesses and other professionals. 
== Early Microcomputers, 12-Bit Era ==
The minicomputer era that occurred before the rise of the microprocessor system had dozens of incompatible processor architectures, each addressing a word size between 4 and 12 bits. As standards became more and more common and widespread, the 6-bit word, also known as the vash, would come to be standardized. 6-bit processrs would almost exclusively be used in industrial minicomputer systems, and after the invention of 12-bit processors capable of reading these vash two at a time, or interpreting 12-bit words as larger instructions, the 12-bit microcomputer would spread and become the industry standard for years to follow. 
=== Home Microcomputers ===
12-bit microcomputers would most often be found in the all-in-one keyboard PC form factor to reduce costs, a case that contained a motherboard and keyboard together. It would have to be plugged into a display for video capability. This would often be in the form of a matching monitor sold separately, or a television that the user already owned.
The most popular models of home micro were not only those with the best graphics and sound, but also those that were the best marketed and most affordable for their feature set. 
The most popular of these was the Shankira Mayukabiya 170/7 from Maya, closely followed by the Muxiya 140. Both of these systems have extensive legacy software libraries and modern enthusiasts that develop indie games for them. They often ran some form of text operating system like the Muxiya Simple Control Software, or a later a visual shell like Maya's Shiitana. These systems were all loaded from ROM as they predate large and fast-access consumer storage systems. 
The primary focus for these microcomputers was games, though office software compatible with MaUVaKeh's file formats, most of which was made for Muxiya's 140 family, did exist. The Maya ShM170/7 was more popular among the gaming crowd while the Muxiya 140 was seen more as a system for individuals to take home their work. 
12-bit CPUs generally had a 12-bit data bus as well as a 12-bit address bus, and an additional pin that can either be used as a 13th address pin, or to enable writing to an external buffer allowing for up to 12 virtual address bits for a maximum address space of 16 mebiwords. 
Both machines The 5:4 screen aspect ratio was common for video at the time, so it only made sense to use the CRTs that were already being made for televisions, refine their electronic components, and put them to use making monitors. 
=== Office and School Microcomputers ===
Computers for the school and the office environment placed a greater emphasis on screen resolution over graphics and color. A greater number of characters on-screen meant a more accurate representation of what a document typed up on the system would look like. These computers would often simply be terminals connected to powerful mainframe computers elsewhere in the building, or individually simple systems networked together for easier file access.
Form factors included the common desktop computer (a computer with all of the primary components inside and an external monitor and keyboard), the complete all-in-one (a boxed unit that contained a CRT, a computer, and an attached keyboard. These are also called luggable computers for their relative portability), and the monitor all-in-one (a computer with the monitor and primary components in one case). 
Muxiya dominated the office computer market from the RZh 1460s until the RZh 1490s, setting early software standards with their MaUVaKeh resident monitor software. The computer pictured above was given a command to list the devices in the network, where it found five other machines and three drive arrays, listing them on its blue monochrome display as commands that would be used to connect to them.
Cheaper systems with extensive software compatibility, but limited hardware compatibility would be available from various companies looking to cash in on the market and snatch the middle-end market from under Muxiya's noses. These systems also popularized the 7.4azh diskette for data storage and distribution.
=== Software ===
==== Muxiya MaUVaKeh, Computer Interface and Control Software ====
The most common operating system found on professional 12-bit computers was Muxiya's Mayukabiya Upama ku Vazhi Kehrama, often abbreviated to MaUVaKeh, which translates to Computer Interface and Control Software or CICS. While it began as an entirely text-based resident monitor program with a command line interface for networked machines, its third major revision introduced extensive rewrites to its operation and hard coding functionality that once required many minutes of loading driver software allowed its evolution into a full-fledged operating system.
Its primary use was in businesses, schools, and institutions, where its network size of 64 devices was put to great use for connecting many machines and storage drives in a chain. It output a 64 by 26 character image, with each character filling an 8 by 12 pixel area, and each line of text having a 4-pixel buffer between them to improve readability. Its default, CPU-driven graphics could also display simple 256x208 monochrome graphics using dithering patterns that allowed for a palette of 16 shades of gray, and a single speaker could provide startup tones for the PC and simple sound effects in the few games that were released for the operating system before its replacement came. As expansion daughterboards grew more common, more colorful graphics modes would become available. Color graphics began with allowing six colors on screen from a palette of twenty-four, and culminated in a full 256 onscreen colors at full 512x416 resolution.
==== Muxiya ZhuVaKeh, Simple Control Software ====
The home market was most often using a far more primitive fork of Muxiya's MaUVaKeh, known as Zhuda Vazhi Kehrama, ZhuVaKeh, or Simple Control Software. It It was licensed to a number of hardware manufacturers for use in their computer systems and served as a system management software and an easy-to-learn, but limited, programming language. This trimmed-down software could fit in a 36 kilobyte ROM, and only supported a maximum of four systems in a network. The vast majority of these networked systems would be diskette drives used for saving and loading text data or user programs, though an twelve megabyte IDP external hard drive would be made for a number of early home microcomputers. Its basic interface was in a 32 x 25 display of 8 by 8 pixel typeface with a 4 pixel border before the edge of the viewable area for a screen resolution of 264x208. Graphics modes would often feature lower resolutions to save processing power for use on executing game code. 
When a compatible computer starts up and reaches the point at which a user can interact with it, each displays similar information. At the top of the screen, it lists the name and version of the software which, in the Muxiya 140's case, was Muxiya Zhuda Vazhi Kehrama, along with the available memory in kilobytes, 170 Shaxvash, and total memory in bytes, 400000 vash dika. These numbers equate to 120 kilobytes of free memory, and just over 130 kilobytes of usable memory. Below the dashed line is the word "Kshantii", a ready prompt.
==== Maya Shiitanakati Xavaka Ehkaki ====
ShXEh, or Shiitanakati Xavaka Ehkaki, was an early graphical operating system. It saw little use until it was made the standard ROM on Maya's computers after later revisions of the 12-bit versions allowed high levels of software compatibility. 
The operating system was quite limited, with only 2-bit color capability and no higher resolutions than the system had available to it in the text-based ZhuVaKeh interface. In the system whose desktop is pictured above, there are three disks installed, one named "Pehya", or "Begin", the system's boot disk, another named "Vidika", or "Program/App", which houses the system programs. These were different partitions on the same floppy disk. The last was simply titled "Duvaka 1", a user disk with a text file on it. This file is titled "Shmaranazhaki", or "Memory". This is likely a journal of sorts.
A controller served as the pointer device, with the directional pad moving it around the screen, the "Va" button serving as a selector, "Sha" serving to bring up a context menu, and the "Xa" button switching the behavior of the directional pad to scrolling the screen instead of moving the cursor.
=== Ports of the Era ===
==== 3-Pin AV Monitor Plug ====
3-Pin AV, or "Monitor Plugs", were a standard that allowed for high-fidelity analog audio and video. The left and right pins on the male plug were chroma and luma, or color and brightness respectively, and the center pin carried mono audio. The image lines also carried the horizontal and vertical sync signals as part of the data stream, with a pure duodecimal white "EEEEEE" color signal starting the next line, and a max brightness dot on the luma pin marking the start of the next frame. Both of these signals are outside the viewable area of a monitor if its picture settings are correct, and these colors are not generated as part of the computer's normal video signal. The metal shroud grounds the connector. It would remain on computers and other video equipment until 12-Pin MAVP became standard in the 24-bit era of computing.
==== Dual Interface Device Port ====
Upama yukti shunii, IDP-11, or Dual Interface Device Port was a data bus standard that allowed multiple devices to be connected to a single port. This was originally used for two 7.4azh disk drives to be connected to one port, daisy-chained to one another through a smaller IDP-6 port. Many home microcomputers with serial gamepads used this port internally to connect them. 
The leftmost five pins are used to send and receive data from one device, time the signals sent, and provide power. The five on the right serve the same purpose for the other. The large central pin grounds them both. This would be superseded by Mini IDP-6 in the late 24-bit era. 
==== 22-Pin Parallel Interface ====
The 22-pin parallel interface was most often used on professional equipment to daisy-chain devices together with more bandwidth than two-device IDP-11 serial interfaces provided, and allowing up to 64 devices in a network.
In a 22-pin interface, a total of sixteen pins are dedicated to data transmission. Groups A and B are dedicated to sending data to and from the "host" device, that being one device up in the chain, and groups C and D are dedicated to sending data to and from the "client" device, or one device down in the chain. 
Group E's pins are used to regulate functions of the devices in the chain. For example, pins 5, "Host Request", and 13, "Client Request", are used to send commands to and from the different devices in the chain. 
Pins 10 and 18 are used to sync the data being transmitted with one pulse every three nibbles to signify the end of each tribble. This ensures the data does not end up scrambled on the other end. 
Pins 11 and 12 are used to assign drive IDs. Data is sent from client devices along pin 11, which arrives in its host's pin 12. If there is no data coming through pin 12, the last device in the chain reports this, and the computer can assign drive IDs accordingly. 
As an example of the process that occurs when one wishes to load a file from device ID "02", a request will be sent on pin 5 from the computer, with ID "00", to device ID "01" to pass the request along to device "02". This will cause drive 02 to start seeking for the file. Upon finding the file, it will send a request along its Host Request pin that arrives on drive 01's Client Request pin for it to begin passing data through. 
Data is sent from drive 02 along group A, which will arrive in drive 01's group C. This data is passed through to drive 01's group A and into the host machine for use.
Expectedly, latency increases as one moves along the chain of devices, as each drive must request access to the shared bus and for data passthrough to take place. 
==== 6-Pin Analog Cassette Port ====
The 6-pin cassette port is a combination of three separate cables feeding into one port on the rear of a microcomputer. The first two pins are dedicated to audio output channels that terminate into a blue stereo audio connector, the second two are dedicated to audio input channels that terminate to a white stereo audio connector, the fifth terminates to a red mono connector and is dedicated to the remote control of the tape deck and tracking of runtime markers, should the drive support them. The large central pin is used as a common ground. 
==== 12-Lane Peripheral Card Slot ====
12-Lane peripheral cards were early standardized daughterboards for various computer architectures that had a number of voltages and ground pins in fixed positions, along with a number of general purpose pins across the bus. While not all cards worked across all systems, this limited standardization prevented damage to both computers and peripheral cards. The port grew from ports like the 12x2 header that served as the RAM expansion board on a Maya ShM170/7, allowing for many cards to occupy a limited space by extending vertically rather than horizontally. 
The face of the card served as the data-transfer side, while the rear side served for power and synchronization purposes. These were used early in the 24-bit era in the form of the 24-lane card, which added another 24 pins dedicated to data transmission for more bandwidth, but the limited speed of the communication standard inherent to the 12/24-lane standard led to the ShaViPa "PEP" standard that replaced it. 
=== Storage Media of the Era ===
==== 10azh 4-Track Cassette Tape ====
The 4-track cassette tape is a carrier for up to 67.7 meters of 20 micron thick, 5.34 millimeter wide plastic film with a recordable ferromagnetic coating being turned at a minimum useful speed of roughly 4 centimeters per second. It was often used along with average consumer tape decks as an inexpensive alternative to 7.4azh disks and their predecessors for consumer data storage. 
As an audio cassette, each tape was capable of storing a maximum of 70.8 minutes of audio across two stereo tracks, or 141.6 minutes of mono audio across four tracks. The typical home computer of the period these were most popular, from the RZh 1450s to 1470s, could store anywhere from 1600 to 6400 kilobits of digital information on a single tape. Eventually they were seen as being too slow for use as storage devices and they shifted towards being used for long-term backup storage instead. 
At the time, the theoretical maximum write speed for the average consumer's analog tape recorder was 16 kilobits per second per track, allowing for a maximum capacity of 272 megabits. Professional audio recorders, and later dedicated digital tape decks for use with computers, were capable of storing data at a rate of 64 kilobits per second per track. This allowed for a raw, uncompressed capacity of 1088 megabits. It was unrealistic to expect this capacity, however, as more often than not up to 10% of the tape's runtime was used for headers, footers, the directory, and buffer space between files, leading to a real capacity of closer to 970 megabits. 
Unlike human compact cassettes, 4-track cassettes can only be inserted one way, leading to a unique mode of operation in cassette drives. The tapes essentially read as a seamless loop, with two tracks reading "forward", and the other two reading "backward". Once the end of the tape is reached and the track footer is read, it reverses directions and switches to the other set of magnetic heads. 
When loaded into a drive, the tape will be rewound to the beginning of side 1 and the directory will be loaded into memory. Each data track begins with a header and directory with short and simple details about each file on the tape, including its name, what side of the tape it's on, what type of file it is, and where its header and footer are on the track's runtime. The header, footer, and directory of both sides is identical. Tapes that have been formatted for use as data storage devices will have 512 individual runtime markers, small patches of code written between tracks 2 and 3 that allow computer tape decks to keep track of where exactly the tape is along its runtime for quick seeking of files. They divide the data tracks into segments roughly 13.22 centimeters in length. 
These markers are also present on audio cassettes, and are used along with the directory segment of the track to tell cassette players which track on an album is playing, and when to stop when fast forwarding or rewinding to a specific song. For example, the first song on the tape will play at marker 3, after markers 1 and 2 which contain the directory, and a little over 8.25 seconds into the tape's runtime. Over five minutes later, the second song will begin playing at marker 77. This will cause the tape player's display to change to the second track on the album. 
When you seek for a file, for example, inputting the "seek x" command in MaUVaKeh or ZhuVaKeh will cause a connected tape drive to begin searching the directory for a file named "x". Seeking is simply a query to connected drives asking if the file exists. This command will reference the directory saved in the drive's memory for the header position of files with that name and type.
If a file with that name and type does not exist in the directory, for example, if a file was saved to tape without allowing the directory to be updated due to premature removal from the drive, the system will prompt the user to ask if they wish to "long seek" for the file. This will go through the tape at roughly 3x normal read speed in order to read the embedded long seek headers, which are recorded at such a low tempo in order to be unreadable at normal read speeds. Seeking speed is roughly 30x read speed.
A normal file seek should take less than a minute, while a long seek could take up to twelve.
When a file's header is found, a prompt will appear asking the user if they would like to load the file. If the user confirms, the tape will be played at 1x speed until the file footer is reached, at which point the tape will stop while the computer begins displaying whatever file, game, or program was loaded.
==== Magnetic Film Data Scroll ====
The ferromagnetic data scroll, or simply scrolls, were an enterprise data storage method that shifted the dimensions of the tape inside the cartridge to a very wide, but much shorter form factor, greatly increasing seeking speed, but initially this caused a massive increase in cost and complexity of drives. 
===== Type 1 =====
The first scrolls, type 1 cartridges, were essentially very wide, yet short single-reel linear tapes. When inserted into a drive, the magnetic film would be pulled out of the housing by the metal end bar and pulled taught to expose a square sheet of magnetic film, where it could be read by two heads, one for each side of the scroll, with two degrees of movement. This made the machines extremely complex and expensive, and the type 1 was abandoned in favor of the type 3 cartridge. 
===== Type 3 =====
The two proposed replacements to the type 1 both served to simplify the design of the machine over all else, and the design chosen was the type 3 cartridge put forth by Madama Naviikana. It functioned, essentially, as a thicker cassette that was inserted open side down into the decks for it where the spindles could be controlled by the player, and the read/write head and erase heads could be moved along its height. 
==== 7.4azh Rigid-Case Magnetic Diskettes ====
While not the first, the 7.4azh magnetic diskette was the most widespread of the magnetic storage media. When using the standardized format, its 73.2mm ferromagnetic disks could store 268.8 kilobytes per side for a total formatted capacity of 537.6 kilobytes, or 4.3 megabits. Double sided diskette drives were made for them much later, so each side was initially treated as an entirely separate object by the computer reading it. Double sided disks would not have their second side readable by single sided drives due to the tracks of data being written backwards, but double sided drives could be instructed to list the directory of only the top side. 
Large games would prompt the user to turn the disk over if it needed to load content that was not on that side, and productivity software would often come packaged as two-in-one packages on a single disk. 
They were packed in plastic sleeves similar to playing card boxes, and would be inserted front-side down. The two square holes were used to tell the drive whether that side of the disk was rewritable or not. Commercial software would come on disks without these holes. 
Early in their life, similarly to the non-standardized soft-case diskettes and experimental sheets that preceded them, the formatting of data on the 7.4azh diskette was typically proprietary. Once a disk had been formatted by a machine, the data on it could only be read and altered by machines in the same family unless it was reformatted, destroying whatever was saved on it in the process. Maya disks could only be read on Maya machines, Muxiya disks went with Muxiya machines, VizvayuTanta disks went with VizvayuTanta machines. There was very little compatibility overlap in early computing. As standards changed, hardware families went extinct, and consumers and businesses alike began to demand inter-operability, a new standard was agreed upon and perpetuated by the microcomputer industry's leaders. 
The format used 32 tracks with a variable number of 512 byte sectors in order to maximize the capacity of the disk. The disk surface is divided into seven bands, defined as groups of adjacent tracks that share the same number of sectors. The outermost tracks, known as "Band B" was made up of ten tracks with twenty sectors each. "Band M" was made up of five tracks with nineteen sectors each, and so on. This continues to "Band N" at the center of the disk, which was made up of three tracks with ten sectors. 
The innermost track, track 32, was dedicated to holding the disk's directory. When a machine is powered on, be it an external or internal disk drive, the drive head is always moved to track 32 so the directory can be loaded quickly when the user requests either it or any file within it, so the drive knows where on the disk the file is located. 
== Desktop Standardization, 24-Bit Era ==
The 24-bit era was marked by an increasing standardization of both software and hardware, and the end of real distinctions between the capabilities of home and office computers. 
=== Common Form Factors ===
==== Midplane Desktop Standard (MDS) ====
The most common 24-bit standard among Muxiya computers and their clones on Udyana was the Midplane Desktop Standard family, translated from the original Ukitii, which used a board between the rear of the PC housing expansion cards and the power supply, and the front of the PC which housed the CPU and RAM sleds as well as the drive bays, to facilitate hot-swapping components.
Much like early human personal computers, they feature a number of drive bays in the front of the case. In the image above, the first bay has a 10.6azh diskette drive, and the fourth bay has a hard disk. The other two are outfitted with blanking plates. An important distinction lies in the fact that these drives are fully hot-swappable as long as they are allowed to cease operation before being replaced. All diskettes must be ejected, and any hard disks or solid state drives must be put to sleep before ejecting them to prevent data loss.
The switch above the component bays on a MDS chassis doubled as a power switch, which locked the component trays in their bays until the system was shut down. Most industrial and military focused operating system variants had a function that when the computer was signaled to alert an imminent loss of power, the contents of the memory would be flushed to the system storage to allow for the computer to be brought back online in the exact same state at any time in the future. 
Both processors and memory existed on sleds such as these, and they connected to the system's memory controller on the system's midplane. The rear board inside the chassis housed the system controller, expansion slots, and most of the I/O, and communicated with the rest of the system through a large edge connector that carried all of the necessary signals to connect with the front drive bays, and power for the other components of the system. Finally, the power supply was located to the rear on the right side of the chassis. 
A shorter standard more often seen in homes and schools, where the maximum expansion capability was a lower priority than taking up the smallest amount of space and power, is the Mini-MDS form factor. It only features four standardized 4.33 inch front drive bays, three PEP slots on a horizontal riser card, and requires the use of a low profile memory sled which can only hold two full sized or four half-size memory modules.An even smaller variant, known as Nano MDS, had only two front drive bays and used non-upgradeable low-profile CPU sleds in addition to low-profile memory sleds found in the Mini MDS form factor, though these would not be as well recieved as the contemporary BCS chassis, except where componentry re-use was considered important. 
These machines were beginning to become less and less relevant early in the 48-bit era, as rising power consumption and heat output, as well as components becoming increasingly integrated and latency sensitive eventually gave way to a new standard that allowed for more open airflow. The form factor was generally abandoned for consumer and corporate applications in favor of TDTS machines, only kept alive by systems in extreme environments like remote research outposts and industrial settings where any downtime of a system is highly undesirable, and where modularity and fast repairs are highly valued. 
==== Maya Flare Desktop ====
The Maya Flare Desktop form factor was used in Maya desktop machines and other high end RISC workstations in the 24-bit and 48-bit eras. In the desktop form factor, as pictured above, it is a horizontal machine designed to be placed underneath one's monitor, and had a front-to-back motion for the airflow within the system much like rack-mounted server units did. 
When viewed from the top, the rightmost two-thirds of the case was dedicated to the motherboard and expansion cards, with the CPU module mounted near the front of the motherboard, cooled by a fan at the rear of the case pulling air over both its large heatsinks and the memory controler. The expansion riser is on the right side of the motherboard, and expansion cards extend towards the right, allowing for up to three slots mounted parallel to the motherboard, most often a pair of slots on a high speed exPEP bus, and an MVB video accelerator slot. In the left side of the case, both the fixed and removable media drives are housed, along with the power supply unit, which provides passive ventilation through its exhaust fan for the rest of the components in the case, such as the memory and other chips.
==== BCS Chassis ====
BCS, or "Backplane Computer System" chassis functioned much like the much earlier BPS3 Minicomputers, where the core system components such as the CPU, memory, networking, and I/O were on a card, communicating to the rest of the system via a shared PEP or exPEP bus through a backplane. The main advantage of systems such as these was that they were often very small, and used mainly mobile class hardware, making them potentially more power efficient for use cases where system expansion was still needed as well. In such circumstances, they were preferred over small thin client machines. 
==== Thermal Design Tower Standard ====
The TDTS Desktop standard was composed of four contemporary sub-standards called Extended-TDTS, Standard-TDTS, Mini-TDTS, and Micro-TDTS, in order of decreasing size, along with two different standards of depth for single and dual socket machines, and were generally used with Paveka-compatible descendent .
These were designed to facilitate airflow through the case to assure future hardware, with rapidly increasing power consumption, in having access to the cool air required to maintain safe operating temperatures. It has been compared to the human ATX family in the role it has in modern computers, to BTX due to it's layout in terms of CPU cooling focus, memory and expansion layout, and to Baby AT motherboards in terms of its actual shape and feature set. Fans at the front of the case draw in fresh air from outside the machine, while the fans in the top and rear of the case work to exhaust the hot air from inside. The power supply has its own fans on the motherboard facing side that work to assist the case fans in exhausting heat. 
The motherboard fills the rear of the case, with a typical nine expansion slots on the lower half of an full-size motherboard. On a Standard-TDTS motherboard, there are six, on a Mini board three and on a Micro board, only one. Behind the CPU are five dedicated short I/O slots and a dedicated block of I/O ports for a mouse, keyboard, and networking. The memory typically lies above the CPU, or if the system is a workstation platform with several additional memory chanels, both above and below it, and various ports and connectors scattered about, and the memory and system controllers near the center of the board. 
=== Hardware ===
Computer hardware of the 24-bit era saw the rise of forms that carried through to the 48-bit era's PCs, though much of the higher end workstation machine market used proprietary form factors in their cases and motherboards. The hard disk marked the end of booting from a 7.4azh disk, CPUs and RAM became modular components, the 4:3 display aspect ratio became standard, the 11.25azh or 4 1/3 inch drive size became standard, mice became a required accessory, and the vast majority of computers ran the same operating system with a graphical user interface. Muxiya's Shiitanakati Karashima Vida, or Visual Operating System (ShKV, or VOS). 
This era saw many of the old hardware manufacturers become software vendors only, including industry giant Muxiya, allowing many of the smaller hardware companies and new startups to grow to market dominance. It also saw the rise of the DIY-PC, with the prebuilt systems catering to those less technically inclined or not willing to build their own computer, but still using standardized components to allow upgrades in the future. Various manufacturers would produce motherboards, processors, memory, power supplies and more as individual parts to be assembled by the end user. 
==== 199-Pin PGA Socket for NiveDa Processors ====
PGA-199 was used for the very earliest 24-bit NiveDa processors. They were all single-core processors, and many of them still required external cache and mathematics co-processors to reach their maximum performance. Two variants of the socket existed, including a low-cost, low insertion force socket, and a more premium zero insertion force socket. Eventually the LIF socket would be discontinued in favor of the ZIF socket being used across all systems. CPUs designed early in this socket's useful life were constructed as ceramic PGAs, but as time went on and the power consumption, and consequently the heat output, of the processors increased, a shift towards fiberglass PCB-based substrates and metal heat spreaders was made, and eventually became standard for all sorts of processors on Udyana. 
Features 	
Pin Count/Type 	199, LIF/ZIF Pin Grid Array
Pitch 	~2.13mm @45 deg
~3mm within row
Array Geometry 	13x13 Outer Grid
12x12 Inner Grid
8x8 Removed from Center (Outer)
7x7 Removed from Center (Inner)
1 Removed from Index Corner
Package Size 	~39x39mm
Cooler Mount Spacing	~68x68mm Square
==== 348-Pin PGA Socket for NiveDa Processors ====
As CPUs changed and their feature sets became more complex, the CPU socket also had to change to accommodate them. The most well-used socket type for consumer CISC architectures was the 348 contact PGA socket, seeing use from RZh 1480s and RZh 1490s, when it was replaced with higher density PGAs for more advanced architectures. 
The system architecture paradigm for the 24-bit era was formed around the Paveka Gen 1 platform, a compatible, but not identical processor architecture created by NiVeDa's largest rival in the CISC processor space, which included a two-chip solution for the control of most motherboard functions. The memory controller handled communication between various system buses included on the motherboard and generated the various clock signals required for them to function by referencing a master system clock, as well as bridging the CPU to the memory, which could access up to 64 gibiwords due to a hardware banking solution carried over from the 12-bit era, allowing for a 36-bit total address space. The system controller, another large control chip on the motherboard, was responsible for managing expansion buses including PEP and 12/24-Lane, serial and parallel device interfaces, networking, and initializing the system via the BIOS ROM. 
The most common architecture used on the platform was of course, Paveka and NiveDa's CISC architectures, most notably the very successful Paveka second and third generations, and the short-lived and poorly received fourth generation processor families. 
Features 	
Pin Count/Type 	348, ZIF Pin Grid Array
Pitch 	~1.73 @45 deg
~2.44mm within row
Array Geometry 	18x18 Outer Grid
17x17 Inner Grid
12x12 -1 Removed from Center (Outer)
11x11 Removed from Center (Inner)
1 Removed from Index Corner
Package Size 	~45x45mm
Cooler Mount Spacing	Heatsink mounts to socket via clips.
Various hole patterns also used.
==== Slot 132 for Maya UO-RISC CPU Modules ====
Slot 132 was intended for early models of Udyana Open RISC processors adapted for use in Maya desktops of the V platform, which were often simply P platform machines that had been upgraded by the use of these cards. This was generally intended for a then struggling Maya to put all of the costly components of a system's primary processor stack, including the CPU itself, the ROM code that allowed it to interface with the mainboard, and any required cache memory for the system onto a card that could slot into a motherboard. This way, high end and low end machines could share more components. This was widely regarded as a good decision by internal and external evaluators, and is one of the ideas that the then leader of the company had put forward to bring the company around. It was, however, quite nonstandard as a connector when non-Maya systems were considered. UO-RISC systems at the time used a 280-pin ZIF socket, which was intended to accept modules in a more familiar way to other ZIF sockets for PGA systems. 
==== Socket 300 for UO-RISC Processor Modules ====
Socket 300 was a mezzanine socket that accepted more advanced UO-RISC CPUs, first appearing on a number of RISC workstations, with a far wider availability on Maya's Flare series of workstations and desktop computers. It could support two CPUs on a single module for multicore capability, a feature that would not be widely used and would not return to a mainstream platform for a number of years, coming back into usage with the dual-socket and multi-core capable 662L platform. 
CPU modules would feature the processors, any external cache memory that was not integrated into the processor die, and high-amperage, low-voltage power delivery that the CPU required, and that the onboard power supplies could not provide natively. This, again, allowed for the CPU module itself to be upgraded without building these components into the motherboard, making the largest and most common components simpler, and therefore easier to manufacture. 
These sockets would fall out of favor as integration of higher levels of cache onto the die made compact, discrete CPUs more desirable. 
Features 	
Pin Count/Type	300-blade pin LIF Mezzanine array connector
Pitch 	~1.22mm
Array Geometry	12x25 Pins
Package Size 	86.5x86.5mm (Standard CPU Module PCB)
Cooler Mount 	Spring clips attached directly to edges of PCB
==== Socket 428P for UO-RISC Processors ====
The 428P standard package was a socket designed and used for late 24-bit Udyana Open RISC architecture CPUs. It was keyed via two pins missing from two corners to limit its insertion into the socket to one possibility. As a RISC architecture, it was far simpler on a silicon and programming level than increasingly complicated CISC chips, with a small number of short instructions that was only expanded with optional modules when they were necessary for certain applications. A council of businesses known as the UO-RISC consortium convened to share innovations and improvements. Notable members included VizvayuTanta, Madama Naviikana, and Alma Zhaman, who combined their efforts and the best features from their own architectures to create it. 
An outlier to this arrangement was Maya, who used their own customized version of the architecture known to humans as Flare, or RISC-M, which drew from the consortium's work but did not often share their own improvements. While this was technically allowed by the open licensing of UO-RISC, it was seen as selfish and in poor spirit. A proprietary translation module allowed for a very easy switch from Maya's previous-generation CISC architecture, making software compatibility high between these new machines and their previous families of hardware. As it was still primarily UO-RISC based, it was mostly inter-compatible with software designed for other UO-RISC processors, but if software required Maya specific features, such as Legacy Sunspot applications or the Maya Vision operating system, then that software could generally not be run on a general-purpose UO-RISC CPU. 
Motherboard layouts for the 428 platform were very similar to the paradigm set with the Paveka and NiveDa 348-pin systems, and included the same three primary chips. A CPU, memory controller, and I/O controller. The CPU is of course responsible for the processing of data, while the memory controller is the hub that allows the entire board to communicate. It features a lower-latency primary PEP channel, an integrated banking address controller that served simply to redirect the traffic between the 24-bit interface on the CPU to larger amounts of memory so the system is not limited by the relatively small 24-bit interface. With 24 real address pins and 12 virtual address pins, 24-bit systems had access to a theoretical maximum of 64 gibiwords of memory, though it was rare that consumer systems would need more than eight before the 48-bit address space limit would outmode this practice. The I/O controller, or system controller, is responsible for the secondary PEP channel on the motherboard, which in a Paveka or compatible system would be the only available channel, as well as managing the rest of the I/O functions for the board, audio, networking, the keyboard and mouse, and other interfaces. The primary and secondary PEP bus slots were typically color coded, with the high speed bus featuring white or cream plastics on the slots, while the traditional speed PEP bus was populated with black or gray plastics. 
This higher speed primary PEP bus, typically only one or two slots to minimize bandwidth sharing, made UO-RISC systems popular for video games, as any graphics accelerators did not have to split bandwidth with other expansion cards. The introduction of MVB as an exclusive feature to UO-RISC platforms for a handful of years only extended this reputation. 
The low profile PGA socket also made it well suited for mobile platforms, where it saw wide use not only for consumer laptops, but mobile RISC workstations. 
Features 	
Pin Count/Type 	428-pin Low-Profile ZIF Pin Grid Array
Pitch 	~1.35mm
Array Geometry 	24x24 Pins
12x12 removed from center
2 pins each removed from two corners
Package Size 	~39x39mm
Cooler Mount Spacing	~60x60mm cooler mounting posts (desktop)
~50x50mm cooler mounting posts (mobile)
==== Socket 662L for UO-RISC Processors ====
Socket 662Lv1 replaced socket 428L for use in desktop workstation machines, while leaving the 428P platform intact for consumer uses until it largely reached its limitations and was replaced by the 603P socket. It increased the pin grid size to 28x28 from 24x24 but retained the same PCB size and mounting hardware as 428L. The keying was achieved via two notched corners, and the PCB's solder mask changed from brown-orange to red. 
The 662Lv1 platform was a massive overhaul which changed much about the capabilities of UO-RISC systems. The most notable change was the increased capabilities of the I/O and memory controllers allowing for far more expansion. This new generation of controller allowed for both an MVB slot and the more modern exPEP bus to be present simultaneously, as well as a higher master system clock allowing for a faster basic PEP bus, and dedicating a number of communication lanes for multiple processor sockets to communicate over a direct high speed interface. It also brought support for multi-channel memory and dual core CPUs, which began appearing late in the lifespan of the socket. The hiPEP bus did not exist as a standard when this platform was new, but later chipsets added that functionality in exchange for the movement of the memory controller to the CPU, and on the motherboard, a new IC called an expansion controller was introduced. This coincided with a change in the keying of the socket to two semicircular cutouts near one corner, resulting in the newer 662Lv2 socket which prevents incompatible processors and motherboards from being combined. 
This platform was not used for very many consumer-facing platforms, as having this amount of high speed expansion and multiprocessing capability had little utility outside of large workloads such as computer aided design, software development, video and photo editing, medical and military applications, and the emerging market of internet server duties as the early internet blossomed on Udyana. Thus, these systems remained mostly in the hands of corporations and institutions for many years until they were decommissioned and replaced, being sold at auction to electronics refurbishing businesses, hobbyists, and others interested in cheap, but still very powerful machines. 
Features 	
Pin Count/Type 	662-pin Land Grid Array
Pin Pitch 	~1.31mm
Array Geometry 	28x28 Pins
12x10 -6 removed from center
1 removed from two corners
3 removed from index corners
Cooler Mount Spacing	~50x50mm, rotated 45 deg. relative to socket for backplate.
~60x60mm cooler mounting posts on retention plate.
==== Socket 600P for UO-RISC Processors ====
Socket 600P was originally intended for the mobile equivalents to the 662L desktop platform. 600P sacrificed its exPEP bus and multiprocessing support to simplify the chip's pinout for use in laptops and mobile workstations. It retained the use of dual-channel memory, MVB expansion for higher bandwidth to video acceleration hardware, and the lower speed PEP bus for external expansion capability such as PEP Cartridges, which could add additional ports and storage drives, or even simply exposing the PEP bus to the rear or underside of the machine for docking purposes. 
As the 428 platform reached its limitations on the consumer-facing side of the UO-RISC processor family, it was replaced with a Socket 603P for consumer desktops a year after Socket 600P was introduced. Socket 603P processors often included an integrated heat spreader and filled three missing pins mixed into the array to prevent the insertion of desktop CPUs into mobile sockets due to power delivery limitations, though the reverse was still possible. The mounting hardware would change from the 428 platform, and even be different from the 662L platform, as it totally abandoned the tabs necessary for providing the mounting pressure needed in LGA sockets. The post spacing would remain the same at 60x60mm on the desktop, and 50x50mm for mobile. 
Features 	
Pin Count/Type 	600 or 603-pin Low-Profile ZIF Pin Grid Array
Pin Pitch 	~1.31mm
Array Geometry 	28x28 Pins
12x14 removed from center
3 pins removed from three corners
4 pins removed from one corner
3 individual pins removed from array (600P only)
Package Size 	~39x39mm
Cooler Mount Spacing	~50x50mm (Mobile)
~60x60mm (Desktop)
=== Expansion Ports ===
==== PEP Card Slots ====
Shakiixa Vikatii Patta, or "peripheral expansion plate" slots, were 126 pin staggered-pad expansion slots that allowed daughterboards to connect to the computer's motherboard with a high bandwidth data connection, allowing for up to 337 MB/s shared between all cards on the 24-bit wide bus. It replaced the 12-lane slot, as well as its expanded descendants, which faced a number of limitations related to pin spacing compactness, bus clock speed, compatibility issues between architectures, and more. 
==== exPEP Card Slot ====
exPEP card slots were an expanded form of PEP that introduced a second edge connector to the card, which served as an entirely separate communication path between the card and the memory or expansion controller while also using the old PEP connector for simple functions such as sourcing power from the mainboard, control signaling, and device identification. It had double the bus width of PEP, increasing it to 48 bits, allowing both for higher speed peripherals as well as more complex expansion cards. The bus debuted on high end RISC workstations to be used alongside a standard PEP bus for more capable workstations, but was quickly adapted to consumer CISC machines for use with video cards and more compact multi-I/O cards, though its use was fairly limited beyond that. 
==== MVB Card Slot ====
MVB, or Maya Express Video Bus, was a 114-pin expansion card standard originally used on Maya computers for video card interfaces, and was later licensed out for use on other manufacturers' machines. It had much in common with the later hiPEP standard, being a high-bandwidth connection standard with 24-lanes of fast serial data being sent at once rather than the 48-bit parallel interface used by exPEP video cards, and 24-bit on classic PEP cards on standard desktop PCs. These cards were later used for consumer gaming video cards until hiPEP replaced it. Early entry level hiPEP video cards often used an MVB bridge chip to connect internally to a hiPEP 24 bus. 
==== PEP Mod/IO Slot ====
PEP Mod/IO was a port introduced around the same time as MVB in small numbers on some motherboards for optional networking cards, both wireless and wired, until the TDTS standard was introduced and made it commonplace. Mod I/O was a serialized version of the PEP interface on a simple 28-pin connector, intended to serve as a modular I/O standard for motherboards, allowing companies to produce less expensive machines as there was less componentry built into the motherboard as well as simpler I/O controllers, while also allowing motherboards to remain relevant for longer as new I/O standards began to appear rapidly. It was often segmented off and did not share bandwidth with the primary PEP and exPEP buses. 
ironically, this standard enjoyed a very short life as an up-to-date standard, as it was released on motherboards a few short years before the hiPEP standard would be introduced. It would gradually be replaced by short hiPEP-6 slots on more modern motherboards for the foreseeable future. 
=== Software ===
==== Muxiya Shiitanakati Karashima Vida, Visual Operating System ====
Muxiya's Visual Interface and Control Software, later renamed Visual Operating System, was not the first graphical operating environment. There had been plenty in the 12-bit era, such as Maya ShXEh, a graphic environment operating system available for systems running ZhuVaKeh and later coming as a system ROM on Maya's computers. It was, however, the first dedicated 24-bit graphical OS to grow to mass market success on Udyana with a 71% share by the time the 48-bit processor gained widespread consumer support. The earliest versions were shells for MaUVaKeh 44 and above, but at the end-of-life for MaUVaKeh, ShKV took root as its own software package. 
ShKV maintains MaUVaKeh's networking-focused design, with an extended set of addresses allowing 256 devices. These are linked visually, with whatever files are set to public and any removable disks appearing as a directory within the "Network" application on other networked systems. This became complicated by the introduction of network systems beyond LAN, such as campus networks (CAN) or wide area networks (WAN). 
The OS prefers a one-button mouse, allowing for cursor movement by moving the mouse across the desk, a select with one short click, opening a file with a double click, and opening context menus with a menu keypress or a long click. 
==== Maya Shiitana ====
Maya Shiitana is visually based on Maya Visual Shell, the ROM used on late 12-Bit computers by Maya. Its codebase is rewritten from scratch with an emulation option for Maya 12-bit programs. Its focus was on being as simple to use as possible, keeping many of the advanced system functions locked behind a superuser status available only through a password specified during the system's setup process. It was the first operating system to include a curated web store for software and application distribution and purchase. 
Shiitana's mouse preference stems from the use of a game controller to control the pointer in earlier Maya 12-bit visual shells, preferring the use of a two-button, one-trackpoint mouse design allowing a user to move it across the desk to move the cursor, one selector click, an options click, and a trackpoint or small analog joystick on the side of the mouse to enable scrolling. 
It never reached the massive market share of Muxiya's ShKV, instead settling around a 15% share simply because of a much more restrictive licensing policy and very narrow hardware support, though hacking it to work on unsupported systems would become commonplace in time. This was never explicitly disallowed, but any technical support had to be sourced from others who had done the same. 
==== Zanehtanah ====
Born from the Shiitana hacking community, Zanehtanah or "Eternity" is a family of open-source focused operating environments built upon a kernel clean-room reverse engineered from Shiitana sometime in the middle of the 24-bit era. 
It has been referred to as "an illusion of an operating system" due to it's incredibly modular nature. It was originally interacted with exclusively via a command line interface, but graphics APIs and desktop managers were later added to make it more user friendly. It posed itself as a free and more widely compatible alternative to Shiitana and other systems based upon the Unified System Interface Program designed in collaboration by various research institutions as it supported both Maya standard and Muxiya and clone hardware instead of focusing primarily on the various RISC architectures that preceded UO-RISC, and could be ported to many other types of hardware in the future.
Due to its nature as a clone of Shiitana, it was initially looked down upon as a pet project that would never end up becoming anything to be considered over Shiitana or ShKV. One of Shiitana's licensees attempted to claim it was infringing Maya's copyrights, but as functionality was rebuilt and not simply ported, no legal action was ever enforced against it. Maya even said as much themselves, often quoted as saying "They are simply imitating our software experience. This implies a lack of imagination or innovative spirit."
It was this statement that led to the spreading of the source code to spite Maya, allowing anyone the ability to do anything with it that they wished. It quickly spread from there, becoming almost equally as common as Shitana at a 14% market share, while being compatible with its software and that of ShKV through the installation of compatibility layers, using translation rather than emulation.
The main factor holding Zanehtanah back was a perception that it was only for experts, or those that were fond of tinkering with their computers. 
It continued Shiitana's standard of the software distribution client, with software hosted on community-owned servers as long as they were vetted and non-malicious. For the most part, all of the variations of Zanehtanah are inter-compatible in terms of what software can run on the system, but a system's underlying hardware can affect its performance and stability dramatically. 
=== The Early Internet ===
Early in the 24-bit era, most computers were isolated systems that communicated to one another over short and often temporary wired connections limited to within one building, or even one room in many consumer applications. The largest networks existed in places like office buildings and school campuses, where systems existed in campus-area networks, or "CAN", where each building had a master server that was networked directly to the others, while all of the computers within it were considered to be a smaller LAN that could send requests through their building's server for access to the others. This had to change as network sizes increased, and eventually went global.
The world networking standard named "Valoka Yona Ukitii Pad'datii", which translates to, "The World's Connect and Communication System" was created by Muxiya, and is often abbreviated to VYUP. It has gone largely unchanged aside from a shift towards network graphics APIs. 
==== Browsers ====
The first program capable of accessing it was split from Muxiya ShKV's file browser application, being made into two separate programs simply to be easier for the user to understand despite there being very little difference in their capabilities. The first was the "Nearby Systems Network" icon, which was placed alongside the "My Computer" in the computer's file browser, and the "World Network" icon, which allowed access to publicly listed servers for downloading and hosting files and information, a sort of early internet. These servers were listed by a string of numbers twelve character long base-8 numerical string followed by a file directory, which may look something like this.
The server's identification is vyup.000002064523. 2064523 was not the 551251st server registered as compatible with VYUP protocol, this was instead the number that was semi-randomly assigned to it upon registration. Some older servers have higher designations, while some younger servers will have lower designations. Any numbers shorter than that are filled in with zeroes automatically. This allows for over 68.7 billion servers to exist at any given time.
The only true exception to this rule is that vyup.000000000001 is reserved for Muxiya Seeker, a repository of public servers in a searchable database that was created along with the first few hundred sites. This way a user can simply type vyup.1 to access a fairly competent early search engine. 
The above address takes the user through a file directory, the "information" folder within the "home" folder, that leads to a ru format plaintext file, standing for Rakita Ukitii, or Written Speech, explaining what the server they are connected to hopes to achieve named "about-here". 
2064523 was used as an early messaging and mail service, though its original form would be referred to as a dead drop server, as users could create and store files on it relatively anonymously. The server's rules stated that only text files were intended to be stored on it, with different folders considered to be threads and individuals being allowed to create and upload text files as comments on the topic being discussed within. Each comment was left in the ru format named with the format of "ru.(year-date-time)-(title)-(name)" This was done to ensure files would appear in chronological order. An example of the file paths is as follows.
vyup.000002064523
----- threads
---------- monthly pet discussion
--------------- ru.rzh2733-6007-0613-mypetsarecutest-mariiara32
Private threads existed in locked folders, ones requiring a password to view the contents of. This meant that only the server's administrators and those who knew the password could view its contents. 
A GUI was later made through the use of the yvn file format, an acronym for Yona Viikazha Niruda, or Connected Display Draw file. This output commands to the browser to draw colors, shapes, images, and text, and to create hyperlinks within the window. It vastly improved the user experience and made the site far easier to use. 
Other software for exploring the world of public servers would license access to the vyup network, including Maya's Pirakanii, or "Reach" service, and various other browsers that were used on all three major platforms. There were competing services, and even free services such as Adita Valoka Niisheka, Free World Storage, whose servers begin with the avn1 address extension and could be connected to with a patched application or dedicated software. Most open source browser software would be able to access avn1 sites by default. 
=== Ports of the Era ===
==== Dual Interface Device Port ====
IDP would remain a useful standard well into the 24-bit era, though at that point its speeds would be insufficient for transferring larger files as it once had, so it was shifted to being the device that external keyboards and pointing devices would use to connect.
=== 12-Pin MAVP ===
12-Pin MAVP (Monitor Audio, Video and Power) was used to both power and send display and control data to external monitors. 
The three large sockets on the left side of the connector above are similar to small RCA jacks used for analog component video, with each carrying only red, green, and blue intensity signals.
Pin 4, the first pin in the grid of nine, is responsible for timing the color signals to the monitor. Pin 5 is the vertical sync pin used by digital monitors to coordinate the colors with its refresh rate. Pin 6 is used by analog displays to signal the beginning of a new line. Pin 7 and 9 are the audio channels that carry sound to a monitor's built-in speakers if they exist. The pin between them, pin 8, is a grounding pin. Pins 10 and 12 are data carrier pins used for communicating info about the monitor to the computer, controlling things such as brightness and audio volume, and for carrying data through IDP6 devices. Pin 11 is the sync pin for these lines.
The three thick prongs to the right are the used to power the monitor, with the 13th, 14th, and 15th "pins" in the connector being a live wire, ground, and a neutral wire respectively. 
=== 12-Pin MAVO ===
MAVO, or Monitor Video and Audio Only, is a simplified version of 12-Pin MAVP. It didn't carry power for the monitor, and reduced shielding for the color lines meant the standard was cheaper, but also less sharp in analog mode. The digital mode, which was a device-side feature that also worked over MAVP, produced a much sharper image than the analog mode, and was used much longer than MAVP, surviving until it was superseded by high-bandwidth digital standards for much greater resolutions and refresh rates in the 48-bit era. 
=== Storage Media of the Era ===
==== 7.4azh Magnetic Diskettes ====
7.4azh diskettes would continue to be relevant as drive technology allowed a doubling of the number of tracks from 32 to 64. At the end of their mainstream usage, they were capable of storing up to 1.07 megabytes. 
Similar disks with optically assisted magnetic read/write heads would surpass their storage capabilities in the same form factor, with some disks reaching a capacity of nearly 510 megabytes, but as rewriteable 10.6 azhtaka diskettes were made available and costs came down for their production, the 7.4azh format was left in the past.
==== 10.6azh Optical Diskette ====
The 10.6 azhtaka diskette was introduced in the later part of the 24-bit era. Its internal disk measures 85.4mm, and it began as an infrared optical disk format capable of holding just under a 1050 megabytes of data, but as the era was coming to an end it would be updated to a six gigabyte capacity via a red laser. Their robustness and physical similarity to the 7.4 azhtaka diskette led to them becoming popular quickly. They are five-layer disks, with three structural layers and two metallic data layers, encased in a plastic housing to protect their surfaces from scratches. The notch on the front left ensures the disk can only be inserted one way.
== Modern Desktops, 48-Bit Era ==
Authiik hardware standards have remained the same since they left their home world around 26900 BCE, and are roughly equivalent to mid to late-21st century human computers. Keeping a standard reduces the work required to set up new tools for building parts with new standards, thus the manufacturing processes can be cost reduced into triviality. The computers were considered "powerful enough" for the work that needed to be done, and software created after the point that they stopped innovating has come to fully utilize the architecture and hardware at its disposal.
Individuals were encouraged to own their own computers, even on the fleets, to avoid consuming the compute resources of the mainframes of starships. This is considered to be unusual, as most known spacefaring species place personal terminals within crew quarters that act as thin clients to a starship's primary computers. 
=== Consumer Form Factors ===
==== Thermal Design Tower Standard ====
The TDTS form factor would remain standard for the majority of the remainder of the Authiik's time on Udyana, as its four different size categories were adequate for essentially any purpose that could be imagined for a desktop machine by consumers and companies alike, though as the power, and especially the efficiency of hardware increased, the usage of laptops and small form factor computers would increase. 
=== Consumer Hardware ===
==== 828 Pin CPU ====
The 828-pin CPU was a PGA standard created by Paveka for their Muxiya compatible CISC processors. It was not only Paveka's first 64-bit version of the Muxiya-compatible architecture, it was also their first consumer-facing CISC platform to feature more than one memory channel for additional bandwidth, supporting a physical capacity of two 48-bit memory and data buses used to communicate with them, in addition to a bidirectional 60-bit bus used to communicate with the expansion controller for MVX, and later hiPEP expansion cards. 
These CPUs began as relatively tame single-core CPUs, but quickly grew to dominate the market due to their flexibility, as 48-bit processors that were fully compatible with 24 and 12-bit programs in the proper operating environments, as well as the introduction of an additional physical core on the same die for the first time, which would set the stage for the success of Zanehtanah, as it natively supported 48-bit architectures due to it's widespread use in business sectors and on enterprise-class hardware, which had reached 48-bit compatibility years earlier. 
Features 	
Pin Count/Type 	828, ZIF Pin Grid Array
Pitch 	~1.29mm
Array Geometry 	32x32 pins
12x16 removed from center
2x2 removed from index corner
Package Size 	~44x44mm
Cooler Mount Spacing	~80mm 2-point
==== Socket 1158L for Muxiya CISC48 Processors ====
The 1158L standard used by Muxiya replaced their existing 960 contact pin grid CPUs with a more compact land grid socket. It was initially conceived of as a dense PGA socket, but a combination of engineering challenges and public opinion for the PGA style of socket falling led to the system's socket to be redesigned. 
==== Socket 1056L for UO-RISC48 Processors ====
By the time 48-bit processing had come into the mainstream, the 662L socket was practically ancient. Though a long running promise of inter-compatibility had kept even the oldest 662L UO-RISC systems somewhat relevant, its low speed peripheral interface was causing problems with modern connectivity standards such as hiPEP. 1056L was the replacement for the 662L socket, a much needed upgrade by the time it was introduced. 1056L, instead of having outboard memory and I/O controllers which limited the speed of peripheral devices, integrated the memory controller and had some of its own I/O functions for faster expansion bus standards like a hiPEP48 interface for video cards and high-speed storage drives, as well as having an outboard I/O controller for less speed-critical functions, such as storage drives, IDP ports, audio processing, and lower-bandwidth hiPEP and legacy exPEP slots. 
It used the same 39 millimeter square PCB size, heat spreader dimensions, and cooler mounting systems as the 428L and 662L socket, but both greatly increased the density of the pads on the bottom from a 28x28 base grid to a 35x35 base grid and changed the keying from two notched corners to three semicircular cuts so the sockets were not physically compatible. The solder mask used on substrates also changed from red to teal.
==== 895 Pin CPU ====
The 895 pin CPU was an LGA and BGA standard based on the far larger 2330 pin CPU seen in the workstation and server space. If a desktop motherboard requires a socketed CPU, the socket can be added to allow interchangeability. If it must be as compact as possible, a solder ball grid can be used instead, which allows for the CPU to be attached directly to the motherboard and, with the removal of the heat spreader, to be as flat as possible for small systems.
The core count was vastly reduced from the 2330 standard, with a bare minimum of three multi-threaded cores seen in some low-power laptops running as slowly as 3.7 gigahertz, and a maximum of 28 cores and 48 threads running at 5.8 gigahertz. While less potent than contemporary 960 pin CPUs, they were less expensive due to a general lack of integrated video on most processors, and marketed as being more durable than their competitors due to a lack of easily damaged pins, placing those instead on the motherboard or sled, which is generally a less expensive component. 
==== Memory ====
As memory and processor sleds share a bus standard, the RAM modules also total 588 pins. Each of the six modules has 196 pins, and each side of the module is accessed once during each memory cycle. The sled pictured above has 48 gigabytes of ram installed. 
=== Enterprise Hardware===
The high-power computer market, used to create servers, workstations, and later the mainframes of starships, exists in a space with far more powerful hardware. Motherboards in this class will have up to 48 memory slots in six channels per CPU, four 2330 pin CPU sockets, eight PEP slots, and four exPEP slots. Most components are cooled passively by large fans at the front of the case, necessitating the use of large heat sinks. 
==== 2330 Pin a-CISC CPU ====
The 2330 pin CPU is a massively scalable processor family, allowing up to four CPUs per motherboard. Unusual among authiik technology, they use a land-grid array socket, with the pins on the motherboard rather than on the CPU. This allows them to have a simple retention-free socket design, being pressed into the socket entirely by the cooler's mounting screws. Core counts begin at 12 cores and 24 threads, and increase to a maximum of 48 cores and 96 threads. Clock speeds begin around 5.7 gigahertz, and end at 4.2 gigahertz. Each CPU increases the memory capacity by as much as 768 gigabytes, allowing four-CPU systems access to up to three terabytes of memory. 
Systems that use them are also capable of communicating over an extremely fast interface that can transmit up to fifty gigabytes per second of information, allowing not only processors, but different hardware environments to communicate to perform computing tasks. This is how the narrow majority of authiik supercomputers are constructed, with just over 60% share belonging CISC processors on the L2330 platform. While this looked to change as quantum computing approached a reliable state, the Fourth Udyana World War caused an end to this innovation and the existing 48-bit technology was fallen back on. 
==== 3480-Pin UO-RISC CPU ====
a-RISC is the human name used to describe the common standard for reduced instruction set computing architectures among authiik machines, comparable to the human ARM architecture, while a-CISC is comparable to the x86-64 architecture. The 3480 pin CPU package contains a multi-chip module with as many as 192 cores, with each core at a base clock speed of around 4.9 gigahertz. These systems also scale to a maximum of two CPUs per system. Just under 40% of authiik pre-exodus supercomputers were built using these processors, and over 80% of the Extragalactic fleet's starship mainframes use them now.
==== Socket 2911L for Maya Flare Heavy UO-RISC48 Processors ====
Unlike the consumer and professional workstation systems, the 2911L socket for Maya's Flare Pro series of server and workstation processors was bespoke, and proprietary. It utilized multi-channel serially attached memory, and ranged from 6 to 32 processing cores. The multiple gaps in the pad array on the underside of the processor substrate were intended for a number of plastic landings in the socket to ensure the relatively large processor, with measurements of 50.1x75.3mm, was level in the socket and at the correct depth regardless of the exact mounting pressure that the user could achieve. 
==== Socket 1599L for UORISC 48 Processors ====
1599L was a RISC platform for desktop computers and workstations that supported up to four serially attached memory channels and up to 150 hiPEP lanes. The platform was designed for durability, and used a pogo pin array in the socket and ceramic substrates serving to increase the resilience of both the socket and the processor, rather than sacrificing one or the other as seen in traditional ZIF land grid and pin grid arrays. They use far fewer pins than a system using contemporary parallel memory busses, and as a result can be far more compact than previous generation server and workstation processors on the 2911L socket. It used a single notched corner for indexing. 
Features 	
Pin Count/Type 	1599, Pogo Pin
Pitch 	~1mm
Array Size 	40x40 Pins
1 pin removed from index corner
Package Size 	~42x42mm
Cooler Mount Spacing	~85x85mm square and/or ~92mm 2-point narrow
==== Socket 1740L for UO-RISC Processors ====
The 1740L platform was the successor to the 1599L platform. The socket's pin count increased for additional power delivery due to the increase in core count and peak power draw in uniprocessor systems, and for an increase to 4-way multiprocessing and bandwidth to the system hub for more peripheral I/O speed, but the quad-bank serially attached memory system and 150 maximum hiPEP lanes remained consistent with the previous generation. 
Features 	
Pin Count/Type 	1740, Pogo Pin
Pitch 	~0.87mm
Array Size 	47x47 Pins
1 removed from each corner
3 removed from each index notch
21x21 square removed from center
Two 3x2 rectangles removed near center
Package Size 	~42x42mm
Cooler Mount Spacing	~85x85mm square and/or ~92mm 2-point narrow
==== SAMM Memory ====
48-bit server platforms initially used standard parallel memory with redundant chips used for error correction, striping data across the chips in a way similar to a RAID storage array. NiVeDa introduced their serial memory as an alternative to the traditional parallel standards, as well as specifications for memory controllers within processors capable of interfacing with it. This quickly took hold in the server and high-end workstation space, similarly to the fully-buffered memory present in second generation DDR. The specific standard used most often in servers was SAMM-HD/SR, or "Serially Attached Memory Module, High Density, Single Redundancy". 
The serially attached memory modules send data over a number of high-speed serial threads that send whole words at a time rather than across a wide bus, with each bit of a word on a different line. Any processor capable of using this memory simply has an upper speed limit that causes instability if it is exceeded. This means that theoretically, all NiVeDa protocol serial memory is compatible with any processor capable of interfacing with it. They simply come with a performance penalty due to either lower thread counts or overall speed. 
The high-density spec includes double the number of memory chips, twenty-four in total, for greater capacity. The standard density spec includes twelve chips, and the low-density spec includes only six. 
Single redundancy spec includes an additional memory chip for error correction, with the data striped across the chips for backup purposes. Consumer memory will often forgo this specification, this is called "non-redundant", and very high-end memory may even include two chips for redundancy, or "dual redundancy" specification. 
=== Ports of the Era ===
==== microIDP ====
The smaller IDP6 ports would begin to be used on devices other than diskette drives, pointers, and keyboards fairly quickly. First for small flash storage devices that could be written to faster than diskettes, but could not hold as much data. Mini IDP would be standard for lower-bandwidth devices, and other parallel standards were used for connecting multiple devices together in a network. Serial standards reemerged as bus speeds increased, so the IDP standard was refreshed in a far smaller and reversible standard called "microIDP" by humans. microIDP is used on consumer devices of all kinds, from mobile phones to desktop computers. An alternate standard on the same port, called microIDP+, is capable of up to eight times the data transfer speeds between devices by utilizing both sides of the connector in parallel operation to create up to eight one-way streams of data, or four two-way streams. In the first mode, pins 1, 2, 4, and 5 on both sides of the port form the data lines. In the second, ins 1 and 2, and pins 4 and 5 form two-way data lines on both sides. Pins 3 and 6 always remain power and ground respectively.
microIDP+ is used in semi-professional environments for connecting high-bandwidth external devices such as high-definition displays, external storage drives, and external compute units, to smaller desktops. It is marked with a "times 4" in Ukitii near the ports that support it.
==== exPEP Card Slots ====
exPEP, Urari Shakiixa Vikatii Patta, or Extended Peripheral Expansion Plate, is an edge connector standard that allows for a greater bandwidth between computer components.
Its total pin count is 222 pins as opposed to the 126 on a standard full-width PEP card, adding a third area of the connector with 64 more pins, allowing for an additional 24 data lines for a total of 48. Its maximum throughput was 613 MB/s, or 409 MT/s. The best known card types that utilize exPEP are general compute units (GCU) and video compute units (VCU), the former being one of the primary components of a BPS desktop computer where, depending on its scale, it can use one or two of these connectors, and the latter being compatible with most models of authiik MDS, Mini-MDS, and BPS desktops. 
VCUs are most commonly seen in home computers used to play video games, though they can also be used in massive arrays to create general purpose supercomputers. In consumer applications, they often feature microIDP+ ports for connecting monitors, and normal microIDP for other peripherals. Another common standard is that they often include a wireless communicator that allows game controllers to connect.
GCUs are cards that fit into small systems. They feature a CPU socket and a pair of 98-pin memory slots. A riser card in the bottom of the case allows the exPEP connector to pass through to the other slots on the riser.
==== hiPEP Card Slots ====
hiPEP, Zhixa Shakiixa Vikatii Patta, or High Speed Peripheral Expansion Plate, is a standard that emerged just before the exodus of the authiik from Udyana. It was initially used for video cards and slotted storage devices. PEP and exPEP before it were parallel standards, sending data one bit at a time per lane across its slot, making them 24 and 40-bit buses respectively. While MVB was faster, it was specialized for video cards only. hiPEP replacing it would be far more of a universal standard. 
hiPEP is a scalable serial standard, sending whole tribbles individually on each of these lines, and coming in five variations. hiPEP-6, with one set of data contacts, hiPEP-12 with two, hiPEP-24 with four, and two variations of hiPEP-48, with eight sets of contacts. The later iteration of hiPEP-48, known as hiPEP-48IP, included a section for integrated power delivery and a spring-loaded lock to secure heavier expansion cards such as video cards with large heatsinks. 
Each "finger" of the connector's data section has eighteen pins, nine per side, with a clock pin at the beginning and a sense pin at the end of each and the interior seven arranged with alternating ground and data pins. The top facing side of the card is most often used for upload, or information entering the card, and the back side of the card is most often used for data download, information exiting the card. Each finger was individually configurable as to whether it was used for upload or download. 
It quickly evolved, with its maximum throughput doubling roughly every seven years, reaching a maximum of roughly 33 gigabytes per second on the third-generation hiPEP-48 slots. 
hiPEP VCUs follow a common architecture style of being massively scalable with no dedicated logic types. VCU dies may have hundreds or thousands of different simple logic cores that may be assigned to any number of tasks, including drawing geometry, performing shading or calculating lighting effects through raycasting, mapping textures, or applying filters such as bloom, ambient occlusion, or motion blur. The developers of software can choose a percentage of cores to dedicate to certain tasks, and the card itself, in tandem with its driver software, will assign tasks accordingly. 
This means that video card performance linearly scales with the number of cores a card has, and this speed increase remains constant when clock speeds and IPC increase. Large loads can also be split evenly among any number of video cards with very high percentages of scaling before diminishing returns begin to show. 
Many consumer mainboards will have the space and bandwidth available to accommodate up to two hiPEP-48 cards at up to three slots wide, while servers and workstations may have the space for up to four at up to four slots wide. 
The weight of larger modules caused the expansion card bracket to have a claw added to the bottom, which fit into slots in the motherboard tray to anchor them and keep them from flexing, or damaging the motherboard due to their weight alone. 
=== Storage Media of the Era ===
==== 10.6azh Optical Diskette ====
The 10.6azh diskette would survive for software storage and distribution into the modern day. An upgrade from red to near-ultraviolet blue lasers increased the capacity of the disk to over 30 gigabytes. Magnet-assisted writing has sped disk burn speeds to nearly that of hard disk drives, and modern drives are capable of reading and writing all generations of disks that came before.
==== 7azh Holographic Diskette ====
The most dense optical storage media that the authiik ever created, the 7azh diskette was a double-sided holographic diskette capable of holding over 1.5 terabytes of data per side, over 160 times the storage density of a 10.6azh diskette while being physically smaller. Instead of storing data in two-dimensional tracks, a holographic optical disk stores data in three dimensions. 
Read-only models had been available for a number of years while write-once, read-many models had only been publicly sold for roughly two years when the fourth world war began, halting their development almost entirely. The technology was pursued further on Pratishaya resulting in the large-format 21 azhtaka multi-disk cartridge used in large-scale archival storage, capable of storing 162 terabytes of data each, but advancing the technology took a lower priority than expanding the colony, so funding was limited. 
== Video Games ==
Given the largely sedentary and solitary lives authiik led for the majority of their spacefaring history, video gaming was a welcome addition to the daily routine for entertaining oneself.
=== Hardware ===
Unlike the computers of limited scope that humans produced under the category of "gaming consoles" that only play video games alongside multimedia functions, the authiik see little value in a single purpose device of that complexity, preferring instead to create video processing hardware for their computers and play their more intensive games there. VCU exPEP cards, and some higher-end later model PEP cards, feature an open wireless communication standard used to connect controllers to a computer, where they are preferred for certain types of games. 
The modern authiik standard game pad feature set is similar to that on earth in the late 1990s or early 2000s, with a total of four face buttons, four shoulder buttons, a 4-way directional pad, a central pause key, and two analog thumb sticks of some kind. While some advanced control methods were starting to emerge as Udyana descended into its fourth world war, the standard 12-button gamepad was retained due to its wide support base and relative simplicity. 
The controller pictured above is a model made on Temno after authiik-human contact was established. It is a Maya Adventure Gamepad that features analog joysticks. It comes included with Maya video cards, with the cooler shroud and the controller's face plate color matching in one of Maya's four signature colors. Cyan, Pink, Lime, and Gold. Sold separately were controllers in white and black, and individual magnetic face plates in a variety of colors, patterns, and even some with limited-edition artwork.
The game controller controller started out on Udyana much the same as they did on Earth. Descending from arcade games, a home game controller controller needed only five buttons. A single button for selecting options in a menu and four buttons or a joystick to provide cardinal movement directions. The first added button was used to pause the game's operation, later serving to also bring up an options menu. As games grew more complex, new buttons were added. One button became two, then four. To avoid cluttering the face of the controller, new buttons were placed at the top as shoulder buttons. Three dimensional games caused a requirement for both sticks and directional controls on the face of the controller, however the analog joystick was quickly replaced with the analog slider for compactness, and the analog trigger button only became commonplace after making contact with humans. 
Game controllers are commonly used to control a computer, with popular modern operating systems allowing for cursor control with the right stick, and icon selection with the controller's face buttons.
=== Software ===
The most common game genres played by authiik are grand strategy and base building games, usually themed around the colonization of space. It's believed that this is a form of propaganda used to raise the interest of the young in reestablishing the authiik as a power in space.
Regardless, these games are agreed upon to play best with a keyboard and mouse, and games like fighting, racing, and flight games are better enjoyed with a standard controller or perhaps specialized peripherals like pedals and wheels. Simpler titles like puzzle games, strategy games, and platformers are more often enjoyed on a handheld console which, in keeping with their modern sentiment against single-purpose devices, is often also a smartphone.
== Space-Age Computing Standards ==
By the time the Authiik species left for worlds beyond the Dvarika system, the design of computers had shifted away from designs similar to early 21st century Human machines to ones designed to be as power efficient as possible for long-term missions with very low heat output. Centralized computers in mainframes, combined with extremely basic thin clients at the stations where crew members worked on starships became the norm, accounting for over 80% of the volume of computer devices on the fleets, but only half of the power consumption. 
=== Compact Multi-function Computing Devices ===
The machines themselves, working under the English acronym of CMCDs, or "Compact Multifunction Computing Devices", are small boxes roughly 10"x15"x2", that utilize small and power efficient general-purpose RISC CPUs combined with versatile high bandwidth FPGAs that are reconfigured whenever a program is run. This means that there is no general purpose GPU or CPU inefficiently running programs outside of basic system management. In addition, there is an expansion bay, which can either be used for a magneto-optical drive if the machine is privately owned, allowing for a functional desktop to be made smaller and far more power efficient, or if the machine is part of a compute complex, an ASIC accelerator used to make the whole rack of machines as effective and efficient as possible for one specific task, such as tracking and coordinating objects in the visual field and beyond via hyperluxon detection, making calculations for safe and fast warp travel routes, and much more. 
The thin clients function only on basic dual-core RISC CPUs to handle data transfer and display to fast ePaper-like displays
= Mobile Phones =
The authiik smartphone descends from multiple branches of technology, including the PDA, or personal digital assistant, devices intended to keep track of schedules, take notes, and access some internet services, and the cellular telephone, relatively small wireless telephones that could be transported in one's pockets. 
== Early Smartphones ==
The earliest smartphones were mostly PDA-like in form, but with the capability to place calls and send text messages. Resistive touch screens and styli, trackballs, and swipe pads were used to navigate their interfaces, and their limited processing power enabled simple games to be run on them. Each family of devices used their own connectors and software standards, making cross-compatibility of these applications very poor.
Some of these mobile phones had integrated handheld game consoles as well, 
Category:Authiik Culture
Category:Authiik Technology