Programmable Array Logic

Programmable Array Logic (PAL) refers to a family of fuse-programmable logic integrated circuits originally developed by . Registered or output functions are modeled in a form. Each output is a sum (logical or) of a fixed number of products (logical and) of the input signals. This structure is well suited for automatic generation of programming patterns by logic compilers.
==Description==
PAL devices are traditionally programmed by blowing the fuses permanently through the use of overvoltage, like programmable read-only memory (PROM) chips.. 2006-04-29.
===Alternatives===
s (CPLDs) have since become available, which are based on the same original architecture and incorporate the equivalent of several PAL chips. However, simpler PAL chips remained popular due to their high speed. (GAL) devices are reprogrammable and contain more s.
==References==
==External links==
* at Wikipedia
Category:Components
Category:Technical terminology