Query: Power and efficiency enhancement of 3G multicarrier amplifiers using digital signal processing with experimental validation

Candidate papers:

abstract: This paper proposes a digital signal processing based approach suitable for the performance optimization of third generation (3G) amplifiers in terms of spectrum and power. A peak to average power ratio (PAPR) reduction method, which is coding and modulation independent, based on peak clipping and digital filtering techniques, is proposed. Moreover, the multibranch memory polynomial pre distorter identified with an optimized recursive least square technique was efficiently implemented in a digital signal processor. The cascade of the proposed PAPR reduction technique with the memory pre distorter results in a substantial enhancement of the power amplifier (PA) output linear power and efficiency, while still meeting the 3G partnership project standard requirements. An experimental validation carried out on a 90 W laterally diffused metal oxide semiconductor PA, which was fed with a wide band code division multiple access signal, led to a 4 dB rise in output mean linear power accompanied with 60% increase in its power added efficiency.
author_names: Mohamed Helaoui

Slim Boumaiza

Adel Ghazel

Fadhel M Ghannouchi
title: Power and efficiency enhancement of 3G multicarrier amplifiers using digital signal processing with experimental validation
venue: IEEE Transactions on Microwave Theory and Techniques
year: 2006

abstract: In this article, we propose a novel simultaneous wireless information and power transfer (SWIPT) scheme for the Internet of Things (IoT) Different from the conventional power splitting (PS) and time switching (TS) schemes, the proposed scheme sends the wireless power via the unmodulated high power continuous wave (CW) and transmits information by using a small modulated signal in order to reduce the interference and to enhance the power amplifier efficiency. We design a receiver circuit for processing such SWIPT signals, which is designed with the aim of minimizing the circuit complexity and power consumption for information decoding. This goal is achieved by first rectifying the received signal and then splitting the power and information signals. We analyze the proposed receiver circuit and derive the closed form expression for the energy harvesting efficiency and the frequency response of the communication signal. We have implemented the proposed receiver circuit and built the real time testbed for experimenting with simultaneous transmission of information and power. By experiments, we have verified the correctness of the receiver circuit analysis and shown the validity of the proposed SWIPT scheme.
author_names: Kae Won Choi

Sa Il Hwang

Arif Abdul Aziz

Hyeon Ho Jang

Ji Su Kim

Dong Soo Kang

Dong In Kim
title: Simultaneous Wireless Information and Power Transfer (SWIPT) for Internet of Things: Novel Receiver Design and Experimental Validation
venue: IEEE Internet of Things Journal
year: 2020

abstract: Due to the increasing demands for large capacity and high performance wireless transmitters, multi band transmitter architectures play an important role in modern communications. Thus, advances in the design techniques of radio frequency (RF) power amplifiers (PAs) have promoted the use of a single multi band PA and RF components in order to concurrently process multiple input signals located in different frequency bands. In this paper, digital signal processing (DSP) techniques for linearity and efficiency enhancement of multi band envelope tracking (ET) transmitters are discussed. A two dimensional digital predistortion (2D DPD) is used for linearization of the dual band PA around each band separately, relaxing the high speed requirements needed by wideband DPD. Power efficiency enhancement of the dual band PA is accomplished by adopting bandwidth reduced envelope shaping functions that depend on the original envelopes of the two concurrent signals driving the PA, which provides a good compromise between efficiency and linearity. The proposed architecture is experimentally validated where linearization and efficiency enhancement results are presented.
author_names: Fadhel M Ghannouchi

Andrew K C Kwan

Mayada F Younes

Wenhua Chen
title: DSP techniques for linearity and efficiency enhancement of multi band envelope tracking transmitters
venue: 2014 Asia Pacific Microwave Conference
year: 2014

abstract: This paper presents a new power amplifier architecture incorporating a multi level envelope delta sigma modulation (EDSM) encoder together with a dynamic bias control method to improve the overall efficiency. The proposed transmitter was developed based on a 3 level encoding process for quantizing the non constant envelope signal. Therefore, the power amplifier is always operated under only a two state output power level (maximum and 6dB back off levels) achieving high efficiency. To maintain this high efficiency at a 6dB back off output level, a lower DC supply voltage is supplied from a dual supply network (DSN) assisted on a digital process block. Using the proposed efficiency enhancement method, we have designed and implemented a 2.6GHz high efficiency Class J power amplifier (PA) using a commercial 10W PEP GaN device and a simple dual supply network. The experimental results show that, if the 0.51dB power loss of the band pass filter is de embedded, the proposed power amplifier delivers a drain efficiency (DE) of 59.8% and power added efficiency (PAE) of 55.6% with a gain of 11.1dB at an average output power of 34.5 dBm, for a 10 MHz 3G LTE signal with a 8.5 dB peak to average power ratio (PAPR)
author_names: Joonyhyung Kim

Sung Jun Lee

Jae Ho Jung

Chul Soon Park
title: 60% high efficiency 3G LTE power amplifier with three level delta sigma modulation assisted by dual supply injection
venue: 2011 IEEE MTT S International Microwave Symposium
year: 2011

abstract: We present a prototype RF transmitter with an integrated multilevel class D power amplifier (PA) implemented in 28 nm CMOS. The transmitter utilizes tri phasing modulation, which combines three constant envelope phase modulated signals with coarse amplitude modulation in the PA. This new architecture achieves the back off efficiency of multilevel outphasing, without linearity degrading discontinuities in the RF output waveform. Because all signal processing is performed in the time domain up to the PA, the entire system is implemented with digital circuits and structures, thus also enabling the use of synthesis and place and route CAD tools for the RF front end. The effectiveness of the digital tri phasing concept is supported by extensive measurement results. Improved wideband performance is validated through the transmission of orthogonal frequency division multiplexing (OFDM) bandwidths up to 100 MHz. Enhanced reconfigurability is demonstrated with non contiguous carrier aggregation and digital carrier generation between 1.5 and 1.9 GHz without a frequency synthesizer. For a 20 MHz 256 QAM OFDM signal at 3.5% error vector magnitude (EVM) the transmitter achieves 22.6 dBm output power and 14.6% PA efficiency. Thanks to the high linearity enabled by tri phasing, no digital predistortion is needed for the PA.
author_names: Jerry Lemberg

Mikko Martelius

Enrico Roverato

Yury Antonov

Tero Nieminen

Kari Stadius

Lauri Anttila

Mikko Valkama

Marko Kosunen

Jussi Ryynanen
title: A 1.5 1.9 GHz All Digital Tri Phasing Transmitter With an Integrated Multilevel Class D Power Amplifier Achieving 100 MHz RF Bandwidth
venue: IEEE Journal of Solid State Circuits
year: 2019

abstract: This communication presents a new technique for the digital predistortion of power amplifiers (PAs) based on sparse behavioral models. The subspace pursuit algorithm formulation is adapted to work in the nonlinear series framework. Experiments driven on a test bench based on a GaN PA driven by a 15 MHz filter bank multicarrier (FBM C) signal were conducted in order to validate the algorithm. Experimental results in a digital predistortion scenario and the comparison with the orthogonal matching pursuit highlight the enhancement of this pruning method.
author_names: Juan A Becerra

Daniel Herrera

Maria J Madero-Ayora

Carlos Crespo-Cadenas
title: Sparse Model Selection of Digital Predistorters Using Subspace Pursuit
venue: 2018 13th European Microwave Integrated Circuits Conference (EuMIC)
year: 2018

abstract: This paper investigates the effects of crest factor reduction and digital predistortion on the performances of communication and broadcasting systems. The overdrive of digitally predistorted power amplifiers is proposed for power efficient linear amplification of amplitude modulated signals having high peak to average power ratio. This is achieved by adding, at the input of the digital predistortion system, a clipping function to allow for an overdrive of the linearized power amplifier while meeting spectrum emission mask linearity requirements. The proposed technique is experimentally validated using a GaN Doherty power amplifier driven by long term evolution (LTE) signals. Measurement results show that the overdriven power amplifier can deliver up to 2.5 dB extra output power, up to 80% enhancement in the power utilization factor, and up to 20% relative increase in the power efficiency while being compliant with the linearity requirements of the LTE standard.
author_names: Oualid Hammi
title: Efficient Linear Amplification Using Digitally Predistorted Overdriven Power Amplifiers
venue: IEEE Transactions on Broadcasting
year: 2015

abstract: This paper presents the synergistic combination of an efficient power amplifier design with a novel approach for the digital predistortion that, in addition to reducing spectral regrowth, is optimized to deal with the in band distortion. The proposed linearization is based on a pre processing filter followed by a memoryless nonlinear block, and is easily inserted in an OFDM system. The experimental validation has been accomplished with 3GDPP WCDMA and LTE signals in a class J amplifier based on a 15 W GaN device. Measurements show improvements over 10 dB in ACPR and one point reduction of EVM compared to other widely used approaches.
author_names: Maria Jose Madero-Ayora

Michel Allegue-Martinez

J Angel Garcia

Javier Reina-Tosina

Carlos Crespo-Cadenas
title: Linearization and EVM enhancement of an efficient class J amplifier for 3G and 4G mobile communication signals
venue: 2012 Workshop on Integrated Nonlinear Microwave and Millimetre wave Circuits
year: 2012

abstract: In this paper, a signal amplitude estimator for inter band carrier aggregated signals is proposed to assist with the effective application of dual band crest factor reduction (CFR) and digital predistortion (DPD) for enhanced dual band power amplifier (PA) performance. As proof of concept validation, the dual band CFR was applied to reduce the peak to average power ratio of a carrier aggregated signal formed by a 10 MHz LTE signal, centered at 750 MHz, and a 15 MHz LTE signal, centered at 900 MHz, by 2.5 dB while maintaining an error vector magnitude of better than 4% The resultant signal was then pre processed by a dual band Volterra DPD and used to linearize a 20 W broadband Doherty PA. The joint application of dual band CFR and DPD succeeded in enhancing the performance of the PA by allowing a linear average output power of about 4 W, and drain efficiency of about 48% with an adjacent channel leakage ratio of about 50 dBc.
author_names: Bilel Fehri

Slim Boumaiza
title: Joint dual band crest factor reduction and digital predistortion of power amplifiers driven by inter band carrier aggregated signals
venue: 2014 IEEE MTT S International Microwave Symposium (IMS2014)
year: 2014

abstract: In this paper, the novel architecture of a dual input and digitally driven Doherty amplifier is proposed with the aim of improving the performance of gallium nitride (GaN) Doherty transmitters. In this work, the power efficiency is enhanced by using digital adaptive phase alignment to compensate for performance degradation due to bias and power dependant phase misalignment between the carrier and peaking branches. For experimental validation, the proposed dual input digital Doherty power amplifier (PA) was implemented using a 10 W GaN transistor. Measurement results demonstrate that the dual input Doherty prototype exhibited a power added efficiency (PAE) higher than 50% over an 8 dB output power back off (OPBO) range. In comparison with the conventional fully analog Doherty PA, this represents a 10% improvement in PAE over the same OPBO range. Using a one carrier Worldwide Interoperability for Microwave Access signal with a 7 dB peak to average power ratio, the dual input Doherty PA, with digital adaptive phase alignment applied at the input of its peaking path, achieved a PAE of 57% at an average output power of 37.8 dBm, along with a 22 dBc adjacent channel power ratio (ACPR) This corresponds to an improvement of 7% in PAE and 1 dB in average output power for the same ACPR level in comparison with a conventional fully analog Doherty PA.
author_names: Ramzi Darraji

Fadhel M Ghannouchi

Oualid Hammi
title: A Dual Input Digitally Driven Doherty Amplifier Architecture for Performance Enhancement of Doherty Transmitters
venue: IEEE Transactions on Microwave Theory and Techniques
year: 2011