Query: Silicene field-effect transistors operating at room temperature.

Candidate papers:

abstract: Free standing silicene, a silicon analogue of graphene, has a buckled honeycomb lattice and, because of its Dirac bandstructure combined with its sensitive surface, offers the potential for a widely tunable two dimensional monolayer, where external fields and interface interactions can be exploited to influence fundamental properties such as bandgap and band character for future nanoelectronic devices. The quantum spin Hall effect, chiral superconductivity, giant magnetoresistance and various exotic field dependent states have been predicted in monolayer silicene. Despite recent progress regarding the epitaxial synthesis of silicene and investigation of its electronic properties, to date there has been no report of experimental silicene devices because of its air stability issue. Here, we report a silicene field effect transistor, corroborating theoretical expectations regarding its ambipolar Dirac charge transport, with a measured room temperature mobility of ~100 cm(2) V( 1) s( 1) attributed to acoustic phonon limited transport and grain boundary scattering. These results are enabled by a growth transfer fabrication process that we have devised silicene encapsulated delamination with native electrodes. This approach addresses a major challenge for material preservation of silicene during transfer and device fabrication and is applicable to other air sensitive two dimensional materials such as germanene and phosphorene. Silicene's allotropic affinity with bulk silicon and its low temperature synthesis compared with graphene or alternative two dimensional semiconductors suggest a more direct integration with ubiquitous semiconductor technology.
author_names: L Tao

Eugenio Cinquanta

Daniele Chiappe

Carlo Grazianetti

Marco Fanciulli

Madan Dubey

Alessandro Molle

Deji Akinwande
title: Silicene field effect transistors operating at room temperature.
venue: Nature nanotechnology
year: 2015

abstract: Free standing silicene is a two dimensional silicon monolayer with a buckled honeycomb lattice and a Dirac band structure. Ever since its first successful synthesis in the laboratory, silicene has been considered as an option for post silicon electronics, as an alternative to graphene and other two dimensional materials. Despite its theoretical high carrier mobility, the zero band gap characteristic makes pure silicene impossible to use directly as a field effect transistor (FET) operating at room temperature. Here, we first review the theoretical approaches to open a band gap in silicene without diminishing its excellent electronic properties and the corresponding simulations of silicene transistors based on an opened band gap. An all metallic silicene FET without an opened band gap is also introduced. The two chief obstacles for realization of a silicene transistor are silicene's strong interaction with a metal template and its instability in air. In the final part, we briefly describe a recent experimental advance in fabrication of a proof of concept silicene device with Dirac ambipolar charge transport resembling a graphene FET, fabricated via a growth transfer technique.
author_names: Ruge Quhe

Jing Lu
title: Silicene transistors A review
year: 2015

abstract: The realization of the first Field Effect Transistors operating at room temperature, based on a single layer silicene channel, open up highly promising perspectives, e.g. typically, for applications in digital electronics. Here, we describe recent results on the growth, characterization and electronic properties of novel synthetic two dimensional materials beyond graphene, namely silicene and germanene, its silicon and germanium counterparts.
author_names: Guy Le Lay

Eric Salomon

Thierry Angot

Maria Eugenia Davila
title: Increasing the lego of 2D electronics materials: silicene and germanene, graphene's new synthetic cousins
venue: Defense Security Symposium
year: 2015

abstract: Silicene is the silicon counterpart of graphene, that is, it consists of a single layer of Si atoms arranged in a hexagonal network. This new two dimensional material, first predicted by theory, has been recently grown on different metallic surfaces.1, 2, 3 An obvious advantage of silicene (over graphene) for nanoelectronic applications is its better compatibility and expected integration with the existing Si nanotechnology platform. A new breakthrough on this material has been recently reported by Tao et al.,4 who have successfully fabricated the first silicene based field effect transistors (FETs) operating at room temperature. Their success relies on the development of a layer transfer process, called 'silicene encapsulated delamination with native electrodes' (SEDNE) This innovative process includes the following key steps: (1) epitaxial growth of silicene on Ag(111) thin films grown on mica substrates; (2) Al2O3 in situ encapsulation of the silicene layer, followed by its delamination transfer on a p++Si/SiO2 substrate; and (3) subsequent Ag source/drain contact formation by e beam lithography. A resulting silicene based FET, with the p++Si substrate used as a back gate contact, is shown in Figure 1a.
author_names: Michel Houssa
title: The rise of silicene
year: 2015

author_names: Andrew M Zeidell

Colin Tyznik

Oana D Jurchescu
title: High yield, high mobility mixed halide perovskite field effect transistors operating at room temperature
year: 2017

abstract: Reducing the operating voltage and processing temperature are the crucial factors in the progression of organic field effect transistors (OFETs) in flexible portable applications. Here, we have dem.
author_names: Vivek Raghuwanshi

Deepak Bharti

Ajay Kumar Mahato

Amit Kumar Shringi

Ishan Varun

Shree Prakash Tiwari
title: High Performance Flexible Organic Field Effect Transistors with Barium Strontium Titanate Gate Dielectric Deposited at Room Temperature
year: 2020

author_names: Deji Akinwande
title: Room Temperature Silicene Field Effect Transistors
year: 2016

abstract: Submitted for the MAR17 Meeting of The American Physical Society High yield, high mobility mixed halide perovskite field effect transistors operating at room temperature1 ANDREW ZEIDELL, COLIN TYZNIK, OANA JURCHESCU, Wake Forest University Hybrid halide perovskites combine the ease of processing inherent to organic compounds with the high performance of inorganic materials. Charge transport in perovskite field effect transistors (FETs) is strongly dependent on the quality of the perovskite film and that of the semiconductor/dielectric interface. Si/SiO2 substrates are widely used as gate electrode/dielectric platforms in thin film transistors. This architecture, however, was previously unsuccessful for perovskite transistors at room temperature due to a combination of high interfacial trap densities, defect states in perovskite films, and possibly ionic transport. In this study, we incorporated the hybrid halide perovskite CH3NH3PbI3 xClx in FETs with Si bottom gate electrode and SiO2 dielectric. We obtained working devices at room temperature by drastically improving the quality of the perovskite layer using film processing techniques such as solvent annealing to increase the uniformity and coverage, and by encapsulation in hydrophobic polymers to protect from moisture. The resulting films provided a high yield of ambipolar FETs with uniform operation, achieving reproducible room temperature hole mobilities on the order of 1 cm2/Vs, and electron mobilities on the order of 0.1 cm2/Vs. We show that this is due to lowering the trap density in the transistor channel by increasing the grain size, thus reducing the density of grain boundaries, and minimizing ionic migration, which occurs predominantly at grain boundaries.
author_names: Andrew M Zeidell

Oana D Jurchescu
title: Abstract Submitted for the MAR17 Meeting of The American Physical Society High yield, high mobility mixed halide perovskite field effect transistors operating at room temperature1
year: 2017

abstract: The quantum confinement effect (QCE) in ultranarrow silicon nanowire channel field effect transistors (FETs) as well as single electron/hole transistors (SET/SHTs) operating at room temperature is intensively investigated for the optimization of device design and fabrication. By adopting a "shared channel" structure with the directions of and a carrier dependent QCE is systematically examined. It is found that nanowire pFETs exhibit a smaller threshold voltage (Vth) variability due to a weaker QCE, while nFETs and n/pFETs show comparable Vth variabilities coming from the QCE. It is also found that only SETs exhibit clear Coulomb oscillations in the case of the channel, suggesting the formation of higher tunnel barriers than SHTs. On the other hand, SHTs show undesirable multidot behavior in spite of their comparable QCEs for electrons and holes. It is concluded that directed nanowire channel SETs and n/pFETs are suitable for the integration of CMOS and SETs.
author_names: Ryota Suzuki

Motoki Nozue

Takuya Saraya

Toshiro Hiramoto
title: Experimental Observation of Quantum Confinement Effect in and Silicon Nanowire Field Effect Transistors and Single Electron/Hole Transistors Operating at Room Temperature
year: 2013

abstract: AlGaN polarization doped field effect transistors were characterized by DC and pulsed measurements from room temperature to 500 degC in ambient. DC current voltage characteristics demonstrated only a 70% reduction in on state current from 25 to 500 degC and full gate modulation, regardless of the operating temperature. Near ideal gate lag measurement was realized across the temperature range that is indicative of a high quality substrate and sufficient surface passivation. The ability for operation at high temperature is enabled by the high Schottky barrier height from the Ni/Au gate contact, with values of 2.05 and 2.76 eV at 25 and 500 degC, respectively. The high barrier height due to the insulatorlike aluminum nitride layer leads to an ION/IOFF ratio of 1.5 x 109 and 6 x 103 at room temperature and 500 degC, respectively. Transmission electron microscopy was used to confirm the stability of the heterostructure even after an extended high temperature operation with only minor interdiffusion of the Ni/Au Schottky contact. The use of refractory metals in all contacts will be key to ensure a stable extended high temperature operation.
author_names: Patrick H Carey

Fan Ren

Andrew M Armstrong

Brianna A Klein

A A Allerman

Erica A Douglas

Albert G Baca

Stephen J Pearton
title: High temperature operation to 500 degC of AlGaN graded polarization doped field effect transistors
year: 2020