Query: All-Digital Cost-Efficient CMOS Digital-to-Time Converter Using Binary-Weighted Pulse Expansion

Candidate papers:

abstract: This brief presents a cost efficient all digital CMOS digital to time converter (DTC) that innovatively applies binary weighted pulse expansion. The DTC consists of a pulse generator (PG) for pulse generation <inline formula> <tex math notation="LaTeX"$t_{p} /tex math>/inline formula> a binary weighted pulse expanding circuit (BWPEC) as a main circuit for digital to time conversion, and a time subtractor (TS) for <inline formula> <tex math notation="LaTeX"$t_{p} /tex math>/inline formula> removal. Compared with the original pulse expanding unit (PEU) a novel PEU with reduced complexity and a linear pulse expansion was developed for binary weighted operation. The use of the BWPEC with the binary weighted PEUs exhibits lower circuit complexity and considerably reduces the circuit cost compared to the original unary weighted pulse expanding circuit (PEC) A prototype of the 4 bit all digital DTC was fabricated using a Taiwan Semiconductor Manufacturing Company (TSMC) 0.35 <inline formula> <tex math notation="LaTeX"\mu \text{m} /tex math>/inline formula> CMOS process. The fabricated DTC exhibited an area of 0.02 mm<sup>2</sup> achieving twofold improvement considerably. The measured resolution was approximately 5 ps, with the integral nonlinearity being 1.2 1 least significant bit (LSB) Without requiring an advanced CMOS process, the pulse variation technique with a simple structure can easily achieve fine resolution. The DTC features cost efficient pulse expansion with binary weights and low circuit complexity.
author_names: Chun-Chi Chen

Chorng-Sii Hwang

Kai-Hsiang Chang
title: All Digital Cost Efficient CMOS Digital to Time Converter Using Binary Weighted Pulse Expansion
venue: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
year: 2020

abstract: 1. Introduction. 2. Fundamentals. 3. Intensity Transformations and Spatial Filtering. 4. Frequency Domain Processing. 5. Image Restoration. 6. Color Image Processing. 7. Wavelets. 8. Image Compression. 9. Morphological Image Processing. 10. Image Segmentation. 11. Representation and Description. 12. Object Recognition.
author_names: Rafael C Gonzalez

Richard E Woods

Steven L Eddins
title: Digital image processing using MATLAB
year: 2004

abstract: The Digital Signal Processing Group develops signal processing algorithms that span a wide variety of application areas including speech and image processing, sensor networks, communications, radar and sonar. Our primary focus is on algorithm development in general, with the applications serving as motivating contexts. Our approach to new algorithms includes some unconventional directions, such as algorithms based on fractal signals, chaotic behavior in nonlinear dynamical systems, quantum mechanics and biology in addition to the more conventional areas of signal modeling, quantization, parameter estimation, sampling and signal representation.
author_names: Alan V Oppenheim

Ronald W Schafer
title: Digital Signal Processing
venue: IEEE Transactions on Systems, Man, and Cybernetics
year: 1978

abstract: 2. A sampled (but not quantized) image, whose brightness before quantization, in each spatial position, can take values in the range [0mV;250mV] has the linear histogram of its brightness represented (approximately) in Fig. 2.a) After the quantization, the histogram of the resulting digital image is the one in Fig. 2.b) Then, most likely, the quantizer that was used is: a) an 8 bit uniform quantizer; b) a 2 bit optimal quantizer; c) a 4 bit optimal quantizer; d) a 2 bit uniform quantizer.
author_names: Rafael C Gonzalez

Richard E Woods
title: Digital Image Processing
venue: IEEE Transactions on Pattern Analysis and Machine Intelligence
year: 1981

abstract: 1. Introduction. 2. Discrete Time Signals and Systems. 3. The Z Transform and Its Application to the Analysis of LTI Systems. 4. Frequency Analysis of Signals and Systems. 5. The Discrete Fourier Transform: Its Properties and Applications. 6. Efficient Computation of the DFT: Fast Fourier Transform Algorithms. 7. Implementation of Discrete Time Systems. 8. Design of Digital Filters. 9. Sampling and Reconstruction of Signals. 10. Multirate Digital Signal Processing. 11. Linear Prediction and Optimum Linear Filters. 12. Power Spectrum Estimation. Appendix A. Random Signals, Correlation Functions, and Power Spectra. Appendix B. Random Numbers Generators. Appendix C. Tables of Transition Coefficients for the Design of Linear Phase FIR Filters. Appendix D. List of MATLAB Functions. References and Bibliography. Index.
author_names: John G Proakis

Dimitris G Manolakis
title: Digital Signal Processing: Principles, Algorithms, and Applications
year: 1992

abstract: An integrated and comprehensive theory of PWM. The selection of the best algorithm for optimum pulse width modulation is an important process that can result in improved converter efficiency, better load (motor) efficiency, and reduced electromagnetic interference. However, the identification of the best approach is a complex process requiring extensive mathematical manipulation.
author_names: Donald Grahame Holmes

Thomas A Lipo
title: Pulse Width Modulation for Power Converters: Principles and Practice
year: 2003

abstract: For courses in Digital Communications. Exceptionally accessible, this book presents the often "difficult" concepts of digital communications in an easy to understand manner without diluting the mathematical precision. Using a student friendly approach, it develops the important techniques in the context of a unified structure (in block diagram form) providing organization and structure to a field that has, and continues, to grow rapidly, and ensuring that students gain an awareness of the "big picture" even while delving into the details (the most up to date modulation, coding, and signal processing techniques that have become the basic tools of our modern era) It traces signals and key processing steps from the information source through the transmitter, channel, receiver, and ultimately to the information sink.
author_names: Bernard Sklar
title: Digital communications fundamentals and applications
year: 2020

abstract: Optical fiber transmission is impacted by linear and nonlinear impairments. We study the use of digital backpropagation (BP) in conjunction with coherent detection to jointly mitigate dispersion and fiber nonlinearity. We propose a noniterative asymmetric split step Fourier method (SSFM) for solving the inverse nonlinear Schrodinger equation (NLSE) Using simulation results for RZ QPSK transmitted over terrestrial systems with inline amplification and dispersion compensation, we obtain heuristics for the step size and sampling rate requirements, as well as the optimal dispersion map.
author_names: Ezra Ip

Joseph M Kahn
title: Compensation of Dispersion and Nonlinear Impairments Using Digital Backpropagation
venue: Journal of Lightwave Technology
year: 2008

abstract: A class of digital linear phase finite impulse response (FIR) filters for decimation (sampling rate decrease) and interpolation (sampling rate increase) are presented. They require no multipliers and use limited storage making them an economical alternative to conventional implementations for certain applications. A digital filter in this class consists of cascaded ideal integrator stages operating at a high sampling rate and an equal number of comb stages operating at a low sampling rate. Together, a single integrator comb pair produces a uniform FIR. The number of cascaded integrator comb pairs is chosen to meet design requirements for aliasing or imaging error. Design procedures and examples are given for both decimation and interpolation filters with the emphasis on frequency response and register width.
author_names: Eugene B Hogenauer
title: An economical class of digital filters for decimation and interpolation
year: 1981

abstract: Implementing efficient and cost effective power regulation schemes for battery powered mixed signal SoCs is a key focus in integrated circuit design. This paper presents a fully integrated switched capacitor DC DC converter in 45 nm digital CMOS technology. The proposed implementation uses digital capacitance modulation instead of traditional PFM and PWM control methods to maintain regulation against load current changes. This technique preserves constant frequency switching while also scaling switching and bottom plate losses with changes in load current. Therefore, high efficiency can be achieved across different load current levels while maintaining a predictable switching noise behavior. The converter occupies only 0.16 mm2, and operates from 1.8 V input. It delivers a programmable sub 1 V power supply with efficiency as high as 69% and load current between 100 mA and 8 mA. Measurement results confirm the theoretical basis of the proposed design.
author_names: Yogesh K Ramadass

Ayman A Fayed

Anantha Chandrakasan
title: A Fully Integrated Switched Capacitor Step Down DC DC Converter With Digital Capacitance Modulation in 45 nm CMOS
venue: IEEE Journal of Solid State Circuits
year: 2010