Query: P-channel oxide transistor

Candidate papers:

abstract: This paper reports that among known p type oxide semiconductors, tin monoxide (SnO) has a high hole mobility and produces good p type oxide thin film transistors (TFTs) Device quality SnO films were grown epitaxially on (001) yttria stabilized zirconia substrates at 575degC by pulsed laser deposition. These exhibited a Hall mobility of 2.4cm2V 1s 1 at room temperature. Top gated TFTs, using epitaxial SnO channels, exhibited field effect mobilities of 1.3cm2V 1s 1, on/off current ratios of ~102, and threshold voltages of 4.8V.
author_names: Yoichi Ogo

Hidenori Hiramatsu

Kenji Nomura

Hiroshi Yanagi

Toshio Kamiya

Masahiro Hirano

Hideo Hosono
title: p channel thin film transistor using p type oxide semiconductor, SnO
year: 2008

abstract: Initially poorly conducting PbSe nanocrystal solids (quantum dot arrays or superlattices) can be chemically "activated" to fabricate n and p channel field effect transistors with electron and hole mobilities of 0.9 and 0.2 square centimeters per volt second, respectively; with current modulations of about 103 to 104; and with current density approaching 3 x 104 amperes per square centimeter. Chemical treatments engineer the interparticle spacing, electronic coupling, and doping while passivating electronic traps. These nanocrystal field effect transistors allow reversible switching between n and p transport, providing options for complementary metal oxide semiconductor circuits and enabling a range of low cost, large area electronic, optoelectronic, thermoelectric, and sensing applications.
author_names: Dmitri V Talapin

Christopher B Murray
title: PbSe Nanocrystal Solids for n and p Channel Thin Film Field Effect Transistors
venue: Science
year: 2005

abstract: The scaling of complementary metal oxide semiconductor transistors has led to the silicon dioxide layer, used as a gate dielectric, being so thin (1.4?nm) that its leakage current is too large. It is necessary to replace the SiO2 with a physically thicker layer of oxides of higher dielectric constant or 'high K' gate oxides such as hafnium oxide and hafnium silicate. These oxides had not been extensively studied like SiO2, and they were found to have inferior properties compared with SiO2, such as a tendency to crystallize and a high density of electronic defects. Intensive research was needed to develop these oxides as high quality electronic materials. This review covers both scientific and technological issues?the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure and reactions, their electronic structure, bonding, band offsets, electronic defects, charge trapping and conduction mechanisms, mobility degradation and flat band voltage shifts. The oxygen vacancy is the dominant electron trap. It is turning out that the oxides must be implemented in conjunction with metal gate electrodes, the development of which is further behind. Issues about work function control in metal gate electrodes are discussed.
author_names: John Robertson
title: High dielectric constant gate oxides for metal oxide Si transistors
year: 2006

abstract: Transparent electronic devices formed on flexible substrates are expected to meet emerging technological demands where silicon based electronics cannot provide a solution. Examples of active flexible applications include paper displays and wearable computers. So far, mainly flexible devices based on hydrogenated amorphous silicon (a Si:H) and organic semiconductors have been investigated. However, the performance of these devices has been insufficient for use as transistors in practical computers and current driven organic light emitting diode displays. Fabricating high performance devices is challenging, owing to a trade off between processing temperature and device performance. Here, we propose to solve this problem by using a novel semiconducting material namely, a transparent amorphous oxide semiconductor from the In Ga Zn O system (a IGZO) for the active channel in transparent thin film transistors (TTFTs) The a IGZO is deposited on polyethylene terephthalate at room temperature and exhibits Hall effect mobilities exceeding 10 cm2 V 1 s 1, which is an order of magnitude larger than for hydrogenated amorphous silicon. TTFTs fabricated on polyethylene terephthalate sheets exhibit saturation mobilities of 6 9 cm2 V 1 s 1, and device characteristics are stable during repetitive bending of the TTFT sheet.
author_names: Kenji Nomura

Hiromichi Ohta

Akihiro Takagi

Toshio Kamiya

Masahiro Hirano

Hideo Hosono
title: Room temperature fabrication of transparent flexible thin film transistors using amorphous oxide semiconductors
venue: Nature
year: 2004

abstract: The Berkeley short channel IGFET model (BSIM) an accurate and computationally efficient MOS transistor model, and its associated characterization facility for advanced integrated circuit design are described. Both the strong inversion and weak inversion components of the drain current expression are included. In order to speed up the circuit simulation execution time, the dependence of the drain current on the substrate bias has been modeled with a numerical approximation. This approximation also simplifies the transistor terminal charge expressions. The charge model was derived from its drain current counterpart to preserve consistency of device physics. Charge conservation is guaranteed in this model.
author_names: Bing J Sheu

Don L Scharfetter

Ping K Ko

Min-Chie Jeng
title: BSIM: Berkeley short channel IGFET model for MOS transistors
year: 1987

abstract: Graphene has changed from being the exclusive domain of condensed matter physicists to being explored by those in the electron device community. In particular, graphene based transistors have developed rapidly and are now considered an option for post silicon electronics. However, many details about the potential performance of graphene transistors in real applications remain unclear. Here I review the properties of graphene that are relevant to electron devices, discuss the trade offs among these properties and examine their effects on the performance of graphene transistors in both logic and radiofrequency applications. I conclude that the excellent mobility of graphene may not, as is often assumed, be its most compelling feature from a device perspective. Rather, it may be the possibility of making devices with channels that are extremely thin that will allow graphene field effect transistors to be scaled to shorter channel lengths and higher speeds without encountering the adverse short channel effects that restrict the performance of existing devices. Outstanding challenges for graphene transistors include opening a sizeable and well defined bandgap in graphene, making large area graphene transistors that operate in the current saturation regime and fabricating graphene nanoribbons with well defined widths and clean edges.
author_names: Frank Schwierz
title: Graphene transistors.
venue: Nature nanotechnology
year: 2010

abstract: Here we report high performance sub 100 nm channel length graphene transistors fabricated using a self aligned approach. The graphene transistors are fabricated using a highly doped GaN nanowire as the local gate with the source and drain electrodes defined through a self aligned process and the channel length defined by the nanowire size. This fabrication approach allows the preservation of the high carrier mobility in graphene and ensures nearly perfect alignment between source, drain, and gate electrodes. It therefore affords transistor performance not previously possible. Graphene transistors with 45 100 nm channel lengths have been fabricated with the scaled transconductance exceeding 2 mS/mm, comparable to the best performed high electron mobility transistors with similar channel lengths. Analysis of and the device characteristics gives a transit time of 120 220 fs and the projected intrinsic cutoff frequency (f(T) reaching 700 1400 GHz. This study demonstrates the exciting potential of graphene based electronics in terahertz electronics.
author_names: Lei Liao

Jingwei Bai

Rui Cheng

Yung-chen Lin

Shanjuan Jiang

Yongquan Qu

Yu Huang

Xiangfeng Duan
title: Sub 100 nm channel length graphene transistors.
venue: Nano letters
year: 2010

abstract: Transparent thin film transistors (TTFTs) with an amorphous zinc tin oxide channel layer formed via rf magnetron sputter deposition are demonstrated. Field effect mobilities of 5 15 and 20 50cm2V 1s 1 are obtained for devices post deposition annealed at 300 and 600degC, respectively. TTFTs processed at 300 and 600degC yield devices with turn on voltage of 0 15 and 5 5V, respectively. Under both processing conditions, a drain current on to off ratio greater than 107 is obtained. Zinc tin oxide is one example of a new class of high performance TTFT channel materials involving amorphous oxides composed of heavy metal cations with (n 1)d10ns0 (n4) electronic configurations.
author_names: Hai Q Chiang

John F Wager

Randy Hoffman

J Y Jeong

Douglas A Keszler
title: High mobility transparent thin film transistors with amorphous zinc tin oxide channel layer
year: 2005

abstract: The effects of bias stress on transistor performance are important when considering nontraditional channel materials for thin film transistors. Applying a gate bias stress to indium gallium zinc oxide transparent thin film transistors was found to induce a parallel threshold voltage shift without changing the field effect mobility or the subthreshold gate voltage swing. The threshold voltage change is logarithmically dependent on the duration of the bias stress implying a charge tunneling mechanism resulting in trapped negative charge screening the applied gate voltage.
author_names: Arun Suresh

John F Muth
title: Bias stress stability of indium gallium zinc oxide channel based transparent thin film transistors
year: 2008

abstract: Experiments on ultra small metal oxide semiconductor field effect transistors (MOSFETs) less than 100 nm have been widely reported recently. The frequency of carrier scattering events in these ultra small devices is diminished, so that further suppression of carrier scattering may bring these devices close to the regime of ballistic transport. Carrier scattering is suppressed by constructing their channel regions with intrinsic Si and also by low temperature operation. This article proposes the ballistic transport of carriers in MOSFETs, and presents the current voltage characteristics of the ballistic n channel MOSFET. The current is expressed with the elementary parameters without depending on the carrier mobility. It is independent of the channel length and is proportional to the channel width. The current value saturates as the drain voltage is increased and the triode and the pentode operation are specified as in the conventional MOSFET. Similar current voltage characteristics in the ballistic transp.
author_names: Kenji Natori
title: Ballistic metal oxide semiconductor field effect transistor
year: 1994