Query: Single-layer MoS2 transistors

Candidate papers:

abstract: Two dimensional materials are attractive for use in next generation nanoelectronic devices because, compared to one dimensional materials, it is relatively easy to fabricate complex structures from them. The most widely studied two dimensional material is graphene, both because of its rich physics and its high mobility. However, pristine graphene does not have a bandgap, a property that is essential for many applications, including transistors. Engineering a graphene bandgap increases fabrication complexity and either reduces mobilities to the level of strained silicon films or requires high voltages. Although single layers of MoS(2) have a large intrinsic bandgap of 1.8 eV (ref. 16) previously reported mobilities in the 0.5 3 cm(2) V( 1) s( 1) range are too low for practical devices. Here, we use a halfnium oxide gate dielectric to demonstrate a room temperature single layer MoS(2) mobility of at least 200 cm(2) V( 1) s( 1) similar to that of graphene nanoribbons, and demonstrate transistors with room temperature current on/off ratios of 1 x 10(8) and ultralow standby power dissipation. Because monolayer MoS(2) has a direct bandgap, it can be used to construct interband tunnel FETs, which offer lower power consumption than classical transistors. Monolayer MoS(2) could also complement graphene in applications that require thin transparent semiconductors, such as optoelectronics and energy harvesting.
author_names: Branimir Radisavljevic

Aleksandra Radenovic

Jacopo Brivio

Valentina Giacometti

Andras Kis
title: Single layer MoS2 transistors.
venue: Nature nanotechnology
year: 2011

abstract: MoS2 and related metal dichalcogenides (MoSe2, WS2, WSe2) are layered two dimensional materials that are promising for nanoelectronics and spintronics. For instance, large spin orbit coupling and spin splitting in the valence band of single layer (SL) MoS2 could lead to enhanced spin lifetimes and large spin Hall angles. Understanding the nature of the contacts is a critical first step for realizing spin injection and spin transport in MoS2. Here, we have investigated Co contacts to SL MoS2 and find that the Schottky barrier height can be significantly decreased with the addition of a thin oxide barrier (MgO) Further, we show that the barrier height can be reduced to zero by tuning the carrier density with back gate. Therefore, the MgO could simultaneously provide a tunnel barrier to alleviate conductance mismatch while minimizing carrier depletion near the contacts. Such control over the barrier height should allow for careful engineering of the contacts to realize spin injection in these materials.
author_names: Jen-Ru Chen

Patrick Michael Odenthal

Adrian G Swartz

G Floyd

Hua Wen

Kelly Yunqiu Luo

Roland Kenji Kawakami
title: Control of Schottky barriers in single layer MoS2 transistors with ferromagnetic contacts.
venue: Nano letters
year: 2013

abstract: Ubiquitous low frequency 1/f noise can be a limiting factor in the performance and application of nanoscale devices. Here, we quantitatively investigate low frequency electronic noise in single layer transition metal dichalcogenide MoS2 field effect transistors. The measured 1/f noise can be explained by an empirical formulation of mobility fluctuations with the Hooge parameter ranging between 0.005 and 2.0 in vacuum <10( 5) Torr) The field effect mobility decreased, and the noise amplitude increased by an order of magnitude in ambient conditions, revealing the significant influence of atmospheric adsorbates on charge transport. In addition, single Lorentzian generation recombination noise was observed to increase by an order of magnitude as the devices were cooled from 300 to 6.5 K.
author_names: Vinod K Sangwan

Heather N Arnold

Deep Jariwala

Tobin J Marks

Lincoln J Lauhon

Mark C Hersam
title: Low frequency electronic noise in single layer MoS2 transistors.
venue: Nano letters
year: 2013

abstract: Since the first experimental demonstration of a field effect transistor (FETs) based on a single layer (SL) MoS2 channel [1] this material as well as other members of the transition metal dichalcogenide (TMD) family have received a wide attention as potential replacement for Silicon at the end of the semiconductor roadmap. While the electronic characteristics of TMD FETs have been extensively investigated, showing excellent electrostatic controls, high Ion/Ioff current ratios, and decent mobility values, their thermal and electro thermal properties have so far remained largely unexplored. It has however been demonstrated in Ref. [2] that power/heat dissipation might be a severe performance limiting factor in next generation logic switches. This concerns even more 2 D crystals such as SL MoS2, for which a reduced heat sinking is expected, as compared to bulk structures [3] To provide a theoretical insight into this issue, we performed the first electro thermal quantum transport simulations of ultra scaled SL MoS2 transistors, as in Fig. 1(a) where both the electron and phonon populations are treated at the ab initio level. The key findings (formation of local hot spots close to the drain side and peak lattice temperatures much higher than in Si devices under similar operating conditions) qualitatively agree with recent experimental results [4] and reveal that heat management could be the bottleneck of the SL MoS2 technology.
author_names: Christian Stieger

Aron Szabo

Teute Bunjaku

Mathieu Luisier
title: Ab initio modeling of self heating in single layer MoS2 transistors
venue: 2017 75th Annual Device Research Conference (DRC)
year: 2017

abstract: Field effect transistors using ultrathin molybdenum disulfide (MoS(2) have recently been experimentally demonstrated, which show promising potential for advanced electronics. However, large variations like hysteresis, presumably due to extrinsic/environmental effects, are often observed in MoS(2) devices measured under ambient environment. Here, we report the origin of their hysteretic and transient behaviors and suggest that hysteresis of MoS(2) field effect transistors is largely due to absorption of moisture on the surface and intensified by high photosensitivity of MoS(2) Uniform encapsulation of MoS(2) transistor structures with silicon nitride grown by plasma enhanced chemical vapor deposition is effective in minimizing the hysteresis, while the device mobility is improved by over 1 order of magnitude.
author_names: Dattatray J Late

Bin Liu

H S S Ramakrishna Matte

Vinayak P Dravid

C N R Rao
title: Hysteresis in single layer MoS2 field effect transistors.
venue: ACS nano
year: 2012

abstract: While two dimensional (2D) van der Waals (vdW) layered materials are promising channel materials for wearable electronics and energy efficient field effect transistors (FETs) large hysteresis and large subthreshold swing induced by either dangling bonds at gate oxide dielectrics and/or trap molecules in bubbles at vdW interface are a serious drawback, hampering implementation of the 2D material based FETs in real electronics. Here, we report a monolayer MoS2 FET with near zero hysteresis reaching 0.15% of the sweeping range of the gate bias, a record value observed so far in 2D FETs. This was realized by squeezing the MoS2 channel between top h BN layer and bottom h BN gate dielectrics and further removing the trap molecules in bubbles at the vdW interfaces via post annealing. By segregating the bubbles out to the edge of the channel, we also obtain excellent switching characteristics with a minimum subthreshold swing of 63 mV/dec, an average subthreshold slope of 69 mV/dec for a current range of four orders of magnitude at room temperature, and a high on/off current ratio of 108 at a small operating voltage <1 V) Such a near zero hysteresis and a near ideal subthreshold limit originate from the reduced trap density of ~5.2 x 109 cm 2 eV 1, a thousand times smaller than previously reported values.
author_names: Quoc An Vu

Sidi Fan

Sang Hyup Lee

Min-Kyu Joo

Woo Jong Yu

Young Hee Lee
title: Near zero hysteresis and near ideal subthreshold swing in h BN encapsulated single layer MoS2 field effect transistors
year: 2018

abstract: Engineering the substrate of 2D transition metal dichalcogenides can couple the quasiparticle interaction between the 2D material and substrate, providing an additional route to realize conceptual quantum phenomena and novel device functionalities, such as realization of a 12 time increased valley spitting in single layer WSe2 through the interfacial magnetic exchange field from a ferromagnetic EuS substrate, and band to band tunnel field effect transistors with a subthreshold swing below 60 mV dec 1 at room temperature based on bilayer n MoS2 and heavily doped p germanium, etc. Here, it is demonstrated that epitaxially grown single layer MoS2 on a lattice matched GaN substrate, possessing a type I band alignment, exhibits strong substrate induced interactions. The phonons in GaN quickly dissipate the energy of photogenerated carriers through electron phonon interaction, resulting in a short exciton lifetime in the MoS2 /GaN heterostructure. This interaction enables an enhanced valley helicity at room temperature (0.33 0.05) observed in both steady state and time resolved circularly polarized photoluminescence measurements. The findings highlight the importance of substrate engineering for modulating the intrinsic valley carriers in ultrathin 2D materials and potentially open new paths for valleytronics and valley optoelectronic device applications.
author_names: Yi Wan

Jun Xiao

Jingzhen Li

X Z Fang

Kun Zhang

Lei Fu

Pan Li

Zhigang Song

Hui Zhang

Yilun Wang

Mervin Zhao

Jing Lu

Ning Tang

Guangzhao Ran

Xiang Zhang

Yu Ye

Lun Dai
title: Epitaxial Single Layer MoS2 on GaN with Enhanced Valley Helicity.
venue: Advanced materials
year: 2018

abstract: We combine the linearized Boltzmann Transport Equation (LBTE) and quantum transport by means of the Non equilibrium Green's Functions (NEGF) to simulate monolayer MoS2 and WS2 ultra scaled transistors with carrier mobilities extracted from experiments. Electron phonon, charged impurity, and surface optical phonon scattering are taken into account with all necessary parameters derived from ab initio calculations or measurements, except for the impurity concentration. The LBTE method is used to scale the scattering self energies of NEGF, which only include local interactions. This ensures an accurate reproduction of the measured mobilities by NEGF. We then perform device simulations and demonstrate that the considered transistors operate far from their performance limit (from 50% for MoS2 to 60% for WS2) Higher quality materials and substrate engineering will be needed to improve the situation.
author_names: Y Lee

Sara Fiore

Mathieu Luisier
title: Ab initio mobility of single layer MoS2 and WS2: comparison to experiments and impact on the device characteristics
venue: 2019 IEEE International Electron Devices Meeting (IEDM)
year: 2019

abstract: Single layer MoS2, with its ultimate atomic thickness, has shown promise to scale down transistors for modern integrated circuitry. On the way to implementing two dimensional (2D) electronic devices, controlled wafer scale synthesis of single layer MoS2, single layer MoS2metal oxide semiconductor field effect transistors, ohmic contact of single layer MoS2for low contact resistance, etc. have been extensively studied. However, the most commonly used two terminal electronic component, a diode, that conducts current primarily in one direction was rarely reported based on single layer MoS2. Here, a two terminal high rectification ratio metal insulator semiconductor (MIS) tunnel diode was reported based on single layer MoS2. The In/Au (10/70 nm) electrode via thermal evaporation was used to form a good ohmic contact with the single layer MoS2. The Si3N4/Pd/Au (5/10/70 nm) electrode via electron beam evaporation was used to form an MIS tunneling structure with single layer MoS2, showing a current rectification ratio of up to 107at room temperature. The high current rectification ratio is realized by controlling the quantum tunneling carrier density and the tunneling barrier width. The single layer MoS2MIS tunnel diode fabricated via the silicon technology compatible evaporation method has the potential application as the fundamental electronic building block for future 2D electronics.
author_names: Ziling Li

Kai Yuan

Yu Ye
title: High rectification ratio metal insulator semiconductor tunnel diode based on single layer MoS2.
venue: Nanotechnology
year: 2019

abstract: Polycrystalline Bi3TaTiO9 (BTTO) thin films of layered perovskite ferroelectric materials were deposited on a Pt/Ta/glass substrate via a pulsed laser deposition (PLD) method using two different PLD deposition rates of 0.03 and 0.5 nm/pulse under the same substrate temperature conditions. The BTTO thin film grown by the low PLD deposition rate exhibited a highly a oriented crystal structure, which was confirmed by X ray diffraction experiments. The crystallinity of the a oriented film caused an improvement in the ferroelectric polarization and piezoelectric coefficients; at the same time, the leakage current characteristics were slightly deteriorated. Ferroelectric field effect transistors (FeFETs) made of monolayer MoS2 channels and BTTO thin films as a gate dielectric layer, exhibited clearly different memory windows as a nonvolatile memory. In addition, the reliability of the FeFETs was confirmed by fatigue tests up to 1012 switching cycles and retention tests up to 106 s.Polycrystalline Bi3TaTiO9 (BTTO) thin films of layered perovskite ferroelectric materials were deposited on a Pt/Ta/glass substrate via a pulsed laser deposition (PLD) method using two different PLD deposition rates of 0.03 and 0.5 nm/pulse under the same substrate temperature conditions. The BTTO thin film grown by the low PLD deposition rate exhibited a highly a oriented crystal structure, which was confirmed by X ray diffraction experiments. The crystallinity of the a oriented film caused an improvement in the ferroelectric polarization and piezoelectric coefficients; at the same time, the leakage current characteristics were slightly deteriorated. Ferroelectric field effect transistors (FeFETs) made of monolayer MoS2 channels and BTTO thin films as a gate dielectric layer, exhibited clearly different memory windows as a nonvolatile memory. In addition, the reliability of the FeFETs was confirmed by fatigue tests up to 1012 switching cycles and retention tests up to 106 s.
author_names: Hyun Wook Shin

Sunghoon Lee

Jong Yeog Son
title: Characteristics of ferroelectric field effect transistors composed of a ferroelectric Bi3TaTiO9 gate stack and a single layer MoS2 channel
year: 2019