Query: Triple/quadruple patterning layout decomposition via

Candidate papers:

abstract: Abstract. As the feature size of the semiconductor technology scales down to 10 nm and beyond, multiple patterning lithography (MPL) has become one of the most practical candidates for lithography, along with other emerging technologies, such as extreme ultraviolet lithography (EUVL) e beam lithography (EBL) and directed self assembly. Due to the delay of EUVL and EBL, triple and even quadruple patterning is considered to be used for lower metal and contact layers with tight pitches. In the process of MPL, layout decomposition is the key design stage, where a layout is split into various parts and each part is manufactured through a separate mask. For metal layers, stitching may be allowed to resolve conflicts, whereas it is forbidden for contact and via layers. We focus on the application of layout decomposition where stitching is not allowed, such as for contact and via layers. We propose a linear programming (LP) and iterative rounding solving technique to reduce the number of nonintegers in the LP relaxation problem. Experimental results show that the proposed algorithms can provide high quality decomposition solutions efficiently while introducing as few conflicts as possible.
author_names: Yibo Lin

Xiaoqing Xu

Bei Yu

Ross Baldick

David Z Pan
title: Triple/quadruple patterning layout decomposition via linear programming and iterative rounding
year: 2017

abstract: As feature size of the semiconductor technology scales down to 10nm and beyond, multiple patterning lithography (MPL) has become one of the most practical candidates for lithography, along with other emerging technologies such as extreme ultraviolet lithography (EUVL) e beam lithography (EBL) and directed self assembly (DSA) Due to the delay of EUVL and EBL, triple and even quadruple patterning are considered to be used for lower metal and contact layers with tight pitches. In the process of MPL, layout decomposition is the key design stage, where a layout is split into various parts and each part is manufactured through a separate mask. For metal layers, stitching may be allowed to resolve conflicts, while it is forbidden for contact and via layers. In this paper, we focus on the application of layout decomposition where stitching is not allowed such as for contact and via layers. We propose a linear programming and iterative rounding (LPIR) solving technique to reduce the number of non integers in the LP relaxation problem. Experimental results show that the proposed algorithms can provide high quality decomposition solutions efficiently while introducing as few conflicts as possible.
author_names: Yibo Lin

Xiaoqing Xu

Bei Yu

Ross Baldick

David Z Pan
title: Triple/quadruple patterning layout decomposition via novel linear programming and iterative rounding
venue: SPIE Advanced Lithography
year: 2016

abstract: The printability problem of chip making becomes challenging in advanced process nodes. At present, various lithography technologies such as multiple patterning (MP) directed self assembly (DSA) electron beam (e beam) and their combinations are being considered. In this paper, the corresponding layout decomposition problems for contact/via generation are studied. In particular, we investigate the simultaneous DSA template and e beam throughput optimization. First, we present an exact method based on an ILP formulation. Then, a graph based algorithm is developed. The co optimization problem for DSA double patterning with e beam is formulated as a minimum hitting set problem. A primal dual based algorithm is then derived for solving the problem effectively. Experimental results show that compared with a two stage method, our method can achieve around 20.6% throughput improvement and 18.7% template cost reduction.
author_names: Yunfeng Yang

Fan Yang

Wai-Shing Luk

Changhao Yan

Xuan Zeng

Xiangdong Hu
title: Layout decomposition for hybrid E beam and DSA double patterning lithography
venue: 2017 IEEE International Symposium on Circuits and Systems (ISCAS)
year: 2017

abstract: Abstract. Major advancements in the directed self assembly (DSA) of block copolymers have shown the technique's strong potential for via layer patterning in advanced technology nodes. Molecular scale pattern precision along with low cost processing promotes DSA technology as a great candidate for complementing conventional photolithography. Our studies show that decomposition of via layers with 193 nm immersion lithography in realistic circuits below the 7 nm node would require a prohibitive number of multiple patterning steps. The grouping of vias through templated DSA can resolve local conflicts in high density areas, limiting the number of required masks, and thus cutting a great deal of the associated costs. A design method for DSA via patterning in sub 7 nm nodes is discussed. We present options to expand the list of usable DSA templates and we formulate cost functions and algorithms for the optimal DSA aware via layout decomposition. The proposed method works a posteriori, after place and route, allowing for fast practical implementation. We tested this method on a fully routed 32 bit processor designed for sub 7 nm technology nodes. Our results demonstrate a reduction of up to four lithography masks when compared to conventional non DSA aware decomposition.
author_names: Ioannis Karageorgos

Julien Ryckaert

Roel Gronheid

Maryann C Tung

H -S Philip Wong

Evangelos T Karageorgos

Kris Croes

Joost Bekaert

Geert Vandenberghe

Michele Stucchi

Wim Dehaene
title: Design method and algorithms for directed self assembly aware via layout decomposition in sub 7 nm circuits
year: 2016

abstract: To overcome the prohibitive barriers of edge placement errors (EPE) in the cut/block/via step of complementary lithography, we propose a modular patterning approach by combining layout stitching, selective etching, and alternating material self aligned multiple patterning (altSAMP) processes. In this patterning approach, altSAMP is used to create line arrays with two materials alternatively which allow a highly selective etching process to remove one material without attacking the other, therefore more significant EPE effect can be tolerated in line cutting step. With no need of connecting vias, the stitching process can form 2 D features by directly stitching two components of patterns together to create 2 D design freedom as well as multiple CD/pitch capability. By adopting this novel approach, we can potentially achieve higher processing yield and more 2 D design freedom for continuous IC scaling down to 5 nm. We developed layout decomposition and synthesis algorithms for critical layers, and the fin/gate/metal layer from NSCU open cell library is used to test the proposed algorithms.
author_names: Hongyi Liu

Ting Han

Jun Zhou

Yijian Chen
title: Layout decomposition and synthesis for a modular technology to solve the edge placement challenges by combining selective etching, direct stitching, and alternating material self aligned multiple patterning processes
venue: SPIE Advanced Lithography
year: 2016

abstract: Multiple patterning lithography has been widely adopted for today's circuit manufacturing. However, increasing the number of masks will make the manufacturing process more expensive. More importantly, towards 7 nm technology node, the accumulated overlay in multiple patterning will cause unacceptable edge placement error (EPE) Recently, directed self assembly (DSA) has been shown to be an effective lithography technology that can pattern contact/via/cuts with high throughput and low cost. DSA is currently aiming at 7 nm technology, where the guiding template generation needs either double patterning EUV or multiple patterning DUV process. By incorporating DSA into the multiple patterning process, it is possible to reduce the number of masks and achieve a cost effective solution. In this paper, we study the decomposition problem for contact layer in row based standard cell layout with DSA MP complementary lithography. We explore several heuristic based approaches, and propose an algorithm that decomposes a standard cell row optimally in polynomial time. Our experiments show that our algorithm guarantees to find a minimum cost solution if one exists, while the heuristic cannot or only finds a sub optimal solution. Our results show that the DSA MP complementary approach is very promising for the future advanced nodes.
author_names: Zigang Xiao

Chun-Xun Lin

Martin D F Wong

Hongbo Zhang
title: Contact layer decomposition to enable DSA with multi patterning technique for standard cell based layout
venue: 2016 21st Asia and South Pacific Design Automation Conference (ASP DAC)
year: 2016

abstract: To break through 1 D IC layout limitations, we develop computationally efficient 2 D layout decomposition and stitching techniques which combine the optical and self aligned multiple patterning (SAMP) processes. A polynomial time algorithm is developed to decompose the target layout into two components, each containing one or multiple sets of unidirectional features that can be formed by a SAMP+cut/block process. With no need of connecting vias, the final 2 D features are formed by directly stitching two components together. This novel patterning scheme is considered as a hybrid approach as the SAMP processes offer the capability of density scaling while the stitching process creates 2 D design freedom as well as the multiple CD/pitch capability. Its technical advantages include significant reduction of via steps and avoiding the interdigitating types of multiple patterning (for density multiplication) to improve the processing yield. The developed decomposition and synthesis algorithms are tested using 2 D layouts from NCSU open cell library. Statistical and computational characteristics of these public layout data are investigated and discussed.
author_names: Hongyi Liu

Jun Zhou

Yijian Chen
title: Breaking through 1D layout limitations and regaining 2D design freedom Part I: 2D layout decomposition and stitching techniques for hybrid optical and self aligned multiple patterning
venue: Advanced Lithography
year: 2015

abstract: Display Omitted We propose an efficient random 2 D layout decomposition and synthesis technique.Feature overlapping spacer merging are introduced to accommodate CD flexibility.A decomposition strategy of full chip layout is proposed.A polynomial time decomposition algorithm is developed. To break through 1 D layout limitations, we develop a computationally efficient random 2 D layout decomposition and synthesis technique which combines the optical and self aligned multiple patterning processes. A polynomial time algorithm is developed to decompose the target layout into two components, each containing one or multiple sets of unidirectional patterns that can be formed by a self aligned multiple patterning and cut processes. With no need of vias, the final random 2 D patterns are formed by directly stitching two components together. The advantages of this novel patterning approach include 2 D design freedom, multiple pitch/CD capability, and significant reduction of cut/via steps. The developed decomposition and synthesis algorithms are tested using 2 D layouts from NCSU open cell library and the experimental results verify their functionality.
author_names: Hongyi Liu

J Zhou

Yijian Chen
title: Random 2 D layout decomposition and synthesis using self aligned multiple patterning and stitching techniques
year: 2015

abstract: ArF immersion lithography is still a key candidate below 10nm node. Many challenges should be overcome when CD shrinks to such a tiny size. In the whole manufacturing flow, triple patterning (TP) is an important process. TP decomposition is used to decompose customers' layout into three individual masks. Each of the decomposed masks can be imaged in a single exposure. Although the TP decomposition method is fully studied, rare research is focused on the influence of decomposition result on other processes, such as lithography, OPC (Optical Proximity correction) etch, etc. Thus, a decomposition result that is unfriendly to other processes may appear. In this paper, we propose a lithography and OPC friendly triple patterning decomposition method. The decomposition is classified into critical decomposition and optional decompositions. The critical decomposition is applied for pitches which are smaller than the minimum pitch of single exposure. The optional decomposition is firstly applied for pitches which are in the range of forbidden pitch, and then applied for pitches in the other ranges. The critical decomposition is assigned the highest priority, and the optional decomposition for the forbidden pitch is assigned the second highest priority, the decomposition for other pitches are assigned lower priorities. The balance process is also improved correspondingly. The results show the number of forbidden pitch can be reduced by 10.8% at most. In addition, the proposed method can be easily extended to suitable for other multiple patterning processes. And the idea of assigning different priorities in the decomposition can be also used for process optimization further.
author_names: Guanyong Yan

Liang Li

Xiao Hua Chen

Qingwei Liu

Yuanying Tu
title: Lithography and OPC friendly triple patterning decomposition method for VIA
venue: Advanced Lithography
year: 2017

abstract: In sub 10 nm technology nodes, the directed self assembly technology with multiple patterning lithography (DSA MP) is a promising solution for contact/via layer fabrication. However, previous studies using multiple patterning with a single block copolymer (BCP) material still suffer from low via manufacturability due to limited types of feasible guiding templates. To mitigate the problem, multiple patterning in combination with two different BCP materials has been proposed, which contributes to more flexible DSA compatible pattern matching. In this paper, we propose the first work of simultaneous guiding template assignment and layout decomposition with multiple BCP materials for general via layouts in DSA MP. An optimal integer linear programming (ILP) formulation and a practical and sophisticated heuristic algorithm are proposed. Experimental results indicate that adopting two different BCP materials can greatly reduce conflict numbers compared with existing works using a single BCP material, and the proposed heuristic method can efficiently obtain good solutions.
author_names: Kuo-Hao Wu

Shao-Yun Fang
title: Simultaneous template assignment and layout decomposition using multiple bcp materials in DSA MP lithography
venue: 2017 IEEE/ACM International Conference on Computer Aided Design (ICCAD)
year: 2017