Query: 4H--SiC step trench gate power metal--oxide--semiconductor field-effect transistor

Candidate papers:

abstract: In this letter, an improved 4H SiC step trench gate power metal oxide semiconductor field effect transistor (MOSFET) with a p n junction in the trench is proposed. The step trench significantly reduces the ON resistance of the device. And the p n junction in the trench reduces the gate charge. Compared with the conventional p+ shielding trench MOSFET structure, simulation results show that the specific ON resistance and gate charge of the proposed device are improved by 26.4% and 34.7% respectively. A 43.4% improvement in the figure of merit (including the breakdown voltage and ON resistance) is also observed.
author_names: Ying Wang

Kai Tian

Yue Hao

Cheng-Hao Yu

Yan-juan Liu
title: 4H SiC Step Trench Gate Power Metal Oxide Semiconductor Field Effect Transistor
venue: IEEE Electron Device Letters
year: 2016

abstract: We report on the AlGaN/GaN metal oxide semiconductor heterostructure field effect transistor (MOS HFET) and present the results of the comparative studies of this device and a base line AlGaN/GaN heterostructure field effect transistor (HFET) For a 5 /spl mu/ source to drain opening, the maximum current was close to 600 mA/mm for both devices. The gate leakage current for the MOS HFET was more than six orders of magnitude smaller than for the HFET.
author_names: M A Khan

X Hu

Guo Sumin

Alexander V Lunev

Jiangyong Yang

Remigijus Gaska

Michael S Shur
title: AlGaN/GaN metal oxide semiconductor heterostructure field effect transistor
venue: IEEE Electron Device Letters
year: 2000

abstract: Fundamentals of Power Semiconductor Devices provides an in depth treatment of the physics of operation of power semiconductor devices that are commonly used by the power electronics industry. Analytical models for explaining the operation of all power semiconductor devices are shown. The treatment focuses on silicon devicesandincludes the unique attributes and design requirements for emerging silicon carbide devices.
author_names: B Jayant Baliga
title: Fundamentals of Power Semiconductor Devices
year: 2008

abstract: Wide bandgap semiconductors show superior material properties enabling potential power device operation at higher temperatures, voltages, and switching speeds than current Si technology. As a result, a new generation of power devices is being developed for power converter applications in which traditional Si power devices show limited operation. The use of these new power semiconductor devices will allow both an important improvement in the performance of existing power converters and the development of new power converters, accounting for an increase in the efficiency of the electric energy transformations and a more rational use of the electric energy. At present, SiC and GaN are the more promising semiconductor materials for these new power devices as a consequence of their outstanding properties, commercial availability of starting material, and maturity of their technological processes. This paper presents a review of recent progresses in the development of SiC and GaN based power semiconductor devices together with an overall view of the state of the art of this new device generation.
author_names: Jose Millan

Philippe Godignon

Xavier Perpina

Amador Perez-Tomas

Jose Rebollo
title: A Survey of Wide Bandgap Power Semiconductor Devices
venue: IEEE Transactions on Power Electronics
year: 2014

abstract: I. SEMICONDUCTOR FUNDAMENTALS. 1. Semiconductors A General Introduction. General Material Properties. Crystal Structure. Crystal Growth. 2. Carrier Modeling. The Quantization Concept. Semiconductor Models. Carrier Properties. State and Carrier Distributions. Equilibrium Carrier Concentrations. 3. Carrier Action. Drift. Diffusion. Recombination Generation. Equations of State. Supplemental Concepts. 4. Basics of Device Fabrication. Fabrication Processes. Device Fabrication Examples. R1. Part I Supplement and Review. Alternative/Supplemental Reading List. Figure Sources/Cited References. Review List of Terms. Part I Review Problem Sets and Answers. IIA. PN JUNCTION DIODES. 5. PN Junction Electrostatics. Preliminaries. Quantitative Electrostatic Relationships. 6. PN Junction Diode I V Characteristics. The Ideal Diode Equation. Deviations from the Ideal. Special Considerations. 7. PN Junction Diode Small Signal Admittance. Introduction. Reverse Bias Junction Capacitance. Forward Bias Diffusion Admittance. 8. PN Junction Diode Transient Response. Turn Off Transient. Turn On Transient. 9. Optoelectronic Diodes. Introduction. Photodiodes. Solar Cells. LEDs. IIB. BJTS AND OTHER JUNCTION DEVICES. 10. BJT Fundamentals. Terminology. Fabrication. Electrostatics. Introductory Operational Considerations. Performance Parameters. 11. BJT Static Characteristics. Ideal Transistor Analysis. Deviations from the Ideal. Modern BJT Structures. 12. BJT Dynamic Response Modeling. Equivalent Circuits. Transient (Switching) Response. 13. PNPN Devices. Silicon Controlled Rectifier (SCR) SCR Operational Theory. Practical Turn on/Turn off Considerations. Other PNPN Devices. 14. MS Contacts and Schottky Diodes. Ideal MS Contacts. Schottky Diode. Practical Contact Considerations. R2. Part II Supplement and Review. Alternative/Supplemental Reading List. Figure Sources/Cited References. Review List of Terms. Part II Review Problem Sets and Answers. III. FIELD EFFECT DEVICES. 15. Field Effect Introduction the J FET and MESFET. General Introduction. J FET. MESFET. 16. MOS Fundamentals. Ideal Structure Definition. Electrostatics Mostly Qualitative. Electrostatics Quantitative Formulation. Capacitance Voltage Characteristics. 17. MOSFETs The Essentials. Qualitative Theory of Operation. Quantitative ID VD Relationships. ac Response. 18. Nonideal MOS. Metal Semiconductor Workfunction Difference. Oxide Charges. MOSFET Threshold Considerations. 19. Modern FET Structures. Small Dimension Effects. Select Structure Survey. R3. Part III Supplement and Review. Alternative/Supplemental Reading List. Figure Sources/Cited References. Review List of Terms. Part III Review Problem Sets and Answers. Appendix A. Elements of Quantum Mechanics. Appendix B. MOS Semiconductor Electrostatics Exact Solution. Appendix C. MOS C V Supplement. Appendix D. MOS I Vsupplement. Appendix E. List of Symbols. Appendix M. MATLAB Program Script.
author_names: Robert F Pierret
title: Semiconductor device fundamentals
year: 1996

abstract: Lateral metal oxide semiconductor field effect transistors (MOSFETs) have been fabricated on 4H SiC utilizing deposited dielectrics and gate last processing. The bilayer dielectric consists of thin nitrided SiO2 covered by 25 nm of Al2O3 deposited using atomic layer deposition. Field effect mobility and threshold voltage (VT) vary with SiC nitric oxide (NO) anneal temperature. Peak mobility of 106 cm2/Vs was obtained with corresponding VT of 0.8 V. The peak mobility decreases to 61 cm2/Vs with a lower temperature NO anneal, while the VT increased to 1.4 V. Thus with proper gate engineering, high mobility normally off MOSFET devices can be obtained, leading to higher performance gate controlled power devices.
author_names: Daniel J Lichtenwalner

Veena Misra

Sarit Dhar

Sei-hyung Ryu

Anant K Agarwal
title: High mobility enhancement mode 4H SiC lateral field effect transistors utilizing atomic layer deposited Al2O3 gate dielectric
year: 2009

abstract: Results presented in this letter demonstrate that the effective channel mobility of lateral, inversion mode 4H SiC MOSFETs is increased significantly after passivation of SiC/SiO/sub 2/ interface states near the conduction band edge by high temperature anneals in nitric oxide. Hi lo capacitance voltage (C V) and ac conductance measurements indicate that, at 0.1 eV below the conduction band edge, the interface trap density decreases from approximately 2/spl times/10/sup 13/ to 2/spl times/10/sup 12/ eV/sup 1/ cm/sup 2/ following anneals in nitric oxide at 1175/spl deg/C for 2 h. The effective channel mobility for MOSFETs fabricated with either wet or dry oxides increases by an order of magnitude to approximately 30 35 cm/sup 2//V s following the passivation anneals.
author_names: Gil Yong Chung

Chin-Che Tin

J R Williams

K McDonald

Ravi Chanana

Robert A Weller

Sokrates T Pantelides

L C Feldman

Orin Wayne Holland

Mrinal K Das

John W Palmour
title: Improved inversion channel mobility for 4H SiC MOSFETs following high temperature anneals in nitric oxide
venue: IEEE Electron Device Letters
year: 2001

abstract: SiC JFET, compared with SiC MOSFET, is attractive for high power, high temperature applications because it is free of gate oxide reliability issues. Trenched and Implanted VJFET (TIVJFET) does not require epi regrowth and is capable of high current density. In this work we demonstrate two trenched and implanted normally off 4H SiC vertical junction field effect transistors (TI VJFET) based on 120mm, 4.9x1014cm 3 and 100mm, 6x1014cm 3 drift layers. The corresponding devices showed blocking voltage (VB) of 11.1kV and specific on resistance (RSP_ON) of 124m7cm2, and VB of 10kV and RSP_ON of 87m7cm2. A record high value for VB 2/RSP_ON of 1149MW/cm2 was achieved for normally off SiC FETs.
author_names: Yu Zhu Li

Petre Alexandrov

Jianhui Zhang

Larry X Li

Jian H Zhao
title: 10 kV, 87 mOcm2 Normally Off 4H SiC Vertical Junction Field Effect Transistors
year: 2006

abstract: 4H silicon carbide (SiC) normally off vertical junction field effect transistor (JFET) is developed in a purely vertical configuration without internal lateral JFET gates. The 2.1 /spl mu/m vertical p/sup /n junction gates are created on the side walls of deep trenches by tilted aluminum (Al) implantation. Normally off operation with blocking voltage V/sub bl/ of 1 726 V is demonstrated with an on state current density of 300 A/cm/sup 2/ at a drain voltage of 3 V. The low specific on resistance R/sub on sp/ of 3.6 m/spl Omega/cm/sup 2/ gives the V/sub bl//sup 2//R/sub on sp/ value of 830 MW/cm/sup 2/ surpassing the past records of both unipolar and bipolar 4H SiC power switches.
author_names: Kiyoshi Tone

J H Zhao

Leonid Fursin

Petre Alexandrov

Maurice Weiner
title: 4H SiC normally off vertical junction field effect transistor with high current density
venue: IEEE Electron Device Letters
year: 2003

abstract: This letter reports the demonstration of a 4H SiC trenched and implanted vertical junction field effect transistor (TI VJFET) The p/sup /n junction gates are created on the sidewalls of deep trenches by angled Al implantation, which eliminates the need for epitaxial regrowth during the JFET fabrication. Blocking voltages up to 1710 V has been achieved with a voltage supporting drift layer of only 9.5 /spl mu/m by using a two step junction termination extension. The TI VJFET shows a low specific on resistance R/sub ON sp/ of 2.77m/spl Omega/cm/sup 2/ corresponding to a record high value of V/sub B//R/sub ON sp/ equal to 1056 MW/cm/sup 2/
author_names: J H Zhao

Kiyoshi Tone

Petre Alexandrov

Leonid Fursin

Maurice Weiner
title: 1710 V 2.77 m/spl Omega/cmsub 2 4H SiC trenched and implanted vertical junction field effect transistors
venue: IEEE Electron Device Letters
year: 2003