Query: GaN on wafer formation semiconductor basics

Candidate papers:

abstract: The increasing demand for complementary metal oxide semiconductor integrated GaN based optoelectronics and power electronics calls for wafer scale crack free and high quality GaN thick film grown on Si. However, the huge mismatch in both lattice constant and coefficient of thermal expansion between GaN and Si often causes a high density of threading dislocations (TDD, typically 109 1010 cm 2) and the formation of micro crack networks, producing a poor quality GaN film with a limited thickness <6 um) By virtue of a well designed Al composition step graded AlN/AlGaN buffer, a wafer scale crack free 10 um thick successive GaN with a low TDD of 5.8 x 107 cm 2 grown on Si was achieved for the first time. Detailed study on the depth dependent strain and dislocation evolution shed light on the complex interplay between strain relaxation and defect reduction, as well as their influences on the GaN optical properties along the growth direction. This work paves the way for building high performance GaN based optoelectronics and power electronics on the Si platform.
author_names: Jianxun Liu

Yin-Lin Huang

Xiujian Sun

Xiaoning Zhan

Qian Sun

Hongwei Gao

Meixin Feng

Yu Zhou

Masao Ikeda

Honbo Yang
title: Wafer scale crack free 10 um thick GaN with a dislocation density of 5.8 x 107 cm 2 grown on Si
venue: Journal of Physics D: Applied Physics
year: 2019

abstract: Al x In y Ga 1 x y N GaN heterostructures were grown on 4 in. p type Si wafers to investigate the effect of In composition in the quaternary nitride layer on the electrical performance of Al 2 O 3 AlInGaN GaN based normally ON metal insulator semiconductor high electron mobility transistors (MIS HEMTs) From the comparative study of the electrical measurements, it was observed that the transport properties of the devices were relatively poor in the presence of higher In composition in the quaternary N layer. The deterioration of the electrical characteristics of MIS HEMTs originated from the formation of deep pits on the AlInGaN epilayer surface caused by the segregation of In atoms during epitaxial growth. However, the formation of such pits was reduced for the quaternary epilayer with lower In content and exhibited better transport performance. A maximum current density I d m a x) of 780 mA/mm with a specific ON resistance of 0.71 m O cm 2 was observed for the device fabricated on the wafer with an In composition of 9% in the AlInGaN epilayer. We have achieved a high breakdown voltage of 793 V with a device with the gate to drain distance L g d) of 20 m m under the off state condition. Al x In y Ga 1 x y N GaN heterostructures were grown on 4 in. p type Si wafers to investigate the effect of In composition in the quaternary nitride layer on the electrical performance of Al 2 O 3 AlInGaN GaN based normally ON metal insulator semiconductor high electron mobility transistors (MIS HEMTs) From the comparative study of the electrical measurements, it was observed that the transport properties of the devices were relatively poor in the presence of higher In composition in the quaternary N layer. The deterioration of the electrical characteristics of MIS HEMTs originated from the formation of deep pits on the AlInGaN epilayer surface caused by the segregation of In atoms during epitaxial growth. However, the formation of such pits was reduced for the quaternary epilayer with lower In content and exhibited better transport performance. A maximum current density I d m a x) of 780 mA/mm with a specific ON resistance of 0.71 m O cm 2 was observed fo.
author_names: Debaleen Biswas

Hirotaka Fujita

Naoki Torii

Takashi Egawa
title: Effect of In composition on electrical performance of AlInGaN/GaN based metal insulator semiconductor high electron mobility transistors (MIS HEMTs) on Si
venue: Journal of Applied Physics
year: 2019

abstract: The feasibility of van der Waals (VdW) heteroepitaxy of molybdenum disulphide (MoS2) layers on gallium nitride (GaN) semiconductor has attracted significant interest in heterojunction optoelectronic device applications. Here, we report on the growth of uniform MoS2 layers on free standing GaN semiconductor for vertical heterojunction device application. A uniform MoS2 layer was directly grown on the n type GaN wafer by sulphurization process of molybdenum oxide thin layer. Raman and scanning electron microscopy (SEM) analyses showed homogenous growth of the few layers MoS2 forming a continuous film, considering the suitability of GaN semiconductor substrate. The fabricated MoS2/GaN vertical heterojunction showed excellent rectifying diode characteristics with a photovoltaic photoresponsivity under monochromatic light illumination. The X ray photoelectron spectroscopy (XPS) studies showed the conduction and valence band offset values are around 0.44 and 2.3 eV with type II band alignment in the fabricated heterojunction device. This will facilitate effective movement of photoexcited electrons across the MoS2 GaN junction, while a large valence band offset will prevent movement of holes towards the GaN, resulting in low recombination loss to obtain a photovoltage in the heterojunction device. Our study revealed the formation of large area homogenous MoS2 layers on GaN wafer for vertical heterojunction device application.
author_names: Pradeep Desai

Ajinkya K Ranade

Mandar Shinde

Bhagyashri Todankar

Rakesh D Mahyavanshi

Masaki Tanemura

Golap Kalita
title: Growth of uniform MoS2 layers on free standing GaN semiconductor for vertical heterojunction device application
venue: Journal of Materials Science: Materials in Electronics
year: 2019

abstract: Silicon substrates offer a variety of advantages over conventional LED substrates, including both their low cost and their compatibility with the existing semiconductor manufacturing infrastructure. Researchers have sought to avail themselves of these benefits by developing GaN LEDs on silicon substrates. Integration of the two materials, however, presents several technical challenges that have proven difficult to address. The main challenges are the large lattice mismatch between GaN and silicon and the large difference in thermal expansion coefficients. Solutions have begun to emerge in recent years, with Toshiba being the first to commercialize GaN on Si technology on 200mm substrates in 2013, and several companies now shipping GaN on Si LEDs. Toshiba has developed a novel buffer layer structure and MOCVD growth technology that controls strain, wafer bow, and cracking while also suppressing formation of dislocations. This technology allows for the growth of GaN epitaxial layers with minimal cracking and dislocation densities in the low 108 cm 2. Control of strain and wafer bow is critical for the epitaxial process, and this requires very fine control over both absolute wafer temperature and temperature uniformity. Toshiba's technology controls temperature uniformity very well, and Toshiba has demonstrated wavelength uniformity with s=2nm across a 200mm wafer. Thin film LEDs fabricated from these materials have efficiencies on par with the best efficiencies of LEDs grown on conventional substrates. Blue LED wall plug efficiencies of ~83% are demonstrated.
author_names: William E Fenwick
title: Progress and challenges in GaN on Si LEDs
venue: SPIE OPTO
year: 2016

abstract: Abstract Group III nitride semiconductors exhibit many ideal characteristics for solar water splitting, including a tunable energy bandgap across nearly the entire solar spectrum and suitable band edge positions for water oxidation and proton reduction under visible and near infrared light irradiation. To date, however, the best reported energy conversion efficiency for III nitride semiconductor photocathodes is still below 1% Here we report on the demonstration of a relatively efficient p type In0.42Ga0.58N photocathode, which is monolithically integrated on an n type nonplanar Si wafer through a GaN nanowire tunnel junction. The open pillar design, together with the nonplanar Si wafer can significantly maximize light trapping, whereas the tunnel junction reduces the interfacial resistance and enhances the extraction of photo generated electrons. In addition, photodeposited Pt nanoparticles on InGaN nanowire surfaces significantly improve the cathodic performance. The nanowire photocathode exhibits a photocurrent density of 12.3 mA cm 2 at 0 V vs. RHE and an onset potential of 0.79 V vs. RHE under AM 1.5 G one sun illumination. The maximum applied bias photon to current efficiency reaches 4% at ~0.52 V vs. RHE, which is one order of magnitude higher than the previously reported values for III nitride photocathodes. Significantly, no performance degradation was measured for over 30 h solar water splitting with a steady photocurrent density ~12 mA cm 2 without using any extra surface protection, which is attributed to the spontaneous formation of N terminated surfaces of InGaN nanowires to protect against photocorrosion.
author_names: Yongjie Wang

Srinivas Vanka

Jiseok Gim

Yuanpeng Wu

Ronglei Fan

Yazhou Zhang

Jinwen Shi

Mingrong Shen

Robert Hovden

Zetian Mi
title: An In0.42Ga0.58N tunnel junction nanowire photocathode monolithically integrated on a nonplanar Si wafer
venue: Nano Energy
year: 2019

abstract: A novel normally off AIN/GaN metal oxide semiconductor high electron mobility transistors (MOSHEMT) on 100 mm Si substrates for high power applications is demonstrated for the first time by means of a selective thermal oxidation of AIN. The formation of a high quality insulating AION layer resulting from the dry thermal oxidation of AIN at 900 degC in oxygen has been identified by transmission electron microscopy and X ray photoelectron spectroscopy. The AIN thermal oxidation appears to be highly selective toward the SiN cap layer allowing the local depletion of the 2 D electron gas (self aligned to the gate) and thus the achievement of normally off operation. Threshold voltage (VT) of +0.8 V and drain leakage current at VGS 0 V well below 1 mA/mm are obtained reproducibly over the wafer. The comparison of the fabricated MOSHEMTs with the control sample (identical but nonoxidized) reveals a drastic shift of VT toward positive values and three to four orders of magnitude drain leakage current reduction.
author_names: Farid Medjdoub

Marleen Van Hove

Kai Cheng

Denis Marcon

Maarten Leys

Stefaan Decoutere
title: Novel E Mode GaN on Si MOSHEMT Using a Selective Thermal Oxidation
venue: IEEE Electron Device Letters
year: 2010

abstract: The present invention discloses an epitaxial wafer of making a GaN based light emitting diode and a manufacturing method belongs to the field of semiconductor technology. Epitaxial wafer includes a substrate, and a GaN nucleation layer is grown sequentially on the substrate, the undoped GaN layer, n type layer, a multiple quantum well layer and a p type layer, a multiple quantum well structure layer is a multi cycle, each period comprises the InGaN layer and the GaN layer, the periodic structure of the multi period n type layer in contact with a first period, the first period d GaN layer doped with Si, GaN and Si doped layer of the first period away from the first position of an adjacent layer, an InGaN layer adjacent the first layer in contact with the GaN layer of the first period. By the above described embodiment of the present invention, the dislocation can be reduced in the multiple quantum well layer, shield the polarization field, to improve the crystal quality, Si does not diffuse into the InGaN layer, avoids the formation of point defects in a multi quantum well layer, so that high recombination efficiency of electrons and holes, high luminous efficiency.
title: Of making a GaN based LED epitaxial wafer and its manufacturing method
year: 2013

abstract: Semiconductor CMOS nano electronics is intensively seeking solutions for future digital applications. One of the most promising solutions to deliver a technological breakthrough is exploring electron spin in metals and semiconductors with applications from spin transistors to quantum sensors, and quantum computing. Spintronic applications rely on magnetic semiconductor materials with suitable properties. In particular, dilute magnetic semiconductors (DMS) such as Mn doped GaN, show the great promise of a high Curie temperature (220K 370K) exceeding room temperature, and a large concentration of holes. These are all the essential pre requisites for operation of spin transistors in circuits. In this work, we dope an AlGaN/GaN heterostructure consisting of a GaN (2 nm) cap layer, an Al0.25Ga0.75N (25 nm) barrier, and a GaN (2 mm) substrate grown on a 6" Si wafer with Mn by sputtering deposition and thermal annealing to create a dilute magnetic semiconductor material following the process flow. While initial attempts resulted in the formation of a MnO surface layer, the SEM/XDS and XPS data suggest a diffusion of Mn into the GaN layer using thermal annealing at 900*C for 7h with a concentration of 4.5% which is very close to the desired concentration of 5% needed for a DMS. The annealing temperature has to be below 1000* C since temperatures around 1000*C result in significant damage to the 2DEG and diffusion of Al from the AlGaN layer.
author_names: J E Evans

Gregory Burwell

Frank C Langbein

Scott Shermer

Karol Kalna
title: Dilute magnetic contact for a spin GaN HEMT
year: 2019

abstract: Abstract The commercialization of gallium nitride microwave circuits on diamond substrates requires chip dicing technology and via formation process compatible with standard semiconductor processes. This paper discusses issues related to dicing and drilling of GaN on diamond wafers for RF power transistor applications (die size 2 using laser micromachining.
author_names: Dubravko I Babic

Quentin Diduck

Firooz N Faili

J G Wasserbauer

Frank Yantis Lowe

Daniel Francis

Felix Ejeckam
title: Laser machining of GaN on diamond wafers
year: 2011

abstract: High power photoconductive semiconductor switching devices were fabricated from a high purity, semi insulating 4H SiC wafer. A highly n doped GaN subcontact layer was inserted between the contact metal and the high resistivity SiC wafer. The minimum ON state resistance of the device was less than 1 ohm when the energy of a 355 nm laser was 10.5 mJ with a bias voltage of 6 kV. The maximum device lifetime is 3151 pulses, after which the device completely fails. The failure mechanisms are determined using several analysis methods. Under a strong electric field, the failure mechanism differs for the two electrodes. Near the edge of the anode electrode, the switch is damaged due to the thermal stress caused by impact ionization. At the edge of the cathode electrode, the electrode erosion is the main reason for the failure to operate for long periods of time. These two different damage mechanisms are both important factors influencing the device performance. The electron avalanche breakdown at the edge of the anode electrode causes the formation of cracks between the electrodes, which is the root cause of the switch failure.
author_names: Longfei Xiao

Xianglong Yang

Peng Duan

Huayong Xu

Xiu-fang Chen

Xiaobo Hu

Yan Peng

Xian'gang Xu
title: Effect of electron avalanche breakdown on a high purity semi insulating 4H SiC photoconductive semiconductor switch under intrinsic absorption.
venue: Applied optics
year: 2018