Query: Reliability assessment of sintered nano-silver die attachment for power semiconductors

Candidate papers:

abstract: For decades soldering has been the technology of choice in die bonding. However, due to worldwide health protection regulations, the most common solder alloys, which contain lead, have been banned. Furthermore, standard solders cannot fulfil the reliability requirements of future power electronic devices. New interconnection technologies have to be developed. One of them is pressure sintering (p=30..50 MPa) of silver flakes below 300 degC. It forms a strong, highly electrically and thermally conductive bond. In order to lower the level of pressure, silver nanoparticles can be used. Shear tests have shown that even 5 s of sintering, a temperature of 225 degC, or a pressure as low as 2 MPa is sufficient to generate bonds comparable to solder and high pressure sinter joints if the remaining parameters (p, t and T, respectively) are set correctly. However, strength is only a necessary criterion as aging comes into play. Therefore, reliability tests using thermal cycling and power cycling were run. These returned superior reliability of the sintered samples. 160 million of the power cycles between +45 and +175 degC run in this work can be extrapolated using a Coffin Manson model. Solder joints failed at about 40,000 cycles.
author_names: Matthias Knoerr

Silke Kraft

Andreas Schletz
title: Reliability assessment of sintered nano silver die attachment for power semiconductors
venue: 2010 12th Electronics Packaging Technology Conference
year: 2010

abstract: Low temperature Ag sintering provides a lead free die attachment method that is compatible with high temperature (300 degC) power electronics applications. The reliability of sintered Ag die attach for Si and SiC die has been studied on both thick film substrates for lower current power applications and direct bond copper (DBC) substrates for higher current power applications. Pressureless and low pressure sintering were evaluated. Sintering with low pressure yielded lower porosity (15 17% versus pressureless sintering ~30% Reliability was evaluated with thermal aging (300 degC) and thermal cycling 55 degC to 300 degC) tests. Reliable Ag sintered die attach was achieved with assemblies having Ag bearing surface finishes on both the die and the substrate. In contrast, the shear strength after 300 degC aging was greatly reduced when Au metallization was used either on the die or on substrate surface. In some cases, low pressure sintering delayed the failure of the sintered Ag die attach to Au surfaces when aged at 300 degC compared to the pressureless sintering. The reliability with Pd containing substrate metallizations was intermediate between Ag and Au metallizations. The thermal cycle reliability on DBC substrates was limited by failure at the Cu to alumina interface over the wide temperature range, while on the thick film substrates high adhesion was maintained after 1000 thermal cycles.
author_names: Fang Yu

Jinzi Cui

Zhangming Zhou

Kun Fang

R Wayne Johnson

Michael C Hamilton
title: Reliability of Ag Sintering for Power Semiconductor Die Attach in High Temperature Applications
venue: IEEE Transactions on Power Electronics
year: 2017

abstract: This research has developed a lead free semiconductor device interconnect technology by studying the processing microstructure property relationships of lowtemperature sintering of nanoscale silver pastes. The nanoscale silver pastes have been formulated by adding organic components (dispersant, binder and thinner) into nano silver particles. The selected organic components have the nano particle polymeric stabilization, paste processing quality adjustment, and non densifying diffusion retarding functions and thus help the pastes sinter to ~80% bulk density at temperatures no more than 300degC. It has been found that the low temperature sintered silver has better electrical, thermal and overall thermomechanical properties compared with the existing semiconductor device interconnecting materials such as solder alloys and conductive epoxies. After solving the organic burnout problems associated with the covered sintering, a lead free semiconductor device interconnect technology has been designed to be compatible with the existing surface mounting techniques with potentially low cost. It has been found that the low temperature sintered silver joints have high electrical, thermal, and mechanical performance. The reliability of the silver joints has also been studied by the 50 250degC thermal cycling experiment. Finally, the bonging strength drop of the silver joints has been suggested to be ductile fracture in the silver joints as micro voids nucleated at microscale grain boundaries during the temperature cycling. The low temperature silver sintering technology has enabled some benchmark packaging concepts and substantial advantages in future applications.
author_names: G Bai
title: Low temperature sintering of nanoscale silver paste for semiconductor device interconnection
year: 2005

abstract: In terms of reliability standard power electronic modules are at their limit regarding robustness aspects. As a high reliable alternative for assembly processes such as Sn based soldering and aluminum wire bonding, the assembly with nano silver sintering technology on different substrate materials has been investigated in this work. The reliability of silver sintered top and bottom side interconnects has been determined by end of life active power cycling testing with 50 mm(exp 2) commercial diodes from Infineon sintered on DBC (direct bonded copper) and DBA (direct bonded aluminum) substrates with a sintered silver ribbon for the top side connect. The setup with DBC substrate showed a 17 times, the one with DBA substrates a 2.7 times higher statistical lifetime than the soldered and wire bonded reference. Delamination of the sintered layers and with a progressing aging in active temperature cycles also showed oxidized cracks in the Cu metallization of the substrate as new failure mechanisms of the DBC samples with double sided sinter technology. For DBA assemblies a formation of hillocks on the Al surface underneath the diode could be detected next to delamination of the sinter layer.
author_names: Silke Kraft

Andreas Schletz

Martin Maerz
title: Reliability of Silver Sintering on DBC and DBA Substrates for Power Electronic Applications
venue: 2012 7th International Conference on Integrated Power Electronics Systems (CIPS)
year: 2012

abstract: Abstract The last several years have seen the advent of silicon carbide (SiC) power devices operating at temperatures well above 125 degC. These devices have the potential to provide higher switching speed and lower on state losses with higher thermal conductivity. Developing reliable technologies for packaging is now the main hurdle to successful operation of SiC based power electronics at high temperature. This paper evaluates a novel silver nano particle colloid material that has been suggested for use as a die attachment for high temperature environments. The material synthesis together with fundamental mechanical and electrical properties is presented relative to the low temperature sintering process. Using thermal fatigue data measured for this material, a low cycle fatigue curve for the silver nano particle colloid was developed. A Coffin Manson relationship was derived for the solder; which together with calculated strains in the joint, allows the low cycle fatigue life of the die attachment to be predicted.
author_names: P Quintero

F Patrick McCluskey

B Koene
title: Thermomechanical reliability of a silver nano colloid die attach for high temperature applications
venue: Microelectron. Reliab.
year: 2014

abstract: Silver sintering die attach is a promising technology for high temperature power electronics packaging. In this paper, we evaluate its performances in terms of thermal resistance and high temperature stability. The thermal resistance is measured on test vehicles assembled under different conditions, using silver pastes from NBETech and Heraeus, with different process parameters. The stability test is performed by storing samples at an elevated temperature (300degC) in air, with a strong voltage bias (1100 V) for several hours.
author_names: Wissam Sabbah

Raphael Riva

Stanislavs Hascoet

Cyril Buttay

Stephane Azzopardi

Eric Woirgard

Dominique Planson

Bruno Allard

Regis Meuret
title: Evaluation of silver sintering die attach
venue: 2012 7th International Conference on Integrated Power Electronics Systems (CIPS)
year: 2012

abstract: This paper discusses the design for reliability of a sintered silver structure in a power electronic module based on the computational approach that composed of high fidelity analysis, reduced order modelling, numerical risk analysis, and optimisation. The methodology was demonstrated on sintered silver interconnect sandwiched between silicon carbide chip and copper substrate in a power electronic module. In particular, sintered silver reliability due to thermal fatigue material degradation is one of the main concerns. Thermo mechanical behaviour of the power module sintered silver joint structure is simulated by finite element analysis for cyclic temperature loading profile in order to capture the strain distribution. The discussion was on methods for approximate reduced order modelling based on interpolation techniques using Kriging and radial basis functions. The reduced order modelling approach uses prediction data for the thermo mechanical behaviour. The fatigue lifetime of the sintered silver interconnect and the warpage of the interconnect layer was particular interest in this study. The reduced order models were used for the analysis of the effect of design uncertainties on the reliability of the sintered silver layer. To assess the effect of uncertain design data, a method for estimating the variation of reliability related metrics namely Latin Hypercube sampling was utilised. The product capability indices are evaluated from the distributions fitted to the histogram resulting from Latin Hypercube sampling technique. A reliability based design optimisation was demonstrated using Particle Swarm Optimisation algorithm for constraint optimisation task consists of optimising two different characteristic performance metrics such as the thermo mechanical plastic strain accumulation per cycle on the sintered layer and the thermally induced warpage.
author_names: Pushparajah Rajaguru

Hua Lu

Chris Bailey
title: Sintered silver finite element modelling and reliability based design optimisation in power electronic module
venue: Microelectron. Reliab.
year: 2015

abstract: Die attach by low temperature silver sintering has been widely used in power electronics packaging. Most of the reported work was done on direct bond copper (DBC) substrates metallized with silver or gold. There is a lack of studies of sintered silver bonding on nickel (Ni) a low cost metallization on DBC. In this study, we fabricated a power module using pressureless in air sintered silver die attach on a Ni plated DBC substrate. Strong die shear strength of over 40 MPa was achieved. It was also found the static and switching characteristics, and the transient and steady state thermal performance of the modules using Ni metallization was as good as that using Au metallization. Cross sectional microstructure and chemistry analyses of the sintered Ag/Ni interface revealed limited Ni oxidation. We believed that the high density packing of silver particles and outgassing of the organic molecules from the paste during the bonding process helped to lower the partial pressure of oxygen in the bondline, which, in turn, prevented rapid Ni oxidation and gave rise to extensive formation of strong Ag Ni metallic bonds at the interface. The findings of this study show the low cost potential of the die attach technology for power module packaging since the bonding process can be done pressureless in air on low cost Ni metallization.
author_names: Meiyu Wang

Yunhui Mei

Xin Li

Rolando Burgos

Dushan Boroyevich

Guo-Quan Lu
title: Pressureless Silver Sintering on Nickel for Power Module Packaging
venue: IEEE Transactions on Power Electronics
year: 2019

abstract: In order to take the full advantage of the high temperature SiC and GaN operating devices, package materials able to withstand high temperature storage and large thermal cycles have been investigated. The temperature under consideration here are higher than 200 degC. Such temperatures are required for several potential applications such as down hole oil and gas industry for well logging, aircrafts, automotive, and space exploration. This review focuses on the reliability of a selection of potential components or materials used in the package assembly as the substrates, the die attaches, the interconnections, and the encapsulation materials. It reveals that, substrates with low coefficient of thermal expansion (CTE) conductors or with higher fracture resistant ceramics are potential candidates for high temperatures. Die attaches and interconnections reliable solutions are also available with the use of compatible metallization schemes. At this level, the reliability can also be improved by reducing the CTE mismatch between assembled materials. The encapsulation remains the most limiting packaging component since hard materials present thermomechanical reliability issues, while soft materials have low degradation temperatures. The review allows identifying reliable components and materials for high temperature wide bandgap semiconductors and is expected to be very useful for researchers working for the development on high temperature electronics.
author_names: Rami Khazaka

Laurent Mendizabal

D Henry

Rachelle Hanna
title: Survey of High Temperature Reliability of Power Electronics Packaging Components
venue: IEEE Transactions on Power Electronics
year: 2015

abstract: Sintered silver is a very promising option in the field of automotive power electronics for die attach and substrate attach material as it offers many benefits compared to conventional solders. One main advantage is the higher and therefore better thermal and electrical conductivity, which is necessary due to the usage of SiC and GaN as a basic material for semiconductors. Another one is the higher melting point of sintered silver in comparison to solder, making it possible to use power electronics at higher temperatures. Especially for higher temperatures, it is assumed that this results in an improved reliability. Whereas a lot of information about the behavior of sinter layers is known, e.g. thermal properties, material characterization of mechanical properties are still not understood in detail as the results are highly scattered. A reliable test method has to be developed, and this has to be done for cyclic testing, too, which is essential for determining reliability. As mechanical properties are strongly dependent on process parameters, their influence has to be analyzed as well. For example, the influence of the porosity distribution of a sintered layer in between the semiconductor and the upper side of the DBC on the mechanical properties and their reliability is hardly investigated by now. It can be observed that the porosity varies, and that it often increases from the middle of the plane towards the edges. The influence on the stresses and strains and on reliability has to be determined and if required, improvements have to be developed. In the field of FEM simulation, too, a lot of work has to be done. Therefore, the right input material data, which has to be characterized as already described, is absolutely essential. It is also necessary to implement a material model which describes all of the occurring phenomena like primary and secondary creep. This paper will give an overview on the current status and state of the art of silver sintering, focusing on the issues of material characterization and reliability testing.
author_names: Marco Schaal

Markus Klingler

Bernhard Wunderle
title: Silver Sintering in Power Electronics: The State of the Art in Material Characterization and Reliability Testing
venue: 2018 7th Electronic System Integration Technology Conference (ESTC)
year: 2018