Query: A 12 to 1 V five phase interleaving GaN POL converter for high current low voltage applications

Candidate papers:

abstract: As applications like high performance cloud computing grow exponentially, there is an immediate need for high efficiency high current point of load (POL) converters. Interleaving phases is a common technique to reduce conduction loss, lower output ripple, improve high load performance, and reduce stress on power switching devices. However, multiphase POLs are primarily limited by size. The development of Gallium Nitride (GaN) power semiconductors is enabling higher power density in power supply applications. This paper demonstrates this with a 120 W five phase interleaving GaN synchronous buck converter that achieves a peak efficiency above 96% and maintains over 90% efficiency up to 105 A.
author_names: Benjamin K Rhea

Luke L Jenkins

William E Abell

Frank T Werner

Chris Wilson

Robert Neal Dean

Daniel K Harris
title: A 12 to 1 V five phase interleaving GaN POL converter for high current low voltage applications
venue: 2014 IEEE Workshop on Wide Bandgap Power Devices and Applications
year: 2014

abstract: High performance processing boards using ASICs and reconfigurable FPGAs require particular power supplies with voltages below 1 V and current capabilities up to 50 A. High efficiency is mandatory for low power consumption and thermal reasons and is considered as most important goal for the DCDC converter. Off the shelf radiation hardened point of load (POL) converters are not optimized for such an application. Most devices are limited to approximately 10 A and show maximum efficiency at approximately half load current. Only a few parts offer the possibility for parallel operation to increase the current capability. Apart from the non isolating POL converters also high current supplies based on an isolated converter topology with good efficiency are available on the market. The efficiency of both concepts relies on high performance/low on resistance FETs, and GaN technology seems to be a very attractive solution. This paper evaluates discrete designs of a non isolating POL converter and an isolating converter based on GaN FETs regarding their suitability for low voltage/high current applications. Beside of theoretical investigations, experimental results gained from laboratory prototypes are presented.
author_names: Franz Stoegerer

Thomas Panhofer
title: High Efficiency Low Voltage/High Current Power Supplies for High Performance Digital Equipment by using GaN FET Technology
venue: 2019 European Space Power Conference (ESPC)
year: 2019

abstract: A GaN Active Clamp Phase Shifted Full bridge (PSFB) is introduced which enables zero voltage switching (ZVS) over entire load and voltage range without any additional auxiliary circuit elements. For high load operation ZVS is achieved through a small leakage inductance as in conventional PSFB converters. To expand the ZVS range to zero load conditions the ripple current of the current doubler inductor in conjunction with an increased magnetizing current of the main transformer is used to obtain ZVS in every operating point. A secondary active clamp circuit limits the over voltage of the current doubler rectifier. The ZVS mechanism is discussed in detail and some design tradeoffs are highlighted. The ability of the proposed circuit is demonstrated using a 1.5 kW, 400 V to 12 V DC/DC converter for automotive application with a wide voltage and power range. The small leakage inductance together with the ability to realize soft switching even under low load conditions enables a significant increase of the switching frequency up to 500 kHz and thus a remarkable increase of power density with very high efficiency.
author_names: M C Heintze

Ing Stefan Butzmann
title: A GaN 500 kHz High Current Active Clamp Phase Shifted Full Bridge Converter With Zero Voltage Switching Over the Entire Line and Load Range
venue: 2018 20th European Conference on Power Electronics and Applications (EPE'18 ECCE Europe)
year: 2018

abstract: This paper introduces a multi phase interleaved dc dc converter, targeted for high step down applications including voltage regulator modules (VRM) for microprocessors, where low volume and high efficiency are the key priorities. The introduced architecture, reducing the voltage swing at the switching node, along with doubling the effective switching frequency of the inductor current ripple, allows reducing the size of the inductors by up to 4 times, resulting in superior dynamic regulation, while maintaining high power processing efficiency of above 90% Along with the interleaved 2 phase operation of the introduced converter, practical implementation details, including gate driver implementation, startup, and additional features such as automatic phase current balancing, are also addressed. Experimental verifications with a 12 to 1.2 V, 10 A, 250 kHz prototype show proper functionality of the introduced converter.
author_names: Samuel da Silva Carvalho

S M Ahsanuzzaman

Aleksandar Prodic
title: A low volume multi phase interleaved Dc Dc converter for high step down applications with auto balancing of phase currents
venue: 2017 IEEE Applied Power Electronics Conference and Exposition (APEC)
year: 2017

abstract: This work presents experimental results of an optimized five phase GaN/Si hybrid synchronous buck converter designed to improve low voltage point of load (POL) converter efficiency while meeting increasing load demands typical in high performance computing. The best enhancement mode GaN HEMTs have very low gate charge, switch much faster than Si, and enable higher frequency operation which can reduce size. However, GaN HEMTs are not yet available with extremely low RDS(ON) like comparable Si MOSFETs. For this reason, GaN based systems are susceptible to poor efficiency at high loads. To mitigate this consequence, the appropriate combination of GaN and Si is utilized in a 12 to 1 V POL converter with peak efficiency above 95% and 125 W rated load. The results of this work submit that optimal performance can be achieved by combining two semiconductor technologies, and the design is a novel approach to improve upon current state of the art POL converters.
author_names: Luke L Jenkins

Benjamin K Rhea

William E Abell

Frank T Werner

Chris Wilson

Robert Neal Dean

Daniel K Harris
title: 125 W multiphase GaN/Si hybrid point of load converter for improved high load efficiency
venue: 2014 IEEE Workshop on Wide Bandgap Power Devices and Applications
year: 2014

abstract: Data centers demand high current, high efficiency, and low cost power solutions. The high voltage dc distribution power architecture has been drawing attention due to its lower conduction loss on cables and harnesses. In this structure, the 380 12 V high output current isolated converter is the key stage. This paper presents a 1 MHz 1 kW LLC resonant converter using GaN devices and planar matrix transformers that are designed and optimized for this application. The transformer design and the optimization of the output capacitor termination are performed and verified. Finally, this cost effective converter achieves above 97% peak efficiency and 700 W/in3 power density.
author_names: Mingkai Mu

Fred C Lee
title: Design and Optimization of a 380 12 V High Frequency, High Current LLC Converter With GaN Devices and Planar Matrix Transformers
venue: IEEE Journal of Emerging and Selected Topics in Power Electronics
year: 2016

abstract: This paper presents a novel 400 to 12 V isolated bidirectional dc dc converter based on a phase shift controlled modified dual active bridge power stage. The proposed converter consists of a half bridge and center tap with active clamp circuit, which has promising performance for low voltage high current applications. 650 V gallium nitride high electron mobility transistors are used on the high voltage side to avoid issues encountered using Si superjunction MOSFETs in phase shift controlled bidirectional power conversions. The operation principle and power transfer characteristic are obtained based on a time domain analysis of the inductor current. Design methodology and criteria and converter's efficiency analysis are discussed. Both the analysis and experiments verify that the proposed converter is capable of achieving low power loss and high power density in soft switching and hard switching modes. Experimental results are presented for a 1 kW, 400 V to 12 V dc dc prototype converter operating at 100 kHz switching frequency. A power density of 30 W/in3 and a peak efficiency of 98.3% in a wide input/output voltage range are achieved.
author_names: Fei Xue

Ruiyang Yu

Alex Q Huang
title: A 98.3% Efficient GaN Isolated Bidirectional DC DC Converter for DC Microgrid Energy Storage System Applications
venue: IEEE Transactions on Industrial Electronics
year: 2017

abstract: Wide input wide output converters are popular for their versatility in different bus systems. The voltage variation is four times as both input and output voltage vary two times. At the same time, high input voltage can effectively reduce bus loss and the volume and weight. When the input voltage is up to 800 V, current 650 V GaN devices cannot be directly used. A stacked bridge structure is used, ensuring the application of 650 V GaN devices and reducing dv/dt to 20 kV/ms, even when the input voltage is 800 V. The LLC resonant converters are well known for its high efficiency, compact and wide range of ZVS. However, on the occasion when input voltage is 400 800V and output voltage is 22 40 V whose voltage range varieties four times, a single stage LLC converter is hardly suitable to maintain high efficiency and high power density because the switching frequency variation has to be considerably large and the magnetics cannot be optimally designed. A two stage solution consisting of a LLC DCX and three phase interleaving synchronous buck converters are proposed to maintain high efficiency. All GaN HEMTS are applied and the converter can run up to 1MHz to achieve high power density. The analysis of the influence of parasitic junction capacitance of the rectifier diodes on the primary side ZVS realization is given. A 2 kW GaN based prototype with 400 800 V input and 22 40 V output was built to verify the theoretical analysis. The converter can achieve power density of 130 W/in3 and peak efficiency of 93.8%
author_names: Mingxie He

Xinyi Zhu

Zhiliang Zhang

Xiaoyong Ren
title: A 1 MHz GaN Converter with 4X Voltage Range*
venue: 2019 IEEE Applied Power Electronics Conference and Exposition (APEC)
year: 2019

abstract: A new five level voltage source inverter (VSI) with sinusoidal pulse width modulator for medium voltage high power applications is proposed in this paper by using of ANN. The proposed inverter is based on the upgrade of a four level nested neutralpoint clamped (NNPC) converter. To control and balance the capacitor voltages a novel and simple SPWM techniques is also developed for the proposed converter. This inverter can operate over a wide range of voltages without the need for connecting power semiconductor in series, has high quality output voltage and fewer components compared to other classic fivelevel topologies. The features and operation of the proposed converter are studied and a simple sinusoidal PWM scheme is developed to control and balance the flying capacitors to their desired values. The performance of the proposed converter is evaluated by simulation and experimental results. By using the simulation results we can analyze the performance of the proposed method under different operating conditions. INTRODUCTION Multilevel inverter technology has emerged recently as a very important alternative in the area of high power medium voltage energy control. For high power medium voltage (MV) industrial applications, multilevel converters are the best candidates and this is because multilevel topologies can synthesize near sinusoidal voltage with low harmonic distortion that reduces the size of output filter. These topologies have also low switch stress, reduced common mode voltage, and high voltage capability [1] [4] In this paper, a new five level voltage source converter that is based on the upgrade of a four level NNPC converter is proposed. This inverter, compared to other classic five level topologies, can operate over a wider range of voltages without the need for connecting power semiconductor in series and it also has fewer components. The diode clamped converter (DCC) flying capacitor converter (FC) and the cascaded H bridge (CHB) converter are the most well known multilevel converter topologies [2] that have been commercialized successfully by major manufacturers. However, these topologies have some drawbacks which limit their applications for more levels. DCC topology with more number of levels is less attractive because of its limitations; 1) dc link capacitor voltage balance becomes unattainable in higher level topologies with a passive front end, and 2) the number of clamping diodes increases substantially with the voltage level [5] Flying Capacitor (FC) topology needs to have higher switching frequencies to keep the capacitors properly balanced, whether a self balancing or a controlassisted balancing modulation method is used. Also the number of flying capacitors increases with the voltage level. Although cascade H Bridge (CHB) topology can reach higher voltage and higher power levels with modular structure, this topology needs a number of isolated dc sources, an expensive and bulky phase shifting transformer, and a substantially more number of active devices to achieve a regenerative operation. A five level H bridge NPC (5L HNPC) is the H bridge connection of two classic 3L NPC phase legs [6] [8] A five level active NPC (5L ANPC) is a combination of a 3L ANPC and 3L FC, which increases the number of voltage levels [9] A five level diode clamped converter [5] which has a large number of clamping diodes. This converter has 36 diodes, 12 diodes in each phase. Voltage balancing of the dc link capacitors is another issue with this topology which has been studied comprehensively in [5] Recently, a novel four level nested neutral point clamped (NNPC) converter has been proposed in this paper. The proposed five level converter mitigates the drawbacks of the previous five level converters. This converter has the following features; 1. The number of clamping diode has been reduced significantly compared to five level DCC converter. A five level DCC converter has 12 diodes in each phase however the proposed topology needs 2 diodes per phase [5] 2. It has fewer flying capacitors compared to fivelevel FC converter. 3. Unlike 5L HNPC converter, the proposed converter does not need any isolated DC source that INTERNATIONAL JOURNAL OF PROFESSIONAL ENGINEERING STUDIES Volume 10 /Issue 1 JUN 2018 IJPRES makes the converter appropriate for regenerative applications. 4. Unlike 5L ANPC, the voltage stresses of the power switches are the same and they are equal to quarter of the input dc link voltage[6] in MATLAB/Simulink environment. The feasibility of the proposed converter is verified by a scale down prototype converter. CONVERTER TOPOLOGY A. Operation of the Proposed Five Level Voltage Source Inverter The proposed multilevel topology, as shown in Fig. 1, is based on the upgrade of a four level nested neutral point clamped (NNPC) converter. Fig. 1. A new five level three phase inverter. To ensure equally spaced steps in the output voltages, the capacitor Cx1 and Cx2, x=a,b,c are charged to 1/4Vdc and Cx3 is charged to 3/4Vdc Five output levels are achieved from twelve distinct switching combinations. The list of switching combinations is shown in Table I. It should be noted that the voltage stresses across the switches do not exceed 1/4 of dc link voltage. Another advantage of the proposed converter is the redundancy in switch combination to generate the output levels[4] B.SPWM Scheme for the Proposed Five Level Inverter One of the most popular modulation scheme in industry applications is Sinusoidal PWM (SPWM) This modulation scheme is based on multicarrier PWM strategy. In this section, a new approach is proposed to use the multicarrier SPWM strategy to generate multilevel output voltage while regulating the voltage of flying capacitors[5] This approach employs the deviation of the capacitor voltages from their nominal values and based on the converter output current select the best switching state from the available redundant switching states to charge or discharge the capacitors and finally regulate the voltages of capacitors. In this strategy, four level shifted triangular carriers with in phase disposition (IPD) method are employed, where all carriers are in phase and have the same magnitude as shown in Fig.2(a) Fig. 2. Level shifted multicarrier strategy for a five level inverter. (a) Level shifted multicarrier modulation for a 5L FC NNPC topology. (b) Desired output levels. Fig. 2(b) shows the desired output levels which is the result of comparing carriers and modulation signal. Based on the desired level at the output, the corresponding switching state can be selected from Table I and then applied to the power switches. If there is no control over the currents that flow into/out from the flying capacitors to charge/discharge the capacitors, therefore the voltage of the flying capacitors may deviate from their desired values. The voltage deviation of the flying capacitors can be expressed as: 1,2,3 (1) where VCxi are the capacitor voltages, Vcxi, ref are the nominal values which V cxi, ref Vdc 4 for i =1,2 and Vcx3, ref 3Vdc 4. To achieve capacitor voltage balancing, the deviation DVCxi should be close to zero. INTERNATIONAL JOURNAL OF PROFESSIONAL ENGINEERING STUDIES Volume 10 /Issue 1 JUN 2018 IJPRES TABLE I Switching States Of The Proposed Five Level Converter And Contribution Of The Ac Side Currents To The Flying Capacitor Voltages As can be seen from the Table I, there are enough redundancy at level 1, 2 and 3 to charge and discharge the flying capacitors[8] Level 1 is a good candidate to control voltages of capacitor Cx3 and Cx2 while Level 3 is a good candidate to control voltage of capacitors Cx3 and Cx1. Table II shows that which switching state should be chosen in different conditions to control voltage of flying capacitors. For example, if the level is 2 and the deviation of capacitor Cx1 is more than other capacitors |DVCX1| |DVCX3| |DVCX1| |DVCX2| it means that the main priority should be given to charge or discharge capacitor Cx1. Assume that ix> 0, if DVcx1 0, therefore the capacitor Cx1 should be discharged and thus the State C1 should be selected. According to Table I and II, the procedure bellow should be followed to control the flying capacitor voltages: 1The desired output level should be determined by comparing carriers and modulation signal, as shown in Fig. 2, 2The direction of the phase current and voltages of the flying capacitors should be measured and then the capacitor voltage deviation can be determined based on (1) and finally the appropriate switching state can be selected from Table II and the corresponding gating signals will be applied to the power semiconductors. First, the modulating signal for phase x (x=a,b,c) is compared to carriers (four carriers) and then the desired output levels are determined. If the desired output level (L) is 0 or 4, the corresponding switching state will be State A or E from Table I respectively. Otherwise, the capacitor voltages (VCX1, VCX2 and VCX3) and phase current should be measured and then based on the output level (L) the appropriate switching state should be selected from Table II TABLE II THE PROPOSED VOLTAGE BALANCING METHOD FOR EACH PHASE OF THE FIVELEVEL INVERTER The flowchart shown in Fig.3 illustrates the procedure to control voltage of flying capacitors in each phase. Fig.3. The procedure to control of flying capacitor voltages. INTERNATIONAL JOURNAL OF PROFESSIONAL ENGINEERING STUDIES Volume 10 /Issue 1 JUN 2018 IJPRES The parameters of the system are shown in Table III. The simulation also demonstrates the effectiveness of the developed SPWM to generate output voltages and to regulate and balance the voltage of flying capacitors. TABLE III: PARAMETERS OF THE STUDY SYSTEM (SIMULATION) This procedure can be applied to each leg separately to control its flying capacitor voltages, the only difference is that modulating signals should have 120o phase shi
author_names: T Divya Bharathi

Mahamood Khan
title: A NOVEL FIVE LEVEL VOLTAGE SOURCE INVERTER WITH SINUSOIDAL PULSE WIDTH MODULATOR FOR MEDIUM VOLTAGE APPLICATIONS BY USING ANN CONTROLLER
year: 2018

abstract: AC power amplifiers are e.g. used to emulate the power grid for testing three phase power electronics mains interfaces of renewable energy systems or measuring the inner impedance of power distribution grids. Typically, the output stages of the test systems are realized as analog amplifiers and thus achieve very high dynamics and a very high signal quality, but also have significant drawbacks, especially high losses and/or poor efficiencies, which leads to a large cooling volume and weight that dominates the full system power density. In addition, analog amplifiers cannot easily handle bidirectional power flow, i.e. power fed back from active loads such as renewable energy inverter systems is dissipated internally. Furthermore, future power distribution systems, e.g. of More Electric Aircraft, will have fundamental frequencies exceeding 1 kHz, thus ultra high bandwidth 100 kHz) power amplifiers with multiple kW output power are required to emulate harmonic distortions and variations of voltage and/or frequency in such power grids. Currently available analog power amplifiers reach bandwidths of up to 30 kHz, which is too low for all desired applications. Switched mode, i.e. class D power amplifiers achieve a high efficiency, however, bandwidths of no more than 5 kHz are reached today due to the high required switching frequency (around a factor of 50 higher than the output bandwidth) However, as shown in this paper, novel wide bandgap semiconductor technology and suitable circuit techniques such as series interleaving (multi level converter topologies) and parallel interleaving render a switched mode realization with an effective switching frequency of 4.8 MHz and/or 100 kHz large signal bandwidth possible, while still keeping the switching losses at a moderate level. An analysis of designs with different numbers of voltage levels and interleaved branches is performed and shows that with a triple interleaved three level flying capacitor converter, where each switching cell operates at 800 kHz, the targeted effective switching frequency is reached and an efficiency above 95 is feasible for both directions of power flow. Furthermore, a virtual prototype of the selected design is presented, showing that thanks to the high effective switching frequency, an extremely power dense overall realization is possible (50 kW/dm3) Finally, simulations of the control behavior verify excellent control dynamics of the presented concept.
author_names: Pascal S Niklaus

Jon Azurza Anderson

Dominik Bortis

Johann Walter Kolar
title: Ultra High Bandwidth GaN Based Class D Power Amplifier for Testing of Three Phase Mains Interfaces of Renewable Energy Systems
venue: 2019 8th International Conference on Renewable Energy Research and Applications (ICRERA)
year: 2019