Query: Physical and electrical properties of metal gate electrodes on HfO2 gate dielectrics

Candidate papers:

abstract: As the metal oxide semiconductor field effect transistor (MOSFET) gate lengths scale down to 50 nm and below, the expected increase in gate leakage will be countered by the use of a high dielectric constant (high k) gate oxide. The series capacitance from polysilicon gate electrode depletion significantly reduces the gate capacitance as the dielectric thickness is scaled to 10 A equivalent oxide thickness (EOT) or below. Metal gates promise to solve this problem and address other gate stack scaling concerns like boron penetration and elevated gate resistance. Extensive simulations have shown that the optimal gate work functions for the sub 50 nm channel lengths should be 0.2 eV below (above) the conduction (valence) band edge of silicon for n type MOSFETs (p type MOSFETs) This study summarizes the evaluations of TiN, Ta Si N, WN, TaN, TaSi, Ir, and IrO2 as candidate metals for dual metal gate complementary metal oxide semiconductor using HfO2 as the gate dielectric. The gate work function was determined
author_names: J K Schaeffer

Srikanth Samavedam

David C Gilmer

V Dhandapani

Philip J Tobin

J Mogab

Bich-Yen Nguyen

B E White

Srikanteswara Dakshina-Murthy

Raghaw S Rai

Z X Jiang

R Martin

Mark V Raymond

M Zavala

L B La

J Allyn Smith

R Garcia

D Roan

M L Kottke

Richard B Gregory
title: Physical and electrical properties of metal gate electrodes on HfO2 gate dielectrics
year: 2003

abstract: MIS capacitors with 16 nm high k dielectric HfO"2 and 50 150nm TaN electrode were studied after post metal annealing (PMA) at various conditions. The effect of TaN thickness on electrical and physical properties is summarized. It has been found that the thermal stability of the TaN/HfO"2 depends on TaN thickness. A reduction of leakage current and an increase of breakdown voltage were obtained with 50 nm TaN after PMA at 500^oC. The interface quality and the time dependent dielectric breakdown (TDDB) characteristics were also improved. On the other hand, degradation after PMA was observed in HfO"2 capped with 100 nm and 150 nm TaN.
author_names: Yang-Hua Chang

Cheng-li Lin

Ting-Yao Wang
title: Electrical and physical properties of HfO2 as gate dielectrics using various thickness of TaN electrodes for MIS capacitors
year: 2012

abstract: Future scaling of complementary metal oxide semiconductor (CMOS) technology requires high k (HK) dielectrics with metal gate (MG) electrodes to realize higher gate capacitances and low gate leakage currents [1] During the last decade the semiconductor industry has spent tremendous effort to find the right material. Hafnium based dielectrics and particularly HfO2 are considered to be the most promising candidates to replace SiON in high volume manufacturing due to their relatively high dielectric constants, large band gap and conduction band offset to Si and their thermodynamic stability with Si [2 4] However, compared to SiO2, HfO2 dielectrics suffer from threshold voltage instabilities, mobility degradation, charge trapping as well as reliability degradation [5,6] Recently HfZrO4 has been shown to be a superior gate dielectric to HfO2 [7 11] Addition of ZrO2 to HfO2 forming HfZrO4 helps to partially stabilize tetragonal phase being associated with higher kand lower CET values [7] Besides smaller and more uniform grains, more uniform film quality, tighter leakage distribution, less charge trapping, lower CV hysteresis, lower Dit, higher transconductance and drive currents, reduced SILC and longer product reliability lifetimes have been reported among other things for HfZrO4 compared with HfO2 [7 11] Simultaneously disadvantages like smaller band gap ~0,4eV) and lower conduction band offsets resulting in increased leakage have been presented as well [7] Up to now atomic layer deposition (ALD) [7 10] as well as physical vapor deposition (PVD) [11] have been explored to form the HfZrO4 layers. As metal organic chemical vapor deposition (MOCVD) stands out due to excellent manufacturability and high throughputs, we investigate HfZrO4 dielectrics deposited with MOCVD as well as ALD as high k gate dielectric for 32nm high performance logic SOI CMOS devices in this work. The physical properties of the HfZrO4 films have been analyzed in detail by atom probe tomography [12,13] Xray photoelectron spectroscopy, Rutherford backscattering spectrometry, time of flight secondary ion mass spectrometry, transmission electron microscopy, reflectometry, atomic force microscopy, variable angle spectroscopic ellipsometry as well as high temperature grazing incidence X ray diffraction. In addition electrical parameters such as gate leakage current, capacitance equivalent thickness, threshold voltage, interface trap density (charge pumping) and performance as well as reliability data have been taken into account to directly compare both deposition methods. All parameters indicate a comparable behavior for MOCVD and ALD. Therefore MOCVD is demonstrated to be a promising alternative to ALD in high volume manufacturing in this work.
author_names: Torben Kelwing

S Mutas

Martin Trentzsch

Andreas Naumann

Bernhard Trui

Lutz Herrmann

Falk Graetsch

Christoph Klein

Lutz Wilde

S Ohsiek

M Weisheit

Anita Peeva

Inka Richter

Hartmut Prinz

Alexander Wuerfel

Rick Carter

Rolf Stephan

Peter Kucher

Walter Hansch
title: Physical and Electrical Properties of MOCVD and ALD Deposited HfZrO4 Gate Dielectrics for 32nm CMOS High Performance Logic SOI Technologies
year: 2010

abstract: TaCy has been reported to have the appropriate work function for negative metal oxide semiconductor metal in high k metal oxide field effect transistors. As device size continues to shrink, a conformal deposition for metal gate electrodes is needed. In this work, we report on the development and characterization of a novel TaCy process by atomic layer deposition (ALD) Detailed physical properties of TaCy films are studied using ellipsometry, a four point probe, Rutherford backscattering spectrometry (RBS) x ray photoelectron spectroscopy (XPS) and x ray diffraction (XRD) RBS and XPS analysis indicate that TaCy films are near stoichiometric, nitrogen free, and have low oxygen impurities. Powder XRD spectra showed that ALD films have a cubic microstructure. XPS carbon bonding studies revealed that little or no glassy carbon is present in the bulk of the film. Excellent electrical properties are obtained using ALD TaCy as a metal gate electrode. Well behaved capacitance voltage characteristics with ALD H.
author_names: Dina H Triyoso

Richard B Gregory

J K Schaeffer

Dennis B Werho

Dong Hua Li

Steven D Marcus

Glen David Wilk
title: Atomic layer deposited TaCy metal gates: Impact on microstructure, electrical properties, and work function on HfO2 high k dielectrics
year: 2007

abstract: The influence of various types of metal nitride gate electrodes, i.e. tantalum nitride, molybdenum nitride, and tungsten nitride, on electrical characteristics of metal oxide semiconductor capacitors with hafnium oxide as the gate dielectric material has been studied. The result shows that both the physical and electrical properties of the high k gate stack are influenced by the gate electrode materials and the post metal annealing temperature. Both the physical thickness and equivalent oxide thickness of the gate stack increased after the high temperature N2 annealing step. The leakage current density decreased with the increase of the annealing temperature from 600to800degC. The work functions of these metal nitride electrodes decreased with the annealing temperature due to the variance of microstructure and chemical composition, as indicated by x ray diffraction and second ion mass spectroscopy data. These metal nitride electrodes are suitable for n channel metal oxide semiconductor device applications
author_names: Jiang Lei Lu

Yue Kuo

Somenath Chatterjee

Jun-Yen Tewg
title: Physical and electrical properties of Ta N, Mo N, and W N electrodes on HfO2 high k gate dielectric
year: 2006

abstract: Replacement of polycrystalline Si (poly Si) gate electrode used in conventional complementary metal oxide semiconductor field effect transistors (CMOSFETs) with the metal gate has been rapidly developed during last decade [1] Although the metal gates were initially employed to overcome several issues, such as poly Si gate depletion, boron penetration and high gate resistance, they are being recently investigated to scale further equivalent oxide thickness (EOT) and modulate flat band voltage (VFB) [2] Among the various metal gates for pMOSFET that are currently being studied, Ru and RuO2 films could be positively considered due to its low resistivity, high work function, and conducting oxide property. However, there have been few researches on the relationship between the Ru (or RuO2) growth condition and its structure and electrical properties (or so called dead layer effect) in MIS capacitors. The dielectric dead layer effect at the interface with metal electrode has mainly been studied in metal insulator metal (MIM) device area [3] In this work, physical and electrical characteristics of Ru and RuO2 films were compared for modulating work function and further scaling of EOT. Ru and RuO2 films were grown by a rf magnetron sputtering using Ru target ~99.99% on thermal SiO2 ~6 nm) and atomiclayer deposited HfO2 (2~6 nm) films on p type Si substrate. In RuO2 sputtering process, the O2/(Ar+O2) flow rate (O2 ratio) was varied from 3.3 to 16.7 Also, EOT of interfacial layer (IL) thicknesses and effective work functions (EWF) of various metal gates, Ru, RuO2, Pt and TiN, were extracted from the plot of EOT vs. HfO2 thickness and that of VFB vs. EOT, respectively. Samples were examined by x ray fluorescence (XRF) X ray photoelectron spectroscopy (XPS) and high resolution transmission electron microscopy (HRTEM) The growth rates of Ru with increasing the deposition time (inset) and RuO2 as a function of O2 rate were examined by XRF measurements, Fig. 1(a) The Ru sheet density from Ru films has a linear relation with the deposition time. On the other hand, that of RuO2 films has highly non linear behavior with respect to the O2 ratio probably due to the target poisoning and resputtering effects at high O2 ratio. The impact of O2 ratio on crystal structure of RuO2 was investigated by XRD measurements as shown in Fig. 1(b) The deposited film was hexagonal Ru when the O2 ratio is 0, while other films show clear peaks corresponding to tetragonal RuO2 phase when the O2 ration was 5% Furthermore, the intensity of (110) peak (28) decreased with increasing O2 ratio, becoming lower than that of (101) peak (35) at 16.7 O2, in which the growth rate of RuO2 was very low in Fig. 1(a) These results indicate that O2 ratio during the deposition of RuO2 determine the growth rate as well as growth direction that could affect electrical property. Figures 2 (a) and (b) show XPS spectra of O 1s and Ru 3d peaks, respectively, for Ru and RuO2 with 3.3 13.3 and 16.7 O2 ratio. Here, the films are 30 nm thick, so only film surface contributes to the XPS signal. All of Ru and RuO2 films show Ru O bonding peaks as RuO2 and RuOx (possibly RuO3) phases with binding energies (BE) of 529.2 eV and 530.6 eV, respectively. However, Fig 2 (b) reveals that the film with zero O2 ratio is mainly composed of Ru. The RuOx signal in O 1s is, therefore, due to the surface oxidation. With increasing O2 ratio during the growth of RuO2 film, the intensity of the RuOx peak decreased. Therefore, it can be understood that the sample with O2 ratio of zero has a contact between HfO2 dielectric and metal Ru, while other samples have contact between HfO2 dielectric and RuO2, which influence the dielectric deal layer effect and EOT as shown in Fig. 3. Figure 3 (a) shows the variation of EOT of HfO2 films as a function of film thickness with four different electrodes; Pt, TiN, Ru and RuO2, where the EOT was extracted from the C V curves shown in Fig. 3 (b) The plots show different y axis intercepts depending on the types of electrode, while the slopes are almost identical which corresponds to a dielectric constant of 17 of HfO2 (except for TiN ~15) The y axis intercept of such EOT vs. thickness plots was usually attributed to the EOT contribution from the interface layer [1] The different y axis intercept values according to the types of gate metal can be attributed to the different scavenge effect of gate metal [4] but this can hardly be the case here because Pt, Ru, and RuO2 can hardly scavenge oxygen from the interface layer owing to their very small oxidation potential. This can be confirmed from the fact the dielectric constant of HfO2 film was invariant irrespective of the gate metals; if scavenge has occurred, the dielectric constant usually decreases due to possible diffusion of Si into the film (TiN case) Therefore, the smaller EOT of RuO2 and Ru cases for the reference Pt electrode must be understood from the decreased dielectric dead layer effect from the high k dielectric/conducting oxide interface. The reason for partially seeing this effect from metal Ru (EOT from Ru case is still smaller than from Pt case) can be understood from the partial oxidation of Ru layer which is in contact with HfO2. In Fig. 3 (b) the 2nm Ru/TiN shows the same capacitance as that of RuO2, while the 6nm Ru sample shows the smaller capacitance than that (but still higher than Pt case) The thinner Ru layer could be fully oxidized, so that it may have similar property as that of bulk RuO2 (30 nm) but the thicker Ru layer only partly oxidized and have more metal like dead layer effect.
author_names: Hyo Kyeom Kim

Sang Young Lee

Il Yu

Jae Ho Lee

Tae Joo Park

Cheol Seong Hwang
title: Comparison on Physical and Electrical Properties of Sputtered Ru and RuO2 Gate Electrodes Grown on HfO2/Si for p MOSFET
year: 2012

abstract: Electrical properties of hafnium oxide (HfO"2) gate dielectric with various metal nitride gate electrodes, i.e. tantalum nitride (TaN) molybdenum nitride (MoN) and tungsten nitride (WN) were studied over a range of HfO"2 thicknesses, e.g. 2.5 10nm, and post metal annealing (PMA) temperatures, e.g. 600^oC to 800^oC. The work function of the nitride gate electrode was dependent on the material and the post metal annealing (PMA) temperature. The scanning transmission electron microscopy technique is used to observe the effect of PMA on the interfacial gate dielectric thickness. After high temperature annealing, the metal nitride gates were suitable for NMOS. At the same PMA temperature, the oxide trapped charges increased and the interface state densities decreased with the increase of the HfO"2 thickness for TaN and WN gate electrodes. However, for MoN gate electrode the interface state density is almost independent of film thickness. Therefore, dielectric properties of the HfO"2 high k film depend not only on the metal nitride gate electrode material but also the post metal annealing condition as well as the film thickness. During constant voltage stress of the MOS capacitors, an increase in the time dependent gate leakage current is also observed.
author_names: Somenath Chatterjee

Yue Kuo

Jun Lu
title: Thermal annealing effect on electrical properties of metal nitride gate electrodes with hafnium oxide gate dielectrics in nano metric MOS devices
year: 2008

abstract: Abstract The dielectric breakdown property of ultrathin 2.5 and 5.0 nm hafnium oxide (HfO 2 gate dielectric layers with metal nitride (TaN) gate electrodes for metal oxide semiconductor (MOS) structure has been investigated. Reliability studies were performed with constant voltage stressing to verify the processing condition effects (film thicknesses and post metal annealing temperatures) on times to breakdown. The leakage current characteristics are improved with post metal annealing temperatures (PMA) for both 2.5 and 5.0 nm HfO 2 physical thicknesses. However, it is more prominent ~2 orders of magnitudes) for 2.5 nm HfO 2 film thickness. The values of oxide trapped charge density and interface state density are also improved for 2.5 nm HfO 2 film. The different stages of charge trapping behaviors, i.e. stress induced leakage current, soft and hard breakdown mechanisms have been detected. During constant voltage stress of the MOS capacitors, an increase in the time dependent gate current is observed, followed by the occurrence of several fluctuations. The amplitude of the fluctuations is much larger in the 5.0 nm HfO 2 gate dielectric layer compared to the 2.5 nm HfO 2 layer. After the occurrence of such fluctuations, the current voltage characteristics exhibited an increased in gate current compared to the fresh (unstressed) devices.
author_names: Somenath Chatterjee

Yue Kuo

J Lu

Jun-Yen Tewg

P Majhi
title: Electrical reliability aspects of HfO2 high k gate dielectrics with TaN metal gate electrodes under constant voltage stress
venue: Microelectron. Reliab.
year: 2006

abstract: The physical and electrical properties in metal oxide Si (MOS) capacitors with the gate electrodes deposited using poly Si or amorphous Si (a Si) and with the gate oxide grown in O2 or N2O have been investigated. The differences of a gate oxide grown in N2O with a conventional furnace and an oxide film annealed in N2O by a rapid thermal process (RTP) were also studied. The analysis of physical properties included the thickness variations of oxide films, the shrink ratios of gate electrode films, the nitrogen and hydrogen concentrations in oxides, and the SiO2/Si interfacial strain. The measurement of electrical properties in MOS capacitors included the interface trap density (Dit) the charge to breakdown, and the hot electron and radiation induced ^Dit and flatband voltage shifts. To improve the electrical reliability of MOS devices with ultrathin gate oxides, an oxynitride should be introduced although some properties of it are slightly inferior to those of conventional oxides. The combination of a gate.
author_names: Kuei-Shu Chang-Liao

L -C Chen
title: Physical and electrical properties in metal oxide Si capacitors with various gate electrodes and gate oxides
year: 1997

abstract: School of Semiconductor and Chemical Engineering, Semiconductor Physics Research Center (SPRC) Chonbuk National University, Jeonju 561 756, Korea Measurement and Analysis Division, National Nanofab Center (NNFC) Daejeon 305 343, Korea Department of Advanced Materials Science and Engineering, Dankook University, Cheongan 330 714, Korea Department of BIN Fusion Technology, Chonbuk National University, Jeonju 561 756, Korea
author_names: S V Jagadeesh Chandra

Myung Il Jeong

Park Yun-Chang

Jong-Won Yoon

Chel-Jong Choi
title: Effect of Annealing Ambient on Structural and Electrical Properties of Ge Metal Oxide Semiconductor Capacitors with Pt Gate Electrode and HfO2 Gate Dielectric
year: 2011