Query: Thermal pcb

Candidate papers:

abstract: Miniature power semiconductor devices mounted on printed circuit boards (PCBs) are normally cooled by means of PCB vias, copper pads, and/or heatsinks. Various reference PCB thermal designs have been provided by semiconductor manufacturers and researchers. However, the recommendations are not optimal, and there are some discrepancies among them, which may confuse electrical engineers. This paper aims to develop analytical thermal resistance models for PCB vias and pads, and further to obtain the optimal design for thermal resistance minimization. First, the PCB via array is thermally modeled in terms of multiple design parameters. A systematic parametric analysis leads to an optimal trajectory for the via diameter at different PCB specifications. Then, an axisymmetric thermal resistance model is developed for PCB thermal pads where the heat conduction, convection, and radiation all exist; due to the interdependence between the conductive/radiative heat transfer coefficients and the board temperatures, an algorithm is proposed to fast obtain the board ambient thermal resistance and to predict the semiconductor junction temperature. Finally, the proposed thermal models and design optimization algorithms are verified by computational fluid dynamics simulations and experimental measurements.
author_names: Yanfeng Shen

Huai Wang

Frede Blaabjerg

Teng Long
title: Thermal Modeling and Design Optimization of PCB Vias and Pads
venue: IEEE Transactions on Power Electronics
year: 2020

abstract: The relevant cooling action ensured by the thermal vias in PCB based power circuits allows extending the operating conditions of the semiconductor devices. However, to properly drain off the power dissipated in the active regions, efficient thermal designs must be developed. To further reduce the devices operating temperature, a strategy to take advantage of the unexploited PCB areas surrounding the device footprint is proposed and discussed in this paper. The analysis is carried out by means of 3 D FEM thermal simulations performed in the COMSOL Multiphysics environment. This investigation is devoted to providing guidelines for an optimum design of thermal vias by accounting for their main geometrical features.
author_names: Antonio Pio Catalano

Roberto Trani

Ciro Scognamillo

Vincenzo d'Alessandro

Alberto Castellazzi
title: Optimization of Thermal Vias Design in PCB Based Power Circuits
venue: 2020 21st International Conference on Thermal, Mechanical and Multi Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
year: 2020

abstract: Abstract Lead free tin based solder joints often have a single grained structure with random orientation and highly anisotropic properties. These alloys are typically stiffer than lead based solders, hence transfer more stress to printed circuit boards (PCBs) during thermal cycling. This may lead to cracking of the PCB laminate close to the solder joints, which could increase the PCB flexibility, alleviate strain on the solder joints, and thereby enhance the solder fatigue life. If this happens during accelerated thermal cycling it may result in overestimating the lifetime of solder joints in field conditions. In this study, the grain structure of SAC305 solder joints connecting ceramic resistors to PCBs was studied using polarized light microscopy and was found to be mostly single grained. After thermal cycling, cracks were observed in the PCB under the solder joints. These cracks were likely formed at the early stages of thermal cycling prior to damage initiation in the solder. A finite element model incorporating temperature dependant anisotropic thermal and mechanical properties of single grained solder joints is developed to study these observations in detail. The model is able to predict the location of damage initiation in the PCB and the solder joints of ceramic resistors with reasonable accuracy. It also shows that the PCB cracks of even very small lengths may significantly reduce accumulated creep strain and creep work in the solder joints. The proposed model is also able to evaluate the influence of solder anisotropy on damage evolution in the neighbouring (opposite) solder joints of a ceramic resistor.
author_names: Saeed Akbari

Andreas Lovberg

Per-Erik Tegehall

Klas Brinkfeldt

Dag Andersson
title: Effect of PCB cracks on thermal cycling reliability of passive microelectronic components with single grained solder joints
venue: Microelectronics Reliability
year: 2019

abstract: This work proposes analytical thermal models for through PCB thermal vias and passive heat sinks, two key components of the overall junction to ambient thermal resistance in modern integrated power electronics circuits based on advanced wide band gap semiconductor technology. The proposed models aim to support the thermal design of PCB and cooling system by the quick estimation of their thermal resistances. The models are scalable in that they fully include the geometry, material properties and boundary conditions. As a case study, reference is made to the cooling of last generation gallium nitride HEMTs in SMD type package. Here, only the static behavior is considered. The models accuracy is evaluated by comparison with accurate FEM simulations performed exploiting the commercial software COMSOL Multiphysics aided by a MATLAB routine developed by the authors.
author_names: Antonio Pio Catalano

Roberto Trani

Alberto Castellazzi

Vincenzo d'Alessandro
title: Analytical Modeling of Through PCB Thermal Vias and Heat Sinks for Integrated Power Electronics
venue: 2019 25th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC)
year: 2019

abstract: This paper investigates an original multiphysics KB modeling of the electrothermomechanical (ETM) phenomena in a multi layer printed circuit board (PCB) under heat cycle aggression. The coupled thermal and intrinsic mechanical interactions with the PCB electrical response are analyzed. The via interconnect line (IL) junction fatigue caused by the mechanical tensions is explained with tensorial equations. The ETM effects transduced between the PCB components are modeled with equivalent graphs. The multiphysics problem general tensorial relation is formulated. To validate the Kron Branin model, the numerical application of three layer PCB proof of concept under thermal cycle aggression with 0 to 70 degC variation is introduced. The tensile stresses induced by the thermal effect on the vias and ILs are calculated. The via cracking fatigue model is approximated. The PCB voltage transfer function and input impedance in the function of the thermal aggression are discussed.
author_names: Z Xu

Blaise Ravelo

Olivier Maurice
title: Multiphysics Tensorial Network Analysis Applied to PCB Interconnect Fatigue Under Thermal Cycle Aggression
venue: IEEE Transactions on Electromagnetic Compatibility
year: 2019

abstract: Light emitting diodes (LEDs) have increasingly replaced conventional lamps in the fields of general lighting and consumer electronics. In addition to the sharp price fall, this is also due to the significantly higher energy efficiency and the smaller, more compact design. Recently, their robustness and reliability have also reached a level of quality that surpasses the characteristics of conventional light sources such as halogen and fluorescent lamps. Characteristics, such as excellent design freedom and the possibility for functional integration, highlight the main qualities of molded interconnect devices (MIDs) The use of this technology does not only open doors to extend the application field of LEDs to new products but also presents challenges to the lighting industry. There are many studies dealing with the reliability of LEDs as well as with the usability of the MID technology in different fields. But, the lack of experience from the manufacturers regarding the behavior of this interesting configuration (LED/MID) over the entire life cycle prevents this technology from establishing and consolidating its existence. As LEDs in the automotive sector, especially within headlamps, assume increasingly powerful lighting tasks and are no longer used exclusively for signal transfer or for displays, thermal properties of the substrate materials and the thermo mechanical behavior of the assembly are particularly relevant. In this context, this paper presents a deep and detailed reliability investigation of this system (LED/MID) and examines the influence of the MID substrate choice on the long term performance of the LED. The impact of the forward current and of the ambient temperature on the junction temperature of the LED is a proven fact. Therefore, the MID effect was inspected under different operating conditions based on infrared thermography. After analyzing the occurred failure mechanisms, by means of X ray analysis, thermal transient testing and microscopy, the resulting lifetime model is also presented and discussed.
author_names: Mahdi Soltani

Moritz Freyburger

Romit Kulkarni

Rainer Mohr

Tobias Groezinger

Andre Zimmermann
title: Reliability Study and Thermal Performance of LEDs on Molded Interconnect Devices (MID) and PCB
venue: IEEE Access
year: 2018

abstract: This study focuses on the onset of plastic flow in different copper raw materials. The tested copper sheets varied in the way in which they were manufactured and in terms of their post manufacturing treatments, namely annealing. Tensile tests were conducted at various temperatures (24degC, 60degC, 100degC, 150degC) in a temperature controlled chamber on thin copper specimens. Each material was analysed in its raw form as received from the manufacturer and additionally in an annealed form for comparison. These additional specimens were annealed for 1 hour at 250degC in a reflow oven. The results showed that the onset of plastic flow depends strongly on the manufacturing condition of the copper materials.
author_names: Adam Yuile

Steffen Wiese
title: The influence of thermal ageing on the flow stress of copper traces on PCB's
venue: 2018 19th International Conference on Thermal, Mechanical and Multi Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)
year: 2018

abstract: This paper investigates different thermal management solutions for GaN HEMT mounted on Printed Circuit Board (PCB) substrates. Wide bandgap (WBG) power semiconductors like GaN devices have the ability to operate at high switching frequency (from few 100 kHz to several MHz) To take advantage of their high frequency switching capabilities, the parasitic inductances of power connections as well as the connections between the dies and the gate driver must be minimized. So the majority of GaN chips available on the market are packaged so that they can be directly attached to a PCB. The embedding technology of GaN dies in PCB substrate is attractive because it offers various interconnection possibilities. However, the low thermal conductivity of glass epoxy will result in high thermal resistance of the substrate. So it is of the first importance to seek technological means in order to improve the cooling of GaN chips soldered or embedded in such PCB structures.
author_names: Shuangfeng Zhang

Eric Laboure

Denis Labrousse

Stephane Lefebvre
title: Thermal management for GaN power devices mounted on PCB substrates
venue: 2017 IEEE International Workshop On Integrated Power Packaging (IWIPP)
year: 2017

abstract: QFN packages gained popularity among the industry due to its low cost, compact size, and excellent thermal electrical performance. Although PCBs are widely used for QFN packages in handheld devices, some customers require it for heavy industrial application demanding thicker PCB. When an electronic device is turned off and then turned on multiple times, it creates a loading condition called power cycling. The die is the only heat source causing non uniform temperature distribution. The solder joint reliability assessment of Quad Flat no lead Package (QFN) is done using Finite element analysis (FEA) under two different loads. In this paper, the power cycling and thermal cycling act as a combined load. The reliability assessment is done to check stress distribution on PCB boards and solder joint. The life to failure is determined for QFN package assembly. Also, three different QFN boards were used for analysis and comparison has been done to investigate the impact of thickness and copper content of board on solder joint reliability under power cycling and thermal cycling. The mismatch in coefficient of thermal expansion (CTE) between components used in QFN and the non uniform temperature distribution makes the package deform. Modeling of life prediction is usually conducted for Accelerated Thermal Cycling (ATC) condition, which assumes uniform temperature throughout the assembly. An assembly is also subjected to Power Cycling i.e. non uniform temperature with the chip as the only source of heat generation. This work shows the performance of QFN package assembly under thermal and power cycle in combination and the stress distribution and plastic work for the package. The layered model analysis was done to investigate the impact of the FR4 layer and copper content in the PCB on the solder joint reliability. The comparative study between lumped and layered model has also done under power cycling and thermal cycling.
author_names: Unique Rahangdale

Rahul Srinivas

Sumanth Krishnamurthy

Pavan Rajmane

Abel Misrak

A R Nazmus Sakib

Dereje Agonafer

Alok Kumar Lohia

Steven Kummerl

Luu Nguyen
title: Effect of PCB thickness on solder joint reliability of Quad Flat no lead assembly under Power Cycling and Thermal Cycling
venue: 2017 33rd Thermal Measurement, Modeling Management Symposium (SEMI THERM)
year: 2017

abstract: The combination of mechanochemical method and thermal desorption for remediating polychlorinated biphenyls (PCBs) in contaminated soil was tested in this study. The effects of grinding time and heating time on PCB removal efficiency were investigated. The contaminated soil, mixed with CaO powder at a weight ratio of 1:1, was first ground using a planetary ball mill. After 4 h of grinding, the total PCB concentration and its toxic equivalence quantity (TEQ) decreased by 74.6 and 75.8% respectively. Then, after being heated at 500 degC for 60 min, the residual PCBs in mechanochemical thermal treated soil decreased to 247 ng/g, resulting in a removal efficiency of 99.95% The removal effect can be promoted by longer grinding time and heating time; however, increased energy consumption was inevitable. The combination of grinding time and heating time should be optimized in a practical remediation process.
author_names: Zhonghua Zhao

Xiaodong Li

Ming-jiang Ni

Tong Chen

Jian-hua Yan
title: Remediation of PCB contaminated soil using a combination of mechanochemical method and thermal desorption
venue: Environmental Science and Pollution Research
year: 2017