-- DBMS: snowflake
create or replace TABLE SAMPLE_CONTENTS (
	"id" VARCHAR(16777216),
	"size" NUMBER(38,0),
	"content" VARCHAR(16777216),
	"binary" BOOLEAN,
	"copies" NUMBER(38,0),
	"sample_repo_name" VARCHAR(16777216),
	"sample_ref" VARCHAR(16777216),
	"sample_path" VARCHAR(16777216),
	"sample_mode" NUMBER(38,0),
	"sample_symlink_target" VARCHAR(16777216)
);

INSERT INTO "GITHUB_REPOS"."GITHUB_REPOS"."SAMPLE_CONTENTS" (size, binary, sample_symlink_target, copies, sample_mode, sample_path, content, sample_ref, id, sample_repo_name) VALUES (21447, False, NULL, 256, 33188, 'drivers/rtc/rtc-ds1305.c', '/*
 * rtc-ds1305.c -- driver for DS1305 and DS1306 SPI RTC chips
 *
 * Copyright (C) 2008 David Brownell
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/bcd.h>
#include <linux/slab.h>
#include <linux/rtc.h>
#include <linux/workqueue.h>

#include <linux/spi/spi.h>
#include <linux/spi/ds1305.h>
#include <linux/module.h>


/*
 * Registers ... mask DS1305_WRITE into register address to write,
 * otherwise you''re reading it.  All non-bitmask values are BCD.
 */
#define DS1305_WRITE		0x80


/* RTC date/time ... the main special cases are that we:
 *  - Need fancy "hours" encoding in 12hour mode
 *  - Don''t rely on the "day-of-week" field (or tm_wday)
 *  - Are a 21st-century clock (2000 <= year < 2100)
 */
#define DS1305_RTC_LEN		7		/* bytes for RTC regs */

#define DS1305_SEC		0x00		/* register addresses */
#define DS1305_MIN		0x01
#define DS1305_HOUR		0x02
#	define DS1305_HR_12		0x40	/* set == 12 hr mode */
#	define DS1305_HR_PM		0x20	/* set == PM (12hr mode) */
#define DS1305_WDAY		0x03
#define DS1305_MDAY		0x04
#define DS1305_MON		0x05
#define DS1305_YEAR		0x06


/* The two alarms have only sec/min/hour/wday fields (ALM_LEN).
 * DS1305_ALM_DISABLE disables a match field (some combos are bad).
 *
 * NOTE that since we don''t use WDAY, we limit ourselves to alarms
 * only one day into the future (vs potentially up to a week).
 *
 * NOTE ALSO that while we could generate once-a-second IRQs (UIE), we
 * don''t currently support them.  We''d either need to do it only when
 * no alarm is pending (not the standard model), or to use the second
 * alarm (implying that this is a DS1305 not DS1306, *and* that either
 * it''s wired up a second IRQ we know, or that INTCN is set)
 */
#define DS1305_ALM_LEN		4		/* bytes for ALM regs */
#define DS1305_ALM_DISABLE	0x80

#define DS1305_ALM0(r)		(0x07 + (r))	/* register addresses */
#define DS1305_ALM1(r)		(0x0b + (r))


/* three control registers */
#define DS1305_CONTROL_LEN	3		/* bytes of control regs */

#define DS1305_CONTROL		0x0f		/* register addresses */
#	define DS1305_nEOSC		0x80	/* low enables oscillator */
#	define DS1305_WP		0x40	/* write protect */
#	define DS1305_INTCN		0x04	/* clear == only int0 used */
#	define DS1306_1HZ		0x04	/* enable 1Hz output */
#	define DS1305_AEI1		0x02	/* enable ALM1 IRQ */
#	define DS1305_AEI0		0x01	/* enable ALM0 IRQ */
#define DS1305_STATUS		0x10
/* status has just AEIx bits, mirrored as IRQFx */
#define DS1305_TRICKLE		0x11
/* trickle bits are defined in <linux/spi/ds1305.h> */

/* a bunch of NVRAM */
#define DS1305_NVRAM_LEN	96		/* bytes of NVRAM */

#define DS1305_NVRAM		0x20		/* register addresses */


struct ds1305 {
	struct spi_device	*spi;
	struct rtc_device	*rtc;

	struct work_struct	work;

	unsigned long		flags;
#define FLAG_EXITING	0

	bool			hr12;
	u8			ctrl[DS1305_CONTROL_LEN];
};


/*----------------------------------------------------------------------*/

/*
 * Utilities ...  tolerate 12-hour AM/PM notation in case of non-Linux
 * software (like a bootloader) which may require it.
 */

static unsigned bcd2hour(u8 bcd)
{
	if (bcd & DS1305_HR_12) {
		unsigned	hour = 0;

		bcd &= ~DS1305_HR_12;
		if (bcd & DS1305_HR_PM) {
			hour = 12;
			bcd &= ~DS1305_HR_PM;
		}
		hour += bcd2bin(bcd);
		return hour - 1;
	}
	return bcd2bin(bcd);
}

static u8 hour2bcd(bool hr12, int hour)
{
	if (hr12) {
		hour++;
		if (hour <= 12)
			return DS1305_HR_12 | bin2bcd(hour);
		hour -= 12;
		return DS1305_HR_12 | DS1305_HR_PM | bin2bcd(hour);
	}
	return bin2bcd(hour);
}

/*----------------------------------------------------------------------*/

/*
 * Interface to RTC framework
 */

static int ds1305_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
	struct ds1305	*ds1305 = dev_get_drvdata(dev);
	u8		buf[2];
	long		err = -EINVAL;

	buf[0] = DS1305_WRITE | DS1305_CONTROL;
	buf[1] = ds1305->ctrl[0];

	if (enabled) {
		if (ds1305->ctrl[0] & DS1305_AEI0)
			goto done;
		buf[1] |= DS1305_AEI0;
	} else {
		if (!(buf[1] & DS1305_AEI0))
			goto done;
		buf[1] &= ~DS1305_AEI0;
	}
	err = spi_write_then_read(ds1305->spi, buf, sizeof(buf), NULL, 0);
	if (err >= 0)
		ds1305->ctrl[0] = buf[1];
done:
	return err;

}


/*
 * Get/set of date and time is pretty normal.
 */

static int ds1305_get_time(struct device *dev, struct rtc_time *time)
{
	struct ds1305	*ds1305 = dev_get_drvdata(dev);
	u8		addr = DS1305_SEC;
	u8		buf[DS1305_RTC_LEN];
	int		status;

	/* Use write-then-read to get all the date/time registers
	 * since dma from stack is nonportable
	 */
	status = spi_write_then_read(ds1305->spi, &addr, sizeof(addr),
			buf, sizeof(buf));
	if (status < 0)
		return status;

	dev_vdbg(dev, "%s: %02x %02x %02x, %02x %02x %02x %02x\n",
		"read", buf[0], buf[1], buf[2], buf[3],
		buf[4], buf[5], buf[6]);

	/* Decode the registers */
	time->tm_sec = bcd2bin(buf[DS1305_SEC]);
	time->tm_min = bcd2bin(buf[DS1305_MIN]);
	time->tm_hour = bcd2hour(buf[DS1305_HOUR]);
	time->tm_wday = buf[DS1305_WDAY] - 1;
	time->tm_mday = bcd2bin(buf[DS1305_MDAY]);
	time->tm_mon = bcd2bin(buf[DS1305_MON]) - 1;
	time->tm_year = bcd2bin(buf[DS1305_YEAR]) + 100;

	dev_vdbg(dev, "%s secs=%d, mins=%d, "
		"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
		"read", time->tm_sec, time->tm_min,
		time->tm_hour, time->tm_mday,
		time->tm_mon, time->tm_year, time->tm_wday);

	/* Time may not be set */
	return rtc_valid_tm(time);
}

static int ds1305_set_time(struct device *dev, struct rtc_time *time)
{
	struct ds1305	*ds1305 = dev_get_drvdata(dev);
	u8		buf[1 + DS1305_RTC_LEN];
	u8		*bp = buf;

	dev_vdbg(dev, "%s secs=%d, mins=%d, "
		"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
		"write", time->tm_sec, time->tm_min,
		time->tm_hour, time->tm_mday,
		time->tm_mon, time->tm_year, time->tm_wday);

	/* Write registers starting at the first time/date address. */
	*bp++ = DS1305_WRITE | DS1305_SEC;

	*bp++ = bin2bcd(time->tm_sec);
	*bp++ = bin2bcd(time->tm_min);
	*bp++ = hour2bcd(ds1305->hr12, time->tm_hour);
	*bp++ = (time->tm_wday < 7) ? (time->tm_wday + 1) : 1;
	*bp++ = bin2bcd(time->tm_mday);
	*bp++ = bin2bcd(time->tm_mon + 1);
	*bp++ = bin2bcd(time->tm_year - 100);

	dev_dbg(dev, "%s: %02x %02x %02x, %02x %02x %02x %02x\n",
		"write", buf[1], buf[2], buf[3],
		buf[4], buf[5], buf[6], buf[7]);

	/* use write-then-read since dma from stack is nonportable */
	return spi_write_then_read(ds1305->spi, buf, sizeof(buf),
			NULL, 0);
}

/*
 * Get/set of alarm is a bit funky:
 *
 * - First there''s the inherent raciness of getting the (partitioned)
 *   status of an alarm that could trigger while we''re reading parts
 *   of that status.
 *
 * - Second there''s its limited range (we could increase it a bit by
 *   relying on WDAY), which means it will easily roll over.
 *
 * - Third there''s the choice of two alarms and alarm signals.
 *   Here we use ALM0 and expect that nINT0 (open drain) is used;
 *   that''s the only real option for DS1306 runtime alarms, and is
 *   natural on DS1305.
 *
 * - Fourth, there''s also ALM1, and a second interrupt signal:
 *     + On DS1305 ALM1 uses nINT1 (when INTCN=1) else nINT0;
 *     + On DS1306 ALM1 only uses INT1 (an active high pulse)
 *       and it won''t work when VCC1 is active.
 *
 *   So to be most general, we should probably set both alarms to the
 *   same value, letting ALM1 be the wakeup event source on DS1306
 *   and handling several wiring options on DS1305.
 *
 * - Fifth, we support the polled mode (as well as possible; why not?)
 *   even when no interrupt line is wired to an IRQ.
 */

/*
 * Context: caller holds rtc->ops_lock (to protect ds1305->ctrl)
 */
static int ds1305_get_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	struct ds1305	*ds1305 = dev_get_drvdata(dev);
	struct spi_device *spi = ds1305->spi;
	u8		addr;
	int		status;
	u8		buf[DS1305_ALM_LEN];

	/* Refresh control register cache BEFORE reading ALM0 registers,
	 * since reading alarm registers acks any pending IRQ.  That
	 * makes returning "pending" status a bit of a lie, but that bit
	 * of EFI status is at best fragile anyway (given IRQ handlers).
	 */
	addr = DS1305_CONTROL;
	status = spi_write_then_read(spi, &addr, sizeof(addr),
			ds1305->ctrl, sizeof(ds1305->ctrl));
	if (status < 0)
		return status;

	alm->enabled = !!(ds1305->ctrl[0] & DS1305_AEI0);
	alm->pending = !!(ds1305->ctrl[1] & DS1305_AEI0);

	/* get and check ALM0 registers */
	addr = DS1305_ALM0(DS1305_SEC);
	status = spi_write_then_read(spi, &addr, sizeof(addr),
			buf, sizeof(buf));
	if (status < 0)
		return status;

	dev_vdbg(dev, "%s: %02x %02x %02x %02x\n",
		"alm0 read", buf[DS1305_SEC], buf[DS1305_MIN],
		buf[DS1305_HOUR], buf[DS1305_WDAY]);

	if ((DS1305_ALM_DISABLE & buf[DS1305_SEC])
			|| (DS1305_ALM_DISABLE & buf[DS1305_MIN])
			|| (DS1305_ALM_DISABLE & buf[DS1305_HOUR]))
		return -EIO;

	/* Stuff these values into alm->time and let RTC framework code
	 * fill in the rest ... and also handle rollover to tomorrow when
	 * that''s needed.
	 */
	alm->time.tm_sec = bcd2bin(buf[DS1305_SEC]);
	alm->time.tm_min = bcd2bin(buf[DS1305_MIN]);
	alm->time.tm_hour = bcd2hour(buf[DS1305_HOUR]);
	alm->time.tm_mday = -1;
	alm->time.tm_mon = -1;
	alm->time.tm_year = -1;
	/* next three fields are unused by Linux */
	alm->time.tm_wday = -1;
	alm->time.tm_mday = -1;
	alm->time.tm_isdst = -1;

	return 0;
}

/*
 * Context: caller holds rtc->ops_lock (to protect ds1305->ctrl)
 */
static int ds1305_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	struct ds1305	*ds1305 = dev_get_drvdata(dev);
	struct spi_device *spi = ds1305->spi;
	unsigned long	now, later;
	struct rtc_time	tm;
	int		status;
	u8		buf[1 + DS1305_ALM_LEN];

	/* convert desired alarm to time_t */
	status = rtc_tm_to_time(&alm->time, &later);
	if (status < 0)
		return status;

	/* Read current time as time_t */
	status = ds1305_get_time(dev, &tm);
	if (status < 0)
		return status;
	status = rtc_tm_to_time(&tm, &now);
	if (status < 0)
		return status;

	/* make sure alarm fires within the next 24 hours */
	if (later <= now)
		return -EINVAL;
	if ((later - now) > 24 * 60 * 60)
		return -EDOM;

	/* disable alarm if needed */
	if (ds1305->ctrl[0] & DS1305_AEI0) {
		ds1305->ctrl[0] &= ~DS1305_AEI0;

		buf[0] = DS1305_WRITE | DS1305_CONTROL;
		buf[1] = ds1305->ctrl[0];
		status = spi_write_then_read(ds1305->spi, buf, 2, NULL, 0);
		if (status < 0)
			return status;
	}

	/* write alarm */
	buf[0] = DS1305_WRITE | DS1305_ALM0(DS1305_SEC);
	buf[1 + DS1305_SEC] = bin2bcd(alm->time.tm_sec);
	buf[1 + DS1305_MIN] = bin2bcd(alm->time.tm_min);
	buf[1 + DS1305_HOUR] = hour2bcd(ds1305->hr12, alm->time.tm_hour);
	buf[1 + DS1305_WDAY] = DS1305_ALM_DISABLE;

	dev_dbg(dev, "%s: %02x %02x %02x %02x\n",
		"alm0 write", buf[1 + DS1305_SEC], buf[1 + DS1305_MIN],
		buf[1 + DS1305_HOUR], buf[1 + DS1305_WDAY]);

	status = spi_write_then_read(spi, buf, sizeof(buf), NULL, 0);
	if (status < 0)
		return status;

	/* enable alarm if requested */
	if (alm->enabled) {
		ds1305->ctrl[0] |= DS1305_AEI0;

		buf[0] = DS1305_WRITE | DS1305_CONTROL;
		buf[1] = ds1305->ctrl[0];
		status = spi_write_then_read(ds1305->spi, buf, 2, NULL, 0);
	}

	return status;
}

#ifdef CONFIG_PROC_FS

static int ds1305_proc(struct device *dev, struct seq_file *seq)
{
	struct ds1305	*ds1305 = dev_get_drvdata(dev);
	char		*diodes = "no";
	char		*resistors = "";

	/* ctrl[2] is treated as read-only; no locking needed */
	if ((ds1305->ctrl[2] & 0xf0) == DS1305_TRICKLE_MAGIC) {
		switch (ds1305->ctrl[2] & 0x0c) {
		case DS1305_TRICKLE_DS2:
			diodes = "2 diodes, ";
			break;
		case DS1305_TRICKLE_DS1:
			diodes = "1 diode, ";
			break;
		default:
			goto done;
		}
		switch (ds1305->ctrl[2] & 0x03) {
		case DS1305_TRICKLE_2K:
			resistors = "2k Ohm";
			break;
		case DS1305_TRICKLE_4K:
			resistors = "4k Ohm";
			break;
		case DS1305_TRICKLE_8K:
			resistors = "8k Ohm";
			break;
		default:
			diodes = "no";
			break;
		}
	}

done:
	return seq_printf(seq,
			"trickle_charge\t: %s%s\n",
			diodes, resistors);
}

#else
#define ds1305_proc	NULL
#endif

static const struct rtc_class_ops ds1305_ops = {
	.read_time	= ds1305_get_time,
	.set_time	= ds1305_set_time,
	.read_alarm	= ds1305_get_alarm,
	.set_alarm	= ds1305_set_alarm,
	.proc		= ds1305_proc,
	.alarm_irq_enable = ds1305_alarm_irq_enable,
};

static void ds1305_work(struct work_struct *work)
{
	struct ds1305	*ds1305 = container_of(work, struct ds1305, work);
	struct mutex	*lock = &ds1305->rtc->ops_lock;
	struct spi_device *spi = ds1305->spi;
	u8		buf[3];
	int		status;

	/* lock to protect ds1305->ctrl */
	mutex_lock(lock);

	/* Disable the IRQ, and clear its status ... for now, we "know"
	 * that if more than one alarm is active, they''re in sync.
	 * Note that reading ALM data registers also clears IRQ status.
	 */
	ds1305->ctrl[0] &= ~(DS1305_AEI1 | DS1305_AEI0);
	ds1305->ctrl[1] = 0;

	buf[0] = DS1305_WRITE | DS1305_CONTROL;
	buf[1] = ds1305->ctrl[0];
	buf[2] = 0;

	status = spi_write_then_read(spi, buf, sizeof(buf),
			NULL, 0);
	if (status < 0)
		dev_dbg(&spi->dev, "clear irq --> %d\n", status);

	mutex_unlock(lock);

	if (!test_bit(FLAG_EXITING, &ds1305->flags))
		enable_irq(spi->irq);

	rtc_update_irq(ds1305->rtc, 1, RTC_AF | RTC_IRQF);
}

/*
 * This "real" IRQ handler hands off to a workqueue mostly to allow
 * mutex locking for ds1305->ctrl ... unlike I2C, we could issue async
 * I/O requests in IRQ context (to clear the IRQ status).
 */
static irqreturn_t ds1305_irq(int irq, void *p)
{
	struct ds1305		*ds1305 = p;

	disable_irq(irq);
	schedule_work(&ds1305->work);
	return IRQ_HANDLED;
}

/*----------------------------------------------------------------------*/

/*
 * Interface for NVRAM
 */

static void msg_init(struct spi_message *m, struct spi_transfer *x,
		u8 *addr, size_t count, char *tx, char *rx)
{
	spi_message_init(m);
	memset(x, 0, 2 * sizeof(*x));

	x->tx_buf = addr;
	x->len = 1;
	spi_message_add_tail(x, m);

	x++;

	x->tx_buf = tx;
	x->rx_buf = rx;
	x->len = count;
	spi_message_add_tail(x, m);
}

static ssize_t
ds1305_nvram_read(struct file *filp, struct kobject *kobj,
		struct bin_attribute *attr,
		char *buf, loff_t off, size_t count)
{
	struct spi_device	*spi;
	u8			addr;
	struct spi_message	m;
	struct spi_transfer	x[2];
	int			status;

	spi = container_of(kobj, struct spi_device, dev.kobj);

	if (unlikely(off >= DS1305_NVRAM_LEN))
		return 0;
	if (count >= DS1305_NVRAM_LEN)
		count = DS1305_NVRAM_LEN;
	if ((off + count) > DS1305_NVRAM_LEN)
		count = DS1305_NVRAM_LEN - off;
	if (unlikely(!count))
		return count;

	addr = DS1305_NVRAM + off;
	msg_init(&m, x, &addr, count, NULL, buf);

	status = spi_sync(spi, &m);
	if (status < 0)
		dev_err(&spi->dev, "nvram %s error %d\n", "read", status);
	return (status < 0) ? status : count;
}

static ssize_t
ds1305_nvram_write(struct file *filp, struct kobject *kobj,
		struct bin_attribute *attr,
		char *buf, loff_t off, size_t count)
{
	struct spi_device	*spi;
	u8			addr;
	struct spi_message	m;
	struct spi_transfer	x[2];
	int			status;

	spi = container_of(kobj, struct spi_device, dev.kobj);

	if (unlikely(off >= DS1305_NVRAM_LEN))
		return -EFBIG;
	if (count >= DS1305_NVRAM_LEN)
		count = DS1305_NVRAM_LEN;
	if ((off + count) > DS1305_NVRAM_LEN)
		count = DS1305_NVRAM_LEN - off;
	if (unlikely(!count))
		return count;

	addr = (DS1305_WRITE | DS1305_NVRAM) + off;
	msg_init(&m, x, &addr, count, buf, NULL);

	status = spi_sync(spi, &m);
	if (status < 0)
		dev_err(&spi->dev, "nvram %s error %d\n", "write", status);
	return (status < 0) ? status : count;
}

static struct bin_attribute nvram = {
	.attr.name	= "nvram",
	.attr.mode	= S_IRUGO | S_IWUSR,
	.read		= ds1305_nvram_read,
	.write		= ds1305_nvram_write,
	.size		= DS1305_NVRAM_LEN,
};

/*----------------------------------------------------------------------*/

/*
 * Interface to SPI stack
 */

static int ds1305_probe(struct spi_device *spi)
{
	struct ds1305			*ds1305;
	int				status;
	u8				addr, value;
	struct ds1305_platform_data	*pdata = dev_get_platdata(&spi->dev);
	bool				write_ctrl = false;

	/* Sanity check board setup data.  This may be hooked up
	 * in 3wire mode, but we don''t care.  Note that unless
	 * there''s an inverter in place, this needs SPI_CS_HIGH!
	 */
	if ((spi->bits_per_word && spi->bits_per_word != 8)
			|| (spi->max_speed_hz > 2000000)
			|| !(spi->mode & SPI_CPHA))
		return -EINVAL;

	/* set up driver data */
	ds1305 = devm_kzalloc(&spi->dev, sizeof(*ds1305), GFP_KERNEL);
	if (!ds1305)
		return -ENOMEM;
	ds1305->spi = spi;
	spi_set_drvdata(spi, ds1305);

	/* read and cache control registers */
	addr = DS1305_CONTROL;
	status = spi_write_then_read(spi, &addr, sizeof(addr),
			ds1305->ctrl, sizeof(ds1305->ctrl));
	if (status < 0) {
		dev_dbg(&spi->dev, "can''t %s, %d\n",
				"read", status);
		return status;
	}

	dev_dbg(&spi->dev, "ctrl %s: %3ph\n", "read", ds1305->ctrl);

	/* Sanity check register values ... partially compensating for the
	 * fact that SPI has no device handshake.  A pullup on MISO would
	 * make these tests fail; but not all systems will have one.  If
	 * some register is neither 0x00 nor 0xff, a chip is likely there.
	 */
	if ((ds1305->ctrl[0] & 0x38) != 0 || (ds1305->ctrl[1] & 0xfc) != 0) {
		dev_dbg(&spi->dev, "RTC chip is not present\n");
		return -ENODEV;
	}
	if (ds1305->ctrl[2] == 0)
		dev_dbg(&spi->dev, "chip may not be present\n");

	/* enable writes if needed ... if we were paranoid it would
	 * make sense to enable them only when absolutely necessary.
	 */
	if (ds1305->ctrl[0] & DS1305_WP) {
		u8		buf[2];

		ds1305->ctrl[0] &= ~DS1305_WP;

		buf[0] = DS1305_WRITE | DS1305_CONTROL;
		buf[1] = ds1305->ctrl[0];
		status = spi_write_then_read(spi, buf, sizeof(buf), NULL, 0);

		dev_dbg(&spi->dev, "clear WP --> %d\n", status);
		if (status < 0)
			return status;
	}

	/* on DS1305, maybe start oscillator; like most low power
	 * oscillators, it may take a second to stabilize
	 */
	if (ds1305->ctrl[0] & DS1305_nEOSC) {
		ds1305->ctrl[0] &= ~DS1305_nEOSC;
		write_ctrl = true;
		dev_warn(&spi->dev, "SET TIME!\n");
	}

	/* ack any pending IRQs */
	if (ds1305->ctrl[1]) {
		ds1305->ctrl[1] = 0;
		write_ctrl = true;
	}

	/* this may need one-time (re)init */
	if (pdata) {
		/* maybe enable trickle charge */
		if (((ds1305->ctrl[2] & 0xf0) != DS1305_TRICKLE_MAGIC)) {
			ds1305->ctrl[2] = DS1305_TRICKLE_MAGIC
						| pdata->trickle;
			write_ctrl = true;
		}

		/* on DS1306, configure 1 Hz signal */
		if (pdata->is_ds1306) {
			if (pdata->en_1hz) {
				if (!(ds1305->ctrl[0] & DS1306_1HZ)) {
					ds1305->ctrl[0] |= DS1306_1HZ;
					write_ctrl = true;
				}
			} else {
				if (ds1305->ctrl[0] & DS1306_1HZ) {
					ds1305->ctrl[0] &= ~DS1306_1HZ;
					write_ctrl = true;
				}
			}
		}
	}

	if (write_ctrl) {
		u8		buf[4];

		buf[0] = DS1305_WRITE | DS1305_CONTROL;
		buf[1] = ds1305->ctrl[0];
		buf[2] = ds1305->ctrl[1];
		buf[3] = ds1305->ctrl[2];
		status = spi_write_then_read(spi, buf, sizeof(buf), NULL, 0);
		if (status < 0) {
			dev_dbg(&spi->dev, "can''t %s, %d\n",
					"write", status);
			return status;
		}

		dev_dbg(&spi->dev, "ctrl %s: %3ph\n", "write", ds1305->ctrl);
	}

	/* see if non-Linux software set up AM/PM mode */
	addr = DS1305_HOUR;
	status = spi_write_then_read(spi, &addr, sizeof(addr),
				&value, sizeof(value));
	if (status < 0) {
		dev_dbg(&spi->dev, "read HOUR --> %d\n", status);
		return status;
	}

	ds1305->hr12 = (DS1305_HR_12 & value) != 0;
	if (ds1305->hr12)
		dev_dbg(&spi->dev, "AM/PM\n");

	/* register RTC ... from here on, ds1305->ctrl needs locking */
	ds1305->rtc = devm_rtc_device_register(&spi->dev, "ds1305",
			&ds1305_ops, THIS_MODULE);
	if (IS_ERR(ds1305->rtc)) {
		status = PTR_ERR(ds1305->rtc);
		dev_dbg(&spi->dev, "register rtc --> %d\n", status);
		return status;
	}

	/* Maybe set up alarm IRQ; be ready to handle it triggering right
	 * away.  NOTE that we don''t share this.  The signal is active low,
	 * and we can''t ack it before a SPI message delay.  We temporarily
	 * disable the IRQ until it''s acked, which lets us work with more
	 * IRQ trigger modes (not all IRQ controllers can do falling edge).
	 */
	if (spi->irq) {
		INIT_WORK(&ds1305->work, ds1305_work);
		status = devm_request_irq(&spi->dev, spi->irq, ds1305_irq,
				0, dev_name(&ds1305->rtc->dev), ds1305);
		if (status < 0) {
			dev_dbg(&spi->dev, "request_irq %d --> %d\n",
					spi->irq, status);
			return status;
		}

		device_set_wakeup_capable(&spi->dev, 1);
	}

	/* export NVRAM */
	status = sysfs_create_bin_file(&spi->dev.kobj, &nvram);
	if (status < 0) {
		dev_dbg(&spi->dev, "register nvram --> %d\n", status);
		return status;
	}

	return 0;
}

static int ds1305_remove(struct spi_device *spi)
{
	struct ds1305 *ds1305 = spi_get_drvdata(spi);

	sysfs_remove_bin_file(&spi->dev.kobj, &nvram);

	/* carefully shut down irq and workqueue, if present */
	if (spi->irq) {
		set_bit(FLAG_EXITING, &ds1305->flags);
		devm_free_irq(&spi->dev, spi->irq, ds1305);
		cancel_work_sync(&ds1305->work);
	}

	return 0;
}

static struct spi_driver ds1305_driver = {
	.driver.name	= "rtc-ds1305",
	.driver.owner	= THIS_MODULE,
	.probe		= ds1305_probe,
	.remove		= ds1305_remove,
	/* REVISIT add suspend/resume */
};

module_spi_driver(ds1305_driver);

MODULE_DESCRIPTION("RTC driver for DS1305 and DS1306 chips");
MODULE_LICENSE("GPL");
MODULE_ALIAS("spi:rtc-ds1305");
', 'refs/heads/master', '2dd586a19b594a73e9c6f7485d1e5da9203a4467', 'wandboard-org/linux'), (3974, False, NULL, 1, 33188, 'drivers/devfreq/governor_simpleondemand.c', '/*
 *  linux/drivers/devfreq/governor_simpleondemand.c
 *
 *  Copyright (C) 2011 Samsung Electronics
 *	MyungJoo Ham <myungjoo.ham@samsung.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/errno.h>
#include <linux/module.h>
#include <linux/devfreq.h>
#include <linux/math64.h>
#include "governor.h"

/* Default constants for DevFreq-Simple-Ondemand (DFSO) */
#define DFSO_UPTHRESHOLD	(90)
#define DFSO_DOWNDIFFERENCTIAL	(10)
static int devfreq_simple_ondemand_func(struct devfreq *df,
					unsigned long *freq,
					u32 *flag)
{
	struct devfreq_dev_status stat;
	int err;
	unsigned long long a, b;
	unsigned int dfso_upthreshold = DFSO_UPTHRESHOLD;
	unsigned int dfso_downdifferential = DFSO_DOWNDIFFERENCTIAL;
	struct devfreq_simple_ondemand_data *data = df->data;
	unsigned long max = (df->max_freq) ? df->max_freq : UINT_MAX;
	unsigned long min = (df->min_freq) ? df->min_freq : 0;

	stat.private_data = NULL;

	err = df->profile->get_dev_status(df->dev.parent, &stat);
	if (err)
		return err;

	if (data) {
		if (data->upthreshold)
			dfso_upthreshold = data->upthreshold;
		if (data->downdifferential)
			dfso_downdifferential = data->downdifferential;
	}
	if (dfso_upthreshold > 100 ||
	    dfso_upthreshold < dfso_downdifferential)
		return -EINVAL;

	/* Prevent overflow */
	if (stat.busy_time >= (1 << 24) || stat.total_time >= (1 << 24)) {
		stat.busy_time >>= 7;
		stat.total_time >>= 7;
	}

	if (data && data->simple_scaling) {
		if (stat.busy_time * 100 >
		    stat.total_time * dfso_upthreshold)
			*freq = max;
		else if (stat.busy_time * 100 <
			 stat.total_time *
			 (dfso_upthreshold - dfso_downdifferential))
			*freq = min;
		else
			*freq = df->previous_freq;
		return 0;
	}

	/* Assume MAX if it is going to be divided by zero */
	if (stat.total_time == 0) {
		*freq = max;
		return 0;
	}

	/* Set MAX if it''s busy enough */
	if (stat.busy_time * 100 >
	    stat.total_time * dfso_upthreshold) {
		*freq = max;
		return 0;
	}

	/* Set MAX if we do not know the initial frequency */
	if (stat.current_frequency == 0) {
		*freq = max;
		return 0;
	}

	/* Keep the current frequency */
	if (stat.busy_time * 100 >
	    stat.total_time * (dfso_upthreshold - dfso_downdifferential)) {
		*freq = stat.current_frequency;
		return 0;
	}

	/* Set the desired frequency based on the load */
	a = stat.busy_time;
	a *= stat.current_frequency;
	b = div_u64(a, stat.total_time);
	b *= 100;
	b = div_u64(b, (dfso_upthreshold - dfso_downdifferential / 2));
	*freq = (unsigned long) b;

	if (df->min_freq && *freq < df->min_freq)
		*freq = df->min_freq;
	if (df->max_freq && *freq > df->max_freq)
		*freq = df->max_freq;

	return 0;
}

static int devfreq_simple_ondemand_handler(struct devfreq *devfreq,
				unsigned int event, void *data)
{
	switch (event) {
	case DEVFREQ_GOV_START:
		devfreq_monitor_start(devfreq);
		break;

	case DEVFREQ_GOV_STOP:
		devfreq_monitor_stop(devfreq);
		break;

	case DEVFREQ_GOV_INTERVAL:
		devfreq_interval_update(devfreq, (unsigned int *)data);
		break;

	case DEVFREQ_GOV_SUSPEND:
		devfreq_monitor_suspend(devfreq);
		break;

	case DEVFREQ_GOV_RESUME:
		devfreq_monitor_resume(devfreq);
		break;

	default:
		break;
	}

	return 0;
}

static struct devfreq_governor devfreq_simple_ondemand = {
	.name = "simple_ondemand",
	.get_target_freq = devfreq_simple_ondemand_func,
	.event_handler = devfreq_simple_ondemand_handler,
};

static int __init devfreq_simple_ondemand_init(void)
{
	return devfreq_add_governor(&devfreq_simple_ondemand);
}
subsys_initcall(devfreq_simple_ondemand_init);

static void __exit devfreq_simple_ondemand_exit(void)
{
	int ret;

	ret = devfreq_remove_governor(&devfreq_simple_ondemand);
	if (ret)
		pr_err("%s: failed remove governor %d\n", __func__, ret);

	return;
}
module_exit(devfreq_simple_ondemand_exit);
MODULE_LICENSE("GPL");
', 'refs/heads/M', '816b2d7412b432d86a4a36147255ec664f760193', 'garwedgess/android_kernel_lge_g4'), (7866, False, NULL, 1, 33188, 'src/router/tests/test_uri.cc', '/*
  Copyright (c) 2015, Oracle and/or its affiliates. All rights reserved.

  This program is free software; you can redistribute it and/or modify
  it under the terms of the GNU General Public License as published by
  the Free Software Foundation; version 2 of the License.

  This program is distributed in the hope that it will be useful,
  but WITHOUT ANY WARRANTY; without even the implied warranty of
  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  GNU General Public License for more details.

  You should have received a copy of the GNU General Public License
  along with this program; if not, write to the Free Software
  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
*/

#include "gtest/gtest.h"
#include "gmock/gmock.h"

#include <exception>

#define private public
#include "mysqlrouter/uri.h"

using std::get;
using ::testing::StrEq;
using ::testing::ContainerEq;
using ::testing::IsEmpty;
using mysqlrouter::URI;
using mysqlrouter::URIError;
using mysqlrouter::URIQuery;
using mysqlrouter::URIAuthority;
using mysqlrouter::URIPath;
using mysqlrouter::URIQuery;

using mysqlrouter::URI;
using mysqlrouter::URIError;
using mysqlrouter::URIQuery;
using mysqlrouter::URIAuthority;
using mysqlrouter::URIPath;
using mysqlrouter::t_parse_scheme;
using mysqlrouter::t_parse_authority;
using mysqlrouter::t_parse_path;
using mysqlrouter::t_parse_query;
using mysqlrouter::t_parse_fragment;

class URITests: public ::testing::Test {
protected:
  virtual void SetUp() {
  }
};

TEST_F(URITests, Constructor)
{
  URI u;
  ASSERT_TRUE(u.scheme.empty());
  ASSERT_TRUE(u.host.empty());
  ASSERT_EQ(u.port, 0);
  ASSERT_TRUE(u.username.empty());
  ASSERT_TRUE(u.password.empty());
  ASSERT_TRUE(u.path.empty());
  ASSERT_TRUE(u.query.empty());
  ASSERT_TRUE(u.fragment.empty());
}

TEST_F(URITests, ParseScheme)
{
  URI u;
  ASSERT_THAT(mysqlrouter::t_parse_scheme("ham:"), StrEq("ham"));
  ASSERT_THAT(mysqlrouter::t_parse_scheme("HAM:"), StrEq("ham"));
  ASSERT_THAT(mysqlrouter::t_parse_scheme("MySQL+Fabric:"), StrEq("mysql+fabric"));
  ASSERT_THAT(mysqlrouter::t_parse_scheme("MySQL.Fabric:"), StrEq("mysql.fabric"));
  ASSERT_THAT(mysqlrouter::t_parse_scheme("MySQL-Fabric:"), StrEq("mysql-fabric"));
}

TEST_F(URITests, ParseSchemeFail)
{
  ASSERT_THROW(mysqlrouter::t_parse_scheme("ham"), URIError);
  ASSERT_THROW(mysqlrouter::t_parse_scheme("ham$$:"), URIError);
}

TEST_F(URITests, ParseAuthority)
{
  URIAuthority auth;

  auth = mysqlrouter::t_parse_authority("ham://spam.example.com");
  ASSERT_THAT(get<0>(auth), StrEq("spam.example.com"));
  ASSERT_EQ(get<1>(auth), 0);
  ASSERT_TRUE(get<2>(auth).empty());
  ASSERT_TRUE(get<3>(auth).empty());

  auth = mysqlrouter::t_parse_authority("ham://spam.example.com");
  ASSERT_THAT(get<0>(auth), StrEq("spam.example.com"));

  auth = mysqlrouter::t_parse_authority("ham://scott@spam.example.com/");
  ASSERT_THAT(get<0>(auth), StrEq("spam.example.com"));
  ASSERT_THAT(get<2>(auth), StrEq("scott"));
  ASSERT_TRUE(get<3>(auth).empty());

  auth = mysqlrouter::t_parse_authority("ham://scott:@spam.example.com/");
  ASSERT_THAT(get<0>(auth), StrEq("spam.example.com"));
  ASSERT_THAT(get<2>(auth), StrEq("scott"));
  ASSERT_TRUE(get<3>(auth).empty());

  auth = mysqlrouter::t_parse_authority("ham://:@spam.example.com");
  ASSERT_THAT(get<0>(auth), StrEq("spam.example.com"));
  ASSERT_TRUE(get<2>(auth).empty());
  ASSERT_TRUE(get<3>(auth).empty());

  auth = mysqlrouter::t_parse_authority("ham://scott:tiger@spam.example.com:3306/");
  ASSERT_THAT(get<0>(auth), StrEq("spam.example.com"));
  ASSERT_EQ(get<1>(auth), 3306);
  ASSERT_THAT(get<2>(auth), StrEq("scott"));
  ASSERT_THAT(get<3>(auth), StrEq("tiger"));

  auth = mysqlrouter::t_parse_authority("ham://spam.example.com:/");
  ASSERT_EQ(get<1>(auth), 0);
  auth = mysqlrouter::t_parse_authority("ham://spam.example.com:3306/");
  ASSERT_EQ(get<1>(auth), 3306);
}

TEST_F(URITests, ParseAuthorityFail)
{
  ASSERT_THROW(mysqlrouter::t_parse_authority("ham"), URIError);
  ASSERT_THROW(mysqlrouter::t_parse_authority("ham://spam.example.com:999999/"), URIError);
  ASSERT_THROW(mysqlrouter::t_parse_authority("ham://:3306/"), URIError);
}

TEST_F(URITests, ParseAuthorityEmpty)
{
  URIAuthority a = mysqlrouter::t_parse_authority("ham://");
  ASSERT_THAT(get<0>(a), StrEq(""));
  a = mysqlrouter::t_parse_authority("ham:///");
  ASSERT_THAT(get<0>(a), StrEq(""));
}

TEST_F(URITests, ParsePath)
{
  URIPath p;
  p = mysqlrouter::t_parse_path("ham://scott:tiger@spam.example.com:3306/the/way/to/go");
  ASSERT_THAT(p.at(0), StrEq("the"));
  ASSERT_THAT(p.at(1), StrEq("way"));
  ASSERT_THAT(p.at(2), StrEq("to"));
  ASSERT_THAT(p.at(3), StrEq("go"));
  ASSERT_THROW(p.at(4), std::out_of_range);
  p.clear();
  
  p = mysqlrouter::t_parse_path("ham://scott:tiger@spam.example.com:3306/withslashatend/");
  ASSERT_THAT(p.at(0), StrEq("withslashatend"));
  ASSERT_THROW(p.at(1), std::out_of_range);
  p.clear();
  
  p = mysqlrouter::t_parse_path("ham://scott:tiger@spam.example.com:3306/double//slash/");
  ASSERT_THAT(p.at(0), StrEq("double"));
  ASSERT_THAT(p.at(1), StrEq("slash"));
  ASSERT_THROW(p.at(2), std::out_of_range);
  p.clear();
  
  p = mysqlrouter::t_parse_path("file:///path/to/file");
  ASSERT_THAT(p.at(2), StrEq("file"));
  p.clear();
  p = mysqlrouter::t_parse_path("ham://example.com");
  ASSERT_THROW(p.at(0), std::out_of_range);
  p.clear();
  
  p = mysqlrouter::t_parse_path("ham://example.com/path/to/?key1=val2");
  ASSERT_THAT(p.at(0), StrEq("path"));
  ASSERT_THAT(p.at(1), StrEq("to"));
  ASSERT_THROW(p.at(2), std::out_of_range);
  p.clear();
}

TEST_F(URITests, ParsePathFail)
{
  ASSERT_THROW(mysqlrouter::t_parse_path("ham"), URIError);
}

TEST_F(URITests, ParseQuery)
{
  URIQuery q;

  q = mysqlrouter::t_parse_query("ham://example.com?key1=val1&key2=val2", URI::query_delimiter);
  ASSERT_THAT(q["key1"], StrEq("val1"));
  ASSERT_THAT(q["key2"], StrEq("val2"));
  
  q = mysqlrouter::t_parse_query("ham://example.com/path/to/?key1=val1&key2=", ''&'');
  ASSERT_THAT(q["key1"], StrEq("val1"));
  ASSERT_THAT(q["key2"], StrEq(""));
  
  q = mysqlrouter::t_parse_query("ham://example.com?key1=val1#foo");
  ASSERT_THAT(q["key1"], StrEq("val1"));
}

TEST_F(URITests, ParseQueryFail)
{
  std::string f;
  
  f = mysqlrouter::t_parse_fragment("ham://example.com?key1=val1#foo");
  ASSERT_THAT(f, StrEq("foo"));
  
  f = mysqlrouter::t_parse_fragment("ham://example.com#foo");
  ASSERT_THAT(f, StrEq("foo"));
  
  f = mysqlrouter::t_parse_fragment("ham://example.com#");
  ASSERT_TRUE(f.empty());
  
  f = mysqlrouter::t_parse_fragment("ham://example.com");
  ASSERT_TRUE(f.empty());
}

TEST_F(URITests, ParseFragmentFail)
{
  ASSERT_THROW(mysqlrouter::t_parse_fragment("ham"), URIError);
}

TEST_F(URITests, ConstructorWithURI)
{
  URI u("ham://scott:tiger@host.example.com:3306/path/to/sys?key1=val1");
  ASSERT_THAT(u.scheme, StrEq("ham"));
  ASSERT_THAT(u.username, StrEq("scott"));
  ASSERT_THAT(u.password, StrEq("tiger"));
  ASSERT_THAT(u.host, StrEq("host.example.com"));
  ASSERT_EQ(u.port, 3306);
  ASSERT_THAT(u.path.at(0), StrEq("path"));
  ASSERT_THAT(u.path.at(1), StrEq("to"));
  ASSERT_THAT(u.path.at(2), StrEq("sys"));
  ASSERT_THAT(u.query["key1"], StrEq("val1"));
}

TEST_F(URITests, ConstructorWithURIFail)
{
  ASSERT_THROW(new URI("ham$$://scott:tiger@host.example.com:3306/path/to/sys?key1=val1"), URIError);
}

TEST_F(URITests, SetURI)
{
  URI u("ham://scott:tiger@host.example.com:3306/path/to/sys?key1=val1");
  u.set_uri("spam://spamhost.example.com");
  ASSERT_EQ(u.scheme, string("spam"));
  ASSERT_EQ(u.host, string("spamhost.example.com"));
  ASSERT_EQ(u.port, 0);
  ASSERT_EQ(u.username, string());
  ASSERT_EQ(u.password, string());
  ASSERT_THAT(u.path, IsEmpty());
  ASSERT_THAT(u.query, IsEmpty());
  ASSERT_EQ(u.fragment, string());
}
', 'refs/heads/2.0', 'f50a76cff9f42438026c7cf8bba687bcd2d491ea', 'mysql/mysql-router'), (903, False, NULL, 1, 33188, 'plugins/User/src/Notification/Message/PasswordRequestMessage.php', '<?php
/**
 * Licensed under The GPL-3.0 License
 * For full copyright and license information, please see the LICENSE.txt
 * Redistributions of files must retain the above copyright notice.
 *
 * @since    2.0.0
 * @author   Christopher Castro <chris@quickapps.es>
 * @link     http://www.quickappscms.org
 * @license  http://opensource.org/licenses/gpl-3.0.html GPL-3.0 License
 */
namespace User\Notification\Message;

use User\Model\Entity\User;
use User\Notification\Message\BaseMessage;

/**
 * Sends instructions for the "password recovery" process.
 *
 */
class PasswordRequestMessage extends BaseMessage
{

    /**
     * {@inheritDoc}
     */
    public function send()
    {
        $this
            ->subject(plugin(''User'')->settings[''message_password_recovery_subject''])
            ->body(plugin(''User'')->settings[''message_password_recovery_body'']);
        return parent::send();
    }
}
', 'refs/heads/2.0', '8e0ab7a402ed401e4a92a0933d211dada21b4508', 'quickapps/cms'), (1444, False, NULL, 1, 33188, 'plugins/BackendTheme/src/Template/Element/settings.ctp', '<?php
/**
 * Licensed under The GPL-3.0 License
 * For full copyright and license information, please see the LICENSE.txt
 * Redistributions of files must retain the above copyright notice.
 *
 * @since    2.0.0
 * @author   Christopher Castro <chris@quickapps.es>
 * @link     http://www.quickappscms.org
 * @license  http://opensource.org/licenses/gpl-3.0.html GPL-3.0 License
 */

$skins = [
    ''black'' => ''Black'',
    ''black-light'' => ''Black Light'',
    ''blue'' => ''Blue'',
    ''blue-light'' => ''Blue Light'',
    ''green'' => ''Green'',
    ''green-light'' => ''Green Light'',
    ''purple'' => ''Purple'',
    ''purple-light'' => ''Purple Light'',
    ''red'' => ''Red'',
    ''red-light'' => ''Red Light'',
    ''yellow'' => ''Yellow'',
    ''yellow-light'' => ''Yellow Light'',
];
?>

<fieldset>
    <legend><?php echo __d(''backend_theme'', ''Layout Options''); ?></legend>
    <?php echo $this->Form->input(''fixed_layout'', [''type'' => ''checkbox'', ''label'' => __d(''backend_theme'', ''Fixed Layout'')]); ?>
    <?php echo $this->Form->input(''boxed_layout'', [''type'' => ''checkbox'', ''label'' => __d(''backend_theme'', ''Boxed Layout'')]); ?>
    <?php echo $this->Form->input(''collapsed_sidebar'', [''type'' => ''checkbox'', ''label'' => __d(''backend_theme'', ''Collapsed Sidebar'')]); ?>
</fieldset>

<fieldset>
    <legend><?php echo __d(''backend_theme'', ''Skins''); ?></legend>
    <?php echo $this->Form->input(''skin'', [''type'' => ''select'', ''options'' => $skins, ''label'' => false]); ?>
</fieldset>
', 'refs/heads/2.0', '9281ba3801cf1a02af6ea13bebdc19a41d48b463', 'quickapps/cms');