A Case for NOW (Networks Of Workstations)
Networks of workstations are poised to become the primary computing infrastructure for science and engineering. NOWs may dramatically improve virtual memory and file system performance; achieve cheap, highly available, and scalable file storage: and provide multiple CPUs for parallel computing. Hurdles that remain include efficient communication hardware and software, global coordination of multiple workstation operating systems, and enterprise-scale network file systems. Our 100-node NOW prototype aims to demonstrate practical solutions to these challenges.

title: Reduced instruction set computers
abstract: Reduced instruction set computers aim for both simplicity in hardware and synergy between architectures and compilers. Optimizing compilers are used to compile programming languages down to instructions that are as unencumbered as microinstructions in a large virtual address space, and to make the instruction cycle time as fast as possible.

title: LogP: towards a realistic model of parallel computation
abstract: A vast body of theoretical research has focused either on overly simplistic models of parallel computation, notably the PRAM, or overly specific models that have few representatives in the real wor...

title: The Design of XPRS
abstract: 1.1. High Performance This paper presents an overview of the techniques we are using to build a DBMS at Berkeley that will simultaneously provide high performance and high availability in transaction processing environments, in applications with complex ad-hoc queries and in applications with large objects such as images or CAD layouts. We plan to achieve these goals using a general purpose DBMS and operating system and a shared memory multiprocessor. The hardware and software tactics which we are using to accomplish these goals are described in this paper and include a novel “fast path” feature, a special purpose concurrency control scheme, a twodimensional file system, exploitation of parallelism and a novel method to efficiently mirror disks. We strive for high performance in three different application areas: 1) transaction processing 2) complex ad-hoc queries 3) management of large objects

title: A case for redundant arrays of inexpensive disks (RAID)
abstract: Increasing performance of CPUs and memories will be squandered if not matched by a similar performance increase in I/O. While the capacity of Single Large Expensive Disks (SLED) has grown rapidly, the performance improvement of SLED has been modest. Redundant Arrays of Inexpensive Disks (RAID), based on the magnetic disk technology developed for personal computers, offers an attractive alternative to SLED, promising improvements of an order of magnitude in performance, reliability, power consumption, and scalability. This paper introduces five levels of RAIDs, giving their relative cost/performance, and compares RAID to an IBM 3380 and a Fujitsu Super Eagle.

title: RISC I: a reduced instruction set VLSI computer
abstract: The Reduced Instruction Set Computer (RISC) Project investigates an alternative to the general trend toward computers with increasingly complex instruction sets: With a proper set of instructions and a corresponding architectural design, a machine with a high effective throughput can be achieved. The simplicity of the instruction set and addressing modes allows most instructions to execute in a single machine cycle, and the simplicity of each instruction guarantees a short cycle time. In addition, such a machine should have a much shorter design time.
 This paper presents the architecture of RISC I and its novel hardware support scheme for procedure call/return. Overlapping sets of register banks that can pass parameters directly to subroutines are largely responsible for the excellent performance of RISC I. Static and dynamic comparisons between this new architecture and more traditional machines are given. Although instructions are simpler, the average length of programs was found not to exceed programs for DEC VAX 11 by more than a factor of 2. Preliminary benchmarks demonstrate the performance advantages of RISC. It appears possible to build a single chip computer faster than VAX 11/780.

title: Hot links
abstract: A CM provides a large number of online resources for its members, some of which you may not be aware of. In an attempt to rectify this situation, we are introducing a monthly column listing the most popular downloads in three categories: refereed journal and conference papers, magazines and survey articles, and online courses. The three tables show the top 10 papers, articles, and courses ranked each month (this column reflects July 2004 statistics), and then how those top 10 fared over the prior year (July 2004 to July 2003). If you see something you’d like to read and don’t recall your ACM login and password, just follow the friendly links on portal.acm.org to establish a new account. An email verification will then be sent to you to activate your Web account. If you haven’t requested the online option as part of your membership and wish to add it, you can do so from the ACM home page at www.acm.org. Click on the orange box “Subscribe to Publications” on the upper right-hand side of the screen and select “Digital Library.” Refereed journal and conference papers repreHot Links David A. Patterson Hot Links