A Performance Study of Secure Data Mining on the Cell Processor
This paper examines the potential of the Cell processor as a platform for secure data mining on the future volunteer computing systems. Volunteer computing platforms have the potential to provide massive computing power. However, privacy and security concerns prevent using volunteer computing for data mining of sensitive data. The Cell processor comes with a hardware security feature. The secure volunteer data mining can be achieved by using this hardware security feature. In this paper, we present a general security scheme for the volunteer computing, and a secure parallelized K-Means clustering algorithm for the Cell processor. We also evaluate the performance of the algorithm on the Cell secure system simulator. Evaluation results indicate that the proposed secure data clustering outperforms a non-secure clustering algorithm on the general purpose CPU, but incurs a huge performance overhead introduced by the decryption process of the Cell security features.

title: A Reliability Model for Result Checking in Volunteer Computing
abstract: Large scale volunteer computing has been proved to be an efficient mechanism to solve the complicated problems. Specifically, in such a system, thousands of idle computers on the network are organized to finish a series of tasks dispatched by a central server. However, this computing model is vulnerable to attack from malicious peers returning incorrect results, since it is impossible to check each of thousands of the results. To address this problem, we propose a scheme to evaluate the reliability of each peer, and hence to distinguish whether the peer is honest or malicious. Specifically, the task dispatching pattern is changed so that the results returned from a peer can reflect the type of this peer. We focus on a typical dispatching pattern, and analyze its performance both theoretically and experimentally. The results indicate that the proposed scheme can effectively differentiate the malicious peers for most of the reasonable situations.

title: A Workflow Management Mechanism for Peer-to-Peer Computing Platforms
abstract: This paper proposes a workflow management mechanism to address a neglected aspect of existing P2P computing platforms – the lack of support for various computational models. In the workflow management mechanism, a workflow description file is used to define the workflow diagram of the target application. We develop a prototype system, and evaluate it using a test program to demonstrate how the workflow management mechanism effectively works.

title: Register renaming and scheduling for dynamic execution of predicated code
abstract: To achieve higher processor performance requires greater synergy between advanced hardware features and innovative compiler techniques. Recent advancement in compilation techniques for predicated execution has provided significant opportunity in exploiting instruction level parallelism. However, little research has been done on how to efficiently execute predicated code in a dynamic microarchitecture. In this paper, we evaluate hardware optimizations for executing predicated code on a dynamically scheduled microarchitecture. We provide two novel ideas to improve the efficiency of executing predicated code. On a generic Intel Itanium processor pipeline model, we demonstrate that, with some microarchitecture enhancements, a dynamic execution processor can achieve about 16% performance improvement over an equivalent static execution processor.

title: Distribution function tracking filter design using hybrid characteristic functions
abstract: A new tracking filtering algorithm for a class of multivariate dynamic stochastic systems is presented. The system is expressed by a set of time-varying discrete systems with non-Gaussian stochastic input and nonlinear output. A new concept, such as hybrid characteristic function, is introduced to describe the stochastic nature of the dynamic conditional estimation errors, where the key idea is to ensure the distribution of the conditional estimation error to follow a target distribution. For this purpose, the relationships between the hybrid characteristic functions of the multivariate stochastic input and the outputs, and the properties of the hybrid characteristic function, are established. A new performance index of the tracking filter is then constructed based on the form of the hybrid characteristic function of the conditional estimation error. An analytical solution, which guarantees the filter gain matrix to be an optimal one, is then obtained. A simulation case study is included to show the effectiveness of the proposed algorithm, and encouraging results have been obtained.

title: Real-time pose estimation for outdoor mobile robots using range data
abstract: Pose estimation is a key issue in mobile robots and important to moving object tracking. In this paper, we present a tangent based hybrid pose estimation algorithm with real-time performance using range data from laser radar, which consists of Iterative Tangent weighted Closest Point (ITCP) and Hough transform based Tangent Angle Histogram (HTAH) algorithms to overcome problems with past methods, such as local minimum, aperture-like, and high computation problems. The algorithm has been tested on both synthetic and real range data in outdoor environments. Experimental results demonstrate its high accuracy, low computation, wide applicability and high robustness to aperture-like problems, occlusion and noise.

title: A Scalable Pipelined Associative SIMD Array with Reconfigurable PE Interconnection Network for Embedded Applications
abstract: This paper describes the FPGA implementation of a specialized SIMD processor array for embedded applications. An alternative to traditional SoC or MPSoC architectures, this array combines the massive parallelism inherent in SIMD architectures with the search capabilities of associative computing, producing a SIMD Processor Array System on a Chip (PASoC) well suited for applications such as data mining and bioinformatics. This paper first describes the architecture of the system, and then the pipelining of the processing elements and the addition of a reconfigurable interconnection network. Finally, the paper concludes with a brief description of a string-matching algorithm that can be used for the applications cited above.

title: Analysis of DC characteristics of GaAs double heterojunction bipolar transistors (DHBTs) with a pseudomorphic GaAsSb base
abstract: In this paper, DC characteristics in GaAs DHBTs with pseudomorphic GaAsSb base layer are investigated using an analytical approach. Devices using different GaAs 1− x Sb x base thickness with different Sb compositions were simulated to gain an in-depth understanding on the effect of base layer design on the device DC performance. Our calculated results show that, in the GaAsSb base with high Sb composition, the strain plays a non-negligible role in determining the overall device performance. The reduction of B–E turn-on voltage using a large Sb composition of GaAs 1− x Sb x could be partially compensated by strain in the base. Furthermore, for the devices using high Sb composition, a thin base layer has to be used to ensure elastic strain. In order to maintain reasonable base conductivity that is critical for device microwave performance, high base doping is required. However, our simulation reveals a drastic reduction of DC gain with the increase in base doping, while a high emitter doping may be helpful for the compensation of the degradation of β. A proper design of the device structure by taking the aforementioned issues into account is important for improving device DC and microwave performance.