Throughput Aware Mapping for Network on Chip Design of H.264 Decoder
Network-on-Chip (NoC) has been proposed as a new methodology for addressing the design challenges of future massly integrated system in nanoscale. In this paper, we present the queuing theory based model for router to evaluate the performance of NoC in terms of drop probability, throughput and energy consumption. Then we apply the linear programming to optimize the allocation of the heterogeneously functional blocks (IPs) onto the given heterogeneous NoC architecture so as to obtain the maximum throughput as well as to optimize the energy dissipation of whole system. Finally, the three differently heterogenous Tree-based network topologies are proposed as the NoC architectures for the study case of H.264 Decoder. This paper also evaluates the proposed topologies by comparing them to other conventional topologies such as 2-D Mesh and Fat-Tree with respects to throughput, power consumption and size. We use the power modelling tool, known as Orion model to calculate the static powers, areas, and dynamic powers of three topologies. The experiment results show that our Tree-based topologies offer similar throughputs as Fat-Tree does and much higher throughputs compared to 2-D Mesh while use less chip areas and energy consumptions.

title: Designing On-Chip Network Based on Optimal Latency Criteria
abstract: A new chip design paradigm, so called Network on Chip, has been introduced based on the demand of integration of many heterogeneous semiconductor intellectual property (IP) blocks. The Network on Chip design not only requires the good performance but also the minimization of several physical constraints such as the network latency, the used area as well as the power consumption of design. This paper analyzes the average latency of heterogeneous Network on Chip architectures in which the shortest path routing algorithm is applied. This average latency includes the queuing latency and the wire latency, and is calculated for general cases of allocating IPs onto the fixed generic switching architectures such as 2-D Mesh and Fat-Tree. With different allocation schemes of IPs, the network has different average latencies. Hence, this article presents an optimal search that adopts the Branch and Bound algorithm to find out the optimal mapping scheme to achieve the minimal network latency. This algorithm automatically map the desired IPs onto the target Network on Chip architecture with the criteria of lowest network latency. Some experiments of On Chip Multiprocessor Network application are simulated. The results show that the network latency is significantly saved with the optimized allocation scheme for the several cases of generic architectures of On Chip Multiprocessor Network application.

title: Analyzing the Performance of Mesh and Fat-Tree Topologies for Network on Chip Design
abstract: The demand of integration of many heterogeneous semiconductor intellectual property (IP) blocks has been introducing a new chip design paradigm so called on chip network. This paradigm promisingly offers a packet switched network among IPs to reduce the main problems in the very deep sub micron technologies that arise from non-scalable global wire delay, failure to achieve global synchronization, errors due to the signal integrity, non-scalable bus based functional interconnection, etc. This paper introduces interconnected or switched network topologies and also analyze their performances in terms of communication protocol related to the issues such as routing strategy, buffer size, routing algorithm , etc. The above mentioned evaluations are done by utilizing the tool that has been widely used in the research domain of computer network design, so called NS-2.

title: Realization of video object plane decoder on mesh on-chip network architecture

title: The Optimum Network on Chip Architectures for Video Object Plane Decoder Design
abstract: On Chip Network (OCN) has been proposed as a new methodology for addressing the design challenges of future massly integrated system in nanoscale. In this paper, three differently heterogenous Tree-based network topologies are proposed as the OCN architectures for Video Object Plane Decoder (VOPD). The topologies are designed in order to maximize the system throughput. This paper also evaluates the proposed topologies by comparing them to other conventional topologies such as 2-D Mesh and Fat-Tree with respects to throughput, power consumption and size. We use the power modelling tool, known as Orion model to calculate the static powers, areas, and dynamic energies of three topologies. The experiment results show that our Tree-based topologies offer similar throughputs as Fat-Tree does and much higher throughputs compared to 2-D Mesh while use less chip areas and power consumptions.

title: On double-link failure recovery in WDM optical networks
abstract: Network survivability is a crucial requirement in high-speed optical networks. Typical approaches of providing survivability have considered the failure of a single component such as a link or a node. We consider a failure model in which any two links in the network may fail in an arbitrary order. Three loopback methods of recovering from double-link failures are presented. The first two methods require the identification of the failed links, while the third one does not. However, precomputing the backup paths for the third method is more difficult than for the first two. A heuristic algorithm that pre-computes backup paths for links is presented. Numerical results comparing the performance of our algorithm with other approaches suggests that it is possible to achieve 100% recovery from double-link failures with a modest increase in backup capacity.

title: Design and control of a novel 4-DOFs parallel robot H4
abstract: This paper deals with the design and dynamic control simulation of a new type and dynamic control simulation of a new type of 4-DOFs parallel mechanism providing 3 translations and 1 rotation for high-speed handling and machining. This parallel mechanism is named as H4. A model-based dynamic control scheme is developed to improve the accuracy of the trajectory tracking. A simplified dynamic model is used for the H4 robot to decrease the cost of computation. A dynamic simulation is performed using ADAMS/sup TM/. In addition, the adept motion is used as a benchmark test to evaluate the effect of the dynamic control. The simulation results show that the dynamic control dramatically improves the trajectory tracking accuracy.

title: Efficient alarm management in optical networks
abstract: As the capacity of optical transport networks increases, rapid fault identification and localization become increasingly important. These problems are more challenging than in traditional electronic networks because of optical transparency. In a transparent optical network which does not regenerate optical signals, a fault may propagate to various parts of the network from the origin, and multiple alarms can be generated for a single failure. Efficient alarm management and filtering requires a careful selection and placement of network monitoring equipment. In this paper we survey the capabilities of current optical monitoring equipment and formulate a problem of selecting monitors to be placed throughout the network. Simulation results suggest that the number of monitors and generated alarms can be significantly reduced if monitor locations are selected judiciously.

title: Efficient scheduling of transmissions in optical broadcast networks
abstract: All-optical networks (AONs) with a broadcast-star based physical topology offer the possibility of transmission scheduling to resolve channel and receiver conflicts. This paper considers the problem of scheduling packet transmissions in a wavelength-division multiplexed (WDM) optical network with tunable transmitters and fixed-tuned receivers. The scheduling problem is complicated by tuning latency, a limited number of channels, and arbitrary traffic demands. We first analyze scheduling all-to-all packet transmissions and obtain a new lower bound for the schedule length. The lower bound is achieved by an algorithm proposed by Pieris and Sasaki (1994). We then extend the analysis to the case of arbitrary traffic demands and obtain lower bounds for the schedule length. Two constructions for scheduling algorithms are provided through list scheduling and multigraphs. The upper bounds so obtained not only provide performance guarantees with arbitrary demands, but also nearly meet the lower bound in simulations.

title: Loopback recovery from neighboring double-link failures in WDM mesh networks
abstract: Traditional survivable network design assumes that at any time at most a single link or node fails. In optical networks, a single point of failure may lead to the failure of multiple links. In this paper, we consider the design of an optical network that can survive the failures of any two neighboring links. We present a loopback recovery method that requires the computation of backup paths for each link. An optimal algorithm for computing the backup paths is presented. Numerical results comparing the performance of our algorithm with other loopback approaches indicate that a slight increase in capacity can achieve 100% protection under this failure model.