Performance Bounds of Algorithms for Scheduling Advertisements on a Web Page
AbstractConsider a set of n advertisements (hereafter called “ads”) A ={A1,...,An} competing to be placed in a planning horizon which is divided into N time intervals called slots. An ad Ai is specified by its size si and frequency wi. The size si represents the amount of space the ad occupies in a slot. Ad Ai is said to be scheduled if exactly wi copies of Ai are placed in the slots subject to the restriction that a slot contains at most one copy of an ad. In this paper, we consider two problems. The MINSPACE problem minimizes the maximum fullness among all slots in a feasible schedule where the fullness of a slot is the sum of the sizes of ads assigned to the slot. For the MAXSPACE problem, in addition, we are given a common maximum fullness S for all slots. The total size of the ads placed in a slot cannot exceed S. The objective is to find a feasible schedule 
$$A' \subseteq A$$
 of ads such that the total occupied slot space 
$$\sum {_{A_i \in A'} w_i s_i }$$
 is maximized. We examine the complexity status of both problems and provide heuristics with performance guarantees.

title: Scheduling advertisements on a web page to maximize revenue
abstract: Many web sites (e.g. Hotmail, Yahoo) provide free services to the users while generating revenues from advertising. Advertising revenue is, therefore, critical for these sites. This in turn raises the question, how should advertisements at a web site be scheduled in a planning horizon to maximize revenue. Advertisements on the web are specified by geometry and display frequency and both of these factors need to be considered in developing a solution to the advertisement scheduling problem. Since this problem belongs to the class of NP-hard problems, we first develop a heuristic called LSMF to solve the problem. This heuristic is then combined with a genetic algorithm (GA) to develop a hybrid GA. The hybrid GA solution is first compared with the upper bound obtained by running CPLEX for the integer programming formulation of the problem. It is then also compared with an existing algorithm proposed in the literature. Our computational results show that the hybrid GA performs exceptionally well in the sense that it provides optimal or near optimal solution for a wide range of problem instances of realistic sizes and the improvements over existing algorithm are substantial. Finally we present a case study to illustrate how revenue could be significantly increased with a small improvement in the advertisement schedule. It is the first such study in this setup.

title: Scheduling Web Advertisements: A Note on the Minspace Problem
abstract: Free services to internet users are commonly available on many web sites e.g., Hotmail and Yahoo. For such sites, revenue generated from advertisements (hereafter also called “ads”) placed on the web pages is critical for survival. An effective way to schedule ads on web pages to optimize certain performance measures is an important problem that these sites need to address.In this note, we report improved approximation algorithms for the following problem: ads from a set of n ads A = {Ai,...,An} are to be placed on a web page during a planning horizon that is divided into N time intervals. In each time interval, ads are shown in a rectangular space called a slot. An ad Ai is specified by its size si and frequency wi and is to be scheduled in exactly wi slots. We are required to find a schedule that minimizes the maximum fullness among all the slots, where the fullness of a slot is the sum of the sizes of ads scheduled in that slot. Our results include (i) the first online algorithm with a performance bound of $$2 - \frac{1}{N}$$, and (ii) two offline algorithms with performance guarantees of $$1 + 1\frac{1}{\sqrt{2}}$$ and $$\frac{3}{2}$$, respectively. These bounds are significant improvements over those for previously known algorithms presented in Adler, Gibbons, and Matias (2002) and Dawande, Kumar, and Sriskandarajah (2003).

title: Carbon: architectural support for fine-grained parallelism on chip multiprocessors
abstract: Chip multiprocessors (CMPs) are now commonplace, and the number of cores on a CMP is likely to grow steadily. However, in order to harness the additional compute resources of a CMP, applications must expose their thread-level parallelism to the hardware. One common approach to doing this is to decompose a program into parallel "tasks" and allow an underlying software layer to schedule these tasks to different threads. Software task scheduling can provide good parallel performance as long as tasks are large compared to the software overheads.
 We examine a set of applications from an important emerging domain: Recognition, Mining, and Synthesis (RMS). Many RMS applications are compute-intensive and have abundant thread-level parallelism, and are therefore good targets for running on a CMP. However, a significant number have small tasks for which software task schedulers achieve only limited parallel speedups.
 We propose Carbon, a hardware technique to accelerate dynamic task scheduling on scalable CMPs. Carbon has relatively simple hardware, most of which can be placed far from the cores. We compare Carbon to some highly tuned software task schedulers for a set of RMS benchmarks with small tasks. Carbon delivers significant performance improvements over the best software scheduler: on average for 64 cores, 68% faster on a set of loop-parallel benchmarks, and 109% faster on aset of task-parallel benchmarks.

title: Digital tapestry [automatic image synthesis]
abstract: This paper addresses the novel problem of automatically synthesizing an output image from a large collection of different input images. The synthesized image, called a digital tapestry, can be viewed as a visual summary or a virtual 'thumbnail' of all the images in the input collection. The problem of creating the tapestry is cast as a multi-class labeling problem such that each region in the tapestry is constructed from input image blocks that are salient and such that neighboring blocks satisfy spatial compatibility. This is formulated using a Markov random field and optimized via the graph cut based expansion move algorithm. The standard expansion move algorithm can only handle energies with metric terms, while our energy contains non-metric (soft and hard) constraints. Therefore we propose two novel contributions. First, we extend the expansion move algorithm for energy functions with non-metric hard constraints. Secondly, we modify it for functions with "almost" metric soft terms, and show that it gives good results in practice. The proposed framework was tested on several consumer photograph collections, and the results are presented.

title: Fast Paths in Concurrent Programs

title: Design of randomized multichannel packet storage for high performance routers
abstract: High performance routers require substantial amounts of memory to store packets awaiting transmission, requiring the use of dedicated memory devices with the density and capacity to provide the required storage economically. The memory bandwidth required for packet storage subsystems often exceeds the bandwidth of individual memory devices, making it necessary to implement packet storage using multiple memory channels. This raises the question of how to design multichannel storage systems that make effective use of the available memory and memory bandwidth, while forwarding packets at link rate in the presence of arbitrary packet retrieval patterns. A recent series of papers has demonstrated an architecture that uses on-chip SRAM to buffer packets going to/from a multichannel storage system, while maintaining high performance in the presence worst-case traffic patterns. Unfortunately, the amount of on-chip storage required grows as the product of the number of channels and the number of separate queues served by the packet storage system. This makes it too expensive to use in systems with large numbers of queues. We show how to design a practical randomized packet storage system that can sustain high performance using an amount of on-chip storage that is independent of the number of queues.

title: Evaluating synchronization on shared address space multiprocessors: methodology and performance
abstract: Synchronization is an area that exhibits rich hardware-software interactions in multiprocessors. It was studied extensively using microbenchmarks a decade ago. However, its performance implications are not well understood on modern systems or on real applications. We study the impact of synchronization primitives and algorithms on a modern, 64processor, hardware-coherent shared address space multiprocessor: the SGI Origin 2000. In addition to the actual results on a modern system, we examine the key methodological issues in studying synchronization, for both microbenchmarks and applications. We find that although the efficient hardware support (Fetch&Op) for synchronization provided on our machine usually helps lock and barrier microbenchmarks, it does not help in improving application performance when compared to good software algorithms that use the processor-provided LL-SC instructions. This is true even in applications that spend a significant amount of time in synchronization operations. More elaborate hardware support is unlikely to have a significant benefit either. From the applications’ perspective, it is usually the waiting time due to load imbalance or serialization that dominates synchronization time, not the overhead of the synchronization operations themselves, even in apparently balanced cases where the overhead may be expected to be substantial.