A low energy cache design for multimedia applications exploiting set access locality
An architectural technique is proposed to reduce power dissipation in conventional caches. Our technique is based on the observation of cache access locality: current access is likely to touch the same cache set including the tags as the last access. We show that considerable amount of power driving the cache tag and data banks can be saved if this cache access locality is fully exploited. This is achieved through buffering and accessing the last accessed cache set instead of driving the tag and data banks. Unlikely previous designs, our technique does not incur performance degradation. Experimental results carried out on 8 KB/16 KB/32 KB data and instruction caches have respectively shown 31%/ 35%/36% and 51%/58%/66% power savings.

title: Low power network processor design using clock gating
abstract: Network processors (NPs) have emerged as successful platforms to providing both high performance and flexibility in building powerful routers. Typical NPs incorporate multiprocessing and multi-threading to achieve maximum parallel processing capabilities. We observed that under low incoming traffic rates, most processing elements (PEs) in NPs are nearly idle and yet still consume dynamic power. This paper develops a low power technique to reduce the activities of PEs according to the varying traffic volume. We propose to monitor the average number of idle threads in a time window, and gate off the clock network of unused PEs when a subset of PEs is enough to handle the network traffic. We show that our technique brings significant reduction in power consumption (up to 30%) of NPs with no packet loss and little impact to the overall throughput.

title: Enhancing Network Processor Simulation Speed with Statistical Input Sampling
abstract: While cycle-accurate simulation tools have been widely used in modeling high-performance processors, such an approach can be hindered by the increasing complexity of the simulation, especially in modeling chip multi-proce- ssors with multi-threading such as the network processors (NP). We have observed that for NP cycle level simulation, several days of simulation time covers only about one second of the real-world network traffic. Existing approaches to accelerating simulation are through either code analysis or execution sampling. Unfortunately, they are not applicable in speeding up NP simulations due to the small code size and the iterative nature of NP applications. We propose to sample the traffic input to the NP so that a long packet trace is represented by a much shorter one with simulation error bounded within ±3% and 95% confidence. Our method resulted one order of magnitude improvement in the NP simulation speed.

title: Program Mapping onto Network Processors by Recursive Bipartitioning and Refining
abstract: Mapping packet processing applications onto embedded network processors (NP) is a challenging task due to the unique constraints of NP systems and the characteristics of network application domains. A remarkable difference with general multiprocessor task scheduling is that NPs are often programmed into a hybrid parallel and pipeline topology. In this paper, we introduce a multilevel balancing and refining algorithm for NP program mapping. We use a divide- and-conquer approach to recursively bipartition the task graph into disjoint subdomains. At each level of bipartition, the processing resources will be co-allocated so that an estimation of throughput can be derived. The bipartition continues until the code of the tasks can be fit into the instruction memory of processing elements. Then the algorithm iteratively refines the solution by migrating tasks from the bottleneck stage to other stages. The performance of our scheme is evaluated with a suite of NP benchmarks using SUIF/Machine SUIF compiler and Intel IXA Architecture Tool. The throughput improvement is significant: average throughput is increased by 20%, and the maximum is 108%.

title: Parameter Free Bursty Events Detection in Text Streams
abstract: Text classification is a major data mining task. An advanced text classification technique is known as partially supervised text classification, which can build a text classifier using a small set of positive examples only. This leads to our curiosity whether it is possible to find a set of features that can be used to describe the positive examples. Therefore, users do not even need to specify a set of positive examples. As the first step, in this paper, we formalize it as a new problem, called hot bursty events detection, to detect bursty events from a text stream which is a sequence of chronologically ordered documents. Here, a bursty event is a set of bursty features, and is considered as a potential category to build a text classifier. It is important to know that the hot bursty events detection problem, we study in this paper, is different from TDT (topic detection and tracking) which attempts to cluster documents as events using clustering techniques. In other words, our focus is on detecting a set of bursty features for a bursty event. In this paper, we propose a new novel parameter free probabilistic approach, called feature-pivot clustering. Our main technique is to fully utilize the time information to determine a set of bursty features which may occur in different time windows. We detect bursty events based on the feature distributions. There is no need to tune or estimate any parameters. We conduct experiments using real life data, a major English newspaper Permission to copy without fee all or part of this material is granted provided that the copies are not made or distributed for direct commercial advantage, the VLDB copyright notice and the title of the publication and its date appear, and notice is given that copying is by permission of the Very Large Data Base Endowment. To copy otherwise, or to republish, requires a fee and/or special permission from the Endowment. Proceedings of the 31st VLDB Conference, Trondheim, Norway, 2005 in Hong Kong, and show that the parameter free feature-pivot clustering approach can detect the bursty events with a high success rate.

title: Fast Online Policy Gradient Learning with SMD Gain Vector Adaptation
abstract: Reinforcement learning by direct policy gradient estimation is attractive in theory but in practice leads to notoriously ill-behaved optimization problems. We improve its robustness and speed of convergence with stochastic meta-descent, a gain vector adaptation method that employs fast Hessian-vector products. In our experiments the resulting algorithms outperform previously employed online stochastic, offline conjugate, and natural policy gradient methods.

title: Evolutionary feature synthesis for facial expression recognition
abstract: Feature extraction is one of the key steps in object recognition. In this paper we propose a novel genetically inspired learning method for facial expression recognition (FER). Unlike current research on facial expression recognition that generally selects visually meaningful feature by hands, our learning method can discover the features automatically in a genetic programming-based approach that uses Gabor wavelet representation for primitive features and linear/nonlinear operators to synthesize new features. These new features are used to train a support vector machine classifier that is used for recognizing the facial expressions. The learned operator and classifier are used on unseen testing images. To make use of random nature of a genetic program, we design a multi-agent scheme to boost the performance. We compare the performance of our approach with several approaches in the literature and show that our approach can perform the task of facial expression recognition effectively.

title: Evolution of a Controller with a Free Variable Using Genetic Programming
abstract: A mathematical formula containing one or more free variables is “general” in the sense that it provides a solution to an entire category of problems. For example, the familiar formula for solving a quadratic equation contains free variables representing the equation’s coefficients. Previous work has demonstrated that genetic programming can automatically synthesize the design for a controller consisting of a topological arrangement of signal processing blocks (such as integrators, differentiators, leads, lags, gains, adders, inverters, and multipliers), where each block is further specified (“tuned”) by a numerical component value, and where the evolved controller satisfies user-specified requirements. The question arises as to whether it is possible to use genetic programming to automatically create a “generalized” controller for an entire category of such controller design problems — instead of a single instance of the problem. This paper shows, for an illustrative problem, how genetic programming can be used to create the design for ‘both the topology and tuning of controller, where the controller contains a free variable.

title: Feature Synthesis Using Genetic Programming for Face Expression Recognition
abstract: In this paper a novel genetically-inspired learning method is proposed for face expression recognition (FER) in visible images. Unlike current research for FER that generally uses visually meaningful feature, we proposed a Genetic Programming based technique, which learns to discover composite operators and features that are evolved from combinations of primitive image processing operations. In this approach, the output of the learned composite operator is a feature vector that is used for FER. The experimental results show that our approach can find good composite operators to effectively extract useful features.