nils-herrmann/clean_scirepeval huggingface dataset:
Modeling and study of two-BDT-nanostructure based sequential logic circuits

In this paper, study of different digital logic circuits developed using two-BDT ballistic nanostructure is presented. New D flipflop (DFF) based on the same nanostructure is also proposed. The logic structure comprises two ballistic deflection transistors (BDTs) that are experimentally proven to operate at Terahertz frequencies. The non-linear behavior of the BDT's transfer characteristic has been perfectly reproduced by means of Monte Carlo simulations, where a specific attention has been devoted to surface charges. An analytical model built on the results of advanced MC simulations has been integrated into a behavioral Verilog AMS module to confirm the functionality of the circuit design. The module is used to analyze operating conditions of different combinational circuits and to investigate the feasibility of DFF design using BDT nanostructure. The simulation results indicate successful operation of both combinational and sequential circuits developed using two-BDT logic structure under proper biasing of gate and source terminals. The operating voltages of the proposed DFF are estimated to be ± 225mV.
A 520–620-GHz Schottky Receiver Front-End for Planetary Science and Remote Sensing With 1070 K–1500 K DSB Noise Temperature at Room Temperature

A state-of-the-art 520-620-GHz receiver front end working at room temperature was designed, built, and measured. The receiver front-end features a GaAs-Schottky diode-based subharmonic mixer and a 260-307-GHz doubler, both fabricated with the new LERMA-LPN Schottky process on a 4- μm-thick GaAs membrane suspended in a waveguide with metal beamleads. Small-area mesas and optimized transmission lines with low dielectric loading are used. At 295 K ambient temperature, an average of 1284 K DSB receiver noise temperature was measured over the 520-620-GHz frequency range, including the 3.5-8.5-GHz IF chain loss. A record 1130 K minimum DSB receiver noise temperature at 557 GHz was measured. At 134 K ambient temperature, an average DSB receiver noise temperature of 685 K from 538 to 600 GHz was measured when correcting for the cryostat window loss. A minimum DSB receiver noise of 585 K was measured at an RF center frequency of 540 GHz. The 520-620-GHz receiver presented in this article allows an increase in the sensitivity of the JUpiter ICy Moons Explrorer-SWI instrument of about a factor of two compared with requirements. It will allow study of the Jovian system with particular emphasis on the chemistry, meteorology, structure, and atmospheric coupling processes of Jupiter and its icy satellites, thereby providing important data for the exploration of their habitable zones.
Monte Carlo study of impact ionization and hole transport in InAs HEMTs with isolated gate

We present a physical analysis of the kink effect in InAs/AlSb High Electron Mobility Transistors (HEMTs) performed by means of a semiclassical 2D ensemble Monte Carlo simulator. InAs-channel HEMTs are very susceptible to suffer from impact ionization phenomena due to the small bandgap of InAs. These processes, jointly with the associated hole transport, are at the origin of the kink effect. When the drain-to-source voltage is high enough for the onset of impact ionization, generated holes tend to accumulate at the gate-drain side of the buffer because of the valence-band energy barrier present between the buffer and the channel. Due to this pile up of positive charge the channel is further opened and the drain current increases, leading to the kink in the I-V characteristics.
Modeling edge capacitances in ultra-scaled GaAs Schottky barrier diodes for THz applications

Nanometer scale planar Schottky barrier diodes with realistic geometries have been simulated by means of a two-dimensional ensemble Monte Carlo simulator. The intrinsic capacitance of such small devices, which due to edge effects strongly deviates from the ideal value, has been calculated. By means of Monte Carlo simulations we analyze the influence of the 2D geometry of the Schottky contact, the doping level of the epilayer and the surface charges at the semiconductor-dielectric interface on the value of the edge capacitance. The final aim is to develop a compact model that can be easily implemented in design automation software such as ADS. The topology of the devices studied in this work is based in real planar GaAs Schottky barrier diodes used in THz applications such as passive frequency mixing and multiplication, in which accurate models for the diode capacitance are required.
Monte Carlo analysis of kink effect in short-channel InAlAs/InGaSs HEMTs

We apply a semiclassical 2D ensemble Monte Carlo (MC) simulator to study the kink effect in short-channel InAlAs/InGaAs lattice-matched High Electron Mobility Transistors (HEMTs). Holes generated by impact ionization in the drain side of the device tend to pile up in the channel under the source side of the gate due to the attracting potential caused by the surface charge at the recess and, mostly, by the gate potential. Due to this pile up of positive charge, the potential barrier controlling the current through the channel is lowered, so that the channel is further opened and the drain current (I/sub D/) increases.
Toward THz Gunn oscillations in planar GaN nanodiodes

By means of Monte Carlo simulations we show the feasibility of asymmetric nonlinear planar GaN nanodiodes for the development of high-frequency Gunn oscillations. For channel lengths of 1 μm, oscillation frequencies around 300 GHz are predicted, reaching more than 650 GHz for 0.4 μm. The intrinsic DC to AC conversion efficiency is found to be higher than 1% for the fundamental and second harmonic frequencies.
Static and large signal noise analysis in GaAs and GaN Schottky diodes for high frequency applications

This paper presents an analysis of the noise spectra of GaAs and GaN Schottky barrier diodes (SBD) operating under static and time varying conditions. The noise spectra obtained from Monte Carlo simulations (MC) of the SBDs show two resonances in the terahertz frequency region that are analyzed as a function of the SBD structure and working conditions. MC simulations are compared with published analytical models to describe the noise spectra of the SBDs.
Design and realization of sub 100 nm gate length HEMTs

Standard layer structure InAlAs/InGaAs/EnP designed for 100 nanometer gate length High Electron Mobility Transistors (HEMTs) become inadequate, if we reduce the gate length under 100 nm. An InAlAs/InGaAs/InP layer structure optimized for 50 nanometer gate length HEMTs has been realized. DC and microwave characteristics are reported on HEMTs realized on a standard layer and an optimized layer, with similar gate length. Comparable cutoff frequencies f/sub T/ are obtained for both devices. The main result is a large improvement of maximum oscillation frequency f/sub max/, which is 260 GHz and 470 GHz for respectively the standard and the optimized devices. This behavior is attributed to the reduction of short channel effects.
Ballistic deflection transistor very high frequency modeling

To respond to the increase of worldwide information demand, in terms of quantity and speed, many different ways in electronics are developed. In the field of semiconductor devices, the Ballistic Deflection Transistor (BDT)  can have a significant impact. Indeed, an ultra-fast electron motion associated with a unique non-linear behavior allows this component to be a major actor for new kind of Terahertz (THz) logical circuits. The aim of this work is to provide theoretical analysis of this device under ultra-high frequency excitation. The BDT, presented in Fig. 1, is a planar six-terminal structure etched on an InAlAs/InGaAs heterostructure which provide a two dimensional electron gas. Unlike classic transistors, where the flow of electron is switched off and on, the concept of BDT is to steer the carriers from one side to another, thanks to two gates (in push-pull configuration: VLG=-VRG) and a triangular deflector strategically positioned, while maintaining their ballistic motion. This device offers a non-linear transfer characteristic, shown in Fig. 2, which grants operating opportunities at very high frequency .
Experimental analysis of shot-noise suppression in InGaAs/InAlAs recessed planar diodes at room temperature

In this work, current noise measurements of submicron InGaAs/InAlAs recessed planar diodes are presented. The presence of a barrier in the potential profile under the source side of the recess may affect the statistics of passage of carriers, which in turn would lead to suppressed shot noise levels. However, evidencing this noise suppression from the measurements is challenging, due to the undesired effects from the accesses and contact resistances. The presented results are provided as a starting point for a future de-embedding process able to precisely determine the actual noise properties below the recess.
Geometry and bias dependence of trapping effects in planar GaN nanodiodes

Pulsed and transient measurements performed in planar nanodiodes fabricated on an AlGaN/GaN heterolayer reveal the influence of surface and bulk traps on the I–V characteristic and AC impedance. Rectangular and V-shape diodes of different lengths and widths have been measured. Surface trapping effects become relevant in narrow channels, as the surface to volume ratio of the device is increased, while in wider rectangular and V-shape diodes bulk trapping effects prevail.
Bayesian Active Remote Sensing Image Classification

In recent years, kernel methods, in particular support vector machines (SVMs), have been successfully introduced to remote sensing image classification. Their properties make them appropriate for dealing with a high number of image features and a low number of available labeled spectra. The introduction of alternative approaches based on (parametric) Bayesian inference has been quite scarce in the more recent years. Assuming a particular prior data distribution may lead to poor results in remote sensing problems because of the specificities and complexity of the data. In this context, the emerging field of nonparametric Bayesian methods constitutes a proper theoretical framework to tackle the remote sensing image classification problem. This paper exploits the Bayesian modeling and inference paradigm to tackle the problem of kernel-based remote sensing image classification. This Bayesian methodology is appropriate for both finite- and infinite-dimensional feature spaces. The particular problem of active learning is addressed by proposing an incremental/active learning approach based on three different approaches: 1) the maximum differential of entropies; 2) the minimum distance to decision boundary; and 3) the minimum normalized distance. Parameters are estimated by using the evidence Bayesian approach, the kernel trick, and the marginal distribution of the observations instead of the posterior distribution of the adaptive parameters. This approach allows us to deal with infinite-dimensional feature spaces. The proposed approach is tested on the challenging problem of urban monitoring from multispectral and synthetic aperture radar data and in multiclass land cover classification of hyperspectral images, in both purely supervised and active learning settings. Similar results are obtained when compared to SVMs in the supervised mode, with the advantage of providing posterior estimates for classification and automatic parameter learning. Comparison with random sampling as well as standard active learning methods such as margin sampling and entropy-query-by-bagging reveals a systematic overall accuracy gain and faster convergence with the number of queries.
Bayesian high-resolution reconstruction of low-resolution compressed video

A method for simultaneously estimating the high-resolution frames and the corresponding motion field from a compressed low-resolution video sequence is presented. The algorithm incorporates knowledge of the spatio-temporal correlation between low and high-resolution images to estimate the original high-resolution sequence from the degraded low-resolution observation. Information from the encoder is also exploited, including the transmitted motion vectors, quantization tables, coding modes and quantizer scale factors. Simulations illustrate an improvement in the peak signal-to-noise ratio when compared with traditional interpolation techniques and are corroborated with visual results.
Bayesian high resolution image reconstruction with incomplete multisensor low resolution systems

We consider the problem of reconstructing a high-resolution image from an incomplete set of undersampled, shifted, degraded frames with subpixel displacement errors. We derive mathematical expressions for the calculation of the maximum a posteriori (MAP) estimate of the high resolution image given the low resolution observed images. We also examine the role played by the prior model when an incomplete set of low resolution images is used. Finally, the proposed method is tested on real and synthetic images.
THz generation based on Gunn oscillations in GaN planar asymmetric nanodiodes

By means of Monte Carlo simulations we show the feasibility of asymmetric nonlinear planar GaN nanodiodes for the development of Gunn oscillations. For channel lengths about 1 μm, oscillation frequencies around 400 GHz are predicted, reaching more than 600 GHz for 0.5 μm. The DC to AC conversion efficiency is found to be higher than 1% for the fundamental and second harmonic frequencies in GaN diodes. By simulating two diodes in parallel, we analyze the possible loss of efficiency due to the technological dispersion in channel lengths.
Realization of Logic Operations Through Optimized Ballistic Deflection Transistors

In this paper, the utilization of recently proposed ballistic deflection transistors (BDT) is investigated for the realization of the complete family of logic functions. BDT performance is optimized through its structural modification which is followed by the Monte Carlo simulations for 2- input logic gate functionalities at room temperature. BDT is a quasi-ballistic planar device based on InGaAs/InAlAs/InP heterolayer. The faster non-scattering transport obtained in the two dimensional electron gas (2DEG) layer facilitates smaller transit time and high performance needed for high speed circuitry.
Design and Analysis of High Performance Ballistic Nanodevice-Based Sequential Circuits Using Monte Carlo and Verilog AMS Simulations

In this paper, we propose a design of traditional sequential circuits using high performance Ballistic Deflection Transistor (BDT). BDT technology was developed and experimentally proven to operate at Terahertz frequencies. Different structures of BDTs have been developed successfully to realize combinational logic functionality. Monte Carlo (MC) simulations have been extensively used to study these structures. By taking into account the effect of surface charges and dielectrics, we are able to correctly reproduce the non-linear I-V transfer characteristics, to predict scaling down behavior and to estimate the very high switching speed. We then used a three parameter Gaussian peak as a predictive model for the BDT and integrated it with Verilog AMS module to confirm the functionality of the designed circuits. Finally, we used a recently developed level-sensitive D-latch using two-BDTs structure, to explore traditional sequential circuits such as Shift Registers (SRs), Frequency Divider and Johnson Ring Counter, which play a pivotal role in many processing systems as common datapath operators. The simulation results have indicated the correct logic functionality of the implemented sequential circuits.
Negative Differential Transconductance and Nonreciprocal Effects in a Y-Branch Nanojunction: High-Frequency Analysis

We report on negative differential transconductance (NDT) effect in Y-branch nanojunctions which leads to small-signal nonreciprocity of the device for certain biasing schemes. We present the dc analysis of the device from which we identify the bias regions where NDT effect occurs. We compare experimental dc measurements with results of Monte Carlo simulations, which yields very good qualitative and quantitative agreement. We perform a high-frequency analysis of the NDT effect up to 110 GHz which shows that the effect discussed is still present at such high frequencies
Ballistic GaInAs/AlInAs devices technology and characterization at room temperature

We have developed technology based on GaInAs/AlInAs for building ballistic devices working at room temperature. We first present here processes for passive and active devices (T-branch junctions (TBJs), Y-branch junctions (YBJs) and TBJs with Schottky gates. Then, we present DC characterization of TBJs to prove the ballistic behaviour and new results for YBJs.
Design optimization of AlInAs-GalnAs HEMTs for low-noise applications

In order to optimize the low-noise performance of 50-nm-gate AlInAs-GalnAs high-electron mobility transistors (HEMTs), by using an ensemble Monte Carlo simulation we study the influence of three important technological parameters on their noise level: the doping of the /spl delta/-doped layer, the width of the devices and the length of the recess. The noise behavior of the devices is firstly analyzed in terms of the physics-based P, R, and C parameters, and then characterized from a practical (circuit oriented) point of view through their four noise parameters: minimum noise figure, F/sub min/, noise resistance, R/sub n/, and complex input admittance, Y/sub opt/ (or reflection coefficient, /spl Gamma//sub opt/). We have observed an enhancement of the noise when the /spl delta/-doping or the device width are increased (a deterioration parallel to that of f/sub max/). Thus, the optimum noise operation is obtained for the lowest possible values of the /spl delta/-doping and device width. However, for small width the effect of the offset parasitic capacitances makes F/sub min/ increase, thus, imposing a limit for the reduction of the noise. Moreover, the increase of R/sub n/ for small W makes the noise tuning condition critical to reach the optimum low-noise operation. We have also confirmed that when shortening the recess length from 100 to 20 nm at each side of the gate F/sub min/ is reduced, with a slight deterioration of f/sub max/, while the static characteristics are not modified.
Dynamic management of ICT service infrastructures for energy efficiency optimization

Improving the energy efficiency of ICT service provisioning infrastructures presents many advantages, both from the corporate social responsibility and from the business competitiveness perspective. In this context, reducing data center energy consumption is one of the main tasks to focus on, since these facilities concentrate a great share of an ICT service provider's power demand in a small number of locations. The adoption of commercial energy-saving solutions, based on static configurations, introduces significant improvements, but considerable infrastructure underutilization levels remain. In order to allow ICT service providers to overcome the limitations found in existing energy efficiency tools, this paper describes an infrastructure management solution which dynamically adjusts the performance of the managed environment to match service demand, thus optimizing energy consumption. Additionally, the first validation experiences of the proposed management solution in the context of a telecom operator's service provisioning infrastructure are described.
Experimental verification of low-frequency noise effects at the onset of oscillations in planar Gunn diodes

In this work, the presence of an anomalous increase of low-frequency noise associated with the initiation of the oscillatory regime in Gunn diodes has been studied and experimentally evidenced. When incipient instabilities begin to appear in the device, its intermittent nature drastically enhances the noise at frequencies well below that of the oscillation. For higher bias voltages, the oscillation becomes purer and the associated low-frequency noise disappears.
Characterization and modeling of traps and RF frequency dispersion in AlGaN/AlN/GaN HEMTs

The performance of GaN transistors is still limited by physical and fabrication problems, mainly related to different kinds of traps. In this work, virgin transistors reveals strong low frequency dispersion both in the transconductance and output conductance, that we attribute to the presence of traps in the GaN channel and the ohmic contacts. These effects have been modeled in the equivalent circuit of the transistors achieving a satisfactory agreement with the measured S-parameters.
Monte Carlo simulator for the design optimization of low-noise HEMTs

A complete analysis of low-noise 0.1 /spl mu/m gate AlInAs-GaInAs HEMT's has been performed by using a semiclassical Monte Carlo simulation. The validity of the model has been checked through the comparison of the simulated results with static, dynamic and noise experimental measurements of real HEMTs. In order to reproduce the experimental results, we have included in the model some important real effects such as degeneracy, surface charges, T-shape of the gate, presence of dielectrics and contact resistances. Moreover, the extrinsic parameters of the devices have been added to the usual intrinsic small-signal equivalent circuit, thus allowing the calculation of the real noise of the HEMTs (characterized using the extrinsic minimum noise figure). In this way, we make possible not only the comparison with the experimental noise results, but also the analysis of the influence of the parasitic elements, the device width or the number of gate fingers on the noise of the HEMTs. The reliability of the simulator allows us to realize "computer experiments" which will make faster and cheaper the optimization process of the device design.
Learning filters in Gaussian process classification problems

Many real classification tasks are oriented to sequence (neighbor) labeling, that is, assigning a label to every sample of a signal while taking into account the sequentiality (or neighborhood) of the samples. This is normally approached by first filtering the data and then performing classification. In consequence, both processes are optimized separately, with no guarantee of global optimality. In this work we utilize Bayesian modeling and inference to jointly learn a classifier and estimate an optimal filterbank. Variational Bayesian inference is used to approximate the posterior distributions of all unknowns, resulting in an iterative procedure to estimate the classifier parameters and the filterbank coefficients. In the experimental section we show, using synthetic and real data, that the proposed method compares favorably with other classification/filtering approaches, without the need of parameter tuning.
Ballistic deflection transistor: Geometry dependence and boolean operations

In this work, a room temperature study of ballistic deflection transistors (BDTs) is performed. By applying various processing steps such as hard mask deposition, e-beam lithography, reactive ion etching, etc., BDTs were fabricated, and the interplay between the geometry and their performance is analyzed. The importance of the top drain terminal is also examined. The application of the BDT for different logic configurations on the basis of its asymmetric biasing behavior is studied. Using this concept, even a single BDT can be used as a logic gate.