nils-herrmann/clean_scirepeval huggingface dataset:
Design and Analysis of Finite/Infinite Impulse Response Optical Filter for Signal Processing

The key to analyzing the optical filter using z-transform is that each delay be an integer multiple of a unit delay length. A coupler is just the point where two paths (wave guide) are brought together so that their evanescent field overlap and a power transfer from one port to other exist. The lattice structures allow a systematic approach to filter synthesis. They are suitable forms for performing the various signal processing operations. Compared to other forms, lattice structure has some advantageous characteristics. Recirculating/infinite impulse response (feed-backward) and nonrecirculating/finite impulse response (feed-forward) delay line are two structures that are basic to fiber-optic signal processing. Similarly, we can form the system consist of many more coupler system. In this paper we have analyzed the response of each combination. Later on we try to connect the z-transform domain into Laplace by replacing z=esT. By replacing the z by the expansion of esT for some number of elements we can obtain the similar types of response to check the validity of our approximations. Here in s-domain we can easily apply control theory concepts on these transfer formulas. In the end we have tried to obtain the time domain response of filter by using the z approximation in s.
Accelerated dual coordinate algorithms for separable convex cost network flow problems

Nonlinear network flow problems are convex minimization problems that arise in diverse applications from transportation to finance. The network structure of the constraints and the separability of objectives make this class of problems suitable for special algorithms that are orders of magnitude faster than standard convex optimization methods. Dual coordinate algorithms such as ϵ-relaxation are among the fastest methods for solving such separable convex cost network flow problems. In this paper, we identify conditions where the ϵ-relaxation algorithm is inefficient and requires many iterations to make progress towards convergence. We subsequently develop a new algorithm that avoids such conditions while preserving the advantages of the original ϵ-relaxation algorithm. It is inspired by techniques used in the auction algorithm for linear assignment problems. We show that our new algorithm is correct and shares the same worst-case complexity as the original algorithm. Through extensive numerical experiments on benchmark problems we demonstrate that our new algorithm significantly reduces computation times over the original algorithm because it replaces many steps of ϵ-relaxation by a single large step.
High power microwave generation from a reflex triode virtual cathode oscillator

Experiments were carried out to generate intense relativistic electron beams and High Power Microwaves (HPM) with reflex triode geometry from 1 kJ pulse power system. The typical electron beam parameters were 300 kV, 12 kA, and 300 ns, with a current density of a few hundreds of amperes per square centimeter. We present a power optimization study of the HPM generated from the reflex-triode vircator for various anode-cathode (AK) gaps. A horn antenna setup with diode detector and attenuators was used to measure the microwave power. The HPM frequency was measured with a D-dot probe along with a high band width oscilloscope. It was found that the microwave power and E-field peaks at 15 mm AK Gap and the frequency at this gap is 2.2 GHz. The highest microwave power is emitted when all the power is delivered into a single frequency with minimal mode hopping.
Characterizing Pattern Dependent Delay Effects in DDR Memory Interfaces

Designing high speed Double Data Rate (DDR) memory interface controller in low cost wire-bond packages is a difficult goal to achieve. The interface is limited at speed because of various factors such as Inter Symbol Interference (ISI), Power Delivery Network (PDN) noise, Cross talk etc. At high speeds like 1Gbps, Pattern dependent effects have a major role to play in DDR link budget analysis. Hence, selecting the right data pattern for DDR interface characterization becomes an important problem to solve. Little data exists on what patterns to use for DDR bus characterization and still lesser silicon data exists. This paper is an attempt to create an analysis technique to characterize high speed DDR interfaces. A set of data patterns is proposed. They can be used to characterize any source synchronous parallel bus interfaces like DDR etc. These data patterns simultaneously capture the effects of ISI, PDN noise and Cross talk, the major sources of noise or uncertainty in this case. We have built a case for proving that these patterns are indeed the worst from DDR timing prospective. DDR design space can thus be reduced by concentrating on these worst case data patterns only as compared to the complete set of patterns. Further, silicon results are shared, to prove the efficiency of our approach.
Robust watermarking using chaotic variations of AES in DWT domain

As a safeguard against piracy and counterfeiting as well as to establish owner's identity, watermarking technique is extensively used. In this paper, a robust watermarking technique has been proposed using the chaotic variation of Advanced Encryption Standard (AES) algorithm. For the robustness, Discrete Wavelet Transform (DWT) has been taken as the domain. The performance of this technique is evaluated by PSNR and NC values. Whenever, more security is required to the watermark (mostly for critical data), this technique can be applied where the secured version of AES algorithm is used for the watermark encryption.
Reliable Radiation Hybrid Maps: An Efficient Scalable Clustering-Based Approach

The process of mapping markers from radiation hybrid mapping (RHM) experiments is equivalent to the traveling salesman problem and, thereby, has combinatorial complexity. As an additional problem, experiments typically result in some unreliable markers that reduce the overall quality of the map. We propose a clustering approach for addressing both problems efficiently by eliminating unreliable markers without the need for mapping the complete set of markers. Traditional approaches for eliminating markers use resampling of the full data set, which has an even higher computational complexity than the original mapping problem. In contrast, the proposed approach uses a divide-and-conquer strategy to construct framework maps based on clusters that exclude unreliable markers. Clusters are ordered using parallel processing and are then combined to form the complete map. We present three algorithms that explore the trade-off between the number of markers included in the map and placement accuracy. Using an RHM data set of the human genome, we compare the framework maps from our proposed approaches with published physical maps and with the results of using the Carthagene tool. Overall, our approaches have a very low computational complexity and produce solid framework maps with good chromosome coverage and high agreement with the physical map marker order.
Used self-controllable voltage level technique to reduce leakage current in DRAM 4×4 in VLSI

As the technology improved to support very large chip sizes, system designers were faced with power consumption problem and leakage current problem. CMOS technology has increased in level of importance to the point where it now clearly holds center stage as the dominant VLSI technology In this research paper shows the implementation of a DRAM 4×4 (dynamic random access memory) with self controllable voltage level (SVL) technique. SVL technique is leakage current reduction technique. Simulation is done by using a microwind 3.1 and DSCH 2. By using a SVL technique in DRAM 4×4, 37% of leakage current is reduced.
FPGA based SHEPWM switching scheme for single phase cascaded H-bridge multi-level inverter

The aim of the present work is to develop and realize an appropriate switching scheme for different levels of multi-level inverter (MLI) with an intention to reduce the level of harmonics. Selective harmonic elimination pulse-width modulation (SHEPWM) switching scheme is implemented using field programmable gate array (FPGA) which is an effective digital controller for power electronic applications. FPGAs also provide extensive flexibility in change of bit-widths and parallel processing at instruction-level. The proposed switching scheme is tested with the developed experimental set-up consisting of a set of five H-bridge inverters containing twenty switches (for 11-level) that are switched using the pulses generated from FPGA. The experimental results for different levels of inverter with resistive load are reported along with the percentage total harmonic distortion (% THD) values and are compared with the theoretical calculation.
A broadband high linearity voltage variable attenuator MMIC

This paper discusses design and development of a 9–15 GHz high linearity voltage variable attenuator (VVA) realized using 0.25µm GaAs/InGaAs/AlGaAs pHEMT MMIC process. A cascade of Pi- and T-attenuator topologies provides necessary attenuation range and improves the linearity. Further linearity enhancement is achieved using stacked transistor structure in shunt arms. The simulated insertion loss of this VVA MMIC is less than 6dB over 9–15GHz. Dynamic range is over 12dB with third order input intercept point more than +20dBm at all attenuation values. Balanced structure provides return losses better than 15dB over entire frequency range. The chip area is 3.8×3 mm2.
Degradation mechanisms beyond device self-heating in deep ultraviolet light emitting diodes

Lifetime measurements on single, packaged UV LEDs were performed under constant current injection at 20 and 75 mA (60 and 226 A/cm2). The junction temperature at operation was found by micro-Raman spectroscopy to be 57 and 184 °C, respectively. Unbiased LEDs of similar characteristics placed in an oven baked at the equivalent operating junction temperatures showed a degradation in output power similar to that in the current injection devices during the initial 24 hours, but did not continue to degrade beyond that time. These studies imply that device heating, is correlated with the initial drop in output power during burn-in, but is not directly linked to the total degradation over the lifetime of the device. Time-resolved PL studies on the device active region as well as further electro-optic measurements indicate that the degradation is not due primarily to that of the active region, but may be associated with generation of point defects such as N-vacancies near the p-n junction.
Enhancing the beauty of fractals

Fractals are famous for their beauty and fractal techniques are employed for smaller storage space requirements when storing images. Fractal geometry has gradually established its importance in the study of image characteristics. The concept of multiple reduction copy machine (MRCM) has been used for creating fractals for a long time. A modified MRCM has been designed to generate fractal patterns. Using the concept of modified MRCM, we generate a new range of fractal images, which enhances the beauty of some well known fractals. This paper explains the way in which one can enhance the beauty by providing a nice looking shape with color to some black and white fractals.
Advanced solar water heater with electricity generation

The given paper deals with design of Reverse Flat Plate Collector which increases the efficiency of solar water heating system. Normal flat plate collector which is available in market has less efficiency due to various losses. Major losses being convection losses from absorber plate to glass which is 20 to 30 %. RFPC eliminates this loss and also we have used the same area for producing electricity using the solar voltaic plate. Experimental result is found to be that RFPC is better in efficiency.
Identification of craters on Lunar surface using hyperspectral chandrayan data

The aim of this paper is to identify Craters on Lunar surface on spectral basis by using Hyperspectral data since each landform of Moon have different spectral signature. Although Hyperspectral images contain a wealth of information due to its fine spectral resolution, the information is often redundant. It is therefore expedient to reduce the dimensionality of the data without losing significant information content then fractal based dimensionality reduction applied on high dimensional Hyperspectral data can be proved to be a better solution desired at a reduced computational complexity. Amongst a number of methods of computing fractal dimension, Multi Resolution Box Counting Method has been applied here. The experiments have been performed on a Hyperspectral data set acquired from HySI sensor of Chandrayan Satellite.
Economic analysis and design of stand-alone wind/photovoltaic hybrid energy system using Genetic algorithm

A well-designed and optimized hybrid energy system can be cost effective, has a high reliability and can improve the quality of life in remote rural areas. Hybrid system can be able to adapt to climate changes. In this study, Genetic Algorithm (GA) is developed for the prediction of the optimal sizing coefficient of wind/PV hybrid energy system in remote areas. The objective function for cost is constructed, which includes initial costs, yearly operating costs and maintenance costs. The hybrid system consists of photovoltaic panels, wind turbines, Diesel Generator and storage batteries. Due to the complexity of nonlinear integral planning in hybrid energy systems, Genetic algorithm is used to solve this problem. By use of Genetic algorithm operation strategy, the global optimal searching ability of the proposed algorithm is further improved. The improved Genetic algorithm can avoid to the local minimum trap. The developed GA Algorithm has been applied to design the wind/ PV hybrid energy systems to supply a varying load located in the area of Jaipur, Rajasthan (India). The optimal solution is achieved using proposed GA method and shows that the system can deliver energy in a stand-alone installation with an acceptable cost.
Contactless fingerprint identification using level zero features

Several recent research efforts in the biometrics have focused on developing personal identification using very low-resolution imaging resulting from widely deployed surveillance cameras and mobile devices. Identification of human faces using such low-resolution imaging has shown promising results and has shown its utility for range of applications (surveillance). This paper investigates contactless identification of such low resolution (∼ 50 dpi) fingerprint images acquired using webcam. The acquired images are firstly subjected to robust preprocessing steps to extract region of interest and normalize uneven illumination. We extract localized feature information and effectively incorporate this local information into matching stage. The experimental results are presented on two session database of 156 subjects acquired over a period of 11 months and achieve average rank-one identification accuracy of 93.97%. The achieved results are highly promising to invite attention for range of applications, including surveillance, and sprung new directions for further research efforts.
Pipelined architecture based overcurrent relay on FPGA

Communication between relays and the central control station is an important role in modern power systems. The relays are expected to perform sense-process-communicate cycles. A sequential implementation of these tasks increases the computational time and adversely affects the overall performance of the relay. This paper presents the design and hardware implementation of an overcurrent relay on Field Programmable Gate Array (FPGA) with concurrent pipelined architecture of sense-process-communicate cycles. Harmonics in the system affect the functioning of the relay due to the false tripping. The overcurrent relay employed FFT (Fast Fourier Transform) filter for isolating the fundamental component in the fault current to improve accuracy and avoid false tripping in the design. The relay is implemented on Xilinx Virtex-II Pro XC2VP30-FF896-7C FPGA Board. The proposed relay conforms to IEEE standard C37.112-1996 for overcurrent relays in power systems. It is equipped with serial/IP communication capability. The details of the hardware design, implementation and experimental test results on a hardware simulator of a 360 km transmission line are presented in this paper.
Low power and high speed 8x8 bit multiplier using non-clocked pass transistor logic

In this paper we have analyzed an 8-bit multiplier circuit using non clocked pass gate families with help of carry save multiplier (CSA) technique. The multiplier cell of the adder is designed by using pass transistors (n-transistors), p-transistors used as cross-coupled devices. The adder cell is designed by using multiplexing control input techniques. A combination of n- and p-transistors used on the mirror logic and inverters of full adder circuit. These multipliers are useful in the portable battery operated multimedia devices for energy efficient. The 8 bit multiplier circuit has been simulated using microwind3 VLSI layout CAD tool. We have analyzed the power dissipation, propagation delay, PDP and EPI (energy per instruction) and compared our results with other pass transistor logics as well as published results. From the simulated results it was found that the power dissipation and propagation delay are low in our designed non-clocked pass transistor logics. Our multiplier circuit shows a power dissipation improvement of 97.6% from Amir et.al and 46.30%, 23.24% and 0.15% from Rizwan et.al. Our multipliers gives better propagation delay compared to Rizwan et.al that are 89.56%, 88.39% and 88.31%.
Q locked loop to tune a high-Q high-frequency bandpass filter

A novel quality factor tuning scheme to tune a high-Q, high-frequency GmC bandpass filter is presented. The proposed Q tuning loop tunes the filter phase characteristics inside a phase locked loop system to tune its quality factor. Filter is used as a voltage controlled oscillator of the phase locked loop system. The proposed tuning scheme starts the 70MHz filter from a low-Q region (~ 10) and tunes its quality factor to ~50. The mathematical analysis and the loop stability of the proposed scheme is presented and analyzed. The proposed Q locked loop is simulated in 0.25mum CMOS process and simulation results are presented
Photo-Response of Low Voltage Flexible TIPS-Pentacene Organic Field-Effect Transistors

Photo-response of solution processed flexible TIPS-pentacene organic field-effect transistors is evaluated under illumination with visible light of red, green, and blue colors having minimum wavelengths of 620, 520, and 460 nm. For −10 V operation, pristine photo-OFETs exhibited average field-effect mobility of 0.11 cm<inline-formula> <tex-math notation="LaTeX">$^{2}\text{V}^{-1}\text{s}^{-1}$ </tex-math></inline-formula>, near zero threshold voltage, and current ON–OFF ratio of ~10<sup>5</sup>. These photo-OFETs exhibited prevalent photovoltaic characteristics with shift in the threshold voltage upon illumination, which was found to increase with rising intensity, illumination time, and gate bias during illumination. For low-voltage operation at −5 V, maximum current modulation of <inline-formula> <tex-math notation="LaTeX">$4\times 10^{4}$ </tex-math></inline-formula> and 10<sup>2</sup>, and photo-responsivity of 17 mA/W and 35 mA/W, respectively, were achieved for blue (intensity of 1.7 mW/cm<sup>2</sup>) and green (intensity of 0.4 mW/cm<sup>2</sup>) light illuminations. However, these photo-OFETs did not show significant response to red light. A fast dynamic response to periodic pulses of illumination was also observed. For a gate bias of +10 V and illumination time of 500 s, maximum current modulation of 10<sup>5</sup> was achieved for blue light illumination.
Integrating ocular and iris descriptors for fake iris image detection

Iris recognition has emerged as one of the most promising contactless biometrics technologies to provide automated human identification. Several national ID programs, such as Aadhar in India, incorporate iris biometrics to provide unique identity to millions of citizens. Therefore it is vital that integrity of such large scale iris deployments must also be safeguarded. Iris recognition technologies are increasingly becoming susceptible to sophisticated sensor level spoof attacks. This paper details the development of a new anti-spoofing approach which exploits the statistical grey-level dependencies in both the localized and global eye regions surrounding iris. We present experimental results on publicly available fake iris image database. The correct classification rate of 99.75% is obtained from the developed spoof iris detection approach using 1200 real and fake iris images and rom a publicly available database.
A New Method for Fingerprint Antispoofing using Pulse Oxiometry

The deployment of fingerprint sensors is increasingly becoming common and has now gained high user acceptance. However, fingerprint sensors are susceptible to spoofing using artificial materials or in worst case to the dismembered fingers. Fake/gummy fingerprints have shown to fool most commercial fingerprint systems. This paper proposes a new method of anti-spoofing using reliable liveness detection. The proposed method of liveness detection is based on pulse oximetry and involves the known source of light originating from a probe at two wavelengths. The light is partly absorbed by haemoglobin, by amounts which differ depending on whether it is saturated with oxygen or deoxygenated haemoglobin. We then perform the computations for the absorption at two wavelengths to estimate the proportion of haemoglobin which is oxygenated. The computed percentage of oxygen in the saturated blood, along with the heart pulse rate, determines the liveness of enrolled biometric. Our experimental results demonstrate that the developed prototype can successfully thwart the spoof attacks (including those based on dismembered fingers).
Incorporating Cohort Information for Reliable Palmprint Authentication

This paper presents a new approach to achieve the performance improvement for the traditional palmprint authentication approaches. The cohort information is used in the matching stage but only when the matching scores are inadequate to generate reliable decisions. The cohort information can also be utilized to achieve the significant performance improvement for the combination of modalities and this is demonstrated from the experimental results in this paper. The rigorous palmprint authentication results presented in this paper are the best in the literature and confirm the utility of significant information that can be extracted from the imposter scores. The statistical estimation of confidence level for the palmprint matching requires an excellent match between the theoretical distribution and the real score distribution. The performance analysis presented in this paper, from over 29.96 million imposter matching scores, suggests that Beta-Binomial function can more accurately model the distribution of real palmprint matching scores.