nils-herrmann/clean_scirepeval huggingface dataset:
A Simulation-based strategy used in electrical design for reliability

A hardware electrical design for reliability process is presented that uses extensive modeling and simulation to provide key information for design, component engineering, and reliability engineering to build robust designs that demonstrate design margin, identify critical features for operations (e.g. supply chain and final test), and enable predictive reliability. The methodology integrates reliability analysis into the hardware development process, thus improving design decisions and ensuring product reliability early in the life cycle. To demonstrate the methodology, simulation environment and model infrastructure of an ICD charge and delivery circuit have been accomplished, with methods of estimating component and subsequent circuit reliability presented. Furthermore, variability-based simulations were demonstrated to understand circuit performance limits and to properly define component selection and control strategies.
Differential energy modulation: Novel video labeling scheme for content fidelity and easy rate control

This paper proposes the differential energy modulation (DEM) algorithm for video watermarking The DEM algorithm embeds watermark bits by applying Quantization Index Modulation (QIM) to differential energy(DE). The energy difference between horizontal and vertical components in a quantized DCT block is modified by dithering values to make the DE consistent with a watermark bit quantizer. The suggested DEM algorithm is superior to QIM in robustness, since it chooses a region energy to carry a label bit, and spreads embedding distortion over values. On contrast, QIM labels with a coefficient instead. DEM also improves Differential Energy Watermarking (DEW)'s low capacity while preserves image quality, because DEW had to employ many blocks to carry a bit to avoid artifacts and guarantee valid energies. Experiments demonstrate this conclusion. Besides, DEM is a high perceptual and easy rate control scheme. It is robust to attacks of frame dropping, image cropping and additive white Gaussian noise.
A Control Strategy and Design Method for Interleaved LLC Converters Operating at Variable Switching Frequency

LLC converters face challenges in high-current applications, where the high conduction loss limits the maximum load capacity and reduces efficiency. Interleaving technique can be used to solve this problem, but the component tolerances of the resonant tanks will cause severe load sharing problem. The SCC-LLC converter was proposed to solve the load sharing problem. However, due to its constant switching frequency operation, it has some limitations over complete line and load variation compared to conventional LLC converters. In this paper, a new control strategy is proposed for the SCC-LLC converter, which enables variable switching frequency operation; thus, it provides uncompromised performance while achieving interleaved operation. Analyses and a design method are provided, and a 600-W two-phase interleaved SCC-LLC prototype is built to verify the feasibility.
A Neural Network Model for Chinese Character Perception

As we know, there is a debate on the mode of visual perception for a long time, that is, does the visual system acquire percept from local to global or from global to local. A three-layer perceptual model with function of signal decomposition and integration is developed, and Chinese character grapheme is chosen to train the model. The model is trained under different initial conditions and simulation results show that both of the perceptual modes may exist with different probability which is determined by the differentiation state of the neurons, perceptual object and the environment. Under the framework of complexity theory, further analysis reveals that the emergence phenomena exist in both of the perceptual modes.
Denoising of Spectral Signal in Miniature Spectrometer Based on Stationary Wavelet Transform

In process of real time acquisition and transmission, the spectral signal obtained by miniature spectrometer may contain noise signals superposed on it. But the traditional denoising methods can't achieve the expected performance because of their limitations. A de-noising method for spectral signal in miniature spectrometer based on Stationary Wavelet Transform (SWT) is proposed. We compared the performance of our de-nosing method with that of the traditional method. Simulation and experimental results prove that using sym5 basis, decomposition at level 5, soft shrinkage function with heuristic SURE threshold rule achieved superior performance in miniature spectrometer spectral signal denoising.
Digitally Controlled Energy Harvesting Power Management System

Intermittent energy harvesting devices often have difficulties in harvesting the peak energy generated due to battery power limitations, which increase the size and cost of the device. This paper discusses a power electronics module (PEM) that is used to extract power from a human energy harvesting device according to the user's desired difficulty level while maximizing energy transfer into a battery. The PEM can temporarily store the peak power produced by the generator, allowing a reduction in the battery size required to regulate the average power produced by the harvester. A two-stage prototype (a digitally controlled average current mode boost converter and an average current mode buck converter) has been designed, and the experimental waveforms were captured to validate the control theories used in the PEM. The peak efficiencies of the boost and buck are measured to be 93% and 93.7%, respectively. The total PEM system efficiency is measured at 87.9% at an average input power level of 10 W. The PEM design was able to extract 50% more power than the single-stage converter without energy storage capability. The PEM is also used to demonstrate the flexible resistance control scheme capabilities of the device for broader usage in bioenergy harvesting research.
Convex relaxation based detection of binary data

The issue of binary data detection under subsampling condition is addressed in this work. Through convex relaxation, the original combinatorial optimization problem is transformed to an ℓ∞ minimization problem which can be efficiently solved by ℓp approximation algorithm with sufficiently large p. Theoretical analysis and simulations indicate that when the number of sampled signals is around half of original binary vector, the reconstruction probability increases rapidly and gets close to 1. Compared with semidefinite programming algorithm, the convex relaxation based detection scheme has lower computational complexity while keeping similar reconstruction accuracy. Moreover, it is shown that ℓ∞ is robust against additive noise.
Complex Event Processing Engine for Large Volume of RFID Data

With the widespread usage of RFID technology, complex event processing becomes a very important part in RIFD system. In order to improve the working efficiency of the system and provide semantic results to the enterprise application, it is necessary to transform the raw RFID data into meaningful events. However the RFID data stream has unique features compared with the traditional data stream such as large volume and real-time processing. In this paper, we propose a complex event processing engine to deal with the large volume of RFID data based on data stream management system. Moreover, a query language and a model for detecting RFID complex events are also introduced.
A Porn Video Detecting Method Based on Motion Features Using HMM

This paper proposes a method of identified reciprocating motion in pornographic video from other human action using Hidden Markov Model (HMM). The motion vectors are obtained by decoding the compressed MPEG video. Then the feature vectors are extracted by calculating the direction and the magnitude of the motion vectors. The feature vectors are fed to Hidden Markov Model for training and classification of actions. Six actions were trained with distinct HMM for classification. The correct recognition result is up to 90%.
A single-stage zero-voltage switched PWM full-bridge converter with power factor correction

A new single-stage converter is proposed in this paper. The converter operates with fixed switching frequency, and with a continuous input current that is sinusoidal and in phase with the input voltage. This is in contrast with most other single-stage converters, which are either resonant converters or must operate with a discontinuous input current. All converter switches operate with soft-switching due to a simple auxiliary circuit that is used for only a small fraction of the switching cycle. In the paper, the operation of the converter is explained and analyzed, and design guidelines are given. The feasibility of the converter is shown with results obtained from an experimental prototype.
A Single-Stage Primary-Side-Controlled Off-line Flyback LED Driver With Ripple Cancellation

Ripple cancellation LED driver can achieve flicker-free LED driving while maintaining high power factor, high efficiency, and low component cost. It is a very competitive solution compared to a conventional single-stage or two-stage LED driver design. In this paper, a primary-side-controlled ripple cancellation LED driver has been proposed. The voltages of the proposed LED driver are sensed at the primary side by transformer sensing windings. The LED current is also obtained by sensing the primary-side switching current. The entire control circuit is built on the primary side. All the advantages from the existing ripple cancellation LED drivers are maintained while achieving the primary-side control. Based on the proposed circuit, a potential integrated primary-side controller can be designed, which can significantly reduce the component cost and design complexity. A 30-W, 50-V, 0.6-A experimental prototype with a universal input voltage range has been built to verify the proposed LED driver.
An auto-offset-removal circuit for chemical sensing based on the PG-ISFET

This paper presents a novel readout circuit for a pH sensitive Programmable-Gate Ion-Sensitive Field Effect Transistor (PG-ISFET) to overcome bias issues due to threshold voltage variation and increase output-referred sensitivity. Compared to other commonly-used ISFET readouts, this circuit uses two extra programmable nodes which are driven by a feedback configuration. Using the device in a source follower configuration, one node is used to evaluate and cancel the offset of the intrinsic device while the other tracks and amplifies changes in pH. A sample and hold protocol has been developed to minimize the leakage effects and improve the pH sensing range. The system has been designed and fabricated in AMS 0.35µm, to compensate for a threshold voltage variation of ±10.5V and provide a pH sensitivity of 200mV/pH.
A novel resonant converter topology for DC-to-DC power supply

A class-E DC-to-DC converter with half-wave controlled current rectifier is proposed. Its output voltage is controlled by the conduction angle of the rectifier switch at constant switching frequency. Zero voltage switching for all the switches can be maintained from full load to no load. Its steady state characteristics are analyzed and the effects of the circuit parameters are studied. Some extensions of the proposed converter are also discussed. The analysis is verified by PSPICE simulation and an experimental prototype.<<ETX>>
Circularly polarized reflectarray realized by anisotropic metasurface

A single-layer circularly polarized (CP) reflectarry realized by using an anisotropic metasurface has been proposed in the paper, which is fed by a linearly polarized (LP) pyramidal horn with normal incidence. The metasurface is made up of double orthogonal I-shaped structures and a metal-grounded plane spaced by a single-layer dielectric substrate of F4B, which has capacity to manipulate the reflective phases of the vertical and horizontal polarized waves independently by changing the dimensions of each I-shaped structure. Based on the double orthogonal I-shaped structures, a feed-forward 306mm×306mm reflectarray is designed to provide a CP pencil-beam far-field pattern pointing at θ=30° and φ=135°, so that the reflected beam can avoid the blockage of feeding horn. The full-wave simulation results clearly show that the linearly polarized incident waves emitted from pyramidal horn are quickly converted to circular polarized plane waves after reflected by the designed anisotropic metasurface in a broad frequency band.
An optimized efficiency-based control strategy for islanded paralleled PV micro-converters

This paper analyzes the operation of PV modules in islanded paralleled PV applications under different solar irradiance condition in detail. When the batteries in the system are fully charged, the PV panels only need to generate power depending on the load and may not necessarily track the maximum power point (MPP), which exists extensively. In order to optimize the system efficiency in this situation, an efficiency-based model is built and a control strategy that can distribute the output power of different PV modules to find minimum total loss of the system is proposed. The system efficiency can be optimized adaptively under different load and irradiance condition with the proposed strategy. A distributed system prototype with three converters in parallel has been built and tested. The experimental results verified the benefits of the proposed strategy.
An Optimal Control Method for Buck ConvertersUsing a Practical Capacitor ChargeBalance Technique

A novel control method is presented in this paper which utilizes the concept of capacitor charge balance to achieve optimal dynamic response for buck converters undergoing a rapid load change. The proposed charge balance method is implemented with analog components and is cheaper and more effective than its digital counterparts since complex arithmetic and sampling delay is eliminated. The proposed controller will consistently cause the buck converter to recover from an arbitrary load transient with the smallest possible voltage deviation in the shortest possible settling time. Since the controller is nonlinear during transient conditions, it is not limited by bandwidth/switching frequency. Unlike conventional linear controllers, the dynamic response (voltage deviation, settling time) of the proposed controller can be estimated using a set of equations. This greatly simplifies the design process of the output filter. Simulation and experimental results show the functionality of the controller and demonstrate the superior dynamic response over that of a conventional linear controller.
A high voltage-gain LLC micro-converter with high efficiency in wide input range for PV applications

This paper proposes a novel high voltage-gain LLC micro-converter for PV applications. The converter has simple structure and minimum components with low cost. It can realize high voltage gain based on the voltage doubler rectifier with the optimal turns ratio. The main power switches can achieve ZVS and the output diodes can realize ZCS in wide input and load range. By utilizing the voltage doubler in the secondary side, the voltage stress over the output diodes can be reduced by half compared to the conventional center-tapped full-wave rectifier. A 24-48 V input, 380 V output and 200W prototype was built to verify the benefits of the proposed converter. The achieved efficiency of the converter peaks at 96.6% and the CEC weighted efficiency reaches 95.4%.
A power and area efficient CMOS charge-pump phase-locked loop

In this paper, a power and area efficient charge-pump phase-locked loop (CPPLL) is proposed. The design utilizes a top-down methodology to determine system parameters. The PLL is implemented in 0.18μm CMOS technology and its supply voltage is 1.8V. The PLL has in input clock frequency of 25MHz and an output clock frequency of 0.8-1.6GHz with 50μm*110μmactive area. Measurement results show that the PLL without output buffers consumes 11.7mW and the root-mean-square jitter of the VCO at 1.6GHz is 7.37ps.
A scheme for key distribution in wireless sensor network based on Hierarchical Identity-Based Encryption

Traditional method of key distribution does not fit the need to run in wireless sensor network (WSN) due to limitation on energy, computation and memory capacity of WSN. In this paper, we propose a scheme based on Hierarchical Identity-Based Encryption (HIBE) to distribute encrypt key. Comparing with key distribution based on Identity-Based Encryption (IBE), the proposed scheme reduces the computation time and saves memory space of wireless sensor node.
Accelerated 3D full band self-consistent ensemble Monte Carlo device simulation utilizing intel MIC co-processors on tianhe II

We use Intel Xeon Phi Many Integrated Core (MIC) to accelerate our 3D full band self-consistent ensemble Monte Carlo simulator. We put Quantum Correction part onto MIC and others are still processed on CPU. We compare results between this newly developed MIC+CPU mode and traditional all-on-CPU mode in three different situations. We find that MIC co-processors are suitable for 3D MC simulation with large grid number and large-number computing nodes.
Bang-Bang Charge Control for LLC Resonant Converters

This paper proposes a Bang-Bang Charge Control (BBCC) method for LLC resonant converters. Instead of switching frequency control, the BBCC method utilizes the series resonant capacitor voltage level to trigger the MOSFETs' switching actions. Advantages of the proposed method include fast dynamic performance and simple implementations. Small-signal analysis shows that the loop bandwidth can achieve around 1/6 of the switching frequency in all operating conditions. Experimental results show that 5 to 25 A load step transients are completed within only seven switching cycles at both 400- and 300-V input-voltage conditions. Practical considerations are also discussed in detail.
Accurate switching loss model and optimal design of a current source driver considering the current diversion problem

A new analytical switching loss model for power MOSFETs driven by Current Source Drivers (CSDs) is presented in this paper. The gate current diversion problem, which commonly exists in CSDs, is analyzed. In addition, the proposed loss model considers the Miller Plateau. The optimal design of current source driver is achieved which minimizes the total power loss for the Buck converter. The experimental result verifies the theoretical analysis. Compared with previous work, the efficiency at 1MHz with the optimal current source inductor is improved from 86.1% to 87.6% at 1MHz switching frequency, with 12V input, 1.3V/20A output, and from 82.4% to 84.0% at 1MHz switching frequency, with 12V input, 1.3V/30A output.
Damage detection for plate-like structure based on Lamb wave and time reversal theory

A damage detection method is presented by using Lamb wave and time frequency analysis. The propagation characteristics of Lamb waves in plate-like structure, with emphasis on group velocity and characteristic wave curves are investigated theoretically. Hilbert-Hung transform is applied to the wave signals in the time-frequency domain to enhance the time reversibility of Lamb wave in plate-like structure, then a damage imaging technique is developed by using the time reversal method.
Effect of curing time on cell structures

In this paper, the HL7702 cells were cured with 4% paraformaldehyde for different time durations. The atomic force microscope (AFM) and atomic force acoustic microscope (AFAM) were used to observe the surface and subsurface properties of the cured cells. The structures of the cells were changed with the curing time including the cytoskeleton, the shape, the height and the roughness of the cells. The lamellipodium can be seen for the curing time of 15 minutes with 4% paraformaldehyde. The optimal curing time was 15 minutes. This work provides a method for the study of cured cells in biomedicine.
A strip level data layout strategy for heterogeneous parallel storage systems

Parallel file systems commonly distribute a file across multiple file servers with a fixed-size strip, so that the data access can be served through multiple devices simultaneously, which is similar to RAID 0. The default data layout works well in traditional homogeneous storage systems, but as the Solid state disks (SSD) are conduct into storage system, the data layout of heterogeneous parallel storage systems need to reconsider in order to get a better performance. In this paper, we propose a strip level data layout strategy for heterogeneous parallel storage systems (SLDP), which find the optimal strip configurations for each solid state disk file server node (SNode)and mechanical hard disk drive file server node (HNode), according to data access pattern, along with the consideration of the limitation of SSD space, use variable strip size to reorganize the data layout of storage systems. the main idea is let the key regions of file get the optimal strip configuration, which can obviously improve the system performance, and rest part of the file are distributed according to the SSD free space threshold, which may reduce the system performance, SLDP can find a data layout that makes the improvement is much bigger than the reduction, so that to get totally better performance of the heterogeneous storage system. Experimental results show that the SLDP is feasible and can improve system performance.
A New Methodology for Building Ontology Based on Reusing the Heterogeneous Ontologies

Building ontology is a craft rather than an engineering activity. Many research institutions spend a great deal of money, material, manpower and time but the results are still very superficial and immature. An effective approach to construct ontology is demanded urgently. For this purpose, we propose a new method, BBR (build by reuse) in this paper. With this method, you needn't formalize concept by experts every time. However the exactitude could be ensured. Furthermore, ontology built by this method covers conceptions of domain in maximum and has stronger extensibility.
Cultivar differences of aboveground rice (Oryza sativa L.) plant morphology and their correlation with yield

The objectives of this paper were to examine cultivar differences of aboveground rice plant morphology and structure at the early tillering stage, and analyze its potential correlations with yield. The 4 rice cultivars, Liangyou108 (hybrid long-grain rice, V1), 86You8 (hybrid round-grain rice, V2), Nanjing43 (round-grain rice, V3), and Yangtao6 (long-grain rice, V4), were grown in field. Their rice plant morphology and structure (RPMS) parameters and yield were measured. The 1st, 2nd, and 3rd leaf blade length, width, and bowstring length on the main stem, and the 1st leaf sheath length, tangent angle, and bowstring angle (between blade and main stem) among 4 cultivars at the 3rd or 4th maximum blade length period on the main stem all had significant differences (P<0.01). The 1st leaf sheath length at the 4th maximum blade length period on the main stem had high positive correlation with yield, with significant (r=0.96) in 2007 at p<0.05, and the 1st maximum blade width on the main stem at the 3rd maximum blade length period on the main stem was negatively correlated with yield, with significant (r= −0.99) in 2008at p<0.05. These results provided an initial scientific basis for using morphological and structural parameters for forecasting early yield potential and selecting characters of plant morphological types for high yielding.