nils-herrmann/clean_scirepeval huggingface dataset:
Obstacle avoidance path planning strategy for robot arm based on fuzzy logic

In this paper, a novel path planning strategy based on fuzzy logic for a robot arm with a fixed pedestal is proposed, and the simulation environment conditions in which the robot arm works are specific and unpredictable. First, considering a simple working platform set in front of the robot arm system, it will become an obstacle when robot is working. Second, an obstacle avoidance path planning strategy is designed and the coordinates of robot arm end are used to achieve close-loop control. In addition, fuzzy control theory is applied to design a fuzzy path planning controller, and a dangerous sign is introduced to avoid obstacle. Finally, the experiments simulated on a two-joint robot arm with a fixed pedestal is given. The results show the feasibility and safety of the proposed path planning strategy.
A forward-viewing ring-annular array for intravascular ultrasound imaging

We have investigated IVUS array design and image synthesis methods allowing simultaneous sideward imaging at 20MHz and forward imaging at 10MHz. This design is appropriate for over-the-wire delivery but limits the forward-viewing aperture to a ring-annular array. In particular, a 1200/spl mu/m diameter ring-annular array with 64 elements has been constructed. The measured forward-viewing radiation pattern of an individual element indicates an acceptance angle range of over 90/spl deg/. Our beam synthesis involves a total of 210 transceiver firings in a synthetic imaging mode for a given 3D frame. Broadband simulations demonstrated this design can achieve side-lobes under -40dB for on-axis situations and under -30dB for steering to the edge of a 60/spl deg/ cone.
A low power baseband processor with clock variance-tolerant for UHF RFID transponder

A novel low-power digital baseband processor for a passive UHF RFID transponder in compliance with the ISO 18000-6B protocol is presented in this paper. By analysing the system requirement, different techniques are proposed for reducing power consumption. Furthermore, a novel clock generating scheme is implemented to accommodate the fluctuation of the frequency from the local oscillator. The chip was designed in TSMC 0.18μm mixed-signal CMOS process, and the area of the proposed baseband processor is 0.71mm×0.155mm. Post-layout simulation results show that the baseband processor dissipates only 0.92uW at 1.28MHz clock.
An early warning system in explosion operations based on Wireless Sensor Network

The blasting spot monitoring is very important to reduce the occurrence of emergencies and to protect the workers' safety in practical applications. In this paper, we design an early warning system based on WSN (Wireless Sensor Network) which can be used in explosion operations. This system consists of two parts: the hardware part mainly uses several sensors to capture data we need and transmits them to the monitor center through wireless module; the software part mainly receives and processes the captured data, then analyzes the parameters to judge whether the environment parameters are abnormal, if yes, it will alarm in advance to protect the workers. Experiment results show that this system can alarm correctly when the environment parameters are out of limit, which improves the system's reliability and gets some social economic benefits in the meantime. This system does have a grand application prospect.
HEVC-compliant screen content transcoding based on mode mapping and fast termination

In this paper, a novel screen content (SC) transcoding framework is presented to efficiently bridge High Efficiency Video Coding (HEVC) and its Screen Content Coding (SCC) extension and support the bitstream backward-compatibility over legacy HEVC devices. Based on the side information analysis of SCC bit-stream, fast mode and partition heuristics are designed to accurately determine the mapping between novel SCC modes and conventional HEVC modes. Compared with the trivial SCC-HEVC transcoding solution, the proposed framework achieves a 42% re-encoding complexity reduction over standard JCT-VC screen content sequences with only 0.52% negligible BD-Rate loss under All-Intra (AI) configuration.
Intelligent Random Vector Generator Based on Probability Analysis of Circuit Structure

Design verification has become a bottleneck of modern designs. Recently, simulation-based random verification has attracted a lot of interests due to its effectiveness in uncovering obscure bugs. Designers are often required to provide the input probabilities while conducting the random verification. However, it is extremely difficult for designers to provide accurate input probabilities. In this paper, we propose an iterative algorithm that derives good input probabilities so that the design intent can be exercised effectively for functional verification. We conduct extensive experiments on both benchmark circuit and industrial designs. The experimental results are very promising
Cross-Regulation Suppression and Stability Analysis of Capacitor Current Ripple Controlled SIDO CCM Buck Converter

For a single-inductor dual-output (SIDO) dc–dc converter operating in continuous conduction mode (CCM), load variation of one output will affect the voltage of the other output, i.e., there exists cross regulation between its two outputs. To suppress the cross regulation of the SIDO dc–dc converter operating in CCM, a novel ripple based control technique, called capacitor current ripple (CCR) control technique, is proposed in this paper. The operation principle of the SIDO CCM buck converter and the proposed CCR control technique are presented. The small signal model of the CCR-controlled SIDO CCM buck converter is established by the state space averaging method. Bode plots based on small signal model show that the proposed CCR-controlled SIDO CCM buck converter significantly reduces cross regulation and improves the transient performance compared with the peak current mode controlled SIDO CCM buck converter. In addition, the effect of the variation of loads on the stability of the proposed CCR-controlled SIDO CCM buck converter is analyzed by eigenvalues analysis. Finally, experimental results are provided to verify the analysis results.
Coordinate Descent Fuzzy Twin Support Vector Machine for Classification

In this paper, we develop a novel coordinate descent fuzzy twin SVM (CDFTSVM) for classification. The proposed CDFTSVM not only inherits the advantages of twin SVM but also leads to a rapid and robust classification results. Specifically, our CDFTSVM has two distinguished advantages: (1) An effective fuzzy membership function is produced for removing the noise incurred by the contaminant inputs. (2) A coordinate descent strategy with shrinking by active set is used to deal with the computational complexity brought by the high dimensional input. In addition, a series of simulation experiments are conducted to verify the performance of the CDFTSVM, which further supports our previous claims.
Image smoothing based on local image models

On the basis of an algorithm which identifies the neighborhood of a pixel as constant, oriented, or irregular based on the spatial relationship among the pixels inside this neighborhood, the use of different smoothing schemes according to the neighborhood surrounding each pixel is proposed. This approach is applied to images corrupted with additive Gaussian noise and impulse speckle noise. The flat regions of an image are smoothed sufficiently, while linear structures are enhanced.<<ETX>>
One-Pass Mode and Motion Decision for Multilayer Quality Scalable Video Coding

This paper presents a novel low-complexity motion estimation and mode decision algorithm for encoding multiple quality layers following the H.264/scalable video coding standard, considering both coarse grain scalability (CGS) and medium grain scalability (MGS). The proposed algorithm conducts motion estimation and mode decision only at the base layer (BL) and enforces the higher layers to inherit the motion and mode decisions of the BL. In order for the decision made at the BL to be nearly optimal for all layers, we use the highest layer reconstructed frame as the reference frame for motion estimation and set the Lagrangian multipliers according to the quantization parameter of the current and higher layers. We also propose a simple early skip/direct decision to further boost the encoding speed. Mode decision and motion estimation is conducted at a higher layer only if the layer below it uses the skip/direct mode for a block. Significant complexity reduction can be achieved because the mode and motion estimation is performed at most once for each macroblock. Because the mode and motion information only needs to be transmitted once, we also achieve a slightly better rate-distortion (R-D) performance for typical videos. Experiments have shown more than 2× (up to 5×) speedup for a three-layer encoder against the conventional R-D optimized reference software JSVM on both CIF and HD sequences, and for both CGS and MGS, with the tradeoff of the coding efficiency measured by the Bjontegaard delta rate.
An Urban-Rural Dual Structure for the Digital Terrestrial Television Broadcasting System of FOBTV

In this paper, the requirements of digital terrestrial television broadcasting are analyzed. One structure, named as urban-rural dual structure, is emphasized in the future broadcasting system, especially in those developing countries, such as China, Russia, and Brazil. A comparison between Shanghai and Fengyang in China is given to help understanding this unique structure. Some technical consideration on the structure is presented for the future of broadcast television.
Aggressive pipelining of irregular applications on reconfigurable hardware

CPU-FPGA heterogeneous platforms offer a promising solution for high-performance and energy-efficient computing systems by providing specialized accelerators with post-silicon reconfigurability. To unleash the power of FPGA, however, the programmability gap has to be filled so that applications specified in high-level programming languages can be efficiently mapped and scheduled on FPGA. The above problem is even more challenging for irregular applications, in which the execution dependency can only be determined at run time. Thus over-serialized accelerators are generated from existing works that rely on compile time analysis to schedule the computation. In this work, we propose a comprehensive software-hardware co-design framework, which captures parallelism in irregular applications and aggressively schedules pipelined execution on reconfigurable platform. Based on an inherently parallel abstraction packaging parallelism for runtime schedule, our framework significantly differs from existing works that tend to schedule executions at compile time. An irregular application is formulated as a set of tasks with their dependencies specified as rules describing the conditions under which a subset of tasks can be executed concurrently. Then datapaths on FPGA will be generated by transforming applications in the formulation into task pipelines orchestrated by evaluating rules at runtime, which could exploit fine-grained pipeline parallelism as handcrafted accelerators do. An evaluation shows that this framework is able to produce datapath with its quality close to handcrafted designs. Experiments show that generated accelerators are dramatically more efficient than those created by current high-level synthesis tools. Meanwhile, accelerators generated for a set of irregular applications attain 0.5x∼1.9x performance compared to equivalent software implementations we selected on a server-grade 10-core processor, with the memory subsystem remaining as the bottleneck.
Augmented Cell Performance of NO-Based Storage Dielectric by N$_2$ O-Treated Nitride Film for Trench DRAM

Owing to the delayed introduction of high-kappa storage dielectric for trench DRAM, a new technology to extend the existing NO storage dielectric becomes a prerequisite. For trench DRAM, the nitride film of NO-based storage dielectric has been proved to possess higher quality by proper treatment, which enables further reduction in nitride thickness and extension of scaling limit for the existing storage dielectric. A 164% leakage current improvement without sacrificing the cell capacitance can be achieved through this process, while keeping the outstanding reliability performance of less than 438 ppm failure rate after a ten-year operation. Most importantly, this new process can be fully integrated into incumbent furnace process, which means that no additional tool investment is required, and it is crucial for trench DRAM manufacturers to maintain their competitive advantage before the high-k material prevails at 65 nm technology node.
Prediction of longterm outcome of neuropsychological tests of MTBI patients using imaging features

Mild Traumatic Brain Injury (MTBI) is a growing public health problem with an underestimated incidence of over one million people annually in the U.S. Neuropsychological tests are used to both assess the patient condition and to monitor patient progress. This work aims to use features extracted from MR images taken shortly after injury to predict the performance of MTBI patients on neuropsychological tests one year after injury. Successful prediction can enable early patient stratification and proper treatment planning. The goal of this project is to determine the most effective features and corresponding prediction method for such prediction. The main challenge is that we have only limited training data, from which we need to develop the prediction method that can be expected to provide accurate prediction results for unseen data. In the machine learning literature, feature selection is usually done to minimize the cross validation error, which still has a chance for overfitting if the available data set is small and noisy. We propose a novel criterion for feature selection, which considers both the cross validation error and the prediction model variance, to further reduce the chance for overfitting. The algorithm is applied to a data set of 15 MTBI patients. The proposed method was able to determine a subset of MR image features for predicting each neuropsychological test to yield both small prediction error and prediction variance.
Capillary electrophoresis electrochemical (CE-EC) detection on a novel thread-based microfluidic device with 3D sensing electrodes

Capillary electrophoresis (CE) has been used in a number of bio-analytical detection in the past decays . This detection scheme has high separation efficiency and rapid detection capability. Fluorescence detection is the most common adopted method in capillary electrophoresis system. However, fluorescence detection approach relies on fluorescence labeling and delicate optical excitation and detection components. Alternatively, electrochemical detection can rapid detect the electrical changes caused by the passing samples . The combination of capillary electrophoresis separation and electrochemical detection (CEEC) has been used in a variety of application. CEEC detection was usually carried out using the amperometric detection method. However, typical CE chips are with closed-channel design which needs a number of microfabrication process including micro-channel forming and chip bonding to form the sealed microfluidic channel. Therefore, the fabrication process for producing typical CE chip is comparable time-consuming and expensive. Consequently, to use polymers as substrates for microchip fabrication is faster and cheaper way than glass device and can be fabricated without accessing the clean-room facilities [3, 4]. One major problem for using the microfluidic chips with physical channels is that these chips may suffer from pollutions or clogging while repeating using these chips. Due to the difficulty for cleaning sealed microfluidic channels. Disposing the chip can simple solve this problem but the cost is another issue. Therefore, it is beneficial to develop microfluidic systems without using physical sealed channels, or so-called non-channel based microfluidic systems.
Adaptor-Based Design and Implementation of Peer-to-Peer SIP

SIP (session initial protocol) is a signaling protocol widely used in IP-based multimedia communication. Recently, P2PSIP reduces the deployment and maintenance cost, as well as improves the robustness and scalability of SIP-based system. SIP, P2PSIP network will coexist in the forthcoming future. This paper focuses on the P2PSIPand its relationship with SIP. We design and implement a P2PSIP adaptor, which allows traditional SIP UAs to access to P2PSIP network. This allows P2PSIP to reuse the work in traditional SIP and makes transition from SIP to P2PSIP seamlessly. The P2PSIP adaptor can also be utilized for P2PSIP interworking by two existing interworking approaches.
Region segmentation based on active mesh representation of motion: comparison of parallel and sequential approaches

An active mesh representation of motion has been developed by the authors. It describes the motion in an image sequence by the trajectories of a set of nodes that form a mesh (also known as a control grid). In this paper we investigate how to cluster the nodes, or equivalently the mesh elements, so that the nodes in the same group have similar global motions. We present and compare two approaches. The parallel approach first finds a set of global motion parameters for each element and then partitions these parameters using the K-means clustering algorithm; The sequential (or layered) approach recursively extracts the nodes with the dominant motion from all the nodes, using a modified robust regression algorithm.
Analysis and prediction of weather impacted ground stop operations

When the air traffic demand is expected to exceed the available airport's capacity for a short period of time, Ground Stop (GS) operations are implemented by Federal Aviation Administration (FAA) Traffic Flow Management (TFM). The GS requires departing aircraft meeting specific criteria to remain on the ground to achieve reduced demands at the constrained destination airport until the end of the GS. This paper provides a high-level overview of the statistical distributions as well as causal factors for the GSs at the major airports in the United States. The GS's character, the weather impact on GSs, GS variations with delays, and the interaction between GSs and Ground Delay Programs (GDPs) at Newark Liberty International Airport (EWR) are investigated. The machine learning methods are used to generate classification models that map the historical airport weather forecast, schedule traffic, and other airport conditions to implemented GS/GDP operations and the models are evaluated using the cross-validations. This modeling approach produced promising results as it yielded an 85% overall classification accuracy to distinguish the implemented GS days from the normal days without GS and GDP operations and a 71% accuracy to differentiate the GS and GDP implemented days from the GDP only days.
Effects of YAG: Ce phosphor particle size on optical performance of white LEDs

YAG: Ce phosphor is widely used in LED industry with powder form to mix with silicone. The phosphor particle size is important by affecting optical performance of white LEDs in terms of luminous flux and angular color uniformity. This paper constructed a white LED optical model referring to CREE white LEDs. The optical simulation reveals that 2 μm phosphor particle presents the lowest luminous flux and the best angular color uniformity. Particle size larger than 10 μm has the ability to generate the highest luminous flux, but its angular color uniformity is deteriorated seriously. To obtain high luminous flux and moderate angular color uniformity, it is suggested to apply particle size with its range from 6 μm to 8 μm.
Discrete multiwavelet transform method to fusing Landsat-7 panchromatic image and multi-spectral images

To take advantage of high spectral resolution of Landsat-7 multi-spectral images and high spatial resolution of Landsat-7 panchromatic image, a method to fuse the two data types based on discrete multiwavelet transform is presented in this paper. Experimental results show the presented technique is better than hue-intensity-saturation, principal component analysis, and discrete wavelet transform in preserving both spectral and spatial information.
Comparison of block-based and mesh-based motion estimation algorithms

In this paper, two mesh-based motion estimation algorithms are presented. Both algorithms compute the nodal motions in a hierarchical manner. Within each hierarchy level, the first algorithm (HMMA) minimizes the prediction error in the four elements surrounding each node, where the prediction is accomplished by a bilinear mapping. The optimal solution is obtained by a full search within a range defined by the topology of the mesh. The second algorithm (HBMA) minimizes the error in a block surrounding each node, assuming the motion in the block is constant. The two algorithms are compared with an exhaustive block matching algorithm (EBMA) by evaluating their performances in temporal prediction and in an H.263/TMN4 coder. In terms of the PSNR measure, the three algorithms achieve quite similar performances. However, HMMA and HBMA avoid blocking artifacts introduced by EBMA. HMMA outperforms HBMA slightly for certain sequences at the expense of higher computational complexity.
Design of prioritized LRU circuit for shared cache in real-time computer systems

This paper presents a prioritized LRU (least recently used) cache replacement circuit that directly accomplish the prioritized operation inside the cache circuits, which significantly reduces cache access latency. The performance, hardware and power overheads due to incorporating prioritized operations in cache circuits are investigated based on a 65nm CMOS technology. It shows the design of prioritized cache has very low overhead compared to the conventional cache circuit. The presented circuit technique will lead to more effective prioritized cache implementations and benefit the development of high-performance real-time systems.
Fabrication of ultra-thin silicon chips using thermally decomposable temporary bonding adhesive

A technical challenge in fabrication of ultra-thin sensor chip (UTSC) is to keep chip integrity in debonding the ultra-thin chips from grinding facilities. This paper presents a new debonding method by utilizing a thermally decomposable polypropylene carbonate (PPC), as the temporary bonding adhesive. Because PPC can readily decompose at relatively low temperature, this method can maintain the chip integrity even the chips have a thickness of tens of microns. UTSCs with thickness of 30μm have been achieved using this method, and stress sensors have been developed to verify the performance of UTSC. The experimental results show that the proposed method is able to fabricate UTSC with good flexibility and characterizations, demonstrating the newly proposed method an enabling technology for fabrication of sensors for flexible and wearable applications.