neulab/tldr huggingface dataset:
.linkonce [type] Mark the current section so that the linker only includes a single copy of it. This may be used to include the same section in several different object files, but ensure that the linker will only include it once in the final output file. The .linkonce pseudo-op must be used for each instance of the section. Duplicate sections are detected based on the section name, so it should be unique.
This directive is only supported by a few object file formats; as of this writing, the only object file format which supports it is the Portable Executable format used on Windows NT.
The type argument is optional. If specified, it must be one of the following strings.  For example:
.linkonce same_size Not all types may be supported on all object file formats.
discard Silently discard duplicate sections. This is the default.
one_only Warn if there are duplicate sections, but still keep only one copy.
same_size Warn if any of the duplicates have different sizes.
same_contents Warn if any of the duplicates do not have exactly the same contents.
.ln line-number .ln is a synonym for .line.
.mri val If val is non-zero, this tells as to enter MRI mode. If val is zero, this tells as to exit MRI mode. This change affects code assembled until the next .mri directive, or until the end of the file.See Section “M”.
.list Control (in conjunction with the .nolist directive) whether or not assembly listings are generated. These two directives maintain an internal counter (which is zero initially).  .list increments the counter, and .nolist decrements it. Assembly listings are generated whenever the counter is greater than zero.
By default, listings are disabled. When you enable them (with the -a command line option;see Section “Invoking”), the initial value of the listing counter is one.
.long expressions .long is the same as .int.  See Section.Dq Int .
.macro The commands .macro and .endm allow you to define macros that generate assembly output. For example, this definition specifies a macro sum that puts a sequence of numbers into memory:
.macro  sum from=0, to=5 .long   \from .if     \to-\from sum     "(\from+1)",\to .endif .endm
With that definition, SUM 0,5 is equivalent to this assembly input:
.long   0 .long   1 .long   2 .long   3 .long   4 .long   5
.macro macname
.macro macname macargs ... Begin the definition of a macro called macname.  If your macro definition requires arguments, specify their names after the macro name, separated by commas or spaces. You can qualify the macro argument to indicate whether all invocations must specify a non- blank value (through : req), or whether it takes all of the remaining arguments (through : vararg).  You can supply a default value for any macro argument by following the name with = deflt. You cannot define two macros with the same macname unless it has been subject to the .purgem directive (see Section “Purgem”) between the two definitions. For example, these are all valid .macro statements:
.macro comm Begin the definition of a macro called comm, which takes no arguments.
.macro plus1 p, p1
.macro plus1 p p1 Either statement begins the definition of a macro called plus1, which takes two arguments; within the macro definition, write \p or \p1 to evaluate the arguments.
.macro reserve_str p1=0 p2 Begin the definition of a macro called reserve_str, with two arguments. The first argument has a default value, but not the second.  After the definition is complete, you can call the macro either as reserve_str a, b (with \p1 evaluating to a and \p2 evaluating to b), or as reserve_str, b (with \p1 evaluating as the default, in this case 0, and \p2 evaluating to b).
.macro m p1:req, p2=0, p3:vararg Begin the definition of a macro called m, with at least three arguments. The first argument must always have a value specified, but not the second, which instead has a default value. The third formal will get assigned all remaining arguments specified at invocation time.
When you call a macro, you can specify the argument values either by position, or by keyword. For example, sum 9,17 is equivalent to sum to=17, from=9.
Note that since each of the macargs can be an identifier exactly as any other one permitted by the target architecture, there may be occasional problems if the target hand-crafts special meanings to certain characters when they occur in a special position. For example, if the colon ( :) is generally permitted to be part of a symbol name, but the architecture specific code special-cases it when occurring as the final character of a symbol (to denote a label), then the macro parameter replacement code will have no way of knowing that and consider the whole construct (including the colon) an identifier, and check only this identifier for being the subject to parameter substitution. So for example this macro definition:
.macro label l \l: .endm
might not work as expected. Invoking label foo might not create a label called foo but instead just insert the text \l: into the assembler source, probably generating an error about an unrecognised identifier.
Similarly problems might occur with the period character ( .) which is often allowed inside opcode names (and hence identifier names). So for example constructing a macro to build an opcode from a base name and a length specifier like this:
.macro opcode base length \base.\length .endm
and invoking it as opcode store l will not create a store.l instruction but instead generate some kind of error as the assembler tries to interpret the text \base.\length.
There are several possible ways around this problem:
Insert white space If it is possible to use white space characters then this is the simplest solution. eg:
.macro label l \l : .endm
Use \() The string \() can be used to separate the end of a macro argument from the following text.  eg:
.macro opcode base length \base\().\length .endm
Use the alternate macro syntax mode In the alternative macro syntax mode the ampersand character ( &) can be used as a separator. eg:
.altmacro .macro label l l&: .endm
Note: this problem of correctly identifying string parameters to pseudo ops also applies to the identifiers used in .irp (see Section “Irp”) and .irpc (see Section “Irpc”) as well.
.endm   Mark the end of a macro definition.
.exitm  Exit early from the current macro definition.
\@      as maintains a counter of how many macros it has executed in this pseudo-variable; you can copy that number to your output with \@, but only within a macro definition.
LOCAL name [, ...] Warning: LOCAL is only available if you select “alternate macro syntax” with --alternate or .altmacro. See Section.Dq Altmacro .
.altmacro Enable alternate macro mode, enabling:
LOCAL name [, ...] One additional directive, LOCAL, is available. It is used to generate a string replacement for each of the name arguments, and replace any instances of name in each macro expansion. The replacement string is unique in the assembly, and different for each separate macro expansion.  LOCAL allows you to write macros that define symbols, without fear of conflict between separate macro expansions.
String delimiters You can write strings delimited in these other ways besides  Va string:
' string' You can delimit strings with single-quote characters.
< string> You can delimit strings with matching angle brackets.
single-character string escape To include any single character literally in a string (even if the character would otherwise have some special meaning), you can prefix the character with !  (an exclamation mark). For example, you can write <4.3 !> 5.4!!> to get the literal text 4.3 > 5.4!.
Expression results as strings You can write % expr to evaluate the expression expr and use the result as a string.
.noaltmacro Disable alternate macro mode.See Section “Altmacro”.
.nolist Control (in conjunction with the .list directive) whether or not assembly listings are generated. These two directives maintain an internal counter (which is zero initially).  .list increments the counter, and .nolist decrements it. Assembly listings are generated whenever the counter is greater than zero.
.octa biGNUms This directive expects zero or more biGNUms, separated by commas. For each biGNUm, it emits a 16-byte integer.
The term “octa” comes from contexts in which a “word” is two bytes; hence octa -word for 16 bytes.
.org new-lc, fill Advance the location counter of the current section to new-lc.  new-lc is either an absolute expression or an expression with the same section as the current subsection. That is, you can't use .org to cross sections: if new-lc has the wrong section, the .org directive is ignored. To be compatible with former assemblers, if the section of new-lc is absolute, as issues a warning, then pretends the section of new-lc is the same as the current subsection.
.org may only increase the location counter, or leave it unchanged; you cannot use .org to move the location counter backwards.
Because as tries to assemble programs in one pass, new-lc may not be undefined. If you really detest this restriction we eagerly await a chance to share your improved assembler.
Beware that the origin is relative to the start of the section, not to the start of the subsection. This is compatible with other people's assemblers.
When the location counter (of the current subsection) is advanced, the intervening bytes are filled with fill which should be an absolute expression. If the comma and fill are omitted, fill defaults to zero.
.p2align[wl] abs-expr, abs-expr, abs-expr Pad the location counter (in the current subsection) to a particular storage boundary. The first expression (which must be absolute) is the number of low-order zero bits the location counter must have after advancement. For example .p2align 3 advances the location counter until it a multiple of 8. If the location counter is already a multiple of 8, no change is needed.
The .p2alignw and .p2alignl directives are variants of the .p2align directive. The .p2alignw directive treats the fill pattern as a two byte word value. The .p2alignl directives treats the fill pattern as a four byte longword value. For example, .p2alignw 2,0x368d will align to a multiple of 4. If it skips two bytes, they will be filled in with the value 0x368d (the exact placement of the bytes depends upon the endianness of the processor). If it skips 1 or 3 bytes, the fill value is undefined.
.previous This is one of the ELF section stack manipulation directives. The others are .section (see Section “Section”), .subsection (see Section “SubSection”), .pushsection (see Section “PushSection”), and .popsection (see Section “PopSection”).
This directive swaps the current section (and subsection) with most recently referenced section (and subsection) prior to this one. Multiple .previous directives in a row will flip between two sections (and their subsections).
In terms of the section stack, this directive swaps the current section with the top section on the section stack.
.popsection This is one of the ELF section stack manipulation directives. The others are .section (see Section “Section”), .subsection (see Section “SubSection”), .pushsection (see Section “PushSection”), and .previous (see Section “Previous”).
This directive replaces the current section (and subsection) with the top section (and subsection) on the section stack. This section is popped off the stack.
.print string as will print string on the standard output during assembly. You must put string in double quotes.
.protected names This is one of the ELF visibility directives. The other two are .hidden (see Section “Hidden”) and .internal (see Section “Internal”).
This directive overrides the named symbols default visibility (which is set by their binding: local, global or weak). The directive sets the visibility to protected which means that any references to the symbols from within the components that defines them must be resolved to the definition in that component, even if a definition in another component would normally preempt this.
.psize lines, columns Use this directive to declare the number of lines---and, optionally, the number of columns---to use for each page, when generating listings.
If you do not use .psize, listings use a default line-count of 60. You may omit the comma and columns specification; the default width is 200 columns.
as generates formfeeds whenever the specified number of lines is exceeded (or whenever you explicitly request one, using .eject).
If you specify lines as 0, no formfeeds are generated save those explicitly specified with .eject.
.purgem name Undefine the macro name, so that later uses of the string will not be expanded.See Section “Macro”.
.pushsection name, subsection This is one of the ELF section stack manipulation directives. The others are .section (see Section “Section”), .subsection (see Section “SubSection”), .popsection (see Section “PopSection”), and .previous (see Section “Previous”).
This directive pushes the current section (and subsection) onto the top of the section stack, and then replaces the current section and subsection with name and subsection.
.quad biGNUms .quad expects zero or more biGNUms, separated by commas. For each bignum, it emits an 8-byte integer. If the biGNUm won't fit in 8 bytes, it prints a warning message; and just takes the lowest order 8 bytes of the biGNUm.
The term “quad” comes from contexts in which a “word” is two bytes; hence quad -word for 8 bytes.
.reloc offset, reloc_name[, expression] Generate a relocation at offset of type reloc_name with value expression. If offset is a number, the relocation is generated in the current section. If offset is an expression that resolves to a symbol plus offset, the relocation is generated in the given symbol's section.  expression, if present, must resolve to a symbol plus addend or to an absolute value, but note that not all targets support an addend. e.g. ELF REL targets such as i386 store an addend in the section contents rather than in the relocation. This low level interface does not support addends stored in the section.
.rept count Repeat the sequence of lines between the .rept directive and the next .endr directive count times.
.rept   3 .long   0 .endr
.long   0 .long   0 .long   0
.sbttl  Va subheading Use subheading as the title (third line, immediately after the title line) when generating assembly listings.
This directive affects subsequent pages, as well as the current page if it appears within ten lines of the top of a page.
.section name Use the .section directive to assemble the following code into a section named name.
This directive is only supported for targets that actually support arbitrarily named sections; on a.out targets, for example, it is not accepted, even with a standard a.out section name.
This is one of the ELF section stack manipulation directives. The others are .subsection (see Section “SubSection”), .pushsection (see Section “PushSection”), .popsection (see Section “PopSection”), and .previous (see Section “Previous”).
For ELF targets, the .section directive is used like this:
.section name [, "flags"[, @type[,flag_specific_arguments]]]
The optional flags argument is a quoted string which may contain any combination of the following characters:
a       section is allocatable
w       section is writable
x       section is executable
M       section is mergeable
S       section contains zero terminated strings
G       section is a member of a section group
T       section is used for thread-local-storage
The optional type argument may contain one of the following constants:
@progbits section contains data
@nobits section does not contain data (i.e., section only occupies space)
@note   section contains data which is used by things other than the program
@init_array section contains an array of pointers to init functions
@fini_array section contains an array of pointers to finish functions
@preinit_array section contains an array of pointers to pre-init functions
Many targets only support the first three section types.
Note on targets where the @ character is the start of a comment (eg ARM) then another character is used instead. For example the ARM port uses the % character.
If flags contains the M symbol then the type argument must be specified as well as an extra argument--- entsize ---like this:
.section name , "flags"M, @type, entsize
Sections with the M flag but not S flag must contain fixed size constants, each entsize octets long. Sections with both M and S must contain zero terminated strings where each character is entsize bytes long. The linker may remove duplicates within sections with the same name, same entity size and same flags.  entsize must be an absolute expression.
If flags contains the G symbol then the type argument must be present along with an additional field like this:
.section name , "flags"G, @type, GroupName[, linkage]
The GroupName field specifies the name of the section group to which this particular section belongs. The optional linkage field can contain:
comdat  indicates that only one copy of this section should be retained
.GNU.linkonce an alias for comdat
Note: if both the M and G flags are present then the fields for the Merge flag should come first, like this:
.section name , "flags"MG, @type, entsize, GroupName[, linkage]
If no flags are specified, the default flags depend upon the section name. If the section name is not recognized, the default will be for the section to have none of the above flags: it will not be allocated in memory, nor writable, nor executable. The section will contain data.
For ELF targets, the assembler supports another type of .section directive for compatibility with the Solaris assembler:
.section "name"[, flags...]
Note that the section name is quoted. There may be a sequence of comma separated flags:
#alloc  section is allocatable
#write  section is writable
#execinstr section is executable
#tls    section is used for thread local storage
This directive replaces the current section and subsection. See the contents of the gas testsuite directory gas/testsuite/gas/elf for some examples of how this directive and the other section stack directives work.
.set symbol, expression Set the value of symbol to expression.  This changes symbol 's value and type to conform to expression.  If symbol was flagged as external, it remains flagged (see Section “Symbol Attributes”).
You may .set a symbol many times in the same assembly.
If you .set a global symbol, the value stored in the object file is the last value stored into it.
.short expressions This expects zero or more expressions, and emits a 16 bit number for each.
.single flonums This directive assembles zero or more flonums, separated by commas. It has the same effect as .float.
.size This directive is used to set the size associated with a symbol.
For ELF targets, the .size directive is used like this:
.size name , expression
This directive sets the size associated with a symbol name.  The size in bytes is computed from expression which can make use of label arithmetic. This directive is typically used to set the size of function symbols.
.sleb128 expressions sleb128 stands for “signed little endian base 128.” This is a compact, variable length representation of numbers used by the DWARF symbolic debugging format.See Section “Uleb128”.
.skip size, fill This directive emits size bytes, each of value fill.  Both size and fill are absolute expressions. If the comma and fill are omitted, fill is assumed to be zero. This is the same as .space.
.space size, fill This directive emits size bytes, each of value fill.  Both size and fill are absolute expressions. If the comma and fill are omitted, fill is assumed to be zero. This is the same as .skip.
.stabd, .stabn, .stabs There are three directives that begin .stab.  All emit symbols (see Section “Symbols”), for use by symbolic debuggers. The symbols are not entered in the as hash table: they cannot be referenced elsewhere in the source file. Up to five fields are required:
string  This is the symbol's name. It may contain any character except \000, so is more general than ordinary symbol names. Some debuggers used to code arbitrarily complex structures into symbol names using this field.
type    An absolute expression. The symbol's type is set to the low 8 bits of this expression. Any bit pattern is permitted, but ld and debuggers choke on silly bit patterns.
other   An absolute expression. The symbol's “other” attribute is set to the low 8 bits of this expression.
desc    An absolute expression. The symbol's descriptor is set to the low 16 bits of this expression.
value   An absolute expression which becomes the symbol's value.
If a warning is detected while reading a .stabd, .stabn, or .stabs statement, the symbol has probably already been created; you get a half- formed symbol in your object file. This is compatible with earlier assemblers!
.stabd type, other, desc
The “name” of the symbol generated is not even an empty string. It is a null pointer, for compatibility. Older assemblers used a null pointer so they didn't waste space in object files with empty strings.
The symbol's value is set to the location counter, relocatably. When your program is linked, the value of this symbol is the address of the location counter when the .stabd was assembled.
.stabn type, other, desc, value The name of the symbol is set to the empty string .
.stabs string, type, other, desc, value All five fields are specified.
.string  Va str Copy the characters in str to the object file. You may specify more than one string to copy, separated by commas. Unless otherwise specified for a particular machine, the assembler marks the end of each string with a 0 byte. You can use any of the escape sequences described in Strings,,Strings.
.struct expression Switch to the absolute section, and set the section offset to expression, which must be an absolute expression. You might use this as follows:
.struct 0 field1: .struct field1 + 4 field2: .struct field2 + 4 field3: This would define the symbol field1 to have the value 0, the symbol field2 to have the value 4, and the symbol field3 to have the value 8. Assembly would be left in the absolute section, and you would need to use a .section directive of some sort to change to some other section before further assembly.
.subsection name This is one of the ELF section stack manipulation directives. The others are .section (see Section “Section”), .pushsection (see Section “PushSection”), .popsection (see Section “PopSection”), and .previous (see Section “Previous”).
This directive replaces the current subsection with name.  The current section is not changed. The replaced subsection is put onto the section stack in place of the then current top of stack subsection.
.symver Use the .symver directive to bind symbols to specific version nodes within a source file.  This is only supported on ELF platforms, and is typically used when assembling files to be linked into a shared library. There are cases where it may make sense to use this in objects to be bound into an application itself so as to override a versioned symbol from a shared library.
For ELF targets, the .symver directive can be used like this:
.symver name, name2@nodename If the symbol name is defined within the file being assembled, the .symver directive effectively creates a symbol alias with the name name2@nodename, and in fact the main reason that we just don't try and create a regular alias is that the @ character isn't permitted in symbol names. The name2 part of the name is the actual name of the symbol by which it will be externally referenced. The name name itself is merely a name of convenience that is used so that it is possible to have definitions for multiple versions of a function within a single source file, and so that the compiler can unambiguously know which version of a function is being mentioned. The nodename portion of the alias should be the name of a node specified in the version script supplied to the linker when building a shared library. If you are attempting to override a versioned symbol from a shared library, then nodename should correspond to the nodename of the symbol you are trying to override.
If the symbol name is not defined within the file being assembled, all references to name will be changed to name2@nodename.  If no reference to name is made, name2@nodename will be removed from the symbol table.
Another usage of the .symver directive is:
.symver name, name2@@nodename In this case, the symbol name must exist and be defined within the file being assembled. It is similar to name2@nodename.  The difference is name2@@nodename will also be used to resolve references to name2 by the linker.
The third usage of the .symver directive is:
.symver name, name2@@@nodename When name is not defined within the file being assembled, it is treated as name2@nodename.  When name is defined within the file being assembled, the symbol name, name, will be changed to name2@@nodename.
.text subsection Tells as to assemble the following statements onto the end of the text subsection numbered subsection, which is an absolute expression. If subsection is omitted, subsection number zero is used.
.title  Va heading Use heading as the title (second line, immediately after the source file name and pagenumber) when generating assembly listings.
.type This directive is used to set the type of a symbol.
For ELF targets, the .type directive is used like this:
.type name , type description
This sets the type of symbol name to be either a function symbol or an object symbol. There are five different syntaxes supported for the type description field, in order to provide compatibility with various other assemblers.
Because some of the characters used in these syntaxes (such as @ and #) are comment characters for some architectures, some of the syntaxes below do not work on all architectures. The first variant will be accepted by the GNU assembler on all architectures so that variant should be used for maximum portability, if you do not need to assemble your code with other assemblers.
The syntaxes supported are:
.type <name> STT_FUNCTION .type <name> STT_OBJECT
.type <name>,#function .type <name>,#object
.type <name>,@function .type <name>,@object
.type <name>,%function .type <name>,%object
.type <name>,"function" .type <name>,"object"
.uleb128 expressions uleb128 stands for “unsigned little endian base 128.” This is a compact, variable length representation of numbers used by the DWARF symbolic debugging format.See Section “Sleb128”.
.version  Va string This directive creates a .note section and places into it an ELF formatted note of type NT_VERSION. The note's name is set to string.
.vtable_entry table, offset This directive finds or creates a symbol table and creates a VTABLE_ENTRY relocation for it with an addend of offset.
.vtable_inherit child, parent This directive finds the symbol child and finds or creates the symbol parent and then creates a VTABLE_INHERIT relocation for the parent whose addend is the value of the child symbol. As a special case the parent name of 0 is treated as referring to the *ABS* section.
.warning  Va string Similar to the directive .error (see Section “Error”), but just emits a warning.
.weak names This directive sets the weak attribute on the comma separated list of symbol names.  If the symbols do not already exist, they will be created.
On COFF targets other than PE, weak symbols are a GNU extension. This directive sets the weak attribute on the comma separated list of symbol names.  If the symbols do not already exist, they will be created.
On the PE target, weak symbols are supported natively as weak aliases. When a weak symbol is created that is not an alias, GAS creates an alternate symbol to hold the default value.
.weakref alias, target This directive creates an alias to the target symbol that enables the symbol to be referenced with weak-symbol semantics, but without actually making it weak. If direct references or definitions of the symbol are present, then the symbol will not be weak, but if all references to it are through weak references, the symbol will be marked as weak in the symbol table.
The effect is equivalent to moving all references to the alias to a separate assembly source file, renaming the alias to the symbol in it, declaring the symbol as weak there, and running a reloadable link to merge the object files resulting from the assembly of the new source file and the old source file that had the references to the alias removed.
The alias itself never makes to the symbol table, and is entirely handled within the assembler.
.word expressions This directive expects zero or more expressions, of any section, separated by commas. For each expression, as emits a 32-bit number.
Deprecated Directives One day these directives won't work. They are included for compatibility with older assemblers.
.abort
ARM Dependent Features Options -mcpu= processor[+ extension...] This option specifies the target processor. The assembler will issue an error message if an attempt is made to assemble an instruction which will not execute on the target processor. The following processor names are recognized: arm1, arm2, arm250, arm3, arm6, arm60, arm600, arm610, arm620, arm7, arm7m, arm7d, arm7dm, arm7di, arm7dmi, arm70, arm700, arm700i, arm710, arm710t, arm720, arm720t, arm740t, arm710c, arm7100, arm7500, arm7500fe, arm7t, arm7tdmi, arm7tdmi-s, arm8, arm810, strongarm, strongarm1, strongarm110, strongarm1100, strongarm1110, arm9, arm920, arm920t, arm922t, arm940t, arm9tdmi, arm9e, arm926e, arm926ej-s, arm946e-r0, arm946e, arm946e-s, arm966e-r0, arm966e, arm966e-s, arm968e-s, arm10t, arm10tdmi, arm10e, arm1020, arm1020t, arm1020e, arm1022e, arm1026ej-s, arm1136j-s, arm1136jf-s, arm1156t2-s, arm1156t2f-s, arm1176jz-s, arm1176jzf-s, mpcore, mpcorenovfp, cortex-a8, cortex-r4, cortex-m3, ep9312 (ARM920 with Cirrus Maverick coprocessor), i80200 (Intel XScale processor) iwmmxt (Intel(r) XScale processor with Wireless MMX(tm) technology coprocessor) and xscale.  The special name all may be used to allow the assembler to accept instructions valid for any ARM processor.
In addition to the basic instruction set, the assembler can be told to accept various extension mnemonics that extend the processor using the co-processor instruction space. For example, -mcpu=arm920+maverick is equivalent to specifying -mcpu=ep9312. The following extensions are currently supported: +maverick +iwmmxt and +xscale.
-march= architecture[+ extension...] This option specifies the target architecture. The assembler will issue an error message if an attempt is made to assemble an instruction which will not execute on the target architecture. The following architecture names are recognized: armv1, armv2, armv2a, armv2s, armv3, armv3m, armv4, armv4xm, armv4t, armv4txm, armv5, armv5t, armv5txm, armv5te, armv5texp, armv6, armv6j, armv6k, armv6z, armv6zk, armv7, armv7-a, armv7-r, armv7-m, iwmmxt and xscale.  If both -mcpu and -march are specified, the assembler will use the setting for -mcpu.
The architecture option can be extended with the same instruction set extension options as the -mcpu option.
-mfpu= floating-point-format
This option specifies the floating point format to assemble for. The assembler will issue an error message if an attempt is made to assemble an instruction which will not execute on the target floating point unit. The following format options are recognized: softfpa, fpe, fpe2, fpe3, fpa, fpa10, fpa11, arm7500fe, softvfp, softvfp+vfp, vfp, vfp10, vfp10-r0, vfp9, vfpxd, arm1020t, arm1020e, arm1136jf-s and maverick.
In addition to determining which instructions are assembled, this option also affects the way in which the .double assembler directive behaves when assembling little-endian code.
The default is dependent on the processor selected. For Architecture 5 or later, the default is to assembler for VFP instructions; for earlier architectures the default is to assemble for FPA instructions.
-mthumb This option specifies that the assembler should start assembling Thumb instructions; that is, it should behave as though the file starts with a .code 16 directive.
-mthumb-interwork This option specifies that the output generated by the assembler should be marked as supporting interworking.
-mapcs [26|32] This option specifies that the output generated by the assembler should be marked as supporting the indicated version of the Arm Procedure. Calling Standard.
-matpcs This option specifies that the output generated by the assembler should be marked as supporting the Arm/Thumb Procedure Calling Standard. If enabled this option will cause the assembler to create an empty debugging section in the object file called .arm.atpcs. Debuggers can use this to determine the ABI being used by.
-mapcs-float This indicates the floating point variant of the APCS should be used. In this variant floating point arguments are passed in FP registers rather than integer registers.
-mapcs-reentrant This indicates that the reentrant variant of the APCS should be used. This variant supports position independent code.
-mfloat-abi= abi This option specifies that the output generated by the assembler should be marked as using specified floating point ABI. The following values are recognized: soft, softfp and hard.
-meabi= ver This option specifies which EABI version the produced object files should conform to. The following values are recognized: GNU, 4 and 5.
-EB     This option specifies that the output generated by the assembler should be marked as being encoded for a big-endian processor.
-EL     This option specifies that the output generated by the assembler should be marked as being encoded for a little-endian processor.
-k      This option specifies that the output of the assembler should be marked as position-independent code (PIC).
Syntax Special Characters
The presence of a @ on a line indicates the start of a comment that extends to the end of the current line. If a # appears as the first character of a line, the whole line is treated as a comment.
The ; character can be used instead of a newline to separate statements.
Either # or $ can be used to indicate immediate operands.
*TODO* Explain about /data modifier on symbols.
Register Names
*TODO* Explain about ARM register naming, and the predefined names.
ARM relocation generation
Specific data relocations can be generated by putting the relocation name in parentheses after the symbol name. For example:
.word foo(TARGET1)
This will generate an R_ARM_TARGET1 relocation against the symbol foo.  The following relocations are supported: GOT, GOTOFF, TARGET1, TARGET2, SBREL, TLSGD, TLSLDM, TLSLDO, GOTTPOFF and TPOFF.
For compatibility with older toolchains the assembler also accepts (PLT) after branch targets. This will generate the deprecated R_ARM_PLT32 relocation.
Relocations for MOVW and MOVT instructions can be generated by prefixing the value with #:lower16: and #:upper16 respectively. For example to load the 32-bit address of foo into r0:
MOVW r0, #:lower16:foo MOVT r0, #:upper16:foo
Floating Point The ARM family uses ieee floating-point numbers.
ARM Machine Directives .align expression [, expression] This is the generic .align directive. For the ARM however if the first argument is zero (ie no alignment is needed) the assembler will behave as if the argument had been 2 (ie pad to the next four byte boundary). This is for compatibility with ARM's own assembler.
name .req register name This creates an alias for register name called name.  For example:
foo .req r0
.unreq alias-name This undefines a register alias which was previously defined using the req, dn or qn directives. For example:
foo .req r0 .unreq foo
An error occurs if the name is undefined. Note - this pseudo op can be used to delete builtin in register name aliases (eg 'r0'). This should only be done if it is really necessary.
name .dn register name [.type] [[index]]
name .qn register name [.type] [[index]]
The dn and qn directives are used to create typed and/or indexed register aliases for use in Advanced SIMD Extension (Neon) instructions. The former should be used to create aliases of double-precision registers, and the latter to create aliases of quad-precision registers.
If these directives are used to create typed aliases, those aliases can be used in Neon instructions instead of writing types after the mnemonic or after each operand. For example:
x .dn d2.f32 y .dn d3.f32 z .dn d4.f32[1] vmul x,y,z
This is equivalent to writing the following:
vmul.f32 d2,d3,d4[1]
Aliases created using dn or qn can be destroyed using unreq.
.code [16|32] This directive selects the instruction set being generated. The value 16 selects Thumb, with the value 32 selecting ARM.
.thumb  This performs the same action as .code 16.
.arm    This performs the same action as .code 32.
.force_thumb This directive forces the selection of Thumb instructions, even if the target processor does not support those instructions
.thumb_func This directive specifies that the following symbol is the name of a Thumb encoded function. This information is necessary in order to allow the assembler and linker to generate correct code for interworking between Arm and Thumb instructions and should be used even if interworking is not going to be performed.  The presence of this directive also implies .thumb
This directive is not neccessary when generating EABI objects. On these targets the encoding is implicit when generating Thumb code.
.thumb_set This performs the equivalent of a .set directive in that it creates a symbol which is an alias for another symbol (possibly not yet defined). This directive also has the added property in that it marks the aliased symbol as being a thumb function entry point, in the same way that the .thumb_func directive does.
.ltorg  This directive causes the current contents of the literal pool to be dumped into the current section (which is assumed to be the .text section) at the current location (aligned to a word boundary).  GAS maintains a separate literal pool for each section and each sub-section. The .ltorg directive will only affect the literal pool of the current section and sub-section.  At the end of assembly all remaining, un-empty literal pools will automatically be dumped.
Note - older versions of GAS would dump the current literal pool any time a section change occurred. This is no longer done, since it prevents accurate control of the placement of literal pools.
.pool   This is a synonym for .ltorg.
.unwind_fnstart Marks the start of a function with an unwind table entry.
.unwind_fnend Marks the end of a function with an unwind table entry. The unwind index table entry is created when this directive is processed.
If no personality routine has been specified then standard personality routine 0 or 1 will be used, depending on the number of unwind opcodes required.
.cantunwind Prevents unwinding through the current function. No personality routine or exception table data is required or permitted.
.personality name Sets the personality routine for the current function to name.
.personalityindex index Sets the personality routine for the current function to the EABI standard routine number index
.handlerdata Marks the end of the current function, and the start of the exception table entry for that function. Anything between this directive and the .fnend directive will be added to the exception table entry.
Must be preceded by a .personality or .personalityindex directive.
.save reglist Generate unwinder annotations to restore the registers in reglist. The format of reglist is the same as the corresponding store- multiple instruction.
.save {r4, r5, r6, lr} stmfd sp!, {r4, r5, r6, lr} .save f4, 2 sfmfd f4, 2, [sp]! .save {d8, d9, d10} fstmdx sp!, {d8, d9, d10} .save {wr10, wr11} wstrd wr11, [sp, #-8]! wstrd wr10, [sp, #-8]! or .save wr11 wstrd wr11, [sp, #-8]! .save wr10 wstrd wr10, [sp, #-8]!
.vsave vfp-reglist Generate unwinder annotations to restore the VFP registers in vfp-reglist using FLDMD. Also works for VFPv3 registers that are to be restored using VLDM. The format of vfp-reglist is the same as the corresponding store-multiple instruction.
.vsave {d8, d9, d10} fstmdd sp!, {d8, d9, d10} .vsave {d15, d16, d17} vstm sp!, {d15, d16, d17}
Since FLDMX and FSTMX are now deprecated, this directive should be used in favour of .save for saving VFP registers for ARMv6 and above.
.pad # count Generate unwinder annotations for a stack adjustment of count bytes. A positive value indicates the function prologue allocated stack space by decrementing the stack pointer.
.movsp reg [, # offset] Tell the unwinder that reg contains an offset from the current stack pointer. If offset is not specified then it is assumed to be zero.
.setfp fpreg, spreg [, # offset] Make all unwinder annotations relaive to a frame pointer. Without this the unwinder will use offsets from the stack pointer.
The syntax of this directive is the same as the sub or mov instruction used to set the frame pointer.  spreg must be either sp or mentioned in a previous .movsp directive.
.movsp ip mov ip, sp ... .setfp fp, ip, #4 sub fp, ip, #4
.raw offset, byte1, ... Insert one of more arbitary unwind opcode bytes, which are known to adjust the stack pointer by offset bytes.
For example .unwind_raw 4, 0xb1, 0x01 is equivalent to .save {r0}
.cpu name Select the target processor. Valid values for name are the same as for the [-mcpu] commandline option.
.arch name Select the target architecture. Valid values for name are the same as for the [-march] commandline option.
.object_arch name Override the architecture recorded in the EABI object attribute section. Valid values for name are the same as for the .arch directive. Typically this is useful when code uses runtime detection of CPU features.
.fpu name Select the floating point unit to assemble for. Valid values for name are the same as for the [-mfpu] commandline option.
.eabi_attribute tag, value Set the EABI object attribute number tag to value.  The value is either a number, string, or number, string depending on the tag.
Opcodes as implements all the standard ARM opcodes. It also implements several pseudo opcodes, including several synthetic load instructions.
This pseudo op will always evaluate to a legal ARM instruction that does nothing.  Currently it will evaluate to MOV r0, r0.
ldr <register> , = <expression>
If expression evaluates to a numeric constant then a MOV or MVN instruction will be used in place of the LDR instruction, if the constant can be generated by either of these instructions. Otherwise the constant will be placed into the nearest literal pool (if it not already there) and a PC relative LDR instruction will be generated.
adr <register> <label>
This instruction will load the address of label into the indicated register. The instruction will evaluate to a PC relative ADD or SUB instruction depending upon where the label is located. If the label is out of range, or if it is not defined in the same file (and section) as the ADR instruction, then an error will be generated. This instruction will not make use of the literal pool.
ADRL
adrl <register> <label>
This instruction will load the address of label into the indicated register. The instruction will evaluate to one or two PC relative ADD or SUB instructions depending upon where the label is located. If a second instruction is not needed a NOP instruction will be generated in its place, so that this instruction is always 8 bytes long.
If the label is out of range, or if it is not defined in the same file (and section) as the ADRL instruction, then an error will be generated. This instruction will not make use of the literal pool.
For information on the ARM or Thumb instruction sets, see ARM Software Development Toolkit Reference Manual, Advanced RISC Machines Ltd.
Mapping Symbols The ARM ELF specification requires that special symbols be inserted into object files to mark certain features:
$a      At the start of a region of code containing ARM instructions.
$t      At the start of a region of code containing THUMB instructions.
$d      At the start of a region of data.
The assembler will automatically insert these symbols for you - there is no need to code them yourself. Support for tagging symbols ($b, $f, $p and $m) which is also mentioned in the current ARM ELF specification is not implemented.  This is because they have been dropped from the new EABI and so tools cannot rely upon their presence.
80386 Dependent Features The i386 version as supports both the original Intel 386 architecture in both 16 and 32-bit mode as well as AMD x86-64 architecture extending the Intel architecture to 64-bits.
Options The i386 version of as has a few machine dependent options:
--32 | --64 Select the word size, either 32 bits or 64 bits. Selecting 32-bit implies Intel i386 architecture, while 64-bit implies AMD x86-64 architecture.
These options are only available with the ELF object file format, and require that the necessary BFD support has been included (on a 32-bit platform you have to add --enable-64-bit-bfd to configure enable 64-bit usage and use x86-64 as target platform).
-n      By default, x86 GAS replaces multiple nop instructions used for alignment within code sections with multi-byte nop instructions such as leal 0(%esi,1),%esi.  This switch disables the optimization.
--divide On SVR4-derived platforms, the character / is treated as a comment character, which means that it cannot be used in expressions.  The --divide option turns / into a normal character. This does not disable / at the beginning of a line starting a comment, or affect using # for starting a comment.
-march= CPU This option specifies an instruction set architecture for generating instructions.  The following architectures are recognized: i8086, i186, i286, i386, i486, i586, i686, pentium, pentiumpro, pentiumii, pentiumiii, pentium4, prescott, nocona, core, core2, k6, k6_2, athlon, sledgehammer, opteron, k8, generic32 and generic64.
This option only affects instructions generated by the assembler. The .arch directive will take precedent.
-mtune= CPU This option specifies a processor to optimize for. When used in conjunction with the [-march] option, only instructions of the processor specified by the [-march] option will be generated.
Valid CPU values are identical to [-march= CPU].
AT&T Syntax versus Intel Syntax as now supports assembly using Intel assembler syntax.  .intel_syntax selects Intel mode, and .att_syntax switches back to the usual AT&T mode for compatibility with the output of gcc.  Either of these directives may have an optional argument, prefix, or noprefix specifying whether registers require a % prefix. AT&T System V/386 assembler syntax is quite different from Intel syntax.  We mention these differences because almost all 80386 documents use Intel syntax. Notable differences between the two syntaxes are:
•   AT&T immediate operands are preceded by $; Intel immediate operands are undelimited (Intel push 4 is AT&T pushl $4).  AT&T register operands are preceded by %; Intel register operands are undelimited. AT&T absolute (as opposed to PC relative) jump/call operands are prefixed by *; they are undelimited in Intel syntax.
•   AT&T and Intel syntax use the opposite order for source and destination operands.  Intel add eax, 4 is addl $4, %eax.  The source, dest convention is maintained for compatibility with previous Unix assemblers.  Note that instructions with more than one source operand, such as the enter instruction, do not have reversed order. i386-Bugs.
•   In AT&T syntax the size of memory operands is determined from the last character of the instruction mnemonic. Mnemonic suffixes of b, w, l and q specify byte (8-bit), word (16-bit), long (32-bit) and quadruple word (64-bit) memory references. Intel syntax accomplishes this by prefixing memory operands ( not the instruction mnemonics) with byte ptr, word ptr, dword ptr and qword ptr.  Thus, Intel mov al, byte ptr foo is movb foo, %al in AT&T syntax.
•   Immediate form long jumps and calls are lcall/ljmp $ section, $ offset in AT&T syntax; the Intel syntax is call/jmp far section: offset. Also, the far return instruction is lret $ stack-adjust in AT&T syntax; Intel syntax is ret far stack-adjust.
•   The AT&T assembler does not provide support for multiple section programs.  Unix style systems expect all programs to be single sections.