neulab/tldr huggingface dataset:
The Darwin tools vary in their behavior when presented with an ISA mismatch.  The assembler, as, will only permit instructions to be used that are valid for the subtype of the file it is generating, so you cannot put 64-bit instructions in an ppc750 object file.  The linker for shared libraries, /usr/bin/libtool, will fail and print an error if asked to create a shared library with a less restrictive subtype than its input files (for instance, trying to put a ppc970 object file in a ppc7400 library).  The linker for executables, ld, will quietly give the executable the most restrictive subtype of any of its input files.
A framework directory is a directory with frameworks in it.  A framework is a directory with a "Headers" and/or "PrivateHeaders" directory contained directly in it that ends in ".framework".  The name of a framework is the name of this directory excluding the ".framework".  Headers associated with the framework are found in one of those two directories, with "Headers" being searched first.  A subframework is a framework directory that is in a framework's "Frameworks" directory.  Includes of subframework headers can only appear in a header of a framework that contains the subframework, or in a sibling subframework header.  Two subframeworks are siblings if they occur in the same framework.  A subframework should not have the same name as a framework, a warning will be issued if this is violated.  Currently a subframework cannot have subframeworks, in the future, the mechanism may be extended to support this.  The standard frameworks can be found in "/System/Library/Frameworks" and "/Library/Frameworks".  An example include looks like "#include <Framework/header.h>", where Framework denotes the name of the framework and header.h is found in the "PrivateHeaders" or "Headers" directory.
-iframeworkdir Like -F except the directory is a treated as a system directory.  The main effect is to not warn about constructs contained within header files found via dir.
-gused Emit debugging information for symbols that are used.  For STABS debugging format, this enables -feliminate-unused-debug-symbols. This is by default ON.
This value can also be set with the MACOSX_DEPLOYMENT_TARGET environment variable.  If both the command-line option is specified and the environment variable is set, the command-line option will take precedence.
If the compiler was built to use the system's headers by default, then the default for this option is the system version on which the compiler is running, otherwise the default is to make choices which are compatible with as many systems and code bases as possible.
This value is not set by default for ARM targets.
-miphoneos-version-min=version The earliest version of iPhone OS that this executable will run on is version.
This value can also be set with the IPHONEOS_DEPLOYMENT_TARGET environment variable.  If both the command-line option is specified and the environment variable is set, the command-line option will take precedence.
On ARM targets, if not specified by the command-line option or environment variable, this value defaults to 2.0.
-mkernel Enable kernel development mode.  The -mkernel option sets -static, -fno-common, -fno-builtin, -fno-cxa-atexit, -fno-exceptions, -fno-non-call-exceptions, -fno-asynchronous-unwind-tables, -fapple-kext, -fno-weak and -fno-rtti where applicable.  This mode also sets -mno-altivec, -msoft-float and -mlong-branch for PowerPC targets, -mno-red-zone on x86_64, and -mlong-branch for ARM targets. Of these, only -msoft-float can be changed which is useful in a kext that wishes to use the hardware floating point unit.  -dynamic can be used to override the effects of -static on the assembler to enable the use of weak_import.
-mone-byte-bool Override the defaults for bool so that sizeof(bool)==1.  By default sizeof(bool) is 4 when compiling for Darwin/PowerPC and 1 when compiling for Darwin/x86, so this option has no effect on x86.
-mfix-and-continue -ffix-and-continue -findirect-data Generate code suitable for fast turn around development.  Needed to enable gdb to dynamically load ".o" files into already running programs.  -findirect-data and -ffix-and-continue are provided for backwards compatibility.
-fapple-kext -findirect-virtual-calls -fterminated-vtables Alter vtables, destructors, and other implementation details to more closely resemble the GCC 2.95 ABI for PowerPC and 32-bit i386.  This is to make kernel extensions loadable by Darwin kernels, and is required to build any Darwin kernel extension.  In addition, virtual calls are not made directly, instead, code is generated to always go through the virtual table, as virtual tables can be patched by the kernel module loader.  Vtables are altered by adding a zero word at the end of every vtable.  -findirect-virtual-calls and -fterminated-vtables are accepted for backwards compatibility but will be removed in the future.  Additionally implies most of -mkernel except for -msoft-float and -mlong-branch for PowerPC targets. (APPLE ONLY)
-mpascal-strings Allow Pascal-style string literals to be constructed.  This option implies -Wpointer-sign so that conversions between Pascal-style strings and C-style strings are warned about.  (APPLE ONLY)
-bundle_loader executable This option specifies the executable that will be loading the build output file being linked.  See man ld(1) for more information.
-dynamiclib When passed this option, GCC will produce a dynamic library instead of an executable when linking, using the Darwin libtool command.
-force_load  library_name Loads all members of named static archive library.  See man ld(1) for more information.
Intel 386 and AMD x86-64 Options
These -m options are defined for the i386 and x86-64 family of computers:
-mtune=cpu-type Tune to cpu-type everything applicable about the generated code, except for the ABI and the set of available instructions.  The choices for cpu-type are:
generic Produce code optimized for the most common IA32/AMD64/EM64T processors.  If you know the CPU on which your code will run, then you should use the corresponding -mtune option instead of -mtune=generic.  But, if you do not know exactly what CPU users of your application will have, then you should use this option.
As new processors are deployed in the marketplace, the behavior of this option will change.  Therefore, if you upgrade to a newer version of GCC, the code generated option will change to reflect the processors that were most common when that version of GCC was released.
native This selects the CPU to tune for at compilation time by determining the processor type of the compiling machine.  Using -mtune=native will produce code optimized for the local machine under the constraints of the selected instruction set.  Using -march=native will enable all instruction subsets supported by the local machine (hence the result might not run on different machines).
i386 Original Intel's i386 CPU.
i486 Intel's i486 CPU.  (No scheduling is implemented for this chip.)
i586, pentium Intel Pentium CPU with no MMX support.
pentium-mmx Intel PentiumMMX CPU based on Pentium core with MMX instruction set support.
pentiumpro Intel PentiumPro CPU.
i686 Same as "generic", but when used as "march" option, PentiumPro instruction set will be used, so the code will run on all i686 family chips.
pentium2 Intel Pentium2 CPU based on PentiumPro core with MMX instruction set support.
pentium3, pentium3m Intel Pentium3 CPU based on PentiumPro core with MMX and SSE instruction set support.
pentium-m Low power version of Intel Pentium3 CPU with MMX, SSE and SSE2 instruction set support.  Used by Centrino notebooks.
pentium4, pentium4m Intel Pentium4 CPU with MMX, SSE and SSE2 instruction set support.
prescott Improved version of Intel Pentium4 CPU with MMX, SSE, SSE2 and SSE3 instruction set support.
nocona Improved version of Intel Pentium4 CPU with 64-bit extensions, MMX, SSE, SSE2 and SSE3 instruction set support.
core2 Intel Core2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3 instruction set support.
k6-2, k6-3 Improved versions of AMD K6 CPU with MMX and 3dNOW! instruction set support.
athlon, athlon-tbird AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and SSE prefetch instructions support.
athlon-4, athlon-xp, athlon-mp Improved AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and full SSE instruction set support.
k8, opteron, athlon64, athlon-fx AMD K8 core based CPUs with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, 3dNOW!, enhanced 3dNOW! and 64-bit instruction set extensions.)
winchip-c6 IDT Winchip C6 CPU, dealt in same way as i486 with additional MMX instruction set support.
winchip2 IDT Winchip2 CPU, dealt in same way as i486 with additional MMX and 3dNOW!  instruction set support.
c3  Via C3 CPU with MMX and 3dNOW! instruction set support.  (No scheduling is implemented for this chip.)
c3-2 Via C3-2 CPU with MMX and SSE instruction set support.  (No scheduling is implemented for this chip.)
While picking a specific cpu-type will schedule things appropriately for that particular chip, the compiler will not generate any code that does not run on the i386 without the -march=cpu-type option being used.
-march=cpu-type Generate instructions for the machine type cpu-type.  The choices for cpu-type are the same as for -mtune.  Moreover, specifying -march=cpu-type implies -mtune=cpu-type.
-m386 -m486 -mpentium -mpentiumpro These options are synonyms for -mtune=i386, -mtune=i486, -mtune=pentium, and -mtune=pentiumpro respectively.  These synonyms are deprecated.
-mfpmath=unit Generate floating point arithmetics for selected unit unit.  The choices for unit are:
387 Use the standard 387 floating point coprocessor present majority of chips and emulated otherwise.  Code compiled with this option will run almost everywhere.  The temporary results are computed in 80bit precision instead of precision specified by the type resulting in slightly different results compared to most of other chips.  See -ffloat-store for more detailed description.
This is the default choice for i386 compiler.
sse Use scalar floating point instructions present in the SSE instruction set.  This instruction set is supported by Pentium3 and newer chips, in the AMD line by Athlon-4, Athlon-xp and Athlon-mp chips.  The earlier version of SSE instruction set supports only single precision arithmetics, thus the double and extended precision arithmetics is still done using 387.  Later version, present only in Pentium4 and the future AMD x86-64 chips supports double precision arithmetics too.
For the i386 compiler, you need to use -march=cpu-type, -msse or -msse2 switches to enable SSE extensions and make this option effective.  For the x86-64 compiler, these extensions are enabled by default.
The resulting code should be considerably faster in the majority of cases and avoid the numerical instability problems of 387 code, but may break some existing code that expects temporaries to be 80bit.
This is the default choice for the x86-64 compiler.
sse,387 Attempt to utilize both instruction sets at once.  This effectively double the amount of available registers and on chips with separate execution units for 387 and SSE the execution resources too.  Use this option with care, as it is still experimental, because the GCC register allocator does not model separate functional units well resulting in instable performance.
-masm=dialect Output asm instructions using selected dialect.  Supported choices are intel or att (the default one).  Darwin does not support intel.
-mieee-fp -mno-ieee-fp Control whether or not the compiler uses IEEE floating point comparisons.  These handle correctly the case where the result of a comparison is unordered.
-msoft-float Generate output containing library calls for floating point. Warning: the requisite libraries are not part of GCC.  Normally the facilities of the machine's usual C compiler are used, but this can't be done directly in cross-compilation.  You must make your own arrangements to provide suitable library functions for cross- compilation.
On machines where a function returns floating point results in the 80387 register stack, some floating point opcodes may be emitted even if -msoft-float is used.
-mno-fancy-math-387 Some 387 emulators do not support the "sin", "cos" and "sqrt" instructions for the 387.  Specify this option to avoid generating those instructions.  This option is the default on FreeBSD, OpenBSD and NetBSD.  This option is overridden when -march indicates that the target cpu will always have an FPU and so the instruction will not need emulation.  As of revision 2.6.1, these instructions are not generated unless you also use the -funsafe-math-optimizations switch.
-malign-double -mno-align-double Control whether GCC aligns "double", "long double", and "long long" variables on a two word boundary or a one word boundary.  Aligning "double" variables on a two word boundary will produce code that runs somewhat faster on a Pentium at the expense of more memory.
Warning: if you use the -malign-double switch, structures containing the above types will be aligned differently than the published application binary interface specifications for the 386 and will not be binary compatible with structures in code compiled without that switch.
-m96bit-long-double -m128bit-long-double These switches control the size of "long double" type.  The i386 application binary interface specifies the size to be 96 bits, so -m96bit-long-double is the default in 32 bit mode.
Modern architectures (Pentium and newer) would prefer "long double" to be aligned to an 8 or 16 byte boundary.  In arrays or structures conforming to the ABI, this would not be possible.  So specifying a -m128bit-long-double will align "long double" to a 16 byte boundary by padding the "long double" with an additional 32 bit zero.
In the x86-64 compiler, -m128bit-long-double is the default choice as its ABI specifies that "long double" is to be aligned on 16 byte boundary.
Warning: if you override the default value for your target ABI, the structures and arrays containing "long double" variables will change their size as well as function calling convention for function taking "long double" will be modified.  Hence they will not be binary compatible with arrays or structures in code compiled without that switch.
-mmlarge-data-threshold=number When -mcmodel=medium is specified, the data greater than threshold are placed in large data section.  This value must be the same across all object linked into the binary and defaults to 65535.
-msvr3-shlib -mno-svr3-shlib Control whether GCC places uninitialized local variables into the "bss" or "data" segments.  -msvr3-shlib places them into "bss". These options are meaningful only on System V Release 3.
-mrtd Use a different function-calling convention, in which functions that take a fixed number of arguments return with the "ret" num instruction, which pops their arguments while returning.  This saves one instruction in the caller since there is no need to pop the arguments there.
You can specify that an individual function is called with this calling sequence with the function attribute stdcall.  You can also override the -mrtd option by using the function attribute cdecl.
Also, you must provide function prototypes for all functions that take variable numbers of arguments (including "printf"); otherwise incorrect code will be generated for calls to those functions.
In addition, seriously incorrect code will result if you call a function with too many arguments.  (Normally, extra arguments are harmlessly ignored.)
-mregparm=num Control how many registers are used to pass integer arguments.  By default, no registers are used to pass arguments, and at most 3 registers can be used.  You can control this behavior for a specific function by using the function attribute regparm.
-msseregparm Use SSE register passing conventions for float and double arguments and return values.  You can control this behavior for a specific function by using the function attribute sseregparm.
-mstackrealign Realign the stack at entry.  On the Intel x86, the -mstackrealign option will generate an alternate prologue and epilogue that realigns the runtime stack.  This supports mixing legacy codes that keep a 4-byte aligned stack with modern codes that keep a 16-byte stack for SSE compatibility.  The alternate prologue and epilogue are slower and bigger than the regular ones, and the alternate prologue requires an extra scratch register; this lowers the number of registers available if used in conjunction with the "regparm" attribute.  The -mstackrealign option is incompatible with the nested function prologue; this is considered a hard error.  See also the attribute "force_align_arg_pointer", applicable to individual functions.
On Pentium and PentiumPro, "double" and "long double" values should be aligned to an 8 byte boundary (see -malign-double) or suffer significant run time performance penalties.  On Pentium III, the Streaming SIMD Extension (SSE) data type "__m128" may not work properly if it is not 16 byte aligned.
To ensure proper alignment of this values on the stack, the stack boundary must be as aligned as that required by any value stored on the stack.  Further, every function must be generated such that it keeps the stack aligned.  Thus calling a function compiled with a higher preferred stack boundary from a function compiled with a lower preferred stack boundary will most likely misalign the stack.  It is recommended that libraries that use callbacks always use the default setting.
-mmmx -mno-mmx -msse -mno-sse -msse2 -mno-sse2 -msse3 -mno-sse3 -mssse3 -mno-ssse3 -msse4.1 -mno-sse4.1 -msse4.2 -mno-sse4.2 -msse4 -mno-sse4 -msse4a -mno-sse4a -m3dnow -mno-3dnow These switches enable or disable the use of instructions in the MMX, SSE, SSE2, SSE3, SSSE3, 3Dnow, SSE4.1, SSE4.2, and SSE4A extended instruction sets.  These extensions are also available as built-in functions: see X86 Built-in Functions, for details of the functions enabled and disabled by these switches.
To have SSE/SSE2 instructions generated automatically from floating- point code (as opposed to 387 instructions), see -mfpmath=sse.
These options will enable GCC to use these extended instructions in generated code, even without -mfpmath=sse.  Applications which perform runtime CPU detection must compile separate files for each supported architecture, using the appropriate flags.  In particular, the file containing the CPU detection code should be compiled without these options.
-maccumulate-outgoing-args If enabled, the maximum amount of space required for outgoing arguments will be computed in the function prologue.  This is faster on most modern CPUs because of reduced dependencies, improved scheduling and reduced stack usage when preferred stack boundary is not equal to 2.  The drawback is a notable increase in code size. This switch implies -mno-push-args.
-mthreads Support thread-safe exception handling on Mingw32.  Code that relies on thread-safe exception handling must compile and link all code with the -mthreads option.  When compiling, -mthreads defines -D_MT; when linking, it links in a special thread helper library -lmingwthrd which cleans up per thread exception handling data.
-mno-align-stringops Do not align destination of inlined string operations.  This switch reduces code size and improves performance in case the destination is already aligned, but GCC doesn't know about it.
-minline-all-stringops By default GCC inlines string operations only when destination is known to be aligned at least to 4 byte boundary.  This enables more inlining, increase code size, but may improve performance of code that depends on fast memcpy, strlen and memset for short lengths.
-momit-leaf-frame-pointer Don't keep the frame pointer in a register for leaf functions.  This avoids the instructions to save, set up and restore frame pointers and makes an extra register available in leaf functions.  The option -fomit-frame-pointer removes the frame pointer for all functions which might make debugging harder.
-mtls-direct-seg-refs -mno-tls-direct-seg-refs Controls whether TLS variables may be accessed with offsets from the TLS segment register (%gs for 32-bit, %fs for 64-bit), or whether the thread base pointer must be added.  Whether or not this is legal depends on the operating system, and whether it maps the segment to cover the entire TLS area.
For systems that use GNU libc, the default is on.
These -m switches are supported in addition to the above on AMD x86-64 processors in 64-bit environments.
-m32 -m64 Generate code for a 32-bit or 64-bit environment.  The 32-bit environment sets int, long and pointer to 32 bits and generates code that runs on any i386 system.  The 64-bit environment sets int to 32 bits and long and pointer to 64 bits and generates code for AMD's x86-64 architecture. For darwin only the -m64 option turns off the -fno-pic and -mdynamic-no-pic options.
-mno-red-zone Do not use a so called red zone for x86-64 code.  The red zone is mandated by the x86-64 ABI, it is a 128-byte area beyond the location of the stack pointer that will not be modified by signal or interrupt handlers and therefore can be used for temporary data without adjusting the stack pointer.  The flag -mno-red-zone disables this red zone.
-mcmodel=medium Generate code for the medium model: The program is linked in the lower 2 GB of the address space but symbols can be located anywhere in the address space.  Programs can be statically or dynamically linked, but building of shared libraries are not supported with the medium model.
-mcmodel=large Generate code for the large model: This model makes no assumptions about addresses and sizes of sections.  Currently GCC does not implement this model.
-mpower -mno-power -mpower2 -mno-power2 -mpowerpc -mno-powerpc -mpowerpc-gpopt -mno-powerpc-gpopt -mpowerpc-gfxopt -mno-powerpc-gfxopt -mpowerpc64 -mno-powerpc64 -mmfcrf -mno-mfcrf -mpopcntb -mno-popcntb -mfprnd -mno-fprnd GCC supports two related instruction set architectures for the RS/6000 and PowerPC.  The POWER instruction set are those instructions supported by the rios chip set used in the original RS/6000 systems and the PowerPC instruction set is the architecture of the Freescale MPC5xx, MPC6xx, MPC8xx microprocessors, and the IBM 4xx, 6xx, and follow-on microprocessors.
Neither architecture is a subset of the other.  However there is a large common subset of instructions supported by both.  An MQ register is included in processors supporting the POWER architecture.
You use these options to specify which instructions are available on the processor you are using.  The default value of these options is determined when configuring GCC.  Specifying the -mcpu=cpu_type overrides the specification of these options.  We recommend you use the -mcpu=cpu_type option rather than the options listed above.
The -mpower option allows GCC to generate instructions that are found only in the POWER architecture and to use the MQ register. Specifying -mpower2 implies -power and also allows GCC to generate instructions that are present in the POWER2 architecture but not the original POWER architecture.
The -mpowerpc option allows GCC to generate instructions that are found only in the 32-bit subset of the PowerPC architecture. Specifying -mpowerpc-gpopt implies -mpowerpc and also allows GCC to use the optional PowerPC architecture instructions in the General Purpose group, including floating-point square root.  Specifying -mpowerpc-gfxopt implies -mpowerpc and also allows GCC to use the optional PowerPC architecture instructions in the Graphics group, including floating-point select.
The -mmfcrf option allows GCC to generate the move from condition register field instruction implemented on the POWER4 processor and other processors that support the PowerPC V2.01 architecture.  The -mpopcntb option allows GCC to generate the popcount and double precision FP reciprocal estimate instruction implemented on the POWER5 processor and other processors that support the PowerPC V2.02 architecture.  The -mfprnd option allows GCC to generate the FP round to integer instructions implemented on the POWER5+ processor and other processors that support the PowerPC V2.03 architecture.
If you specify both -mno-power and -mno-powerpc, GCC will use only the instructions in the common subset of both architectures plus some special AIX common-mode calls, and will not use the MQ register. Specifying both -mpower and -mpowerpc permits GCC to use any instruction from either architecture and to allow use of the MQ register; specify this for the Motorola MPC601.
-mnew-mnemonics -mold-mnemonics Select which mnemonics to use in the generated assembler code.  With -mnew-mnemonics, GCC uses the assembler mnemonics defined for the PowerPC architecture.  With -mold-mnemonics it uses the assembler mnemonics defined for the POWER architecture.  Instructions defined in only one architecture have only one mnemonic; GCC uses that mnemonic irrespective of which of these options is specified.
GCC defaults to the mnemonics appropriate for the architecture in use.  Specifying -mcpu=cpu_type sometimes overrides the value of these option.  Unless you are building a cross-compiler, you should normally not specify either -mnew-mnemonics or -mold-mnemonics, but should instead accept the default.
-mcpu=cpu_type Set architecture type, register usage, choice of mnemonics, and instruction scheduling parameters for machine type cpu_type. Supported values for cpu_type are 401, 403, 405, 405fp, 440, 440fp, 505, 601, 602, 603, 603e, 604, 604e, 620, 630, 740, 7400, 7450, 750, 801, 821, 823, 860, 970, 8540, ec603e, G3, G4, G5, power, power2, power3, power4, power5, power5+, power6, common, powerpc, powerpc64, rios, rios1, rios2, rsc, and rs64.
-mcpu=common selects a completely generic processor.  Code generated under this option will run on any POWER or PowerPC processor.  GCC will use only the instructions in the common subset of both architectures, and will not use the MQ register.  GCC assumes a generic processor model for scheduling purposes.
-mcpu=power, -mcpu=power2, -mcpu=powerpc, and -mcpu=powerpc64 specify generic POWER, POWER2, pure 32-bit PowerPC (i.e., not MPC601), and 64-bit PowerPC architecture machine types, with an appropriate, generic processor model assumed for scheduling purposes.
The other options specify a specific processor.  Code generated under those options will run best on that processor, and may not run at all on others.
The -mcpu options automatically enable or disable the following options: -maltivec, -mfprnd, -mhard-float, -mmfcrf, -mmultiple, -mnew-mnemonics, -mpopcntb, -mpower, -mpower2, -mpowerpc64, -mpowerpc-gpopt, -mpowerpc-gfxopt, -mstring, -mmulhw, -mdlmzb.  The particular options set for any particular CPU will vary between compiler versions, depending on what setting seems to produce optimal code for that CPU; it doesn't necessarily reflect the actual hardware's capabilities.  If you wish to set an individual option to a particular value, you may specify it after the -mcpu option, like -mcpu=970 -mno-altivec.
-mtune=cpu_type Set the instruction scheduling parameters for machine type cpu_type, but do not set the architecture type, register usage, or choice of mnemonics, as -mcpu=cpu_type would.  The same values for cpu_type are used for -mtune as for -mcpu.  If both are specified, the code generated will use the architecture, registers, and mnemonics set by -mcpu, but the scheduling parameters set by -mtune.
-mswdiv -mno-swdiv Generate code to compute division as reciprocal estimate and iterative refinement, creating opportunities for increased throughput.  This feature requires: optional PowerPC Graphics instruction set for single precision and FRE instruction for double precision, assuming divides cannot generate user-visible traps, and the domain values not include Infinities, denormals or zero denominator.
-mpim-altivec -mno-pim-altivec Enable (or disable) built-in compiler support for the syntactic extensions as well as operations and predicates defined in the Motorola AltiVec Technology Programming Interface Manual (PIM).  This includes the recognition of "vector" and "pixel" as (context- dependent) keywords, the definition of built-in functions such as "vec_add", and the use of parenthesized comma expression as AltiVec literals.  Note that unlike the option -maltivec, the extension does not require the inclusion of any special header files; if "<altivec.h>" is included, a warning will be issued and the contents of the header will be ignored.  The preprocessor shall provide an "__APPLE_ALTIVEC__" manifest constant when -mpim-altivec is specified.  (APPLE ONLY)
In addition, the -mpim-altivec option disables the inlining of functions containing AltiVec instructions into functions that do not make use of the vector unit.  Certain other optimizations, such as inline vectorization of "memset" and "memcpy" calls, are also disabled.  These adjustments make it possible to compile programs whose use of AltiVec instructions is preceded by a run-time check for the presence of AltiVec functionality, and that can therefore be made to run on G3 processors.  Note that all of these optimizations may be re-enabled by supplying the -maltivec option, or an -mcpu option specifying a processor that supports AltiVec instructions.
-msecure-plt Generate code that allows ld and ld.so to build executables and shared libraries with non-exec .plt and .got sections.  This is a PowerPC 32-bit SYSV ABI option.
-mbss-plt Generate code that uses a BSS .plt section that ld.so fills in, and requires .plt and .got sections that are both writable and executable.  This is a PowerPC 32-bit SYSV ABI option.
-misel=yes/no This switch has been deprecated.  Use -misel and -mno-isel instead.
-mspe -mno-spe This switch enables or disables the generation of SPE simd instructions.
-mspe=yes/no This option has been deprecated.  Use -mspe and -mno-spe instead.
-mfloat-gprs=yes/single/double/no -mfloat-gprs This switch enables or disables the generation of floating point operations on the general purpose registers for architectures that support it.
The argument yes or single enables the use of single-precision floating point operations.
The argument double enables the use of single and double-precision floating point operations.
The argument no disables floating point operations on the general purpose registers.
This option is currently only available on the MPC854x.
-mfull-toc -mno-fp-in-toc -mno-sum-in-toc -mminimal-toc Modify generation of the TOC (Table Of Contents), which is created for every executable file.  The -mfull-toc option is selected by default.  In that case, GCC will allocate at least one TOC entry for each unique non-automatic variable reference in your program.  GCC will also place floating-point constants in the TOC.  However, only 16,384 entries are available in the TOC.
If you receive a linker error message that saying you have overflowed the available TOC space, you can reduce the amount of TOC space used with the -mno-fp-in-toc and -mno-sum-in-toc options.  -mno-fp-in-toc prevents GCC from putting floating-point constants in the TOC and -mno-sum-in-toc forces GCC to generate code to calculate the sum of an address and a constant at run-time instead of putting that sum into the TOC.  You may specify one or both of these options.  Each causes GCC to produce very slightly slower and larger code at the expense of conserving TOC space.
If you still run out of space in the TOC even when you specify both of these options, specify -mminimal-toc instead.  This option causes GCC to make only one TOC entry for every file.  When you specify this option, GCC will produce code that is slower and larger but which uses extremely little TOC space.  You may wish to use this option only on files that contain less frequently executed code.
-maix64 -maix32 Enable 64-bit AIX ABI and calling convention: 64-bit pointers, 64-bit "long" type, and the infrastructure needed to support them. Specifying -maix64 implies -mpowerpc64 and -mpowerpc, while -maix32 disables the 64-bit ABI and implies -mno-powerpc64.  GCC defaults to -maix32.
The AIX calling convention was extended but not initially documented to handle an obscure K&R C case of calling a function that takes the address of its arguments with fewer arguments than declared.  IBM XL compilers access floating point arguments which do not fit in the RSA from the stack when a subroutine is compiled without optimization. Because always storing floating-point arguments on the stack is inefficient and rarely needed, this option is not enabled by default and only is necessary when calling subroutines compiled by IBM XL compilers without optimization.
-msoft-float -mhard-float Generate code that does not use (uses) the floating-point register set.  Software floating point emulation is provided if you use the -msoft-float option, and pass the option to GCC when linking.
(APPLE ONLY) While the -msoft-float option is supported, the libraries that do the floating point emulation are not shipped on Apple PowerPCs, with the effect that the emulation does not work. However, the option may be useful for a different reason.  Normally the compiler can use floating point registers in contexts where you might not expect it, for example, to copy data from one memory location to another.  The -msoft-float option will prevent it from doing this.
-mmultiple -mno-multiple Generate code that uses (does not use) the load multiple word instructions and the store multiple word instructions.  These instructions are generated by default on POWER systems, and not generated on PowerPC systems.  Do not use -mmultiple on little endian PowerPC systems, since those instructions do not work when the processor is in little endian mode.  The exceptions are PPC740 and PPC750 which permit the instructions usage in little endian mode.
-mstring -mno-string Generate code that uses (does not use) the load string instructions and the store string word instructions to save multiple registers and do small block moves.  These instructions are generated by default on POWER systems, and not generated on PowerPC systems.  Do not use -mstring on little endian PowerPC systems, since those instructions do not work when the processor is in little endian mode.  The exceptions are PPC740 and PPC750 which permit the instructions usage in little endian mode.
-mfused-madd -mno-fused-madd Generate code that uses (does not use) the floating point multiply and accumulate instructions.  These instructions are generated by default if hardware floating is used.
-mmulhw -mno-mulhw Generate code that uses (does not use) the half-word multiply and multiply-accumulate instructions on the IBM 405 and 440 processors. These instructions are generated by default when targetting those processors.
-mdlmzb -mno-dlmzb Generate code that uses (does not use) the string-search dlmzb instruction on the IBM 405 and 440 processors.  This instruction is generated by default when targetting those processors.
For example, by default a structure containing nothing but 8 "unsigned" bit-fields of length 1 would be aligned to a 4 byte boundary and have a size of 4 bytes.  By using -mno-bit-align, the structure would be aligned to a 1 byte boundary and be one byte in size.
-mno-strict-align -mstrict-align On System V.4 and embedded PowerPC systems do not (do) assume that unaligned memory references will be handled by the system.
-mrelocatable -mno-relocatable On embedded PowerPC systems generate code that allows (does not allow) the program to be relocated to a different address at runtime. If you use -mrelocatable on any module, all objects linked together must be compiled with -mrelocatable or -mrelocatable-lib.
-mrelocatable-lib -mno-relocatable-lib On embedded PowerPC systems generate code that allows (does not allow) the program to be relocated to a different address at runtime. Modules compiled with -mrelocatable-lib can be linked with either modules compiled without -mrelocatable and -mrelocatable-lib or with modules compiled with the -mrelocatable options.
-mlittle -mlittle-endian On System V.4 and embedded PowerPC systems compile code for the processor in little endian mode.  The -mlittle-endian option is the same as -mlittle.
-mbig -mbig-endian On System V.4 and embedded PowerPC systems compile code for the processor in big endian mode.  The -mbig-endian option is the same as -mbig.
-mprioritize-restricted-insns=priority This option controls the priority that is assigned to dispatch-slot restricted instructions during the second scheduling pass.  The argument priority takes the value 0/1/2 to assign no/highest/second-highest priority to dispatch slot restricted instructions.
-msched-costly-dep=dependence_type This option controls which dependences are considered costly by the target during instruction scheduling.  The argument dependence_type takes one of the following values: no: no dependence is costly, all: all dependences are costly, true_store_to_load: a true dependence from store to load is costly, store_to_load: any dependence from store to load is costly, number: any dependence which latency >= number is costly.
-minsert-sched-nops=scheme This option controls which nop insertion scheme will be used during the second scheduling pass.  The argument scheme takes one of the following values: no: Don't insert nops.  pad: Pad with nops any dispatch group which has vacant issue slots, according to the scheduler's grouping.  regroup_exact: Insert nops to force costly dependent insns into separate groups.  Insert exactly as many nops as needed to force an insn to a new group, according to the estimated processor grouping.  number: Insert nops to force costly dependent insns into separate groups.  Insert number nops to force an insn to a new group.
-mcall-sysv On System V.4 and embedded PowerPC systems compile code using calling conventions that adheres to the March 1995 draft of the System V Application Binary Interface, PowerPC processor supplement.  This is the default unless you configured GCC using powerpc-*-eabiaix.
-mcall-sysv-eabi Specify both -mcall-sysv and -meabi options.
-mcall-solaris On System V.4 and embedded PowerPC systems compile code for the Solaris operating system.
-mcall-gnu On System V.4 and embedded PowerPC systems compile code for the Hurd- based GNU system.
-mabi=abi-type Extend the current ABI with a particular extension, or remove such extension.  Valid values are altivec, no-altivec, spe, no-spe, ibmlongdouble, ieeelongdouble.
-mabi=spe Extend the current ABI with SPE ABI extensions.  This does not change the default ABI, instead it adds the SPE ABI extensions to the current ABI.
-mabi=no-spe Disable Booke SPE ABI extensions for the current ABI.
-mabi=ibmlongdouble Change the current ABI to use IBM extended precision long double. This is a PowerPC 32-bit SYSV ABI option.
-mabi=ieeelongdouble Change the current ABI to use IEEE extended precision long double. This is a PowerPC 32-bit Linux ABI option.
-mprototype -mno-prototype On System V.4 and embedded PowerPC systems assume that all calls to variable argument functions are properly prototyped.  Otherwise, the compiler must insert an instruction before every non prototyped call to set or clear bit 6 of the condition code register (CR) to indicate whether floating point values were passed in the floating point registers in case the function takes a variable arguments.  With -mprototype, only calls to prototyped variable argument functions will set or clear the bit.
-msim On embedded PowerPC systems, assume that the startup module is called sim-crt0.o and that the standard C libraries are libsim.a and libc.a. This is the default for powerpc-*-eabisim.  configurations.
-mwindiss Specify that you are compiling for the WindISS simulation environment.
-memb On embedded PowerPC systems, set the PPC_EMB bit in the ELF flags header to indicate that eabi extended relocations are used.
-meabi -mno-eabi On System V.4 and embedded PowerPC systems do (do not) adhere to the Embedded Applications Binary Interface (eabi) which is a set of modifications to the System V.4 specifications.  Selecting -meabi means that the stack is aligned to an 8 byte boundary, a function "__eabi" is called to from "main" to set up the eabi environment, and the -msdata option can use both "r2" and "r13" to point to two separate small data areas.  Selecting -mno-eabi means that the stack is aligned to a 16 byte boundary, do not call an initialization function from "main", and the -msdata option will only use "r13" to point to a single small data area.  The -meabi option is on by default if you configured GCC using one of the powerpc*-*-eabi* options.
-msdata=eabi On System V.4 and embedded PowerPC systems, put small initialized "const" global and static data in the .sdata2 section, which is pointed to by register "r2".  Put small initialized non-"const" global and static data in the .sdata section, which is pointed to by register "r13".  Put small uninitialized global and static data in the .sbss section, which is adjacent to the .sdata section.  The -msdata=eabi option is incompatible with the -mrelocatable option. The -msdata=eabi option also sets the -memb option.
-msdata=sysv On System V.4 and embedded PowerPC systems, put small global and static data in the .sdata section, which is pointed to by register "r13".  Put small uninitialized global and static data in the .sbss section, which is adjacent to the .sdata section.  The -msdata=sysv option is incompatible with the -mrelocatable option.
-msdata-data On System V.4 and embedded PowerPC systems, put small global data in the .sdata section.  Put small uninitialized global data in the .sbss section.  Do not use register "r13" to address small data however. This is the default behavior unless other -msdata options are used.
-msdata=none -mno-sdata On embedded PowerPC systems, put all initialized global and static data in the .data section, and all uninitialized data in the .bss section.
-G num On embedded PowerPC systems, put global and static items less than or equal to num bytes into the small data or bss sections instead of the normal data or bss section.  By default, num is 8.  The -G num switch is also passed to the linker.  All modules should be compiled with the same -G num value.
-mlongcall -mno-longcall -mlong-branch -mno-long-branch By default assume that all calls are far away so that a longer more expensive calling sequence is required.  This is required for calls further than 32 megabytes (33,554,432 bytes) from the current location.  A short call will be generated if the compiler knows the call cannot be that far away.  This setting can be overridden by the "shortcall" function attribute, or by "#pragma longcall(0)".
On Darwin/PPC systems, "#pragma longcall" will generate "jbsr callee, L42", plus a "branch island" (glue code).  The two target addresses represent the callee and the "branch island".  The Darwin/PPC linker will prefer the first address and generate a "bl callee" if the PPC "bl" instruction will reach the callee directly; otherwise, the linker will generate "bl L42" to call the "branch island".  The "branch island" is appended to the body of the calling function; it computes the full 32-bit address of the callee and jumps to it.
On Mach-O (Darwin) systems, -mlongcall directs the compiler emit to the glue for every direct call, and the Darwin linker decides whether to use or discard it.  -mlong-branch is a synonym for -mlongcall.
In the future, we may cause GCC to ignore all longcall specifications when the linker is known to generate glue.
-pthread Adds support for multithreading with the pthreads library.  This option sets flags for both the preprocessor and linker.
Most of them have both positive and negative forms; the negative form of -ffoo would be -fno-foo.  In the table below, only one of the forms is listed---the one which is not the default.  You can figure out the other form by either removing no- or adding it.
-fwrapv This option instructs the compiler to assume that signed arithmetic overflow of addition, subtraction and multiplication wraps around using twos-complement representation.  This flag enables some optimizations and disables others.  This option is enabled by default for the Java front-end, as required by the Java language specification.
-fexceptions Enable exception handling.  Generates extra code needed to propagate exceptions.  For some targets, this implies GCC will generate frame unwind information for all functions, which can produce significant data size overhead, although it does not affect execution.  If you do not specify this option, GCC will enable it by default for languages like C++ which normally require exception handling, and disable it for languages like C that do not normally require it.  However, you may need to enable this option when compiling C code that needs to interoperate properly with exception handlers written in C++.  You may also wish to disable this option if you are compiling older C++ programs that don't use exception handling.
-fnon-call-exceptions Generate code that allows trapping instructions to throw exceptions. Note that this requires platform-specific runtime support that does not exist everywhere.  Moreover, it only allows trapping instructions to throw exceptions, i.e. memory references or floating point instructions.  It does not allow exceptions to be thrown from arbitrary signal handlers such as "SIGALRM".
-funwind-tables Similar to -fexceptions, except that it will just generate any needed static data, but will not affect the generated code in any other way. You will normally not enable this option; instead, a language processor that needs this handling would enable it on your behalf.
-fasynchronous-unwind-tables Generate unwind table in dwarf2 format, if supported by target machine.  The table is exact at each instruction boundary, so it can be used for stack unwinding from asynchronous events (such as debugger or garbage collector).
-fshort-enums Allocate to an "enum" type only as many bytes as it needs for the declared range of possible values.  Specifically, the "enum" type will be equivalent to the smallest integer type which has enough room.
-fshort-double Use the same size for "double" as for "float".
Warning: the -fshort-double switch causes GCC to generate code that is not binary compatible with code generated without that switch. Use it to conform to a non-default application binary interface.
-fshort-wchar Override the underlying type for wchar_t to be short unsigned int instead of the default for the target.  This option is useful for building programs to run under WINE.
-fno-common In C, allocate even uninitialized global variables in the data section of the object file, rather than generating them as common blocks.  This has the effect that if the same variable is declared (without "extern") in two different compilations, you will get an error when you link them.  The only reason this might be useful is if you wish to verify that the program will work on other systems which always work this way.
-fno-ident Ignore the #ident directive.
-fpic Generate position-independent code (PIC) suitable for use in a shared library, if supported for the target machine.  Such code accesses all constant addresses through a global offset table (GOT).  The dynamic loader resolves the GOT entries when the program starts (the dynamic loader is not part of GCC; it is part of the operating system).  If the GOT size for the linked executable exceeds a machine-specific maximum size, you get an error message from the linker indicating that -fpic does not work; in that case, recompile with -fPIC instead. (These maximums are 8k on the SPARC and 32k on the m68k and RS/6000. The 386 has no such limit.)
Position-independent code requires special support, and therefore works only on certain machines.  For the 386, GCC supports PIC for System V but not for the Sun 386i.  Code generated for the IBM RS/6000 is always position-independent.
-fPIC If supported for the target machine, emit position-independent code, suitable for dynamic linking and avoiding any limit on the size of the global offset table.  This option makes a difference on the m68k, PowerPC and SPARC.
-fPIC is the default on Darwin and Mac OS X.
-fpie -fPIE These options are similar to -fpic and -fPIC, but generated position independent code can be only linked into executables.  Usually these options are used when -pie GCC option will be used during linking.