Repository: nipy/nipype

Issue:
bbregister api: new version allows saving to lta (preferred)

Discussion:
codecov-io: # [Codecov](https://codecov.io/gh/nipy/nipype/pull/2031?src=pr&el=h1) Report
> Merging [#2031](https://codecov.io/gh/nipy/nipype/pull/2031?src=pr&el=desc) into [master](https://codecov.io/gh/nipy/nipype/commit/90cfdd8a63114dbe2e1ce6dea9dd739d04f84a4a?src=pr&el=desc) will **decrease** coverage by `<.01%`.
> The diff coverage is `22.22%`.

[![Impacted file tree graph](https://codecov.io/gh/nipy/nipype/pull/2031/graphs/tree.svg?width=650&height=150&src=pr&token=Tu0EnSSGVZ)](https://codecov.io/gh/nipy/nipype/pull/2031?src=pr&el=tree)

```diff
@@            Coverage Diff             @@
##           master    #2031      +/-   ##
==========================================
- Coverage    72.2%   72.19%   -0.01%     
==========================================
  Files        1132     1132              
  Lines       57024    57032       +8     
  Branches     8165     8167       +2     
==========================================
+ Hits        41173    41175       +2     
- Misses      14567    14572       +5     
- Partials     1284     1285       +1
```

| Flag | Coverage Δ | |
|---|---|---|
| #smoketests | `72.19% <22.22%> (-0.01%)` | :arrow_down: |
| #unittests | `69.79% <22.22%> (-0.01%)` | :arrow_down: |

| [Impacted Files](https://codecov.io/gh/nipy/nipype/pull/2031?src=pr&el=tree) | Coverage Δ | |
|---|---|---|
| [...ype/interfaces/freesurfer/tests/test\_BBRegister.py](https://codecov.io/gh/nipy/nipype/pull/2031?src=pr&el=tree#diff-bmlweXBlL2ludGVyZmFjZXMvZnJlZXN1cmZlci90ZXN0cy90ZXN0X0JCUmVnaXN0ZXIucHk=) | `77.77% <ø> (ø)` | :arrow_up: |
| [nipype/interfaces/freesurfer/preprocess.py](https://codecov.io/gh/nipy/nipype/pull/2031?src=pr&el=tree#diff-bmlweXBlL2ludGVyZmFjZXMvZnJlZXN1cmZlci9wcmVwcm9jZXNzLnB5) | `64.84% <22.22%> (-0.32%)` | :arrow_down: |

------

[Continue to review full report at Codecov](https://codecov.io/gh/nipy/nipype/pull/2031?src=pr&el=continue).
> **Legend** - [Click here to learn more](https://docs.codecov.io/docs/codecov-delta)
> `Δ = absolute <relative> (impact)`, `ø = not affected`, `? = missing data`
> Powered by [Codecov](https://codecov.io/gh/nipy/nipype/pull/2031?src=pr&el=footer). Last update [90cfdd8...ab826ef](https://codecov.io/gh/nipy/nipype/pull/2031?src=pr&el=lastupdated). Read the [comment docs](https://docs.codecov.io/docs/pull-request-comments).


Patch:
diff --git a/nipype/interfaces/freesurfer/preprocess.py b/nipype/interfaces/freesurfer/preprocess.py
index 0ff32ad74..4e164c342 100644
--- a/nipype/interfaces/freesurfer/preprocess.py
+++ b/nipype/interfaces/freesurfer/preprocess.py
@@ -1155,6 +1155,8 @@ class BBRegisterInputSpec(FSTraitedSpec):
                         desc='degrees of freedom for initial registration (FSL)')
     out_fsl_file = traits.Either(traits.Bool, File, argstr="--fslmat %s",
                                  desc="write the transformation matrix in FSL FLIRT format")
+    out_lta_file = traits.Either(traits.Bool, File, argstr="--lta %s", min_ver='5.2.0',
+                                 desc="write the transformation matrix in LTA format")
     registered_file = traits.Either(traits.Bool, File, argstr='--o %s',
                                     desc='output warped sourcefile either True or filename')
 
@@ -1171,6 +1173,7 @@ class BBRegisterInputSpec6(BBRegisterInputSpec):
 class BBRegisterOutputSpec(TraitedSpec):
     out_reg_file = File(exists=True, desc='Output registration file')
     out_fsl_file = File(desc='Output FLIRT-style registration file')
+    out_lta_file = File(desc='Output LTA-style registration file')
     min_cost_file = File(exists=True, desc='Output registration minimum cost file')
     registered_file = File(desc='Registered and resampled source file')
 
@@ -1219,6 +1222,16 @@ class BBRegister(FSCommand):
             else:
                 outputs['registered_file'] = op.abspath(_in.registered_file)
 
+        if isdefined(_in.out_lta_file):
+            if isinstance(_in.out_fsl_file, bool):
+                suffix = '_bbreg_%s.lta' % _in.subject_id
+                out_lta_file = fname_presuffix(_in.source_file,
+                                               suffix=suffix,
+                                               use_ext=False)
+                outputs['out_lta_file'] = out_lta_file
+            else:
+                outputs['out_lta_file'] = op.abspath(_in.out_lta_file)
+
         if isdefined(_in.out_fsl_file):
             if isinstance(_in.out_fsl_file, bool):
                 suffix = '_bbreg_%s.mat' % _in.subject_id
@@ -1234,7 +1247,7 @@ class BBRegister(FSCommand):
 
     def _format_arg(self, name, spec, value):
 
-        if name in ['registered_file', 'out_fsl_file']:
+        if name in ['registered_file', 'out_fsl_file', 'out_lta_file']:
             if isinstance(value, bool):
                 fname = self._list_outputs()[name]
             else:


Test patch:
diff --git a/nipype/interfaces/freesurfer/tests/test_BBRegister.py b/nipype/interfaces/freesurfer/tests/test_BBRegister.py
index 90305697d..e29ea17b6 100644
--- a/nipype/interfaces/freesurfer/tests/test_BBRegister.py
+++ b/nipype/interfaces/freesurfer/tests/test_BBRegister.py
@@ -15,6 +15,7 @@ def test_BBRegister_inputs():
         init_reg_file=dict(argstr='--init-reg %s', mandatory=True, xor=['init'],),
         intermediate_file=dict(argstr='--int %s',),
         out_fsl_file=dict(argstr='--fslmat %s',),
+        out_lta_file=dict(argstr='--lta %s', min_ver='5.2.0',),
         out_reg_file=dict(argstr='--reg %s', genfile=True,),
         reg_frame=dict(argstr='--frame %d', xor=['reg_middle_frame'],),
         reg_middle_frame=dict(argstr='--mid-frame', xor=['reg_frame'],),
@@ -37,6 +38,7 @@ def test_BBRegister_inputs():
         init_reg_file=dict(argstr='--init-reg %s', xor=['init'],),
         intermediate_file=dict(argstr='--int %s',),
         out_fsl_file=dict(argstr='--fslmat %s',),
+        out_lta_file=dict(argstr='--lta %s', min_ver='5.2.0',),
         out_reg_file=dict(argstr='--reg %s', genfile=True,),
         reg_frame=dict(argstr='--frame %d', xor=['reg_middle_frame'],),
         reg_middle_frame=dict(argstr='--mid-frame', xor=['reg_frame'],),
@@ -62,6 +64,7 @@ def test_BBRegister_inputs():
 def test_BBRegister_outputs():
     output_map = dict(min_cost_file=dict(),
                       out_fsl_file=dict(),
+                      out_lta_file=dict(),
                       out_reg_file=dict(),
                       registered_file=dict(),
                       )