Repository: mmcloughlin/avo
Pull request #360 (2023-01-10 05:31:26)

all: VPCLMULQDQ instruction
Imported from #349

codecov-commenter: # [Codecov](https://codecov.io/gh/mmcloughlin/avo/pull/360?src=pr&el=h1&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin) Report
> Merging [#360](https://codecov.io/gh/mmcloughlin/avo/pull/360?src=pr&el=desc&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin) (57fb033) into [master](https://codecov.io/gh/mmcloughlin/avo/commit/b893b3221346b27309be51d35466f928d7a0fda5?el=desc&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin) (b893b32) will **not change** coverage.
> The diff coverage is `80.00%`.

```diff
@@           Coverage Diff           @@
##           master     #360   +/-   ##
=======================================
  Coverage   76.00%   76.00%           
=======================================
  Files          65       65           
  Lines       20790    20790           
=======================================
  Hits        15801    15801           
  Misses       4906     4906           
  Partials       83       83           
```

| Flag | Coverage Δ | |
|---|---|---|
| integration | `11.87% <0.00%> (ø)` | |
| unittests | `73.10% <80.00%> (ø)` | |

Flags with carried forward coverage won't be shown. [Click here](https://docs.codecov.io/docs/carryforward-flags?utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin#carryforward-flags-in-the-pull-request-comment) to find out more.

| [Impacted Files](https://codecov.io/gh/mmcloughlin/avo/pull/360?src=pr&el=tree&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin) | Coverage Δ | |
|---|---|---|
| [x86/zoptab.go](https://codecov.io/gh/mmcloughlin/avo/pull/360?src=pr&el=tree&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin#diff-eDg2L3pvcHRhYi5nbw==) | `92.42% <ø> (ø)` | |
| [build/zinstructions.go](https://codecov.io/gh/mmcloughlin/avo/pull/360?src=pr&el=tree&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin#diff-YnVpbGQvemluc3RydWN0aW9ucy5nbw==) | `67.64% <66.66%> (ø)` | |
| [x86/zctors.go](https://codecov.io/gh/mmcloughlin/avo/pull/360?src=pr&el=tree&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin#diff-eDg2L3pjdG9ycy5nbw==) | `100.00% <100.00%> (ø)` | |

Help us with your feedback. Take ten seconds to tell us [how you rate us](https://about.codecov.io/nps?utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin). Have a feature suggestion? [Share it here.](https://app.codecov.io/gh/feedback/?utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin)


Patch:
diff --git a/build/zinstructions.go b/build/zinstructions.go
index 84086fb..d2a741e 100644
--- a/build/zinstructions.go
+++ b/build/zinstructions.go
@@ -58405,10 +58405,14 @@ func VPBROADCASTW_Z(mrx, k, xyz operand.Op) { ctx.VPBROADCASTW_Z(mrx, k, xyz) }
 //
 //	VPCLMULQDQ imm8 m128 xmm xmm
 //	VPCLMULQDQ imm8 xmm  xmm xmm
+//	VPCLMULQDQ imm8 m256 ymm ymm
+//	VPCLMULQDQ imm8 ymm  ymm ymm
+//	VPCLMULQDQ imm8 m512 zmm zmm
+//	VPCLMULQDQ imm8 zmm  zmm zmm
 //
 // Construct and append a VPCLMULQDQ instruction to the active function.
-func (c *Context) VPCLMULQDQ(i, mx, x, x1 operand.Op) {
-	c.addinstruction(x86.VPCLMULQDQ(i, mx, x, x1))
+func (c *Context) VPCLMULQDQ(i, mxyz, xyz, xyz1 operand.Op) {
+	c.addinstruction(x86.VPCLMULQDQ(i, mxyz, xyz, xyz1))
 }
 
 // VPCLMULQDQ: Carry-Less Quadword Multiplication.
@@ -58417,10 +58421,14 @@ func (c *Context) VPCLMULQDQ(i, mx, x, x1 operand.Op) {
 //
 //	VPCLMULQDQ imm8 m128 xmm xmm
 //	VPCLMULQDQ imm8 xmm  xmm xmm
+//	VPCLMULQDQ imm8 m256 ymm ymm
+//	VPCLMULQDQ imm8 ymm  ymm ymm
+//	VPCLMULQDQ imm8 m512 zmm zmm
+//	VPCLMULQDQ imm8 zmm  zmm zmm
 //
 // Construct and append a VPCLMULQDQ instruction to the active function.
 // Operates on the global context.
-func VPCLMULQDQ(i, mx, x, x1 operand.Op) { ctx.VPCLMULQDQ(i, mx, x, x1) }
+func VPCLMULQDQ(i, mxyz, xyz, xyz1 operand.Op) { ctx.VPCLMULQDQ(i, mxyz, xyz, xyz1) }
 
 // VPCMPB: Compare Packed Signed Byte Values.
 //
diff --git a/internal/inst/ztable.go b/internal/inst/ztable.go
index 4bd143b..d65faf7 100644
--- a/internal/inst/ztable.go
+++ b/internal/inst/ztable.go
@@ -66940,6 +66940,46 @@ var Instructions = []Instruction{
 				},
 				EncodingType: 0x3,
 			},
+			{
+				ISA: []string{"VPCLMULQDQ"},
+				Operands: []Operand{
+					{Type: "imm8", Action: 0x0},
+					{Type: "m256", Action: 0x1},
+					{Type: "ymm", Action: 0x1},
+					{Type: "ymm", Action: 0x2},
+				},
+				EncodingType: 0x3,
+			},
+			{
+				ISA: []string{"VPCLMULQDQ"},
+				Operands: []Operand{
+					{Type: "imm8", Action: 0x0},
+					{Type: "ymm", Action: 0x1},
+					{Type: "ymm", Action: 0x1},
+					{Type: "ymm", Action: 0x2},
+				},
+				EncodingType: 0x3,
+			},
+			{
+				ISA: []string{"AVX512F", "VPCLMULQDQ"},
+				Operands: []Operand{
+					{Type: "imm8", Action: 0x0},
+					{Type: "m512", Action: 0x1},
+					{Type: "zmm", Action: 0x1},
+					{Type: "zmm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+			},
+			{
+				ISA: []string{"AVX512F", "VPCLMULQDQ"},
+				Operands: []Operand{
+					{Type: "imm8", Action: 0x0},
+					{Type: "zmm", Action: 0x1},
+					{Type: "zmm", Action: 0x1},
+					{Type: "zmm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+			},
 		},
 	},
 	{
diff --git a/internal/opcodesextra/instructions.go b/internal/opcodesextra/instructions.go
index f2888ac..7288b8b 100644
--- a/internal/opcodesextra/instructions.go
+++ b/internal/opcodesextra/instructions.go
@@ -9,6 +9,7 @@ var sets = [][]*inst.Instruction{
 	gfni,
 	vaes,
 	vnni,
+	vpclmulqdq,
 }
 
 // Instructions returns a list of extras to add to the instructions database.
diff --git a/internal/opcodesextra/vpclmulqdq.go b/internal/opcodesextra/vpclmulqdq.go
new file mode 100644
index 0000000..03aec6f
--- /dev/null
+++ b/internal/opcodesextra/vpclmulqdq.go
@@ -0,0 +1,141 @@
+package opcodesextra
+
+import "github.com/mmcloughlin/avo/internal/inst"
+
+// vpclmulqdq adds VEX and EVEX encoded versions of the PCLMULQDQ carry-less
+// quadword multiplication instruction.
+var vpclmulqdq = []*inst.Instruction{
+	// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L2911-L2917
+	//
+	//		{as: AVPCLMULQDQ, ytab: _yvpclmulqdq, prefix: Pavx, op: opBytes{
+	//			avxEscape | vex128 | vex66 | vex0F3A | vexW0, 0x44,
+	//			avxEscape | vex256 | vex66 | vex0F3A | vexW0, 0x44,
+	//			avxEscape | evex128 | evex66 | evex0F3A | evexW0, evexN16, 0x44,
+	//			avxEscape | evex256 | evex66 | evex0F3A | evexW0, evexN32, 0x44,
+	//			avxEscape | evex512 | evex66 | evex0F3A | evexW0, evexN64, 0x44,
+	//		}},
+	//
+	{
+		Opcode:  "VPCLMULQDQ",
+		Summary: "Carry-Less Quadword Multiplication",
+		// See: https://www.felixcloutier.com/x86/pclmulqdq
+		//
+		// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L676-L682
+		//
+		//	var _yvpclmulqdq = []ytab{
+		//		{zcase: Zvex_i_rm_v_r, zoffset: 2, args: argList{Yu8, Yxm, Yxr, Yxr}},
+		//		{zcase: Zvex_i_rm_v_r, zoffset: 2, args: argList{Yu8, Yym, Yyr, Yyr}},
+		//		{zcase: Zevex_i_rm_v_r, zoffset: 3, args: argList{Yu8, YxmEvex, YxrEvex, YxrEvex}},
+		//		{zcase: Zevex_i_rm_v_r, zoffset: 3, args: argList{Yu8, YymEvex, YyrEvex, YyrEvex}},
+		//		{zcase: Zevex_i_rm_v_r, zoffset: 3, args: argList{Yu8, Yzm, Yzr, Yzr}},
+		//	}
+		//
+		Forms: inst.Forms{
+			// VEX.128.66.0F3A.WIG 44 /r ib VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
+			{
+				ISA: []string{"AVX", "PCLMULQDQ"},
+				Operands: []inst.Operand{
+					{Type: "imm8"},
+					{Type: "m128", Action: inst.R},
+					{Type: "xmm", Action: inst.R},
+					{Type: "xmm", Action: inst.W},
+				},
+				EncodingType: inst.EncodingTypeVEX,
+			},
+			{
+				ISA: []string{"AVX", "PCLMULQDQ"},
+				Operands: []inst.Operand{
+					{Type: "imm8"},
+					{Type: "xmm", Action: inst.R},
+					{Type: "xmm", Action: inst.R},
+					{Type: "xmm", Action: inst.W},
+				},
+				EncodingType: inst.EncodingTypeVEX,
+			},
+			// VEX.256.66.0F3A.WIG 44 /r /ib VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
+			{
+				ISA: []string{"VPCLMULQDQ"},
+				Operands: []inst.Operand{
+					{Type: "imm8"},
+					{Type: "m256", Action: inst.R},
+					{Type: "ymm", Action: inst.R},
+					{Type: "ymm", Action: inst.W},
+				},
+				EncodingType: inst.EncodingTypeVEX,
+			},
+			{
+				ISA: []string{"VPCLMULQDQ"},
+				Operands: []inst.Operand{
+					{Type: "imm8"},
+					{Type: "ymm", Action: inst.R},
+					{Type: "ymm", Action: inst.R},
+					{Type: "ymm", Action: inst.W},
+				},
+				EncodingType: inst.EncodingTypeVEX,
+			},
+			// EVEX.128.66.0F3A.WIG 44 /r /ib VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
+			{
+				ISA: []string{"AVX512VL", "VPCLMULQDQ"},
+				Operands: []inst.Operand{
+					{Type: "imm8"},
+					{Type: "m128", Action: inst.R},
+					{Type: "xmm", Action: inst.R},
+					{Type: "xmm", Action: inst.W},
+				},
+				EncodingType: inst.EncodingTypeEVEX,
+			},
+			{
+				ISA: []string{"AVX512VL", "VPCLMULQDQ"},
+				Operands: []inst.Operand{
+					{Type: "imm8"},
+					{Type: "xmm", Action: inst.R},
+					{Type: "xmm", Action: inst.R},
+					{Type: "xmm", Action: inst.W},
+				},
+				EncodingType: inst.EncodingTypeEVEX,
+			},
+			// EVEX.256.66.0F3A.WIG 44 /r /ib VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
+			{
+				ISA: []string{"AVX512VL", "VPCLMULQDQ"},
+				Operands: []inst.Operand{
+					{Type: "imm8"},
+					{Type: "m256", Action: inst.R},
+					{Type: "ymm", Action: inst.R},
+					{Type: "ymm", Action: inst.W},
+				},
+				EncodingType: inst.EncodingTypeEVEX,
+			},
+			{
+				ISA: []string{"AVX512VL", "VPCLMULQDQ"},
+				Operands: []inst.Operand{
+					{Type: "imm8"},
+					{Type: "ymm", Action: inst.R},
+					{Type: "ymm", Action: inst.R},
+					{Type: "ymm", Action: inst.W},
+				},
+				EncodingType: inst.EncodingTypeEVEX,
+			},
+			// EVEX.512.66.0F3A.WIG 44 /r /ib VPCLMULQDQ zmm1, zmm2, zmm3/m512, imm8
+			{
+				ISA: []string{"AVX512F", "VPCLMULQDQ"},
+				Operands: []inst.Operand{
+					{Type: "imm8"},
+					{Type: "m512", Action: inst.R},
+					{Type: "zmm", Action: inst.R},
+					{Type: "zmm", Action: inst.W},
+				},
+				EncodingType: inst.EncodingTypeEVEX,
+			},
+			{
+				ISA: []string{"AVX512F", "VPCLMULQDQ"},
+				Operands: []inst.Operand{
+					{Type: "imm8"},
+					{Type: "zmm", Action: inst.R},
+					{Type: "zmm", Action: inst.R},
+					{Type: "zmm", Action: inst.W},
+				},
+				EncodingType: inst.EncodingTypeEVEX,
+			},
+		},
+	},
+}
diff --git a/x86/zctors.go b/x86/zctors.go
index 832f199..7dce968 100644
--- a/x86/zctors.go
+++ b/x86/zctors.go
@@ -25753,8 +25753,12 @@ func VPBROADCASTW_Z(mrx, k, xyz operand.Op) (*intrep.Instruction, error) {
 //
 //	VPCLMULQDQ imm8 m128 xmm xmm
 //	VPCLMULQDQ imm8 xmm  xmm xmm
-func VPCLMULQDQ(i, mx, x, x1 operand.Op) (*intrep.Instruction, error) {
-	return build(opcVPCLMULQDQ.Forms(), sffxs{}, []operand.Op{i, mx, x, x1})
+//	VPCLMULQDQ imm8 m256 ymm ymm
+//	VPCLMULQDQ imm8 ymm  ymm ymm
+//	VPCLMULQDQ imm8 m512 zmm zmm
+//	VPCLMULQDQ imm8 zmm  zmm zmm
+func VPCLMULQDQ(i, mxyz, xyz, xyz1 operand.Op) (*intrep.Instruction, error) {
+	return build(opcVPCLMULQDQ.Forms(), sffxs{}, []operand.Op{i, mxyz, xyz, xyz1})
 }
 
 // VPCMPB: Compare Packed Signed Byte Values.
diff --git a/x86/zoptab.go b/x86/zoptab.go
index b8edbd8..c034fc6 100644
--- a/x86/zoptab.go
+++ b/x86/zoptab.go
@@ -315,6 +315,8 @@ const (
 	isasAVX512CD_AVX512VL
 	isasAVX512CD
 	isasAVX_PCLMULQDQ
+	isasVPCLMULQDQ
+	isasAVX512F_VPCLMULQDQ
 	isasAVX512VL_AVX512VNNI
 	isasAVX512VNNI
 	isasAVX512VBMI_AVX512VL
@@ -381,6 +383,8 @@ var isaslisttable = [][]string{
 	{"AVX512CD", "AVX512VL"},
 	{"AVX512CD"},
 	{"AVX", "PCLMULQDQ"},
+	{"VPCLMULQDQ"},
+	{"AVX512F", "VPCLMULQDQ"},
 	{"AVX512VL", "AVX512VNNI"},
 	{"AVX512VNNI"},
 	{"AVX512VBMI", "AVX512VL"},
@@ -9503,6 +9507,10 @@ var forms = []form{
 	{opcVPBROADCASTW, sffxsclsNIL, 0, isasAVX512BW, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
 	{opcVPCLMULQDQ, sffxsclsNIL, 0, isasAVX_PCLMULQDQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
 	{opcVPCLMULQDQ, sffxsclsNIL, 0, isasAVX_PCLMULQDQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
+	{opcVPCLMULQDQ, sffxsclsNIL, 0, isasVPCLMULQDQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
+	{opcVPCLMULQDQ, sffxsclsNIL, 0, isasVPCLMULQDQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
+	{opcVPCLMULQDQ, sffxsclsNIL, 0, isasAVX512F_VPCLMULQDQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
+	{opcVPCLMULQDQ, sffxsclsNIL, 0, isasAVX512F_VPCLMULQDQ, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
 	{opcVPCMPB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
 	{opcVPCMPB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 4, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
 	{opcVPCMPB, sffxsclsNIL, 0, isasAVX512BW_AVX512VL, 5, oprnds{{uint8(oprndtypeIMM8), false, actionN}, {uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeK), false, actionW}}},
@@ -15563,310 +15571,310 @@ var opcformstable = [][]form{
 	forms[6457:6460],
 	forms[6460:6487],
 	forms[6487:6514],
-	forms[6514:6516],
-	forms[6516:6528],
-	forms[6528:6546],
-	forms[6546:6562],
-	forms[6562:6584],
-	forms[6584:6606],
-	forms[6606:6622],
-	forms[6622:6624],
-	forms[6624:6626],
-	forms[6626:6642],
-	forms[6642:6664],
-	forms[6664:6686],
-	forms[6686:6702],
-	forms[6702:6704],
-	forms[6704:6706],
-	forms[6706:6724],
-	forms[6724:6736],
-	forms[6736:6754],
-	forms[6754:6772],
-	forms[6772:6784],
-	forms[6784:6796],
-	forms[6796:6814],
-	forms[6814:6832],
-	forms[6832:6859],
-	forms[6859:6886],
-	forms[6886:6913],
-	forms[6913:6940],
-	forms[6940:6967],
-	forms[6967:6994],
-	forms[6994:6996],
-	forms[6996:6998],
-	forms[6998:7016],
-	forms[7016:7034],
-	forms[7034:7052],
-	forms[7052:7079],
-	forms[7079:7106],
-	forms[7106:7133],
-	forms[7133:7160],
-	forms[7160:7178],
-	forms[7178:7232],
-	forms[7232:7286],
-	forms[7286:7322],
-	forms[7322:7340],
-	forms[7340:7376],
-	forms[7376:7394],
-	forms[7394:7421],
-	forms[7421:7448],
-	forms[7448:7475],
-	forms[7475:7502],
-	forms[7502:7520],
-	forms[7520:7538],
-	forms[7538:7556],
-	forms[7556:7574],
-	forms[7574:7576],
-	forms[7576:7578],
+	forms[6514:6520],
+	forms[6520:6532],
+	forms[6532:6550],
+	forms[6550:6566],
+	forms[6566:6588],
+	forms[6588:6610],
+	forms[6610:6626],
+	forms[6626:6628],
+	forms[6628:6630],
+	forms[6630:6646],
+	forms[6646:6668],
+	forms[6668:6690],
+	forms[6690:6706],
+	forms[6706:6708],
+	forms[6708:6710],
+	forms[6710:6728],
+	forms[6728:6740],
+	forms[6740:6758],
+	forms[6758:6776],
+	forms[6776:6788],
+	forms[6788:6800],
+	forms[6800:6818],
+	forms[6818:6836],
+	forms[6836:6863],
+	forms[6863:6890],
+	forms[6890:6917],
+	forms[6917:6944],
+	forms[6944:6971],
+	forms[6971:6998],
+	forms[6998:7000],
+	forms[7000:7002],
+	forms[7002:7020],
+	forms[7020:7038],
+	forms[7038:7056],
+	forms[7056:7083],
+	forms[7083:7110],
+	forms[7110:7137],
+	forms[7137:7164],
+	forms[7164:7182],
+	forms[7182:7236],
+	forms[7236:7290],
+	forms[7290:7326],
+	forms[7326:7344],
+	forms[7344:7380],
+	forms[7380:7398],
+	forms[7398:7425],
+	forms[7425:7452],
+	forms[7452:7479],
+	forms[7479:7506],
+	forms[7506:7524],
+	forms[7524:7542],
+	forms[7542:7560],
+	forms[7560:7578],
 	forms[7578:7580],
 	forms[7580:7582],
-	forms[7582:7587],
-	forms[7587:7592],
-	forms[7592:7597],
-	forms[7597:7602],
-	forms[7602:7606],
+	forms[7582:7584],
+	forms[7584:7586],
+	forms[7586:7591],
+	forms[7591:7596],
+	forms[7596:7601],
+	forms[7601:7606],
 	forms[7606:7610],
 	forms[7610:7614],
-	forms[7614:7616],
-	forms[7616:7620],
+	forms[7614:7618],
+	forms[7618:7620],
 	forms[7620:7624],
 	forms[7624:7628],
-	forms[7628:7630],
-	forms[7630:7632],
+	forms[7628:7632],
 	forms[7632:7634],
 	forms[7634:7636],
-	forms[7636:7663],
-	forms[7663:7690],
-	forms[7690:7717],
-	forms[7717:7744],
-	forms[7744:7762],
-	forms[7762:7780],
-	forms[7780:7784],
+	forms[7636:7638],
+	forms[7638:7640],
+	forms[7640:7667],
+	forms[7667:7694],
+	forms[7694:7721],
+	forms[7721:7748],
+	forms[7748:7766],
+	forms[7766:7784],
 	forms[7784:7788],
-	forms[7788:7806],
-	forms[7806:7833],
-	forms[7833:7860],
-	forms[7860:7878],
-	forms[7878:7896],
-	forms[7896:7923],
-	forms[7923:7950],
-	forms[7950:7968],
-	forms[7968:7986],
-	forms[7986:8013],
-	forms[8013:8040],
-	forms[8040:8058],
-	forms[8058:8076],
-	forms[8076:8103],
-	forms[8103:8130],
-	forms[8130:8148],
-	forms[8148:8151],
-	forms[8151:8154],
-	forms[8154:8172],
-	forms[8172:8190],
-	forms[8190:8193],
-	forms[8193:8196],
-	forms[8196:8199],
-	forms[8199:8202],
-	forms[8202:8204],
-	forms[8204:8207],
-	forms[8207:8225],
-	forms[8225:8243],
-	forms[8243:8261],
-	forms[8261:8279],
-	forms[8279:8297],
-	forms[8297:8315],
-	forms[8315:8333],
-	forms[8333:8351],
-	forms[8351:8369],
-	forms[8369:8387],
-	forms[8387:8405],
-	forms[8405:8423],
-	forms[8423:8441],
-	forms[8441:8459],
-	forms[8459:8477],
-	forms[8477:8495],
-	forms[8495:8513],
-	forms[8513:8531],
-	forms[8531:8549],
-	forms[8549:8567],
-	forms[8567:8585],
-	forms[8585:8588],
-	forms[8588:8606],
-	forms[8606:8624],
-	forms[8624:8642],
-	forms[8642:8660],
-	forms[8660:8678],
-	forms[8678:8696],
-	forms[8696:8714],
-	forms[8714:8741],
-	forms[8741:8759],
-	forms[8759:8777],
-	forms[8777:8795],
-	forms[8795:8822],
-	forms[8822:8849],
-	forms[8849:8867],
-	forms[8867:8894],
-	forms[8894:8921],
-	forms[8921:8930],
-	forms[8930:8939],
-	forms[8939:8943],
-	forms[8943:8970],
-	forms[8970:8997],
-	forms[8997:9024],
-	forms[9024:9051],
-	forms[9051:9078],
-	forms[9078:9105],
-	forms[9105:9132],
-	forms[9132:9159],
-	forms[9159:9186],
-	forms[9186:9213],
-	forms[9213:9219],
-	forms[9219:9222],
-	forms[9222:9225],
-	forms[9225:9228],
-	forms[9228:9231],
-	forms[9231:9249],
-	forms[9249:9276],
-	forms[9276:9294],
-	forms[9294:9312],
-	forms[9312:9316],
+	forms[7788:7792],
+	forms[7792:7810],
+	forms[7810:7837],
+	forms[7837:7864],
+	forms[7864:7882],
+	forms[7882:7900],
+	forms[7900:7927],
+	forms[7927:7954],
+	forms[7954:7972],
+	forms[7972:7990],
+	forms[7990:8017],
+	forms[8017:8044],
+	forms[8044:8062],
+	forms[8062:8080],
+	forms[8080:8107],
+	forms[8107:8134],
+	forms[8134:8152],
+	forms[8152:8155],
+	forms[8155:8158],
+	forms[8158:8176],
+	forms[8176:8194],
+	forms[8194:8197],
+	forms[8197:8200],
+	forms[8200:8203],
+	forms[8203:8206],
+	forms[8206:8208],
+	forms[8208:8211],
+	forms[8211:8229],
+	forms[8229:8247],
+	forms[8247:8265],
+	forms[8265:8283],
+	forms[8283:8301],
+	forms[8301:8319],
+	forms[8319:8337],
+	forms[8337:8355],
+	forms[8355:8373],
+	forms[8373:8391],
+	forms[8391:8409],
+	forms[8409:8427],
+	forms[8427:8445],
+	forms[8445:8463],
+	forms[8463:8481],
+	forms[8481:8499],
+	forms[8499:8517],
+	forms[8517:8535],
+	forms[8535:8553],
+	forms[8553:8571],
+	forms[8571:8589],
+	forms[8589:8592],
+	forms[8592:8610],
+	forms[8610:8628],
+	forms[8628:8646],
+	forms[8646:8664],
+	forms[8664:8682],
+	forms[8682:8700],
+	forms[8700:8718],
+	forms[8718:8745],
+	forms[8745:8763],
+	forms[8763:8781],
+	forms[8781:8799],
+	forms[8799:8826],
+	forms[8826:8853],
+	forms[8853:8871],
+	forms[8871:8898],
+	forms[8898:8925],
+	forms[8925:8934],
+	forms[8934:8943],
+	forms[8943:8947],
+	forms[8947:8974],
+	forms[8974:9001],
+	forms[9001:9028],
+	forms[9028:9055],
+	forms[9055:9082],
+	forms[9082:9109],
+	forms[9109:9136],
+	forms[9136:9163],
+	forms[9163:9190],
+	forms[9190:9217],
+	forms[9217:9223],
+	forms[9223:9226],
+	forms[9226:9229],
+	forms[9229:9232],
+	forms[9232:9235],
+	forms[9235:9253],
+	forms[9253:9280],
+	forms[9280:9298],
+	forms[9298:9316],
 	forms[9316:9320],
 	forms[9320:9324],
-	forms[9324:9369],
-	forms[9369:9375],
-	forms[9375:9420],
-	forms[9420:9447],
-	forms[9447:9474],
-	forms[9474:9492],
-	forms[9492:9528],
-	forms[9528:9573],
-	forms[9573:9618],
-	forms[9618:9645],
-	forms[9645:9672],
-	forms[9672:9690],
-	forms[9690:9726],
-	forms[9726:9771],
-	forms[9771:9777],
-	forms[9777:9822],
-	forms[9822:9849],
-	forms[9849:9876],
-	forms[9876:9894],
-	forms[9894:9930],
-	forms[9930:9948],
-	forms[9948:9975],
-	forms[9975:10002],
-	forms[10002:10020],
-	forms[10020:10038],
-	forms[10038:10056],
-	forms[10056:10074],
-	forms[10074:10092],
-	forms[10092:10119],
-	forms[10119:10146],
-	forms[10146:10150],
-	forms[10150:10162],
-	forms[10162:10180],
-	forms[10180:10198],
-	forms[10198:10210],
-	forms[10210:10222],
-	forms[10222:10240],
-	forms[10240:10258],
-	forms[10258:10270],
-	forms[10270:10288],
-	forms[10288:10315],
-	forms[10315:10342],
-	forms[10342:10360],
-	forms[10360:10378],
-	forms[10378:10405],
-	forms[10405:10432],
-	forms[10432:10450],
-	forms[10450:10454],
-	forms[10454:10481],
-	forms[10481:10508],
-	forms[10508:10538],
-	forms[10538:10568],
-	forms[10568:10577],
-	forms[10577:10586],
-	forms[10586:10613],
-	forms[10613:10640],
-	forms[10640:10646],
-	forms[10646:10652],
-	forms[10652:10664],
-	forms[10664:10676],
-	forms[10676:10685],
-	forms[10685:10694],
-	forms[10694:10698],
-	forms[10698:10700],
-	forms[10700:10727],
-	forms[10727:10754],
-	forms[10754:10760],
-	forms[10760:10766],
-	forms[10766:10796],
-	forms[10796:10826],
-	forms[10826:10835],
-	forms[10835:10844],
-	forms[10844:10848],
+	forms[9324:9328],
+	forms[9328:9373],
+	forms[9373:9379],
+	forms[9379:9424],
+	forms[9424:9451],
+	forms[9451:9478],
+	forms[9478:9496],
+	forms[9496:9532],
+	forms[9532:9577],
+	forms[9577:9622],
+	forms[9622:9649],
+	forms[9649:9676],
+	forms[9676:9694],
+	forms[9694:9730],
+	forms[9730:9775],
+	forms[9775:9781],
+	forms[9781:9826],
+	forms[9826:9853],
+	forms[9853:9880],
+	forms[9880:9898],
+	forms[9898:9934],
+	forms[9934:9952],
+	forms[9952:9979],
+	forms[9979:10006],
+	forms[10006:10024],
+	forms[10024:10042],
+	forms[10042:10060],
+	forms[10060:10078],
+	forms[10078:10096],
+	forms[10096:10123],
+	forms[10123:10150],
+	forms[10150:10154],
+	forms[10154:10166],
+	forms[10166:10184],
+	forms[10184:10202],
+	forms[10202:10214],
+	forms[10214:10226],
+	forms[10226:10244],
+	forms[10244:10262],
+	forms[10262:10274],
+	forms[10274:10292],
+	forms[10292:10319],
+	forms[10319:10346],
+	forms[10346:10364],
+	forms[10364:10382],
+	forms[10382:10409],
+	forms[10409:10436],
+	forms[10436:10454],
+	forms[10454:10458],
+	forms[10458:10485],
+	forms[10485:10512],
+	forms[10512:10542],
+	forms[10542:10572],
+	forms[10572:10581],
+	forms[10581:10590],
+	forms[10590:10617],
+	forms[10617:10644],
+	forms[10644:10650],
+	forms[10650:10656],
+	forms[10656:10668],
+	forms[10668:10680],
+	forms[10680:10689],
+	forms[10689:10698],
+	forms[10698:10702],
+	forms[10702:10704],
+	forms[10704:10731],
+	forms[10731:10758],
+	forms[10758:10764],
+	forms[10764:10770],
+	forms[10770:10800],
+	forms[10800:10830],
+	forms[10830:10839],
+	forms[10839:10848],
 	forms[10848:10852],
-	forms[10852:10854],
-	forms[10854:10856],
-	forms[10856:10883],
-	forms[10883:10910],
-	forms[10910:10916],
-	forms[10916:10922],
-	forms[10922:10934],
-	forms[10934:10946],
-	forms[10946:10955],
-	forms[10955:10964],
-	forms[10964:10968],
-	forms[10968:10970],
-	forms[10970:11000],
-	forms[11000:11030],
-	forms[11030:11039],
-	forms[11039:11048],
-	forms[11048:11051],
-	forms[11051:11054],
-	forms[11054:11057],
-	forms[11057:11060],
-	forms[11060:11078],
-	forms[11078:11096],
-	forms[11096:11114],
-	forms[11114:11132],
-	forms[11132:11159],
-	forms[11159:11186],
-	forms[11186:11216],
-	forms[11216:11246],
-	forms[11246:11255],
-	forms[11255:11264],
-	forms[11264:11265],
-	forms[11265:11295],
-	forms[11295:11325],
-	forms[11325:11334],
-	forms[11334:11343],
-	forms[11343:11347],
+	forms[10852:10856],
+	forms[10856:10858],
+	forms[10858:10860],
+	forms[10860:10887],
+	forms[10887:10914],
+	forms[10914:10920],
+	forms[10920:10926],
+	forms[10926:10938],
+	forms[10938:10950],
+	forms[10950:10959],
+	forms[10959:10968],
+	forms[10968:10972],
+	forms[10972:10974],
+	forms[10974:11004],
+	forms[11004:11034],
+	forms[11034:11043],
+	forms[11043:11052],
+	forms[11052:11055],
+	forms[11055:11058],
+	forms[11058:11061],
+	forms[11061:11064],
+	forms[11064:11082],
+	forms[11082:11100],
+	forms[11100:11118],
+	forms[11118:11136],
+	forms[11136:11163],
+	forms[11163:11190],
+	forms[11190:11220],
+	forms[11220:11250],
+	forms[11250:11259],
+	forms[11259:11268],
+	forms[11268:11269],
+	forms[11269:11299],
+	forms[11299:11329],
+	forms[11329:11338],
+	forms[11338:11347],
 	forms[11347:11351],
-	forms[11351:11354],
-	forms[11354:11357],
-	forms[11357:11384],
-	forms[11384:11411],
-	forms[11411:11438],
-	forms[11438:11465],
-	forms[11465:11492],
-	forms[11492:11519],
-	forms[11519:11520],
-	forms[11520:11521],
-	forms[11521:11523],
-	forms[11523:11525],
+	forms[11351:11355],
+	forms[11355:11358],
+	forms[11358:11361],
+	forms[11361:11388],
+	forms[11388:11415],
+	forms[11415:11442],
+	forms[11442:11469],
+	forms[11469:11496],
+	forms[11496:11523],
+	forms[11523:11524],
+	forms[11524:11525],
 	forms[11525:11527],
 	forms[11527:11529],
-	forms[11529:11532],
-	forms[11532:11537],
-	forms[11537:11542],
-	forms[11542:11547],
-	forms[11547:11548],
-	forms[11548:11549],
-	forms[11549:11555],
-	forms[11555:11563],
-	forms[11563:11565],
-	forms[11565:11567],
-	forms[11567:11575],
-	forms[11575:11583],
+	forms[11529:11531],
+	forms[11531:11533],
+	forms[11533:11536],
+	forms[11536:11541],
+	forms[11541:11546],
+	forms[11546:11551],
+	forms[11551:11552],
+	forms[11552:11553],
+	forms[11553:11559],
+	forms[11559:11567],
+	forms[11567:11569],
+	forms[11569:11571],
+	forms[11571:11579],
+	forms[11579:11587],
 }


Test patch:
diff --git a/x86/zctors_test.go b/x86/zctors_test.go
index 95c91c3..f8c72cf 100644
--- a/x86/zctors_test.go
+++ b/x86/zctors_test.go
@@ -29001,6 +29001,18 @@ func TestVPCLMULQDQValidFormsNoError(t *testing.T) {
 	if _, err := VPCLMULQDQ(opimm8, opxmm, opxmm, opxmm); err != nil {
 		t.Fatal(err)
 	}
+	if _, err := VPCLMULQDQ(opimm8, opm256, opymm, opymm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPCLMULQDQ(opimm8, opymm, opymm, opymm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPCLMULQDQ(opimm8, opm512, opzmm, opzmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPCLMULQDQ(opimm8, opzmm, opzmm, opzmm); err != nil {
+		t.Fatal(err)
+	}
 }
 
 func TestVPCMPBValidFormsNoError(t *testing.T) {