Repository: mmcloughlin/avo
Pull request #361 (2023-01-10 06:18:07)

all: VPOPCNTDQ instructions
Extracted from #234

codecov-commenter: # [Codecov](https://codecov.io/gh/mmcloughlin/avo/pull/361?src=pr&el=h1&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin) Report
> Merging [#361](https://codecov.io/gh/mmcloughlin/avo/pull/361?src=pr&el=desc&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin) (14887a8) into [master](https://codecov.io/gh/mmcloughlin/avo/commit/7dac51aabfd45dbeed23e7b03c12b0f6f8f17ca5?el=desc&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin) (7dac51a) will **not change** coverage.
> The diff coverage is `80.00%`.

```diff
@@           Coverage Diff           @@
##           master     #361   +/-   ##
=======================================
  Coverage   76.00%   76.00%           
=======================================
  Files          65       65           
  Lines       20790    20790           
=======================================
  Hits        15801    15801           
  Misses       4906     4906           
  Partials       83       83           
```

| Flag | Coverage Δ | |
|---|---|---|
| integration | `11.87% <0.00%> (ø)` | |
| unittests | `73.10% <80.00%> (ø)` | |

Flags with carried forward coverage won't be shown. [Click here](https://docs.codecov.io/docs/carryforward-flags?utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin#carryforward-flags-in-the-pull-request-comment) to find out more.

| [Impacted Files](https://codecov.io/gh/mmcloughlin/avo/pull/361?src=pr&el=tree&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin) | Coverage Δ | |
|---|---|---|
| [x86/zoptab.go](https://codecov.io/gh/mmcloughlin/avo/pull/361?src=pr&el=tree&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin#diff-eDg2L3pvcHRhYi5nbw==) | `92.42% <ø> (ø)` | |
| [build/zinstructions.go](https://codecov.io/gh/mmcloughlin/avo/pull/361?src=pr&el=tree&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin#diff-YnVpbGQvemluc3RydWN0aW9ucy5nbw==) | `67.64% <66.66%> (ø)` | |
| [x86/zctors.go](https://codecov.io/gh/mmcloughlin/avo/pull/361?src=pr&el=tree&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin#diff-eDg2L3pjdG9ycy5nbw==) | `100.00% <100.00%> (ø)` | |

Help us with your feedback. Take ten seconds to tell us [how you rate us](https://about.codecov.io/nps?utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin). Have a feature suggestion? [Share it here.](https://app.codecov.io/gh/feedback/?utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=Michael+McLoughlin)


Patch:
diff --git a/build/zinstructions.go b/build/zinstructions.go
index d2a741e..4c50e91 100644
--- a/build/zinstructions.go
+++ b/build/zinstructions.go
@@ -69248,6 +69248,14 @@ func VPMULUDQ_Z(mxyz, xyz, k, xyz1 operand.Op) { ctx.VPMULUDQ_Z(mxyz, xyz, k, xy
 //
 // Forms:
 //
+//	VPOPCNTD m128 k xmm
+//	VPOPCNTD m128 xmm
+//	VPOPCNTD m256 k ymm
+//	VPOPCNTD m256 ymm
+//	VPOPCNTD xmm  k xmm
+//	VPOPCNTD xmm  xmm
+//	VPOPCNTD ymm  k ymm
+//	VPOPCNTD ymm  ymm
 //	VPOPCNTD m512 k zmm
 //	VPOPCNTD m512 zmm
 //	VPOPCNTD zmm  k zmm
@@ -69262,6 +69270,14 @@ func (c *Context) VPOPCNTD(ops ...operand.Op) {
 //
 // Forms:
 //
+//	VPOPCNTD m128 k xmm
+//	VPOPCNTD m128 xmm
+//	VPOPCNTD m256 k ymm
+//	VPOPCNTD m256 ymm
+//	VPOPCNTD xmm  k xmm
+//	VPOPCNTD xmm  xmm
+//	VPOPCNTD ymm  k ymm
+//	VPOPCNTD ymm  ymm
 //	VPOPCNTD m512 k zmm
 //	VPOPCNTD m512 zmm
 //	VPOPCNTD zmm  k zmm
@@ -69275,6 +69291,10 @@ func VPOPCNTD(ops ...operand.Op) { ctx.VPOPCNTD(ops...) }
 //
 // Forms:
 //
+//	VPOPCNTD.BCST m32 k xmm
+//	VPOPCNTD.BCST m32 k ymm
+//	VPOPCNTD.BCST m32 xmm
+//	VPOPCNTD.BCST m32 ymm
 //	VPOPCNTD.BCST m32 k zmm
 //	VPOPCNTD.BCST m32 zmm
 //
@@ -69287,6 +69307,10 @@ func (c *Context) VPOPCNTD_BCST(ops ...operand.Op) {
 //
 // Forms:
 //
+//	VPOPCNTD.BCST m32 k xmm
+//	VPOPCNTD.BCST m32 k ymm
+//	VPOPCNTD.BCST m32 xmm
+//	VPOPCNTD.BCST m32 ymm
 //	VPOPCNTD.BCST m32 k zmm
 //	VPOPCNTD.BCST m32 zmm
 //
@@ -69298,50 +69322,70 @@ func VPOPCNTD_BCST(ops ...operand.Op) { ctx.VPOPCNTD_BCST(ops...) }
 //
 // Forms:
 //
+//	VPOPCNTD.BCST.Z m32 k xmm
+//	VPOPCNTD.BCST.Z m32 k ymm
 //	VPOPCNTD.BCST.Z m32 k zmm
 //
 // Construct and append a VPOPCNTD.BCST.Z instruction to the active function.
-func (c *Context) VPOPCNTD_BCST_Z(m, k, z operand.Op) {
-	c.addinstruction(x86.VPOPCNTD_BCST_Z(m, k, z))
+func (c *Context) VPOPCNTD_BCST_Z(m, k, xyz operand.Op) {
+	c.addinstruction(x86.VPOPCNTD_BCST_Z(m, k, xyz))
 }
 
 // VPOPCNTD_BCST_Z: Packed Population Count for Doubleword Integers (Broadcast, Zeroing Masking).
 //
 // Forms:
 //
+//	VPOPCNTD.BCST.Z m32 k xmm
+//	VPOPCNTD.BCST.Z m32 k ymm
 //	VPOPCNTD.BCST.Z m32 k zmm
 //
 // Construct and append a VPOPCNTD.BCST.Z instruction to the active function.
 // Operates on the global context.
-func VPOPCNTD_BCST_Z(m, k, z operand.Op) { ctx.VPOPCNTD_BCST_Z(m, k, z) }
+func VPOPCNTD_BCST_Z(m, k, xyz operand.Op) { ctx.VPOPCNTD_BCST_Z(m, k, xyz) }
 
 // VPOPCNTD_Z: Packed Population Count for Doubleword Integers (Zeroing Masking).
 //
 // Forms:
 //
+//	VPOPCNTD.Z m128 k xmm
+//	VPOPCNTD.Z m256 k ymm
+//	VPOPCNTD.Z xmm  k xmm
+//	VPOPCNTD.Z ymm  k ymm
 //	VPOPCNTD.Z m512 k zmm
 //	VPOPCNTD.Z zmm  k zmm
 //
 // Construct and append a VPOPCNTD.Z instruction to the active function.
-func (c *Context) VPOPCNTD_Z(mz, k, z operand.Op) {
-	c.addinstruction(x86.VPOPCNTD_Z(mz, k, z))
+func (c *Context) VPOPCNTD_Z(mxyz, k, xyz operand.Op) {
+	c.addinstruction(x86.VPOPCNTD_Z(mxyz, k, xyz))
 }
 
 // VPOPCNTD_Z: Packed Population Count for Doubleword Integers (Zeroing Masking).
 //
 // Forms:
 //
+//	VPOPCNTD.Z m128 k xmm
+//	VPOPCNTD.Z m256 k ymm
+//	VPOPCNTD.Z xmm  k xmm
+//	VPOPCNTD.Z ymm  k ymm
 //	VPOPCNTD.Z m512 k zmm
 //	VPOPCNTD.Z zmm  k zmm
 //
 // Construct and append a VPOPCNTD.Z instruction to the active function.
 // Operates on the global context.
-func VPOPCNTD_Z(mz, k, z operand.Op) { ctx.VPOPCNTD_Z(mz, k, z) }
+func VPOPCNTD_Z(mxyz, k, xyz operand.Op) { ctx.VPOPCNTD_Z(mxyz, k, xyz) }
 
 // VPOPCNTQ: Packed Population Count for Quadword Integers.
 //
 // Forms:
 //
+//	VPOPCNTQ m128 k xmm
+//	VPOPCNTQ m128 xmm
+//	VPOPCNTQ m256 k ymm
+//	VPOPCNTQ m256 ymm
+//	VPOPCNTQ xmm  k xmm
+//	VPOPCNTQ xmm  xmm
+//	VPOPCNTQ ymm  k ymm
+//	VPOPCNTQ ymm  ymm
 //	VPOPCNTQ m512 k zmm
 //	VPOPCNTQ m512 zmm
 //	VPOPCNTQ zmm  k zmm
@@ -69356,6 +69400,14 @@ func (c *Context) VPOPCNTQ(ops ...operand.Op) {
 //
 // Forms:
 //
+//	VPOPCNTQ m128 k xmm
+//	VPOPCNTQ m128 xmm
+//	VPOPCNTQ m256 k ymm
+//	VPOPCNTQ m256 ymm
+//	VPOPCNTQ xmm  k xmm
+//	VPOPCNTQ xmm  xmm
+//	VPOPCNTQ ymm  k ymm
+//	VPOPCNTQ ymm  ymm
 //	VPOPCNTQ m512 k zmm
 //	VPOPCNTQ m512 zmm
 //	VPOPCNTQ zmm  k zmm
@@ -69369,6 +69421,10 @@ func VPOPCNTQ(ops ...operand.Op) { ctx.VPOPCNTQ(ops...) }
 //
 // Forms:
 //
+//	VPOPCNTQ.BCST m64 k xmm
+//	VPOPCNTQ.BCST m64 k ymm
+//	VPOPCNTQ.BCST m64 xmm
+//	VPOPCNTQ.BCST m64 ymm
 //	VPOPCNTQ.BCST m64 k zmm
 //	VPOPCNTQ.BCST m64 zmm
 //
@@ -69381,6 +69437,10 @@ func (c *Context) VPOPCNTQ_BCST(ops ...operand.Op) {
 //
 // Forms:
 //
+//	VPOPCNTQ.BCST m64 k xmm
+//	VPOPCNTQ.BCST m64 k ymm
+//	VPOPCNTQ.BCST m64 xmm
+//	VPOPCNTQ.BCST m64 ymm
 //	VPOPCNTQ.BCST m64 k zmm
 //	VPOPCNTQ.BCST m64 zmm
 //
@@ -69392,45 +69452,57 @@ func VPOPCNTQ_BCST(ops ...operand.Op) { ctx.VPOPCNTQ_BCST(ops...) }
 //
 // Forms:
 //
+//	VPOPCNTQ.BCST.Z m64 k xmm
+//	VPOPCNTQ.BCST.Z m64 k ymm
 //	VPOPCNTQ.BCST.Z m64 k zmm
 //
 // Construct and append a VPOPCNTQ.BCST.Z instruction to the active function.
-func (c *Context) VPOPCNTQ_BCST_Z(m, k, z operand.Op) {
-	c.addinstruction(x86.VPOPCNTQ_BCST_Z(m, k, z))
+func (c *Context) VPOPCNTQ_BCST_Z(m, k, xyz operand.Op) {
+	c.addinstruction(x86.VPOPCNTQ_BCST_Z(m, k, xyz))
 }
 
 // VPOPCNTQ_BCST_Z: Packed Population Count for Quadword Integers (Broadcast, Zeroing Masking).
 //
 // Forms:
 //
+//	VPOPCNTQ.BCST.Z m64 k xmm
+//	VPOPCNTQ.BCST.Z m64 k ymm
 //	VPOPCNTQ.BCST.Z m64 k zmm
 //
 // Construct and append a VPOPCNTQ.BCST.Z instruction to the active function.
 // Operates on the global context.
-func VPOPCNTQ_BCST_Z(m, k, z operand.Op) { ctx.VPOPCNTQ_BCST_Z(m, k, z) }
+func VPOPCNTQ_BCST_Z(m, k, xyz operand.Op) { ctx.VPOPCNTQ_BCST_Z(m, k, xyz) }
 
 // VPOPCNTQ_Z: Packed Population Count for Quadword Integers (Zeroing Masking).
 //
 // Forms:
 //
+//	VPOPCNTQ.Z m128 k xmm
+//	VPOPCNTQ.Z m256 k ymm
+//	VPOPCNTQ.Z xmm  k xmm
+//	VPOPCNTQ.Z ymm  k ymm
 //	VPOPCNTQ.Z m512 k zmm
 //	VPOPCNTQ.Z zmm  k zmm
 //
 // Construct and append a VPOPCNTQ.Z instruction to the active function.
-func (c *Context) VPOPCNTQ_Z(mz, k, z operand.Op) {
-	c.addinstruction(x86.VPOPCNTQ_Z(mz, k, z))
+func (c *Context) VPOPCNTQ_Z(mxyz, k, xyz operand.Op) {
+	c.addinstruction(x86.VPOPCNTQ_Z(mxyz, k, xyz))
 }
 
 // VPOPCNTQ_Z: Packed Population Count for Quadword Integers (Zeroing Masking).
 //
 // Forms:
 //
+//	VPOPCNTQ.Z m128 k xmm
+//	VPOPCNTQ.Z m256 k ymm
+//	VPOPCNTQ.Z xmm  k xmm
+//	VPOPCNTQ.Z ymm  k ymm
 //	VPOPCNTQ.Z m512 k zmm
 //	VPOPCNTQ.Z zmm  k zmm
 //
 // Construct and append a VPOPCNTQ.Z instruction to the active function.
 // Operates on the global context.
-func VPOPCNTQ_Z(mz, k, z operand.Op) { ctx.VPOPCNTQ_Z(mz, k, z) }
+func VPOPCNTQ_Z(mxyz, k, xyz operand.Op) { ctx.VPOPCNTQ_Z(mxyz, k, xyz) }
 
 // VPOR: Packed Bitwise Logical OR.
 //
diff --git a/internal/inst/ztable.go b/internal/inst/ztable.go
index d65faf7..974a27b 100644
--- a/internal/inst/ztable.go
+++ b/internal/inst/ztable.go
@@ -91519,6 +91519,174 @@ var Instructions = []Instruction{
 		Opcode:  "VPOPCNTD",
 		Summary: "Packed Population Count for Doubleword Integers",
 		Forms: []Form{
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m128", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "xmm", Action: 0x3},
+				},
+				EncodingType: 0x4,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m128", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "xmm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+				Zeroing:      true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m128", Action: 0x1},
+					{Type: "xmm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m256", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "ymm", Action: 0x3},
+				},
+				EncodingType: 0x4,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m256", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "ymm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+				Zeroing:      true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m256", Action: 0x1},
+					{Type: "ymm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m32", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "xmm", Action: 0x3},
+				},
+				EncodingType: 0x4,
+				Broadcast:    true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m32", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "xmm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+				Zeroing:      true,
+				Broadcast:    true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m32", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "ymm", Action: 0x3},
+				},
+				EncodingType: 0x4,
+				Broadcast:    true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m32", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "ymm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+				Zeroing:      true,
+				Broadcast:    true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m32", Action: 0x1},
+					{Type: "xmm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+				Broadcast:    true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m32", Action: 0x1},
+					{Type: "ymm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+				Broadcast:    true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "xmm", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "xmm", Action: 0x3},
+				},
+				EncodingType: 0x4,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "xmm", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "xmm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+				Zeroing:      true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "xmm", Action: 0x1},
+					{Type: "xmm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "ymm", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "ymm", Action: 0x3},
+				},
+				EncodingType: 0x4,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "ymm", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "ymm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+				Zeroing:      true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "ymm", Action: 0x1},
+					{Type: "ymm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+			},
 			{
 				ISA: []string{"AVX512VPOPCNTDQ"},
 				Operands: []Operand{
@@ -91609,6 +91777,174 @@ var Instructions = []Instruction{
 		Opcode:  "VPOPCNTQ",
 		Summary: "Packed Population Count for Quadword Integers",
 		Forms: []Form{
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m128", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "xmm", Action: 0x3},
+				},
+				EncodingType: 0x4,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m128", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "xmm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+				Zeroing:      true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m128", Action: 0x1},
+					{Type: "xmm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m256", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "ymm", Action: 0x3},
+				},
+				EncodingType: 0x4,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m256", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "ymm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+				Zeroing:      true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m256", Action: 0x1},
+					{Type: "ymm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m64", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "xmm", Action: 0x3},
+				},
+				EncodingType: 0x4,
+				Broadcast:    true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m64", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "xmm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+				Zeroing:      true,
+				Broadcast:    true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m64", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "ymm", Action: 0x3},
+				},
+				EncodingType: 0x4,
+				Broadcast:    true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m64", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "ymm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+				Zeroing:      true,
+				Broadcast:    true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m64", Action: 0x1},
+					{Type: "xmm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+				Broadcast:    true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "m64", Action: 0x1},
+					{Type: "ymm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+				Broadcast:    true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "xmm", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "xmm", Action: 0x3},
+				},
+				EncodingType: 0x4,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "xmm", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "xmm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+				Zeroing:      true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "xmm", Action: 0x1},
+					{Type: "xmm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "ymm", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "ymm", Action: 0x3},
+				},
+				EncodingType: 0x4,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "ymm", Action: 0x1},
+					{Type: "k", Action: 0x1},
+					{Type: "ymm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+				Zeroing:      true,
+			},
+			{
+				ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+				Operands: []Operand{
+					{Type: "ymm", Action: 0x1},
+					{Type: "ymm", Action: 0x2},
+				},
+				EncodingType: 0x4,
+			},
 			{
 				ISA: []string{"AVX512VPOPCNTDQ"},
 				Operands: []Operand{
diff --git a/internal/opcodesextra/instructions.go b/internal/opcodesextra/instructions.go
index 7288b8b..c49aeff 100644
--- a/internal/opcodesextra/instructions.go
+++ b/internal/opcodesextra/instructions.go
@@ -10,6 +10,7 @@ var sets = [][]*inst.Instruction{
 	vaes,
 	vnni,
 	vpclmulqdq,
+	vpopcntdq,
 }
 
 // Instructions returns a list of extras to add to the instructions database.
diff --git a/internal/opcodesextra/vpopcntdq.go b/internal/opcodesextra/vpopcntdq.go
new file mode 100644
index 0000000..7183701
--- /dev/null
+++ b/internal/opcodesextra/vpopcntdq.go
@@ -0,0 +1,106 @@
+package opcodesextra
+
+import "github.com/mmcloughlin/avo/internal/inst"
+
+// vpopcntdq is the VPOPCNTDQ instruction set, providing packed population count
+// for double and quadword integers.
+var vpopcntdq = []*inst.Instruction{
+	// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L3741-L3750
+	//
+	//		{as: AVPOPCNTD, ytab: _yvexpandpd, prefix: Pavx, op: opBytes{
+	//			avxEscape | evex128 | evex66 | evex0F38 | evexW0, evexN16 | evexBcstN4 | evexZeroingEnabled, 0x55,
+	//			avxEscape | evex256 | evex66 | evex0F38 | evexW0, evexN32 | evexBcstN4 | evexZeroingEnabled, 0x55,
+	//			avxEscape | evex512 | evex66 | evex0F38 | evexW0, evexN64 | evexBcstN4 | evexZeroingEnabled, 0x55,
+	//		}},
+	//		{as: AVPOPCNTQ, ytab: _yvexpandpd, prefix: Pavx, op: opBytes{
+	//			avxEscape | evex128 | evex66 | evex0F38 | evexW1, evexN16 | evexBcstN8 | evexZeroingEnabled, 0x55,
+	//			avxEscape | evex256 | evex66 | evex0F38 | evexW1, evexN32 | evexBcstN8 | evexZeroingEnabled, 0x55,
+	//			avxEscape | evex512 | evex66 | evex0F38 | evexW1, evexN64 | evexBcstN8 | evexZeroingEnabled, 0x55,
+	//		}},
+	//
+	// Note the opcodes database already contains the non-AVX512VL forms. They
+	// are overridden by the definitions below.
+	{
+		Opcode:  "VPOPCNTD",
+		Summary: "Packed Population Count for Doubleword Integers",
+		Forms:   vpopcntdqforms("m32bcst"),
+	},
+	{
+		Opcode:  "VPOPCNTQ",
+		Summary: "Packed Population Count for Quadword Integers",
+		Forms:   vpopcntdqforms("m64bcst"),
+	},
+}
+
+// VPOPCNTD and VPOPCNTQ forms.
+//
+// See: https://www.felixcloutier.com/x86/vpopcnt
+//
+// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L376-L383
+//
+//	var _yvexpandpd = []ytab{
+//		{zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YxmEvex, YxrEvex}},
+//		{zcase: Zevex_rm_k_r, zoffset: 3, args: argList{YxmEvex, Yknot0, YxrEvex}},
+//		{zcase: Zevex_rm_v_r, zoffset: 0, args: argList{YymEvex, YyrEvex}},
+//		{zcase: Zevex_rm_k_r, zoffset: 3, args: argList{YymEvex, Yknot0, YyrEvex}},
+//		{zcase: Zevex_rm_v_r, zoffset: 0, args: argList{Yzm, Yzr}},
+//		{zcase: Zevex_rm_k_r, zoffset: 3, args: argList{Yzm, Yknot0, Yzr}},
+//	}
+func vpopcntdqforms(mbcst string) inst.Forms {
+	return inst.Forms{
+		// EVEX.128.66.0F38.W0 55 /r VPOPCNTD xmm1{k1}{z}, xmm2/m128/m32bcst
+		// EVEX.128.66.0F38.W1 55 /r VPOPCNTQ xmm1{k1}{z}, xmm2/m128/m64bcst
+		{
+			ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+			Operands: []inst.Operand{
+				{Type: "m128/" + mbcst, Action: inst.R},
+				{Type: "xmm{k}{z}", Action: inst.W},
+			},
+			EncodingType: inst.EncodingTypeEVEX,
+		},
+		{
+			ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+			Operands: []inst.Operand{
+				{Type: "xmm", Action: inst.R},
+				{Type: "xmm{k}{z}", Action: inst.W},
+			},
+			EncodingType: inst.EncodingTypeEVEX,
+		},
+		// EVEX.256.66.0F38.W0 55 /r VPOPCNTD ymm1{k1}{z}, ymm2/m256/m32bcst
+		// EVEX.256.66.0F38.W1 55 /r VPOPCNTQ ymm1{k1}{z}, ymm2/m256/m64bcst
+		{
+			ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+			Operands: []inst.Operand{
+				{Type: "m256/" + mbcst, Action: inst.R},
+				{Type: "ymm{k}{z}", Action: inst.W},
+			},
+			EncodingType: inst.EncodingTypeEVEX,
+		},
+		{
+			ISA: []string{"AVX512VL", "AVX512VPOPCNTDQ"},
+			Operands: []inst.Operand{
+				{Type: "ymm", Action: inst.R},
+				{Type: "ymm{k}{z}", Action: inst.W},
+			},
+			EncodingType: inst.EncodingTypeEVEX,
+		},
+		// EVEX.512.66.0F38.W0 55 /r VPOPCNTD zmm1{k1}{z}, zmm2/m512/m32bcst
+		// EVEX.512.66.0F38.W1 55 /r VPOPCNTQ zmm1{k1}{z}, zmm2/m512/m64bcst
+		{
+			ISA: []string{"AVX512VPOPCNTDQ"},
+			Operands: []inst.Operand{
+				{Type: "m512/" + mbcst, Action: inst.R},
+				{Type: "zmm{k}{z}", Action: inst.W},
+			},
+			EncodingType: inst.EncodingTypeEVEX,
+		},
+		{
+			ISA: []string{"AVX512VPOPCNTDQ"},
+			Operands: []inst.Operand{
+				{Type: "zmm", Action: inst.R},
+				{Type: "zmm{k}{z}", Action: inst.W},
+			},
+			EncodingType: inst.EncodingTypeEVEX,
+		},
+	}
+}
diff --git a/x86/zctors.go b/x86/zctors.go
index 7dce968..a74c0c2 100644
--- a/x86/zctors.go
+++ b/x86/zctors.go
@@ -30698,6 +30698,14 @@ func VPMULUDQ_Z(mxyz, xyz, k, xyz1 operand.Op) (*intrep.Instruction, error) {
 //
 // Forms:
 //
+//	VPOPCNTD m128 k xmm
+//	VPOPCNTD m128 xmm
+//	VPOPCNTD m256 k ymm
+//	VPOPCNTD m256 ymm
+//	VPOPCNTD xmm  k xmm
+//	VPOPCNTD xmm  xmm
+//	VPOPCNTD ymm  k ymm
+//	VPOPCNTD ymm  ymm
 //	VPOPCNTD m512 k zmm
 //	VPOPCNTD m512 zmm
 //	VPOPCNTD zmm  k zmm
@@ -30710,6 +30718,10 @@ func VPOPCNTD(ops ...operand.Op) (*intrep.Instruction, error) {
 //
 // Forms:
 //
+//	VPOPCNTD.BCST m32 k xmm
+//	VPOPCNTD.BCST m32 k ymm
+//	VPOPCNTD.BCST m32 xmm
+//	VPOPCNTD.BCST m32 ymm
 //	VPOPCNTD.BCST m32 k zmm
 //	VPOPCNTD.BCST m32 zmm
 func VPOPCNTD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
@@ -30720,25 +30732,39 @@ func VPOPCNTD_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
 //
 // Forms:
 //
+//	VPOPCNTD.BCST.Z m32 k xmm
+//	VPOPCNTD.BCST.Z m32 k ymm
 //	VPOPCNTD.BCST.Z m32 k zmm
-func VPOPCNTD_BCST_Z(m, k, z operand.Op) (*intrep.Instruction, error) {
-	return build(opcVPOPCNTD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, z})
+func VPOPCNTD_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
+	return build(opcVPOPCNTD.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
 }
 
 // VPOPCNTD_Z: Packed Population Count for Doubleword Integers (Zeroing Masking).
 //
 // Forms:
 //
+//	VPOPCNTD.Z m128 k xmm
+//	VPOPCNTD.Z m256 k ymm
+//	VPOPCNTD.Z xmm  k xmm
+//	VPOPCNTD.Z ymm  k ymm
 //	VPOPCNTD.Z m512 k zmm
 //	VPOPCNTD.Z zmm  k zmm
-func VPOPCNTD_Z(mz, k, z operand.Op) (*intrep.Instruction, error) {
-	return build(opcVPOPCNTD.Forms(), sffxs{sffxZ}, []operand.Op{mz, k, z})
+func VPOPCNTD_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
+	return build(opcVPOPCNTD.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
 }
 
 // VPOPCNTQ: Packed Population Count for Quadword Integers.
 //
 // Forms:
 //
+//	VPOPCNTQ m128 k xmm
+//	VPOPCNTQ m128 xmm
+//	VPOPCNTQ m256 k ymm
+//	VPOPCNTQ m256 ymm
+//	VPOPCNTQ xmm  k xmm
+//	VPOPCNTQ xmm  xmm
+//	VPOPCNTQ ymm  k ymm
+//	VPOPCNTQ ymm  ymm
 //	VPOPCNTQ m512 k zmm
 //	VPOPCNTQ m512 zmm
 //	VPOPCNTQ zmm  k zmm
@@ -30751,6 +30777,10 @@ func VPOPCNTQ(ops ...operand.Op) (*intrep.Instruction, error) {
 //
 // Forms:
 //
+//	VPOPCNTQ.BCST m64 k xmm
+//	VPOPCNTQ.BCST m64 k ymm
+//	VPOPCNTQ.BCST m64 xmm
+//	VPOPCNTQ.BCST m64 ymm
 //	VPOPCNTQ.BCST m64 k zmm
 //	VPOPCNTQ.BCST m64 zmm
 func VPOPCNTQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
@@ -30761,19 +30791,25 @@ func VPOPCNTQ_BCST(ops ...operand.Op) (*intrep.Instruction, error) {
 //
 // Forms:
 //
+//	VPOPCNTQ.BCST.Z m64 k xmm
+//	VPOPCNTQ.BCST.Z m64 k ymm
 //	VPOPCNTQ.BCST.Z m64 k zmm
-func VPOPCNTQ_BCST_Z(m, k, z operand.Op) (*intrep.Instruction, error) {
-	return build(opcVPOPCNTQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, z})
+func VPOPCNTQ_BCST_Z(m, k, xyz operand.Op) (*intrep.Instruction, error) {
+	return build(opcVPOPCNTQ.Forms(), sffxs{sffxBCST, sffxZ}, []operand.Op{m, k, xyz})
 }
 
 // VPOPCNTQ_Z: Packed Population Count for Quadword Integers (Zeroing Masking).
 //
 // Forms:
 //
+//	VPOPCNTQ.Z m128 k xmm
+//	VPOPCNTQ.Z m256 k ymm
+//	VPOPCNTQ.Z xmm  k xmm
+//	VPOPCNTQ.Z ymm  k ymm
 //	VPOPCNTQ.Z m512 k zmm
 //	VPOPCNTQ.Z zmm  k zmm
-func VPOPCNTQ_Z(mz, k, z operand.Op) (*intrep.Instruction, error) {
-	return build(opcVPOPCNTQ.Forms(), sffxs{sffxZ}, []operand.Op{mz, k, z})
+func VPOPCNTQ_Z(mxyz, k, xyz operand.Op) (*intrep.Instruction, error) {
+	return build(opcVPOPCNTQ.Forms(), sffxs{sffxZ}, []operand.Op{mxyz, k, xyz})
 }
 
 // VPOR: Packed Bitwise Logical OR.
diff --git a/x86/zoptab.go b/x86/zoptab.go
index c034fc6..4b0be14 100644
--- a/x86/zoptab.go
+++ b/x86/zoptab.go
@@ -323,6 +323,7 @@ const (
 	isasAVX512VBMI
 	isasAVX512IFMA_AVX512VL
 	isasAVX512IFMA
+	isasAVX512VL_AVX512VPOPCNTDQ
 	isasAVX512VPOPCNTDQ
 	isasAVX512BW_AVX512F
 	isasmax
@@ -391,6 +392,7 @@ var isaslisttable = [][]string{
 	{"AVX512VBMI"},
 	{"AVX512IFMA", "AVX512VL"},
 	{"AVX512IFMA"},
+	{"AVX512VL", "AVX512VPOPCNTDQ"},
 	{"AVX512VPOPCNTDQ"},
 	{"AVX512BW", "AVX512F"},
 }
@@ -11916,6 +11918,24 @@ var forms = []form{
 	{opcVPMULUDQ, sffxsclsNIL, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
 	{opcVPMULUDQ, sffxsclsZ, 0, isasAVX512F, 4, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
 	{opcVPMULUDQ, sffxsclsNIL, 0, isasAVX512F, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
+	{opcVPOPCNTD, sffxsclsNIL, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
+	{opcVPOPCNTD, sffxsclsZ, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
+	{opcVPOPCNTD, sffxsclsNIL, 0, isasAVX512VL_AVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
+	{opcVPOPCNTD, sffxsclsNIL, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
+	{opcVPOPCNTD, sffxsclsZ, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
+	{opcVPOPCNTD, sffxsclsNIL, 0, isasAVX512VL_AVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
+	{opcVPOPCNTD, sffxsclsBCST, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
+	{opcVPOPCNTD, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
+	{opcVPOPCNTD, sffxsclsBCST, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
+	{opcVPOPCNTD, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
+	{opcVPOPCNTD, sffxsclsBCST, 0, isasAVX512VL_AVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
+	{opcVPOPCNTD, sffxsclsBCST, 0, isasAVX512VL_AVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
+	{opcVPOPCNTD, sffxsclsNIL, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
+	{opcVPOPCNTD, sffxsclsZ, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
+	{opcVPOPCNTD, sffxsclsNIL, 0, isasAVX512VL_AVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
+	{opcVPOPCNTD, sffxsclsNIL, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
+	{opcVPOPCNTD, sffxsclsZ, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
+	{opcVPOPCNTD, sffxsclsNIL, 0, isasAVX512VL_AVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
 	{opcVPOPCNTD, sffxsclsBCST, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
 	{opcVPOPCNTD, sffxsclsBCST_Z, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
 	{opcVPOPCNTD, sffxsclsBCST, 0, isasAVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeM32), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
@@ -11925,6 +11945,24 @@ var forms = []form{
 	{opcVPOPCNTD, sffxsclsNIL, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
 	{opcVPOPCNTD, sffxsclsZ, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
 	{opcVPOPCNTD, sffxsclsNIL, 0, isasAVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeZMM), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
+	{opcVPOPCNTQ, sffxsclsNIL, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
+	{opcVPOPCNTQ, sffxsclsZ, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
+	{opcVPOPCNTQ, sffxsclsNIL, 0, isasAVX512VL_AVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeM128), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
+	{opcVPOPCNTQ, sffxsclsNIL, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
+	{opcVPOPCNTQ, sffxsclsZ, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
+	{opcVPOPCNTQ, sffxsclsNIL, 0, isasAVX512VL_AVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeM256), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
+	{opcVPOPCNTQ, sffxsclsBCST, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
+	{opcVPOPCNTQ, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
+	{opcVPOPCNTQ, sffxsclsBCST, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
+	{opcVPOPCNTQ, sffxsclsBCST_Z, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
+	{opcVPOPCNTQ, sffxsclsBCST, 0, isasAVX512VL_AVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
+	{opcVPOPCNTQ, sffxsclsBCST, 0, isasAVX512VL_AVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeM64), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
+	{opcVPOPCNTQ, sffxsclsNIL, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionRW}}},
+	{opcVPOPCNTQ, sffxsclsZ, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
+	{opcVPOPCNTQ, sffxsclsNIL, 0, isasAVX512VL_AVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeXMM), false, actionR}, {uint8(oprndtypeXMM), false, actionW}}},
+	{opcVPOPCNTQ, sffxsclsNIL, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionRW}}},
+	{opcVPOPCNTQ, sffxsclsZ, 0, isasAVX512VL_AVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
+	{opcVPOPCNTQ, sffxsclsNIL, 0, isasAVX512VL_AVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeYMM), false, actionR}, {uint8(oprndtypeYMM), false, actionW}}},
 	{opcVPOPCNTQ, sffxsclsNIL, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionRW}}},
 	{opcVPOPCNTQ, sffxsclsZ, 0, isasAVX512VPOPCNTDQ, 3, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeK), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
 	{opcVPOPCNTQ, sffxsclsNIL, 0, isasAVX512VPOPCNTDQ, 2, oprnds{{uint8(oprndtypeM512), false, actionR}, {uint8(oprndtypeZMM), false, actionW}}},
@@ -15715,166 +15753,166 @@ var opcformstable = [][]form{
 	forms[8853:8871],
 	forms[8871:8898],
 	forms[8898:8925],
-	forms[8925:8934],
-	forms[8934:8943],
-	forms[8943:8947],
-	forms[8947:8974],
-	forms[8974:9001],
-	forms[9001:9028],
-	forms[9028:9055],
-	forms[9055:9082],
-	forms[9082:9109],
-	forms[9109:9136],
-	forms[9136:9163],
-	forms[9163:9190],
-	forms[9190:9217],
-	forms[9217:9223],
-	forms[9223:9226],
-	forms[9226:9229],
-	forms[9229:9232],
-	forms[9232:9235],
-	forms[9235:9253],
-	forms[9253:9280],
-	forms[9280:9298],
-	forms[9298:9316],
-	forms[9316:9320],
-	forms[9320:9324],
-	forms[9324:9328],
-	forms[9328:9373],
-	forms[9373:9379],
-	forms[9379:9424],
-	forms[9424:9451],
-	forms[9451:9478],
-	forms[9478:9496],
-	forms[9496:9532],
-	forms[9532:9577],
-	forms[9577:9622],
-	forms[9622:9649],
-	forms[9649:9676],
-	forms[9676:9694],
-	forms[9694:9730],
-	forms[9730:9775],
-	forms[9775:9781],
-	forms[9781:9826],
-	forms[9826:9853],
-	forms[9853:9880],
-	forms[9880:9898],
-	forms[9898:9934],
-	forms[9934:9952],
-	forms[9952:9979],
-	forms[9979:10006],
-	forms[10006:10024],
-	forms[10024:10042],
+	forms[8925:8952],
+	forms[8952:8979],
+	forms[8979:8983],
+	forms[8983:9010],
+	forms[9010:9037],
+	forms[9037:9064],
+	forms[9064:9091],
+	forms[9091:9118],
+	forms[9118:9145],
+	forms[9145:9172],
+	forms[9172:9199],
+	forms[9199:9226],
+	forms[9226:9253],
+	forms[9253:9259],
+	forms[9259:9262],
+	forms[9262:9265],
+	forms[9265:9268],
+	forms[9268:9271],
+	forms[9271:9289],
+	forms[9289:9316],
+	forms[9316:9334],
+	forms[9334:9352],
+	forms[9352:9356],
+	forms[9356:9360],
+	forms[9360:9364],
+	forms[9364:9409],
+	forms[9409:9415],
+	forms[9415:9460],
+	forms[9460:9487],
+	forms[9487:9514],
+	forms[9514:9532],
+	forms[9532:9568],
+	forms[9568:9613],
+	forms[9613:9658],
+	forms[9658:9685],
+	forms[9685:9712],
+	forms[9712:9730],
+	forms[9730:9766],
+	forms[9766:9811],
+	forms[9811:9817],
+	forms[9817:9862],
+	forms[9862:9889],
+	forms[9889:9916],
+	forms[9916:9934],
+	forms[9934:9970],
+	forms[9970:9988],
+	forms[9988:10015],
+	forms[10015:10042],
 	forms[10042:10060],
 	forms[10060:10078],
 	forms[10078:10096],
-	forms[10096:10123],
-	forms[10123:10150],
-	forms[10150:10154],
-	forms[10154:10166],
-	forms[10166:10184],
-	forms[10184:10202],
-	forms[10202:10214],
-	forms[10214:10226],
-	forms[10226:10244],
-	forms[10244:10262],
-	forms[10262:10274],
-	forms[10274:10292],
-	forms[10292:10319],
-	forms[10319:10346],
-	forms[10346:10364],
-	forms[10364:10382],
-	forms[10382:10409],
-	forms[10409:10436],
-	forms[10436:10454],
-	forms[10454:10458],
-	forms[10458:10485],
-	forms[10485:10512],
-	forms[10512:10542],
-	forms[10542:10572],
-	forms[10572:10581],
-	forms[10581:10590],
-	forms[10590:10617],
-	forms[10617:10644],
-	forms[10644:10650],
-	forms[10650:10656],
-	forms[10656:10668],
-	forms[10668:10680],
-	forms[10680:10689],
-	forms[10689:10698],
-	forms[10698:10702],
-	forms[10702:10704],
-	forms[10704:10731],
-	forms[10731:10758],
-	forms[10758:10764],
-	forms[10764:10770],
-	forms[10770:10800],
-	forms[10800:10830],
-	forms[10830:10839],
-	forms[10839:10848],
-	forms[10848:10852],
-	forms[10852:10856],
-	forms[10856:10858],
-	forms[10858:10860],
-	forms[10860:10887],
-	forms[10887:10914],
-	forms[10914:10920],
-	forms[10920:10926],
-	forms[10926:10938],
-	forms[10938:10950],
-	forms[10950:10959],
-	forms[10959:10968],
-	forms[10968:10972],
-	forms[10972:10974],
-	forms[10974:11004],
-	forms[11004:11034],
-	forms[11034:11043],
-	forms[11043:11052],
-	forms[11052:11055],
-	forms[11055:11058],
-	forms[11058:11061],
-	forms[11061:11064],
-	forms[11064:11082],
-	forms[11082:11100],
+	forms[10096:10114],
+	forms[10114:10132],
+	forms[10132:10159],
+	forms[10159:10186],
+	forms[10186:10190],
+	forms[10190:10202],
+	forms[10202:10220],
+	forms[10220:10238],
+	forms[10238:10250],
+	forms[10250:10262],
+	forms[10262:10280],
+	forms[10280:10298],
+	forms[10298:10310],
+	forms[10310:10328],
+	forms[10328:10355],
+	forms[10355:10382],
+	forms[10382:10400],
+	forms[10400:10418],
+	forms[10418:10445],
+	forms[10445:10472],
+	forms[10472:10490],
+	forms[10490:10494],
+	forms[10494:10521],
+	forms[10521:10548],
+	forms[10548:10578],
+	forms[10578:10608],
+	forms[10608:10617],
+	forms[10617:10626],
+	forms[10626:10653],
+	forms[10653:10680],
+	forms[10680:10686],
+	forms[10686:10692],
+	forms[10692:10704],
+	forms[10704:10716],
+	forms[10716:10725],
+	forms[10725:10734],
+	forms[10734:10738],
+	forms[10738:10740],
+	forms[10740:10767],
+	forms[10767:10794],
+	forms[10794:10800],
+	forms[10800:10806],
+	forms[10806:10836],
+	forms[10836:10866],
+	forms[10866:10875],
+	forms[10875:10884],
+	forms[10884:10888],
+	forms[10888:10892],
+	forms[10892:10894],
+	forms[10894:10896],
+	forms[10896:10923],
+	forms[10923:10950],
+	forms[10950:10956],
+	forms[10956:10962],
+	forms[10962:10974],
+	forms[10974:10986],
+	forms[10986:10995],
+	forms[10995:11004],
+	forms[11004:11008],
+	forms[11008:11010],
+	forms[11010:11040],
+	forms[11040:11070],
+	forms[11070:11079],
+	forms[11079:11088],
+	forms[11088:11091],
+	forms[11091:11094],
+	forms[11094:11097],
+	forms[11097:11100],
 	forms[11100:11118],
 	forms[11118:11136],
-	forms[11136:11163],
-	forms[11163:11190],
-	forms[11190:11220],
-	forms[11220:11250],
-	forms[11250:11259],
-	forms[11259:11268],
-	forms[11268:11269],
-	forms[11269:11299],
-	forms[11299:11329],
-	forms[11329:11338],
-	forms[11338:11347],
-	forms[11347:11351],
-	forms[11351:11355],
-	forms[11355:11358],
-	forms[11358:11361],
-	forms[11361:11388],
-	forms[11388:11415],
-	forms[11415:11442],
-	forms[11442:11469],
-	forms[11469:11496],
-	forms[11496:11523],
-	forms[11523:11524],
-	forms[11524:11525],
-	forms[11525:11527],
-	forms[11527:11529],
-	forms[11529:11531],
-	forms[11531:11533],
-	forms[11533:11536],
-	forms[11536:11541],
-	forms[11541:11546],
-	forms[11546:11551],
-	forms[11551:11552],
-	forms[11552:11553],
-	forms[11553:11559],
-	forms[11559:11567],
+	forms[11136:11154],
+	forms[11154:11172],
+	forms[11172:11199],
+	forms[11199:11226],
+	forms[11226:11256],
+	forms[11256:11286],
+	forms[11286:11295],
+	forms[11295:11304],
+	forms[11304:11305],
+	forms[11305:11335],
+	forms[11335:11365],
+	forms[11365:11374],
+	forms[11374:11383],
+	forms[11383:11387],
+	forms[11387:11391],
+	forms[11391:11394],
+	forms[11394:11397],
+	forms[11397:11424],
+	forms[11424:11451],
+	forms[11451:11478],
+	forms[11478:11505],
+	forms[11505:11532],
+	forms[11532:11559],
+	forms[11559:11560],
+	forms[11560:11561],
+	forms[11561:11563],
+	forms[11563:11565],
+	forms[11565:11567],
 	forms[11567:11569],
-	forms[11569:11571],
-	forms[11571:11579],
-	forms[11579:11587],
+	forms[11569:11572],
+	forms[11572:11577],
+	forms[11577:11582],
+	forms[11582:11587],
+	forms[11587:11588],
+	forms[11588:11589],
+	forms[11589:11595],
+	forms[11595:11603],
+	forms[11603:11605],
+	forms[11605:11607],
+	forms[11607:11615],
+	forms[11615:11623],
 }


Test patch:
diff --git a/build/zinstructions_test.go b/build/zinstructions_test.go
index 88a8dc8..c95de4f 100644
--- a/build/zinstructions_test.go
+++ b/build/zinstructions_test.go
@@ -2672,14 +2672,14 @@ func TestContextInstructions(t *testing.T) {
 	ctx.VPMULUDQ_BCST(opm64, opxmm, opk, opxmm)
 	ctx.VPMULUDQ_BCST_Z(opm64, opxmm, opk, opxmm)
 	ctx.VPMULUDQ_Z(opm128, opxmm, opk, opxmm)
-	ctx.VPOPCNTD(opm512, opk, opzmm)
-	ctx.VPOPCNTD_BCST(opm32, opk, opzmm)
-	ctx.VPOPCNTD_BCST_Z(opm32, opk, opzmm)
-	ctx.VPOPCNTD_Z(opm512, opk, opzmm)
-	ctx.VPOPCNTQ(opm512, opk, opzmm)
-	ctx.VPOPCNTQ_BCST(opm64, opk, opzmm)
-	ctx.VPOPCNTQ_BCST_Z(opm64, opk, opzmm)
-	ctx.VPOPCNTQ_Z(opm512, opk, opzmm)
+	ctx.VPOPCNTD(opm128, opk, opxmm)
+	ctx.VPOPCNTD_BCST(opm32, opk, opxmm)
+	ctx.VPOPCNTD_BCST_Z(opm32, opk, opxmm)
+	ctx.VPOPCNTD_Z(opm128, opk, opxmm)
+	ctx.VPOPCNTQ(opm128, opk, opxmm)
+	ctx.VPOPCNTQ_BCST(opm64, opk, opxmm)
+	ctx.VPOPCNTQ_BCST_Z(opm64, opk, opxmm)
+	ctx.VPOPCNTQ_Z(opm128, opk, opxmm)
 	ctx.VPOR(opm256, opymm, opymm)
 	ctx.VPORD(opm128, opxmm, opk, opxmm)
 	ctx.VPORD_BCST(opm32, opxmm, opk, opxmm)
diff --git a/x86/zctors_test.go b/x86/zctors_test.go
index f8c72cf..620b007 100644
--- a/x86/zctors_test.go
+++ b/x86/zctors_test.go
@@ -37179,6 +37179,30 @@ func TestVPMULUDQ_ZValidFormsNoError(t *testing.T) {
 }
 
 func TestVPOPCNTDValidFormsNoError(t *testing.T) {
+	if _, err := VPOPCNTD(opm128, opk, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTD(opm128, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTD(opm256, opk, opymm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTD(opm256, opymm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTD(opxmm, opk, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTD(opxmm, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTD(opymm, opk, opymm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTD(opymm, opymm); err != nil {
+		t.Fatal(err)
+	}
 	if _, err := VPOPCNTD(opm512, opk, opzmm); err != nil {
 		t.Fatal(err)
 	}
@@ -37194,6 +37218,18 @@ func TestVPOPCNTDValidFormsNoError(t *testing.T) {
 }
 
 func TestVPOPCNTD_BCSTValidFormsNoError(t *testing.T) {
+	if _, err := VPOPCNTD_BCST(opm32, opk, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTD_BCST(opm32, opk, opymm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTD_BCST(opm32, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTD_BCST(opm32, opymm); err != nil {
+		t.Fatal(err)
+	}
 	if _, err := VPOPCNTD_BCST(opm32, opk, opzmm); err != nil {
 		t.Fatal(err)
 	}
@@ -37203,12 +37239,30 @@ func TestVPOPCNTD_BCSTValidFormsNoError(t *testing.T) {
 }
 
 func TestVPOPCNTD_BCST_ZValidFormsNoError(t *testing.T) {
+	if _, err := VPOPCNTD_BCST_Z(opm32, opk, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTD_BCST_Z(opm32, opk, opymm); err != nil {
+		t.Fatal(err)
+	}
 	if _, err := VPOPCNTD_BCST_Z(opm32, opk, opzmm); err != nil {
 		t.Fatal(err)
 	}
 }
 
 func TestVPOPCNTD_ZValidFormsNoError(t *testing.T) {
+	if _, err := VPOPCNTD_Z(opm128, opk, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTD_Z(opm256, opk, opymm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTD_Z(opxmm, opk, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTD_Z(opymm, opk, opymm); err != nil {
+		t.Fatal(err)
+	}
 	if _, err := VPOPCNTD_Z(opm512, opk, opzmm); err != nil {
 		t.Fatal(err)
 	}
@@ -37218,6 +37272,30 @@ func TestVPOPCNTD_ZValidFormsNoError(t *testing.T) {
 }
 
 func TestVPOPCNTQValidFormsNoError(t *testing.T) {
+	if _, err := VPOPCNTQ(opm128, opk, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTQ(opm128, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTQ(opm256, opk, opymm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTQ(opm256, opymm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTQ(opxmm, opk, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTQ(opxmm, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTQ(opymm, opk, opymm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTQ(opymm, opymm); err != nil {
+		t.Fatal(err)
+	}
 	if _, err := VPOPCNTQ(opm512, opk, opzmm); err != nil {
 		t.Fatal(err)
 	}
@@ -37233,6 +37311,18 @@ func TestVPOPCNTQValidFormsNoError(t *testing.T) {
 }
 
 func TestVPOPCNTQ_BCSTValidFormsNoError(t *testing.T) {
+	if _, err := VPOPCNTQ_BCST(opm64, opk, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTQ_BCST(opm64, opk, opymm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTQ_BCST(opm64, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTQ_BCST(opm64, opymm); err != nil {
+		t.Fatal(err)
+	}
 	if _, err := VPOPCNTQ_BCST(opm64, opk, opzmm); err != nil {
 		t.Fatal(err)
 	}
@@ -37242,12 +37332,30 @@ func TestVPOPCNTQ_BCSTValidFormsNoError(t *testing.T) {
 }
 
 func TestVPOPCNTQ_BCST_ZValidFormsNoError(t *testing.T) {
+	if _, err := VPOPCNTQ_BCST_Z(opm64, opk, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTQ_BCST_Z(opm64, opk, opymm); err != nil {
+		t.Fatal(err)
+	}
 	if _, err := VPOPCNTQ_BCST_Z(opm64, opk, opzmm); err != nil {
 		t.Fatal(err)
 	}
 }
 
 func TestVPOPCNTQ_ZValidFormsNoError(t *testing.T) {
+	if _, err := VPOPCNTQ_Z(opm128, opk, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTQ_Z(opm256, opk, opymm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTQ_Z(opxmm, opk, opxmm); err != nil {
+		t.Fatal(err)
+	}
+	if _, err := VPOPCNTQ_Z(opymm, opk, opymm); err != nil {
+		t.Fatal(err)
+	}
 	if _, err := VPOPCNTQ_Z(opm512, opk, opzmm); err != nil {
 		t.Fatal(err)
 	}