Repository: bytecodealliance/wasmtime
Pull request #9195 (2024-09-03 14:45:29)

Update nightly in CI to latest
Additionally address some new warnings that are cropping up throughout the codebase.

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Patch:
diff --git a/.github/actions/install-rust/action.yml b/.github/actions/install-rust/action.yml
index c5f40462a..2301498e6 100644
--- a/.github/actions/install-rust/action.yml
+++ b/.github/actions/install-rust/action.yml
@@ -23,7 +23,7 @@ runs:
         elif [ "${{ inputs.toolchain }}" = "msrv" ]; then
           echo "version=1.$msrv.0" >> "$GITHUB_OUTPUT"
         elif [ "${{ inputs.toolchain }}" = "wasmtime-ci-pinned-nightly" ]; then
-          echo "version=nightly-2024-08-12" >> "$GITHUB_OUTPUT"
+          echo "version=nightly-2024-09-03" >> "$GITHUB_OUTPUT"
         else
           echo "version=${{ inputs.toolchain }}" >> "$GITHUB_OUTPUT"
         fi
diff --git a/Cargo.lock b/Cargo.lock
index 764f9d0c0..bb96d9f26 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -1387,15 +1387,6 @@ version = "0.12.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "8a9ee70c43aaf417c914396645a0fa852624801b24ebb7ae78fe8272889ac888"
 
-[[package]]
-name = "hashbrown"
-version = "0.13.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "43a3c133739dddd0d2990f9a4bdf8eb4b21ef50e4851ca85ab661199821d510e"
-dependencies = [
- "ahash",
-]
-
 [[package]]
 name = "hashbrown"
 version = "0.14.3"
@@ -2292,11 +2283,11 @@ dependencies = [
 
 [[package]]
 name = "regalloc2"
-version = "0.9.3"
+version = "0.10.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ad156d539c879b7a24a363a2016d77961786e71f48f2e2fc8302a92abd2429a6"
+checksum = "c713add5ab6f28820b7e9d8cdefb6feb2f2fb1f0d2b1cb22eed0ff281b8372dc"
 dependencies = [
- "hashbrown 0.13.2",
+ "hashbrown 0.14.3",
  "log",
  "rustc-hash",
  "serde",
diff --git a/Cargo.toml b/Cargo.toml
index 89e720681..28be46ad5 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -246,7 +246,7 @@ byte-array-literals = { path = "crates/wasi-preview1-component-adapter/byte-arra
 
 # Bytecode Alliance maintained dependencies:
 # ---------------------------
-regalloc2 = "0.9.3"
+regalloc2 = "0.10.0"
 
 # cap-std family:
 target-lexicon = "0.12.16"
diff --git a/cranelift/codegen/meta/src/gen_inst.rs b/cranelift/codegen/meta/src/gen_inst.rs
index 7609d060d..e9a505933 100644
--- a/cranelift/codegen/meta/src/gen_inst.rs
+++ b/cranelift/codegen/meta/src/gen_inst.rs
@@ -119,7 +119,7 @@ fn gen_arguments_method(formats: &[Rc<InstructionFormat>], fmt: &mut Formatter,
 
     fmtln!(
         fmt,
-        "pub fn {}<'a>(&'a {}self, pool: &'a {}ir::ValueListPool) -> &{}[Value] {{",
+        "pub fn {}<'a>(&'a {}self, pool: &'a {}ir::ValueListPool) -> &'a {}[Value] {{",
         method,
         mut_,
         mut_,
diff --git a/cranelift/codegen/src/ir/dfg.rs b/cranelift/codegen/src/ir/dfg.rs
index c26c3d591..48c2dc2f2 100644
--- a/cranelift/codegen/src/ir/dfg.rs
+++ b/cranelift/codegen/src/ir/dfg.rs
@@ -330,7 +330,7 @@ impl DataFlowGraph {
     }
 
     /// Get an iterator over all values.
-    pub fn values<'a>(&'a self) -> Values {
+    pub fn values<'a>(&'a self) -> Values<'a> {
         Values {
             inner: self.values.iter(),
         }
diff --git a/cranelift/codegen/src/ir/instructions.rs b/cranelift/codegen/src/ir/instructions.rs
index ab97327e4..f885083cc 100644
--- a/cranelift/codegen/src/ir/instructions.rs
+++ b/cranelift/codegen/src/ir/instructions.rs
@@ -305,7 +305,7 @@ impl InstructionData {
     /// Get the destinations of this instruction, if it's a branch.
     ///
     /// `br_table` returns the empty slice.
-    pub fn branch_destination<'a>(&'a self, jump_tables: &'a ir::JumpTables) -> &[BlockCall] {
+    pub fn branch_destination<'a>(&'a self, jump_tables: &'a ir::JumpTables) -> &'a [BlockCall] {
         match self {
             Self::Jump {
                 ref destination, ..
@@ -325,7 +325,7 @@ impl InstructionData {
     pub fn branch_destination_mut<'a>(
         &'a mut self,
         jump_tables: &'a mut ir::JumpTables,
-    ) -> &mut [BlockCall] {
+    ) -> &'a mut [BlockCall] {
         match self {
             Self::Jump {
                 ref mut destination,
diff --git a/cranelift/codegen/src/machinst/vcode.rs b/cranelift/codegen/src/machinst/vcode.rs
index f2f9fe73b..12c816530 100644
--- a/cranelift/codegen/src/machinst/vcode.rs
+++ b/cranelift/codegen/src/machinst/vcode.rs
@@ -884,30 +884,6 @@ impl<I: VCodeInst> VCode<I> {
                         // If this is a safepoint, compute a stack map
                         // and pass it to the emit state.
                         let stack_map_disasm = if self.insts[iix.index()].is_safepoint() {
-                            let mut safepoint_slots: SmallVec<[SpillSlot; 8]> = smallvec![];
-                            // Find the contiguous range of
-                            // (progpoint, allocation) safepoint slot
-                            // records in `regalloc.safepoint_slots`
-                            // for this instruction index.
-                            let safepoint_slots_start = regalloc
-                                .safepoint_slots
-                                .binary_search_by(|(progpoint, _alloc)| {
-                                    if progpoint.inst() >= iix {
-                                        std::cmp::Ordering::Greater
-                                    } else {
-                                        std::cmp::Ordering::Less
-                                    }
-                                })
-                                .unwrap_err();
-
-                            for (_, alloc) in regalloc.safepoint_slots[safepoint_slots_start..]
-                                .iter()
-                                .take_while(|(progpoint, _)| progpoint.inst() == iix)
-                            {
-                                let slot = alloc.as_stack().unwrap();
-                                safepoint_slots.push(slot);
-                            }
-
                             let (user_stack_map, user_stack_map_disasm) = {
                                 // The `user_stack_maps` is keyed by reverse
                                 // instruction index, so we must flip the
@@ -1297,7 +1273,7 @@ impl<I: VCodeInst> RegallocFunction for VCode<I> {
 
     fn block_insns(&self, block: BlockIndex) -> InstRange {
         let range = self.block_ranges.get(block.index());
-        InstRange::forward(InsnIndex::new(range.start), InsnIndex::new(range.end))
+        InstRange::new(InsnIndex::new(range.start), InsnIndex::new(range.end))
     }
 
     fn block_succs(&self, block: BlockIndex) -> &[BlockIndex] {
@@ -1344,10 +1320,6 @@ impl<I: VCodeInst> RegallocFunction for VCode<I> {
         }
     }
 
-    fn requires_refs_on_stack(&self, _insn: InsnIndex) -> bool {
-        false
-    }
-
     fn inst_operands(&self, insn: InsnIndex) -> &[Operand] {
         let range = self.operand_ranges.get(insn.index());
         &self.operands[range]
diff --git a/cranelift/codegen/src/settings.rs b/cranelift/codegen/src/settings.rs
index 39446528d..fb57ecdc0 100644
--- a/cranelift/codegen/src/settings.rs
+++ b/cranelift/codegen/src/settings.rs
@@ -482,13 +482,13 @@ pub struct FlagsOrIsa<'a> {
 }
 
 impl<'a> From<&'a Flags> for FlagsOrIsa<'a> {
-    fn from(flags: &'a Flags) -> FlagsOrIsa {
+    fn from(flags: &'a Flags) -> FlagsOrIsa<'a> {
         FlagsOrIsa { flags, isa: None }
     }
 }
 
 impl<'a> From<&'a dyn TargetIsa> for FlagsOrIsa<'a> {
-    fn from(isa: &'a dyn TargetIsa) -> FlagsOrIsa {
+    fn from(isa: &'a dyn TargetIsa) -> FlagsOrIsa<'a> {
         FlagsOrIsa {
             flags: isa.flags(),
             isa: Some(isa),
diff --git a/crates/environ/src/fact/trampoline.rs b/crates/environ/src/fact/trampoline.rs
index 0097f801d..8af700de4 100644
--- a/crates/environ/src/fact/trampoline.rs
+++ b/crates/environ/src/fact/trampoline.rs
@@ -3073,7 +3073,7 @@ impl<'a> Destination<'a> {
         &'b self,
         types: &'b ComponentTypesBuilder,
         fields: impl IntoIterator<Item = InterfaceType> + 'b,
-    ) -> impl Iterator<Item = Destination> + 'b
+    ) -> impl Iterator<Item = Destination<'b>> + 'b
     where
         'a: 'b,
     {
diff --git a/crates/wasmtime/src/runtime/component/resources.rs b/crates/wasmtime/src/runtime/component/resources.rs
index 678b0f8f7..312c8216c 100644
--- a/crates/wasmtime/src/runtime/component/resources.rs
+++ b/crates/wasmtime/src/runtime/component/resources.rs
@@ -369,7 +369,7 @@ impl HostResourceIndex {
 }
 
 impl<'a> HostResourceTables<'a> {
-    pub fn new_host(store: &'a mut StoreOpaque) -> HostResourceTables<'_> {
+    pub fn new_host(store: &'a mut StoreOpaque) -> HostResourceTables<'a> {
         let (calls, host_table, host_resource_data) = store.component_resource_state();
         HostResourceTables::from_parts(
             ResourceTables {
diff --git a/crates/wasmtime/src/runtime/component/types.rs b/crates/wasmtime/src/runtime/component/types.rs
index 06824897e..6895ea4aa 100644
--- a/crates/wasmtime/src/runtime/component/types.rs
+++ b/crates/wasmtime/src/runtime/component/types.rs
@@ -733,7 +733,7 @@ impl Module {
     pub fn imports<'a>(
         &'a self,
         engine: &'a Engine,
-    ) -> impl ExactSizeIterator<Item = ((&str, &str), ExternType)> + 'a {
+    ) -> impl ExactSizeIterator<Item = ((&'a str, &'a str), ExternType)> + 'a {
         self.0.types[self.0.index]
             .imports
             .iter()
@@ -749,7 +749,7 @@ impl Module {
     pub fn exports<'a>(
         &'a self,
         engine: &'a Engine,
-    ) -> impl ExactSizeIterator<Item = (&str, ExternType)> + 'a {
+    ) -> impl ExactSizeIterator<Item = (&'a str, ExternType)> + 'a {
         self.0.types[self.0.index].exports.iter().map(|(name, ty)| {
             (
                 name.as_str(),
@@ -780,7 +780,7 @@ impl Component {
     pub fn imports<'a>(
         &'a self,
         engine: &'a Engine,
-    ) -> impl ExactSizeIterator<Item = (&str, ComponentItem)> + 'a {
+    ) -> impl ExactSizeIterator<Item = (&'a str, ComponentItem)> + 'a {
         self.0.types[self.0.index].imports.iter().map(|(name, ty)| {
             (
                 name.as_str(),
@@ -801,7 +801,7 @@ impl Component {
     pub fn exports<'a>(
         &'a self,
         engine: &'a Engine,
-    ) -> impl ExactSizeIterator<Item = (&str, ComponentItem)> + 'a {
+    ) -> impl ExactSizeIterator<Item = (&'a str, ComponentItem)> + 'a {
         self.0.types[self.0.index].exports.iter().map(|(name, ty)| {
             (
                 name.as_str(),
@@ -832,7 +832,7 @@ impl ComponentInstance {
     pub fn exports<'a>(
         &'a self,
         engine: &'a Engine,
-    ) -> impl ExactSizeIterator<Item = (&str, ComponentItem)> {
+    ) -> impl ExactSizeIterator<Item = (&'a str, ComponentItem)> {
         self.0.types[self.0.index].exports.iter().map(|(name, ty)| {
             (
                 name.as_str(),
diff --git a/crates/wasmtime/src/runtime/linker.rs b/crates/wasmtime/src/runtime/linker.rs
index c0a8517a7..bb21e5422 100644
--- a/crates/wasmtime/src/runtime/linker.rs
+++ b/crates/wasmtime/src/runtime/linker.rs
@@ -1226,7 +1226,7 @@ impl<T> Linker<T> {
     pub fn iter<'a: 'p, 'p>(
         &'a self,
         mut store: impl AsContextMut<Data = T> + 'p,
-    ) -> impl Iterator<Item = (&str, &str, Extern)> + 'p {
+    ) -> impl Iterator<Item = (&'a str, &'a str, Extern)> + 'p {
         self.map.iter().map(move |(key, item)| {
             let store = store.as_context_mut();
             (
diff --git a/crates/wasmtime/src/runtime/vm/traphandlers.rs b/crates/wasmtime/src/runtime/vm/traphandlers.rs
index bfd45a680..087039bfe 100644
--- a/crates/wasmtime/src/runtime/vm/traphandlers.rs
+++ b/crates/wasmtime/src/runtime/vm/traphandlers.rs
@@ -532,7 +532,7 @@ impl CallThreadState {
         Some(unsafe { Backtrace::new_with_trap_state(limits, self, trap_pc_and_fp) })
     }
 
-    pub(crate) fn iter<'a>(&'a self) -> impl Iterator<Item = &Self> + 'a {
+    pub(crate) fn iter<'a>(&'a self) -> impl Iterator<Item = &'a Self> + 'a {
         let mut state = Some(self);
         core::iter::from_fn(move || {
             let this = state?;
diff --git a/supply-chain/audits.toml b/supply-chain/audits.toml
index 312abdbb9..4624fdcfe 100644
--- a/supply-chain/audits.toml
+++ b/supply-chain/audits.toml
@@ -171,7 +171,7 @@ notes = "We (Bytecode Alliance) are the primary authors of regalloc2 and co-deve
 [[wildcard-audits.regalloc2]]
 who = "Trevor Elliott <telliott@fastly.com>"
 criteria = "safe-to-deploy"
-user-id = 187138
+user-id = 187138 # Trevor Elliott (elliottt)
 start = "2022-11-29"
 end = "2025-07-30"
 notes = """
diff --git a/supply-chain/imports.lock b/supply-chain/imports.lock
index e1f81c500..ad9686aa0 100644
--- a/supply-chain/imports.lock
+++ b/supply-chain/imports.lock
@@ -857,6 +857,20 @@ user-id = 3726
 user-login = "cfallin"
 user-name = "Chris Fallin"
 
+[[publisher.regalloc2]]
+version = "0.9.4"
+when = "2024-08-30"
+user-id = 187138
+user-login = "elliottt"
+user-name = "Trevor Elliott"
+
+[[publisher.regalloc2]]
+version = "0.10.0"
+when = "2024-09-03"
+user-id = 187138
+user-login = "elliottt"
+user-name = "Trevor Elliott"
+
 [[publisher.regex]]
 version = "1.9.1"
 when = "2023-07-07"


Test patch:
diff --git a/cranelift/filetests/filetests/isa/aarch64/call-pauth-bkey.clif b/cranelift/filetests/filetests/isa/aarch64/call-pauth-bkey.clif
index d919b28da..9b37ca152 100644
--- a/cranelift/filetests/filetests/isa/aarch64/call-pauth-bkey.clif
+++ b/cranelift/filetests/filetests/isa/aarch64/call-pauth-bkey.clif
@@ -63,8 +63,8 @@ block0(v0: i64):
 ;   stp fp, lr, [sp, #-16]!
 ;   mov fp, sp
 ; block0:
-;   mov x0, x2
 ;   load_ext_name x3, TestCase(%g)+0
+;   mov x0, x2
 ;   blr x3
 ;   mov x2, x0
 ;   ldp fp, lr, [sp], #16
@@ -76,11 +76,11 @@ block0(v0: i64):
 ;   stp x29, x30, [sp, #-0x10]!
 ;   mov x29, sp
 ; block1: ; offset 0xc
-;   mov x0, x2
-;   ldr x3, #0x18
-;   b #0x20
+;   ldr x3, #0x14
+;   b #0x1c
 ;   .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g 0
 ;   .byte 0x00, 0x00, 0x00, 0x00
+;   mov x0, x2
 ;   blr x3
 ;   mov x2, x0
 ;   ldp x29, x30, [sp], #0x10
diff --git a/cranelift/filetests/filetests/isa/aarch64/call-pauth.clif b/cranelift/filetests/filetests/isa/aarch64/call-pauth.clif
index 5e11b77d4..736cafe2e 100644
--- a/cranelift/filetests/filetests/isa/aarch64/call-pauth.clif
+++ b/cranelift/filetests/filetests/isa/aarch64/call-pauth.clif
@@ -64,8 +64,8 @@ block0(v0: i64):
 ;   stp fp, lr, [sp, #-16]!
 ;   mov fp, sp
 ; block0:
-;   mov x0, x2
 ;   load_ext_name x3, TestCase(%g)+0
+;   mov x0, x2
 ;   blr x3
 ;   mov x2, x0
 ;   ldp fp, lr, [sp], #16
@@ -77,11 +77,11 @@ block0(v0: i64):
 ;   stp x29, x30, [sp, #-0x10]!
 ;   mov x29, sp
 ; block1: ; offset 0xc
-;   mov x0, x2
-;   ldr x3, #0x18
-;   b #0x20
+;   ldr x3, #0x14
+;   b #0x1c
 ;   .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g 0
 ;   .byte 0x00, 0x00, 0x00, 0x00
+;   mov x0, x2
 ;   blr x3
 ;   mov x2, x0
 ;   ldp x29, x30, [sp], #0x10
diff --git a/cranelift/filetests/filetests/isa/aarch64/call.clif b/cranelift/filetests/filetests/isa/aarch64/call.clif
index 102dc4f4e..ee69a6a28 100644
--- a/cranelift/filetests/filetests/isa/aarch64/call.clif
+++ b/cranelift/filetests/filetests/isa/aarch64/call.clif
@@ -529,9 +529,9 @@ block0(v0: i64):
 ;   stp fp, lr, [sp, #-16]!
 ;   mov fp, sp
 ; block0:
-;   mov x1, x0
 ;   movz x2, #42
 ;   load_ext_name x4, TestCase(%f11)+0
+;   mov x1, x0
 ;   mov x0, x2
 ;   blr x4
 ;   ldp fp, lr, [sp], #16
@@ -542,12 +542,12 @@ block0(v0: i64):
 ;   stp x29, x30, [sp, #-0x10]!
 ;   mov x29, sp
 ; block1: ; offset 0x8
-;   mov x1, x0
 ;   mov x2, #0x2a
-;   ldr x4, #0x18
-;   b #0x20
+;   ldr x4, #0x14
+;   b #0x1c
 ;   .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f11 0
 ;   .byte 0x00, 0x00, 0x00, 0x00
+;   mov x1, x0
 ;   mov x0, x2
 ;   blr x4
 ;   ldp x29, x30, [sp], #0x10
@@ -583,9 +583,9 @@ block0(v0: i64):
 ;   stp fp, lr, [sp, #-16]!
 ;   mov fp, sp
 ; block0:
-;   mov x2, x0
 ;   movz x3, #42
 ;   load_ext_name x4, TestCase(%f12)+0
+;   mov x2, x0
 ;   mov x0, x3
 ;   blr x4
 ;   ldp fp, lr, [sp], #16
@@ -596,12 +596,12 @@ block0(v0: i64):
 ;   stp x29, x30, [sp, #-0x10]!
 ;   mov x29, sp
 ; block1: ; offset 0x8
-;   mov x2, x0
 ;   mov x3, #0x2a
-;   ldr x4, #0x18
-;   b #0x20
+;   ldr x4, #0x14
+;   b #0x1c
 ;   .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f12 0
 ;   .byte 0x00, 0x00, 0x00, 0x00
+;   mov x2, x0
 ;   mov x0, x3
 ;   blr x4
 ;   ldp x29, x30, [sp], #0x10
@@ -637,9 +637,9 @@ block0(v0: i64):
 ;   stp fp, lr, [sp, #-16]!
 ;   mov fp, sp
 ; block0:
-;   mov x1, x0
 ;   movz x2, #42
 ;   load_ext_name x4, TestCase(%f13)+0
+;   mov x1, x0
 ;   mov x0, x2
 ;   blr x4
 ;   ldp fp, lr, [sp], #16
@@ -650,12 +650,12 @@ block0(v0: i64):
 ;   stp x29, x30, [sp, #-0x10]!
 ;   mov x29, sp
 ; block1: ; offset 0x8
-;   mov x1, x0
 ;   mov x2, #0x2a
-;   ldr x4, #0x18
-;   b #0x20
+;   ldr x4, #0x14
+;   b #0x1c
 ;   .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f13 0
 ;   .byte 0x00, 0x00, 0x00, 0x00
+;   mov x1, x0
 ;   mov x0, x2
 ;   blr x4
 ;   ldp x29, x30, [sp], #0x10
@@ -698,12 +698,12 @@ block0(v0: i128, v1: i64):
 ;   mov fp, sp
 ;   sub sp, sp, #16
 ; block0:
-;   mov x6, x2
 ;   str x0, [sp]
-;   mov x4, x0
 ;   str x1, [sp, #8]
-;   mov x5, x1
 ;   load_ext_name x8, TestCase(%f14)+0
+;   mov x4, x0
+;   mov x5, x1
+;   mov x6, x2
 ;   mov x2, x4
 ;   mov x3, x5
 ;   blr x8
@@ -717,15 +717,15 @@ block0(v0: i128, v1: i64):
 ;   mov x29, sp
 ;   sub sp, sp, #0x10
 ; block1: ; offset 0xc
-;   mov x6, x2
 ;   stur x0, [sp]
-;   mov x4, x0
 ;   stur x1, [sp, #8]
-;   mov x5, x1
-;   ldr x8, #0x28
-;   b #0x30
+;   ldr x8, #0x1c
+;   b #0x24
 ;   .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f14 0
 ;   .byte 0x00, 0x00, 0x00, 0x00
+;   mov x4, x0
+;   mov x5, x1
+;   mov x6, x2
 ;   mov x2, x4
 ;   mov x3, x5
 ;   blr x8
@@ -770,12 +770,12 @@ block0(v0: i128, v1: i64):
 ;   mov fp, sp
 ;   sub sp, sp, #16
 ; block0:
-;   mov x6, x2
 ;   str x0, [sp]
-;   mov x4, x0
 ;   str x1, [sp, #8]
-;   mov x5, x1
 ;   load_ext_name x8, TestCase(%f15)+0
+;   mov x4, x0
+;   mov x5, x1
+;   mov x6, x2
 ;   mov x2, x4
 ;   mov x3, x5
 ;   blr x8
@@ -789,15 +789,15 @@ block0(v0: i128, v1: i64):
 ;   mov x29, sp
 ;   sub sp, sp, #0x10
 ; block1: ; offset 0xc
-;   mov x6, x2
 ;   stur x0, [sp]
-;   mov x4, x0
 ;   stur x1, [sp, #8]
-;   mov x5, x1
-;   ldr x8, #0x28
-;   b #0x30
+;   ldr x8, #0x1c
+;   b #0x24
 ;   .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f15 0
 ;   .byte 0x00, 0x00, 0x00, 0x00
+;   mov x4, x0
+;   mov x5, x1
+;   mov x6, x2
 ;   mov x2, x4
 ;   mov x3, x5
 ;   blr x8
@@ -836,8 +836,8 @@ block0(v0: i64):
 ;   stp fp, lr, [sp, #-16]!
 ;   mov fp, sp
 ; block0:
-;   mov x8, x0
 ;   load_ext_name x3, TestCase(%g)+0
+;   mov x8, x0
 ;   blr x3
 ;   ldp fp, lr, [sp], #16
 ;   ret
@@ -847,11 +847,11 @@ block0(v0: i64):
 ;   stp x29, x30, [sp, #-0x10]!
 ;   mov x29, sp
 ; block1: ; offset 0x8
-;   mov x8, x0
-;   ldr x3, #0x14
-;   b #0x1c
+;   ldr x3, #0x10
+;   b #0x18
 ;   .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g 0
 ;   .byte 0x00, 0x00, 0x00, 0x00
+;   mov x8, x0
 ;   blr x3
 ;   ldp x29, x30, [sp], #0x10
 ;   ret
@@ -867,13 +867,13 @@ block0(v0: i64):
 ; VCode:
 ;   stp fp, lr, [sp, #-16]!
 ;   mov fp, sp
-;   str x23, [sp, #-16]!
+;   str x24, [sp, #-16]!
 ; block0:
-;   mov x23, x8
+;   mov x24, x8
 ;   load_ext_name x2, TestCase(%g)+0
 ;   blr x2
-;   mov x8, x23
-;   ldr x23, [sp], #16
+;   mov x8, x24
+;   ldr x24, [sp], #16
 ;   ldp fp, lr, [sp], #16
 ;   ret
 ;
@@ -881,16 +881,16 @@ block0(v0: i64):
 ; block0: ; offset 0x0
 ;   stp x29, x30, [sp, #-0x10]!
 ;   mov x29, sp
-;   str x23, [sp, #-0x10]!
+;   str x24, [sp, #-0x10]!
 ; block1: ; offset 0xc
-;   mov x23, x8
+;   mov x24, x8
 ;   ldr x2, #0x18
 ;   b #0x20
 ;   .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g 0
 ;   .byte 0x00, 0x00, 0x00, 0x00
 ;   blr x2
-;   mov x8, x23
-;   ldr x23, [sp], #0x10
+;   mov x8, x24
+;   ldr x24, [sp], #0x10
 ;   ldp x29, x30, [sp], #0x10
 ;   ret
 
diff --git a/cranelift/filetests/filetests/isa/aarch64/fma.clif b/cranelift/filetests/filetests/isa/aarch64/fma.clif
index d44099cec..a0b714d09 100644
--- a/cranelift/filetests/filetests/isa/aarch64/fma.clif
+++ b/cranelift/filetests/filetests/isa/aarch64/fma.clif
@@ -358,28 +358,28 @@ block0(v0: f32x4, v1: f32x4, v2: f32x4):
 
 ; VCode:
 ; block0:
-;   mov v31.16b, v1.16b
 ;   movz w6, #7452
 ;   movk w6, w6, #7966, LSL #16
 ;   dup v17.4s, w6
+;   mov v31.16b, v1.16b
 ;   mov v30.16b, v31.16b
 ;   tbl v19.16b, { v30.16b, v31.16b }, v17.16b
-;   mov v23.16b, v0.16b
+;   mov v22.16b, v0.16b
 ;   mov v0.16b, v2.16b
-;   fmla v0.4s, v0.4s, v23.4s, v19.4s
+;   fmla v0.4s, v0.4s, v22.4s, v19.4s
 ;   ret
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
-;   mov v31.16b, v1.16b
 ;   mov w6, #0x1d1c
 ;   movk w6, #0x1f1e, lsl #16
 ;   dup v17.4s, w6
+;   mov v31.16b, v1.16b
 ;   mov v30.16b, v31.16b
 ;   tbl v19.16b, {v30.16b, v31.16b}, v17.16b
-;   mov v23.16b, v0.16b
+;   mov v22.16b, v0.16b
 ;   mov v0.16b, v2.16b
-;   fmla v0.4s, v23.4s, v19.4s
+;   fmla v0.4s, v22.4s, v19.4s
 ;   ret
 
 function %f64x2_splat0(f64x2, f64x2, f64x2) -> f64x2 {
diff --git a/cranelift/filetests/filetests/isa/aarch64/return-call-indirect.clif b/cranelift/filetests/filetests/isa/aarch64/return-call-indirect.clif
index 319ea508b..ca0c1fcd4 100644
--- a/cranelift/filetests/filetests/isa/aarch64/return-call-indirect.clif
+++ b/cranelift/filetests/filetests/isa/aarch64/return-call-indirect.clif
@@ -228,8 +228,8 @@ block0:
 ;   stp x19, x20, [sp, #-16]!
 ;   sub sp, sp, #16
 ; block0:
-;   movz x2, #10
-;   str x2, [sp]
+;   movz x3, #10
+;   str x3, [sp]
 ;   movz x3, #15
 ;   movz x4, #20
 ;   movz x5, #25
@@ -295,8 +295,8 @@ block0:
 ;   stp x19, x20, [sp, #-0x10]!
 ;   sub sp, sp, #0x10
 ; block1: ; offset 0x30
-;   mov x2, #0xa
-;   stur x2, [sp]
+;   mov x3, #0xa
+;   stur x3, [sp]
 ;   mov x3, #0xf
 ;   mov x4, #0x14
 ;   mov x5, #0x19
diff --git a/cranelift/filetests/filetests/isa/aarch64/return-call.clif b/cranelift/filetests/filetests/isa/aarch64/return-call.clif
index 1e018b3c4..46a9ce746 100644
--- a/cranelift/filetests/filetests/isa/aarch64/return-call.clif
+++ b/cranelift/filetests/filetests/isa/aarch64/return-call.clif
@@ -463,18 +463,18 @@ block2:
 ;   stp x19, x20, [sp, #-16]!
 ;   sub sp, sp, #16
 ; block0:
-;   movz x14, #10
-;   str x14, [sp]
+;   movz x3, #10
+;   str x3, [sp]
 ;   movz x3, #15
 ;   movz x4, #20
 ;   movz x5, #25
 ;   movz x6, #30
 ;   movz x7, #35
-;   movz x21, #40
-;   movz x28, #45
-;   movz x27, #50
-;   movz x26, #55
-;   movz x25, #60
+;   movz x25, #40
+;   movz x21, #45
+;   movz x28, #50
+;   movz x27, #55
+;   movz x26, #60
 ;   movz x24, #65
 ;   movz x23, #70
 ;   movz x22, #75
@@ -493,11 +493,11 @@ block2:
 ;   cbnz x2, label2 ; b label1
 ; block1:
 ;   movz x2, #140
-;   str x21, [sp, #112]
-;   str x28, [sp, #120]
-;   str x27, [sp, #128]
-;   str x26, [sp, #136]
-;   str x25, [sp, #144]
+;   str x25, [sp, #112]
+;   str x21, [sp, #120]
+;   str x28, [sp, #128]
+;   str x27, [sp, #136]
+;   str x26, [sp, #144]
 ;   str x24, [sp, #152]
 ;   str x23, [sp, #160]
 ;   str x22, [sp, #168]
@@ -519,11 +519,11 @@ block2:
 ;   return_call_ind x1 new_stack_arg_size:176 x2=x2 x3=x3 x4=x4 x5=x5 x6=x6 x7=x7
 ; block2:
 ;   ldr x2, [sp]
-;   str x21, [sp, #128]
-;   str x28, [sp, #136]
-;   str x27, [sp, #144]
-;   str x26, [sp, #152]
-;   str x25, [sp, #160]
+;   str x25, [sp, #128]
+;   str x21, [sp, #136]
+;   str x28, [sp, #144]
+;   str x27, [sp, #152]
+;   str x26, [sp, #160]
 ;   str x24, [sp, #168]
 ;   str x23, [sp, #176]
 ;   str x22, [sp, #184]
@@ -557,18 +557,18 @@ block2:
 ;   stp x19, x20, [sp, #-0x10]!
 ;   sub sp, sp, #0x10
 ; block1: ; offset 0x30
-;   mov x14, #0xa
-;   stur x14, [sp]
+;   mov x3, #0xa
+;   stur x3, [sp]
 ;   mov x3, #0xf
 ;   mov x4, #0x14
 ;   mov x5, #0x19
 ;   mov x6, #0x1e
 ;   mov x7, #0x23
-;   mov x21, #0x28
-;   mov x28, #0x2d
-;   mov x27, #0x32
-;   mov x26, #0x37
-;   mov x25, #0x3c
+;   mov x25, #0x28
+;   mov x21, #0x2d
+;   mov x28, #0x32
+;   mov x27, #0x37
+;   mov x26, #0x3c
 ;   mov x24, #0x41
 ;   mov x23, #0x46
 ;   mov x22, #0x4b
@@ -587,11 +587,11 @@ block2:
 ;   cbnz x2, #0x12c
 ; block2: ; offset 0xa0
 ;   mov x2, #0x8c
-;   stur x21, [sp, #0x70]
-;   stur x28, [sp, #0x78]
-;   stur x27, [sp, #0x80]
-;   stur x26, [sp, #0x88]
-;   stur x25, [sp, #0x90]
+;   stur x25, [sp, #0x70]
+;   stur x21, [sp, #0x78]
+;   stur x28, [sp, #0x80]
+;   stur x27, [sp, #0x88]
+;   stur x26, [sp, #0x90]
 ;   stur x24, [sp, #0x98]
 ;   stur x23, [sp, #0xa0]
 ;   stur x22, [sp, #0xa8]
@@ -623,11 +623,11 @@ block2:
 ;   br x1
 ; block3: ; offset 0x12c
 ;   ldur x2, [sp]
-;   stur x21, [sp, #0x80]
-;   stur x28, [sp, #0x88]
-;   stur x27, [sp, #0x90]
-;   stur x26, [sp, #0x98]
-;   stur x25, [sp, #0xa0]
+;   stur x25, [sp, #0x80]
+;   stur x21, [sp, #0x88]
+;   stur x28, [sp, #0x90]
+;   stur x27, [sp, #0x98]
+;   stur x26, [sp, #0xa0]
 ;   stur x24, [sp, #0xa8]
 ;   stur x23, [sp, #0xb0]
 ;   stur x22, [sp, #0xb8]
diff --git a/cranelift/filetests/filetests/isa/aarch64/shuffle.clif b/cranelift/filetests/filetests/isa/aarch64/shuffle.clif
index d22518b02..b20ceee6d 100644
--- a/cranelift/filetests/filetests/isa/aarch64/shuffle.clif
+++ b/cranelift/filetests/filetests/isa/aarch64/shuffle.clif
@@ -10,17 +10,17 @@ block0(v0: i8x16, v1: i8x16):
 
 ; VCode:
 ; block0:
+;   ldr q3, [const(0)]
 ;   mov v30.16b, v0.16b
 ;   mov v31.16b, v1.16b
-;   ldr q3, [const(0)]
 ;   tbl v0.16b, { v30.16b, v31.16b }, v3.16b
 ;   ret
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
+;   ldr q3, #0x20
 ;   mov v30.16b, v0.16b
 ;   mov v31.16b, v1.16b
-;   ldr q3, #0x20
 ;   tbl v0.16b, {v30.16b, v31.16b}, v3.16b
 ;   ret
 ;   .byte 0x00, 0x00, 0x00, 0x00
@@ -541,17 +541,17 @@ block0(v0: i8x16, v1: i8x16):
 
 ; VCode:
 ; block0:
+;   ldr q3, [const(0)]
 ;   mov v30.16b, v0.16b
 ;   mov v31.16b, v1.16b
-;   ldr q3, [const(0)]
 ;   tbl v0.16b, { v30.16b, v31.16b }, v3.16b
 ;   ret
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
+;   ldr q3, #0x20
 ;   mov v30.16b, v0.16b
 ;   mov v31.16b, v1.16b
-;   ldr q3, #0x20
 ;   tbl v0.16b, {v30.16b, v31.16b}, v3.16b
 ;   ret
 ;   .byte 0x00, 0x00, 0x00, 0x00
diff --git a/cranelift/filetests/filetests/isa/aarch64/stack.clif b/cranelift/filetests/filetests/isa/aarch64/stack.clif
index cd2fd150b..12b9788ec 100644
--- a/cranelift/filetests/filetests/isa/aarch64/stack.clif
+++ b/cranelift/filetests/filetests/isa/aarch64/stack.clif
@@ -463,28 +463,28 @@ block0(v0: i8):
 ;   add x0, x0, #31
 ;   ldr x7, [sp, #1208]
 ;   add x7, x7, #33
-;   ldr x9, [sp, #1200]
-;   add x8, x9, #35
-;   ldr x12, [sp, #1192]
-;   add x9, x12, #37
-;   ldr x15, [sp, #1184]
-;   add x10, x15, #39
-;   ldr x2, [sp, #1176]
-;   add x11, x2, #31
-;   ldr x5, [sp, #1168]
-;   add x12, x5, #33
+;   ldr x10, [sp, #1200]
+;   add x8, x10, #35
+;   ldr x13, [sp, #1192]
+;   add x9, x13, #37
+;   ldr x1, [sp, #1184]
+;   add x10, x1, #39
+;   ldr x3, [sp, #1176]
+;   add x11, x3, #31
+;   ldr x6, [sp, #1168]
+;   add x12, x6, #33
 ;   ldr x13, [sp, #1160]
 ;   add x13, x13, #35
 ;   ldr x14, [sp, #1152]
 ;   add x14, x14, #37
 ;   ldr x15, [sp, #1144]
 ;   add x15, x15, #39
-;   ldr x1, [sp, #1136]
-;   ldr x3, [sp, #1128]
-;   add x1, x1, x3
+;   ldr x2, [sp, #1136]
+;   ldr x4, [sp, #1128]
+;   add x1, x2, x4
 ;   ldr x2, [sp, #1112]
-;   ldr x6, [sp, #1120]
-;   add x2, x6, x2
+;   ldr x3, [sp, #1120]
+;   add x2, x3, x2
 ;   ldr x3, [sp, #1096]
 ;   ldr x4, [sp, #1104]
 ;   add x3, x4, x3
@@ -641,28 +641,28 @@ block0(v0: i8):
 ;   add x0, x0, #0x1f
 ;   ldr x7, [sp, #0x4b8]
 ;   add x7, x7, #0x21
-;   ldr x9, [sp, #0x4b0]
-;   add x8, x9, #0x23
-;   ldr x12, [sp, #0x4a8]
-;   add x9, x12, #0x25
-;   ldr x15, [sp, #0x4a0]
-;   add x10, x15, #0x27
-;   ldr x2, [sp, #0x498]
-;   add x11, x2, #0x1f
-;   ldr x5, [sp, #0x490]
-;   add x12, x5, #0x21
+;   ldr x10, [sp, #0x4b0]
+;   add x8, x10, #0x23
+;   ldr x13, [sp, #0x4a8]
+;   add x9, x13, #0x25
+;   ldr x1, [sp, #0x4a0]
+;   add x10, x1, #0x27
+;   ldr x3, [sp, #0x498]
+;   add x11, x3, #0x1f
+;   ldr x6, [sp, #0x490]
+;   add x12, x6, #0x21
 ;   ldr x13, [sp, #0x488]
 ;   add x13, x13, #0x23
 ;   ldr x14, [sp, #0x480]
 ;   add x14, x14, #0x25
 ;   ldr x15, [sp, #0x478]
 ;   add x15, x15, #0x27
-;   ldr x1, [sp, #0x470]
-;   ldr x3, [sp, #0x468]
-;   add x1, x1, x3
+;   ldr x2, [sp, #0x470]
+;   ldr x4, [sp, #0x468]
+;   add x1, x2, x4
 ;   ldr x2, [sp, #0x458]
-;   ldr x6, [sp, #0x460]
-;   add x2, x6, x2
+;   ldr x3, [sp, #0x460]
+;   add x2, x3, x2
 ;   ldr x3, [sp, #0x448]
 ;   ldr x4, [sp, #0x450]
 ;   add x3, x4, x3
diff --git a/cranelift/filetests/filetests/isa/aarch64/tail-call-conv.clif b/cranelift/filetests/filetests/isa/aarch64/tail-call-conv.clif
index 1f5dd3f61..9a9da0b51 100644
--- a/cranelift/filetests/filetests/isa/aarch64/tail-call-conv.clif
+++ b/cranelift/filetests/filetests/isa/aarch64/tail-call-conv.clif
@@ -243,8 +243,8 @@ block0:
 ;   stp x19, x20, [sp, #-16]!
 ;   sub sp, sp, #16
 ; block0:
-;   movz x2, #10
-;   str x2, [sp]
+;   movz x3, #10
+;   str x3, [sp]
 ;   movz x3, #15
 ;   movz x4, #20
 ;   movz x5, #25
@@ -311,8 +311,8 @@ block0:
 ;   stp x19, x20, [sp, #-0x10]!
 ;   sub sp, sp, #0x10
 ; block1: ; offset 0x20
-;   mov x2, #0xa
-;   stur x2, [sp]
+;   mov x3, #0xa
+;   stur x3, [sp]
 ;   mov x3, #0xf
 ;   mov x4, #0x14
 ;   mov x5, #0x19
diff --git a/cranelift/filetests/filetests/isa/aarch64/tls-elf-gd.clif b/cranelift/filetests/filetests/isa/aarch64/tls-elf-gd.clif
index e3761f258..7f185e4b2 100644
--- a/cranelift/filetests/filetests/isa/aarch64/tls-elf-gd.clif
+++ b/cranelift/filetests/filetests/isa/aarch64/tls-elf-gd.clif
@@ -14,10 +14,10 @@ block0(v0: i32):
 ;   stp fp, lr, [sp, #-16]!
 ;   mov fp, sp
 ; block0:
-;   mov x5, x0
+;   mov x6, x0
 ;   elf_tls_get_addr x0, x3, userextname0
 ;   mov x1, x0
-;   mov x0, x5
+;   mov x0, x6
 ;   ldp fp, lr, [sp], #16
 ;   ret
 ;
@@ -26,7 +26,7 @@ block0(v0: i32):
 ;   stp x29, x30, [sp, #-0x10]!
 ;   mov x29, sp
 ; block1: ; offset 0x8
-;   mov x5, x0
+;   mov x6, x0
 ;   adrp x0, #0 ; reloc_external Aarch64TlsDescAdrPage21 u1:0 0
 ;   ldr x3, [x0] ; reloc_external Aarch64TlsDescLd64Lo12 u1:0 0
 ;   add x0, x0, #0 ; reloc_external Aarch64TlsDescAddLo12 u1:0 0
@@ -34,7 +34,7 @@ block0(v0: i32):
 ;   mrs x3, tpidr_el0
 ;   add x0, x0, x3
 ;   mov x1, x0
-;   mov x0, x5
+;   mov x0, x6
 ;   ldp x29, x30, [sp], #0x10
 ;   ret
 
diff --git a/cranelift/filetests/filetests/isa/aarch64/tls-macho.clif b/cranelift/filetests/filetests/isa/aarch64/tls-macho.clif
index 5a74b0948..23a20eb52 100644
--- a/cranelift/filetests/filetests/isa/aarch64/tls-macho.clif
+++ b/cranelift/filetests/filetests/isa/aarch64/tls-macho.clif
@@ -13,21 +13,21 @@ block0(v0: i32):
 ; VCode:
 ;   stp fp, lr, [sp, #-16]!
 ;   mov fp, sp
-;   str x24, [sp, #-16]!
+;   str x25, [sp, #-16]!
 ;   stp d14, d15, [sp, #-16]!
 ;   stp d12, d13, [sp, #-16]!
 ;   stp d10, d11, [sp, #-16]!
 ;   stp d8, d9, [sp, #-16]!
 ; block0:
-;   mov x24, x0
+;   mov x25, x0
 ;   macho_tls_get_addr x0, userextname0
 ;   mov x1, x0
-;   mov x0, x24
+;   mov x0, x25
 ;   ldp d8, d9, [sp], #16
 ;   ldp d10, d11, [sp], #16
 ;   ldp d12, d13, [sp], #16
 ;   ldp d14, d15, [sp], #16
-;   ldr x24, [sp], #16
+;   ldr x25, [sp], #16
 ;   ldp fp, lr, [sp], #16
 ;   ret
 ;
@@ -35,24 +35,24 @@ block0(v0: i32):
 ; block0: ; offset 0x0
 ;   stp x29, x30, [sp, #-0x10]!
 ;   mov x29, sp
-;   str x24, [sp, #-0x10]!
+;   str x25, [sp, #-0x10]!
 ;   stp d14, d15, [sp, #-0x10]!
 ;   stp d12, d13, [sp, #-0x10]!
 ;   stp d10, d11, [sp, #-0x10]!
 ;   stp d8, d9, [sp, #-0x10]!
 ; block1: ; offset 0x1c
-;   mov x24, x0
+;   mov x25, x0
 ;   adrp x0, #0 ; reloc_external MachOAarch64TlsAdrPage21 u1:0 0
 ;   ldr x0, [x0] ; reloc_external MachOAarch64TlsAdrPageOff12 u1:0 0
 ;   ldr x1, [x0]
 ;   blr x1
 ;   mov x1, x0
-;   mov x0, x24
+;   mov x0, x25
 ;   ldp d8, d9, [sp], #0x10
 ;   ldp d10, d11, [sp], #0x10
 ;   ldp d12, d13, [sp], #0x10
 ;   ldp d14, d15, [sp], #0x10
-;   ldr x24, [sp], #0x10
+;   ldr x25, [sp], #0x10
 ;   ldp x29, x30, [sp], #0x10
 ;   ret
 
diff --git a/cranelift/filetests/filetests/isa/aarch64/user_stack_maps.clif b/cranelift/filetests/filetests/isa/aarch64/user_stack_maps.clif
index e51a2e507..531ecb748 100644
--- a/cranelift/filetests/filetests/isa/aarch64/user_stack_maps.clif
+++ b/cranelift/filetests/filetests/isa/aarch64/user_stack_maps.clif
@@ -34,45 +34,39 @@ block0:
 ; VCode:
 ;   stp fp, lr, [sp, #-16]!
 ;   mov fp, sp
-;   str x24, [sp, #-16]!
-;   stp x19, x22, [sp, #-16]!
+;   str x28, [sp, #-16]!
+;   stp x19, x21, [sp, #-16]!
 ;   sub sp, sp, #16
 ; block0:
-;   movz w9, #0
-;   movz w8, #1
-;   movz w0, #2
-;   mov x10, sp
-;   str w9, [x10]
-;   mov x24, x9
+;   movz w19, #0
+;   movz w28, #1
+;   movz w21, #2
+;   mov x8, sp
+;   str w19, [x8]
 ;   add x9, sp, #4
-;   str w8, [x9]
-;   mov x19, x8
+;   str w28, [x9]
 ;   add x10, sp, #8
-;   str w0, [x10]
-;   mov x22, x0
-;   mov x0, x24
+;   str w21, [x10]
+;   mov x0, x19
 ;   bl 0
 ;   ; UserStackMap { by_type: [(types::I32, CompoundBitSet {0, 4, 8})], sp_to_sized_stack_slots: None }
 ;   mov x12, sp
-;   mov x0, x19
-;   str w0, [x12]
+;   str w28, [x12]
 ;   add x13, sp, #4
-;   mov x0, x22
-;   str w0, [x13]
-;   mov x0, x24
+;   str w21, [x13]
+;   mov x0, x19
 ;   bl 0
 ;   ; UserStackMap { by_type: [(types::I32, CompoundBitSet {0, 4})], sp_to_sized_stack_slots: None }
 ;   mov x15, sp
-;   mov x0, x22
-;   str w0, [x15]
-;   mov x0, x19
+;   str w21, [x15]
+;   mov x0, x28
 ;   bl 0
 ;   ; UserStackMap { by_type: [(types::I32, CompoundBitSet {0})], sp_to_sized_stack_slots: None }
-;   mov x0, x22
+;   mov x0, x21
 ;   bl 0
 ;   add sp, sp, #16
-;   ldp x19, x22, [sp], #16
-;   ldr x24, [sp], #16
+;   ldp x19, x21, [sp], #16
+;   ldr x28, [sp], #16
 ;   ldp fp, lr, [sp], #16
 ;   ret
 ;
@@ -80,42 +74,36 @@ block0:
 ; block0: ; offset 0x0
 ;   stp x29, x30, [sp, #-0x10]!
 ;   mov x29, sp
-;   str x24, [sp, #-0x10]!
-;   stp x19, x22, [sp, #-0x10]!
+;   str x28, [sp, #-0x10]!
+;   stp x19, x21, [sp, #-0x10]!
 ;   sub sp, sp, #0x10
 ; block1: ; offset 0x14
-;   mov w9, #0
-;   mov w8, #1
-;   mov w0, #2
-;   mov x10, sp
-;   str w9, [x10]
-;   mov x24, x9
+;   mov w19, #0
+;   mov w28, #1
+;   mov w21, #2
+;   mov x8, sp
+;   str w19, [x8]
 ;   add x9, sp, #4
-;   str w8, [x9]
-;   mov x19, x8
+;   str w28, [x9]
 ;   add x10, sp, #8
-;   str w0, [x10]
-;   mov x22, x0
-;   mov x0, x24
-;   bl #0x48 ; reloc_external Call u0:0 0
-;   mov x12, sp
+;   str w21, [x10]
 ;   mov x0, x19
-;   str w0, [x12]
+;   bl #0x3c ; reloc_external Call u0:0 0
+;   mov x12, sp
+;   str w28, [x12]
 ;   add x13, sp, #4
-;   mov x0, x22
-;   str w0, [x13]
-;   mov x0, x24
-;   bl #0x68 ; reloc_external Call u0:0 0
-;   mov x15, sp
-;   mov x0, x22
-;   str w0, [x15]
+;   str w21, [x13]
 ;   mov x0, x19
-;   bl #0x7c ; reloc_external Call u0:0 0
-;   mov x0, x22
-;   bl #0x84 ; reloc_external Call u0:0 0
+;   bl #0x54 ; reloc_external Call u0:0 0
+;   mov x15, sp
+;   str w21, [x15]
+;   mov x0, x28
+;   bl #0x64 ; reloc_external Call u0:0 0
+;   mov x0, x21
+;   bl #0x6c ; reloc_external Call u0:0 0
 ;   add sp, sp, #0x10
-;   ldp x19, x22, [sp], #0x10
-;   ldr x24, [sp], #0x10
+;   ldp x19, x21, [sp], #0x10
+;   ldr x28, [sp], #0x10
 ;   ldp x29, x30, [sp], #0x10
 ;   ret
 
@@ -142,39 +130,39 @@ block0(v0: i8, v1: i16, v2: i32, v3: i64, v4: f32, v5: f64):
 ; VCode:
 ;   stp fp, lr, [sp, #-16]!
 ;   mov fp, sp
-;   stp x23, x27, [sp, #-16]!
-;   stp x20, x21, [sp, #-16]!
+;   stp x23, x26, [sp, #-16]!
+;   stp x19, x21, [sp, #-16]!
 ;   sub sp, sp, #128
 ; block0:
 ;   mov x12, sp
 ;   strb w0, [x12]
-;   mov x23, x0
+;   mov x21, x0
 ;   add x13, sp, #8
 ;   strh w1, [x13]
-;   mov x20, x1
+;   mov x26, x1
 ;   add x14, sp, #16
 ;   str w2, [x14]
-;   mov x21, x2
+;   mov x23, x2
 ;   add x15, sp, #20
 ;   str s0, [x15]
 ;   str q0, [sp, #96]
 ;   add x0, sp, #24
 ;   str x3, [x0]
-;   mov x27, x3
+;   mov x19, x3
 ;   add x1, sp, #32
 ;   str d1, [x1]
 ;   str q1, [sp, #112]
 ;   bl 0
 ;   ; UserStackMap { by_type: [(types::I8, CompoundBitSet {0}), (types::I16, CompoundBitSet {8}), (types::I32, CompoundBitSet {16}), (types::F32, CompoundBitSet {20}), (types::I64, CompoundBitSet {24}), (types::F64, CompoundBitSet {32})], sp_to_sized_stack_slots: None }
-;   mov x0, x23
-;   mov x1, x20
-;   mov x2, x21
-;   mov x3, x27
+;   mov x0, x21
+;   mov x1, x26
+;   mov x2, x23
+;   mov x3, x19
 ;   ldr q0, [sp, #96]
 ;   ldr q1, [sp, #112]
 ;   add sp, sp, #128
-;   ldp x20, x21, [sp], #16
-;   ldp x23, x27, [sp], #16
+;   ldp x19, x21, [sp], #16
+;   ldp x23, x26, [sp], #16
 ;   ldp fp, lr, [sp], #16
 ;   ret
 ;
@@ -182,38 +170,38 @@ block0(v0: i8, v1: i16, v2: i32, v3: i64, v4: f32, v5: f64):
 ; block0: ; offset 0x0
 ;   stp x29, x30, [sp, #-0x10]!
 ;   mov x29, sp
-;   stp x23, x27, [sp, #-0x10]!
-;   stp x20, x21, [sp, #-0x10]!
+;   stp x23, x26, [sp, #-0x10]!
+;   stp x19, x21, [sp, #-0x10]!
 ;   sub sp, sp, #0x80
 ; block1: ; offset 0x14
 ;   mov x12, sp
 ;   strb w0, [x12]
-;   mov x23, x0
+;   mov x21, x0
 ;   add x13, sp, #8
 ;   strh w1, [x13]
-;   mov x20, x1
+;   mov x26, x1
 ;   add x14, sp, #0x10
 ;   str w2, [x14]
-;   mov x21, x2
+;   mov x23, x2
 ;   add x15, sp, #0x14
 ;   str s0, [x15]
 ;   stur q0, [sp, #0x60]
 ;   add x0, sp, #0x18
 ;   str x3, [x0]
-;   mov x27, x3
+;   mov x19, x3
 ;   add x1, sp, #0x20
 ;   str d1, [x1]
 ;   stur q1, [sp, #0x70]
 ;   bl #0x5c ; reloc_external Call u0:0 0
-;   mov x0, x23
-;   mov x1, x20
-;   mov x2, x21
-;   mov x3, x27
+;   mov x0, x21
+;   mov x1, x26
+;   mov x2, x23
+;   mov x3, x19
 ;   ldur q0, [sp, #0x60]
 ;   ldur q1, [sp, #0x70]
 ;   add sp, sp, #0x80
-;   ldp x20, x21, [sp], #0x10
-;   ldp x23, x27, [sp], #0x10
+;   ldp x19, x21, [sp], #0x10
+;   ldp x23, x26, [sp], #0x10
 ;   ldp x29, x30, [sp], #0x10
 ;   ret
 
diff --git a/cranelift/filetests/filetests/isa/pulley32/call.clif b/cranelift/filetests/filetests/isa/pulley32/call.clif
index d1f2dfe9a..d02583907 100644
--- a/cranelift/filetests/filetests/isa/pulley32/call.clif
+++ b/cranelift/filetests/filetests/isa/pulley32/call.clif
@@ -19,7 +19,7 @@ block0:
 ;   x29 = xmov x27
 ; block0:
 ;   x0 = xconst8 0
-;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }], defs: [CallRetPair { vreg: Writable { reg: p0i }, preg: p0i }], clobbers: PRegSet { bits: [1204185006387685820006398, 4294967295] }, callee_pop_size: 0 }
+;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }], defs: [CallRetPair { vreg: Writable { reg: p0i }, preg: p0i }], clobbers: PRegSet { bits: [65534, 65279, 4294967295, 0] }, callee_pop_size: 0 }
 ;   x0 = xconst8 1
 ;   x28 = load64_u sp+8 // flags = notrap aligned
 ;   x29 = load64_u sp+0 // flags = notrap aligned
@@ -60,7 +60,7 @@ block0:
 ;   x29 = xmov x27
 ; block0:
 ;   x0 = xconst8 0
-;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }], defs: [CallRetPair { vreg: Writable { reg: p0i }, preg: p0i }], clobbers: PRegSet { bits: [1204185006387685820006398, 4294967295] }, callee_pop_size: 0 }
+;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }], defs: [CallRetPair { vreg: Writable { reg: p0i }, preg: p0i }], clobbers: PRegSet { bits: [65534, 65279, 4294967295, 0] }, callee_pop_size: 0 }
 ;   x0 = xconst8 1
 ;   x28 = load64_u sp+8 // flags = notrap aligned
 ;   x29 = load64_u sp+0 // flags = notrap aligned
@@ -106,7 +106,7 @@ block0:
 ;   x1 = xconst8 1
 ;   x2 = xconst8 2
 ;   x3 = xconst8 3
-;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }, CallArgPair { vreg: p1i, preg: p1i }, CallArgPair { vreg: p2i, preg: p2i }, CallArgPair { vreg: p3i, preg: p3i }], defs: [], clobbers: PRegSet { bits: [1204185006387685820006399, 4294967295] }, callee_pop_size: 0 }
+;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }, CallArgPair { vreg: p1i, preg: p1i }, CallArgPair { vreg: p2i, preg: p2i }, CallArgPair { vreg: p3i, preg: p3i }], defs: [], clobbers: PRegSet { bits: [65535, 65279, 4294967295, 0] }, callee_pop_size: 0 }
 ;   x28 = load64_u sp+8 // flags = notrap aligned
 ;   x29 = load64_u sp+0 // flags = notrap aligned
 ;   x30 = xconst8 16
@@ -148,7 +148,7 @@ block0:
 ;   store64 sp+0, x29 // flags =  notrap aligned
 ;   x29 = xmov x27
 ; block0:
-;   call TestCase(%g), CallInfo { uses: [], defs: [CallRetPair { vreg: Writable { reg: p0i }, preg: p0i }, CallRetPair { vreg: Writable { reg: p1i }, preg: p1i }, CallRetPair { vreg: Writable { reg: p2i }, preg: p2i }, CallRetPair { vreg: Writable { reg: p3i }, preg: p3i }], clobbers: PRegSet { bits: [1204185006387685820006384, 4294967295] }, callee_pop_size: 0 }
+;   call TestCase(%g), CallInfo { uses: [], defs: [CallRetPair { vreg: Writable { reg: p0i }, preg: p0i }, CallRetPair { vreg: Writable { reg: p1i }, preg: p1i }, CallRetPair { vreg: Writable { reg: p2i }, preg: p2i }, CallRetPair { vreg: Writable { reg: p3i }, preg: p3i }], clobbers: PRegSet { bits: [65520, 65279, 4294967295, 0] }, callee_pop_size: 0 }
 ;   x4 = xadd64 x0, x2
 ;   x3 = xadd64 x1, x3
 ;   x0 = xadd64 x4, x3
@@ -214,7 +214,7 @@ block0:
 ;   x12 = xmov x15
 ;   x13 = xmov x15
 ;   x14 = xmov x15
-;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }, CallArgPair { vreg: p1i, preg: p1i }, CallArgPair { vreg: p2i, preg: p2i }, CallArgPair { vreg: p3i, preg: p3i }, CallArgPair { vreg: p4i, preg: p4i }, CallArgPair { vreg: p5i, preg: p5i }, CallArgPair { vreg: p6i, preg: p6i }, CallArgPair { vreg: p7i, preg: p7i }, CallArgPair { vreg: p8i, preg: p8i }, CallArgPair { vreg: p9i, preg: p9i }, CallArgPair { vreg: p10i, preg: p10i }, CallArgPair { vreg: p11i, preg: p11i }, CallArgPair { vreg: p12i, preg: p12i }, CallArgPair { vreg: p13i, preg: p13i }, CallArgPair { vreg: p14i, preg: p14i }, CallArgPair { vreg: p15i, preg: p15i }], defs: [], clobbers: PRegSet { bits: [1204185006387685820006399, 4294967295] }, callee_pop_size: 0 }
+;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }, CallArgPair { vreg: p1i, preg: p1i }, CallArgPair { vreg: p2i, preg: p2i }, CallArgPair { vreg: p3i, preg: p3i }, CallArgPair { vreg: p4i, preg: p4i }, CallArgPair { vreg: p5i, preg: p5i }, CallArgPair { vreg: p6i, preg: p6i }, CallArgPair { vreg: p7i, preg: p7i }, CallArgPair { vreg: p8i, preg: p8i }, CallArgPair { vreg: p9i, preg: p9i }, CallArgPair { vreg: p10i, preg: p10i }, CallArgPair { vreg: p11i, preg: p11i }, CallArgPair { vreg: p12i, preg: p12i }, CallArgPair { vreg: p13i, preg: p13i }, CallArgPair { vreg: p14i, preg: p14i }, CallArgPair { vreg: p15i, preg: p15i }], defs: [], clobbers: PRegSet { bits: [65535, 65279, 4294967295, 0] }, callee_pop_size: 0 }
 ;   x30 = xconst8 48
 ;   x27 = xadd32 x27, x30
 ;   x28 = load64_u sp+8 // flags = notrap aligned
@@ -310,7 +310,7 @@ block0:
 ;   store64 sp+48, x18 // flags =  notrap aligned
 ; block0:
 ;   x0 = load_addr OutgoingArg(0)
-;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }], defs: [CallRetPair { vreg: Writable { reg: p0i }, preg: p0i }, CallRetPair { vreg: Writable { reg: p1i }, preg: p1i }, CallRetPair { vreg: Writable { reg: p2i }, preg: p2i }, CallRetPair { vreg: Writable { reg: p3i }, preg: p3i }, CallRetPair { vreg: Writable { reg: p4i }, preg: p4i }, CallRetPair { vreg: Writable { reg: p5i }, preg: p5i }, CallRetPair { vreg: Writable { reg: p6i }, preg: p6i }, CallRetPair { vreg: Writable { reg: p7i }, preg: p7i }, CallRetPair { vreg: Writable { reg: p8i }, preg: p8i }, CallRetPair { vreg: Writable { reg: p9i }, preg: p9i }, CallRetPair { vreg: Writable { reg: p10i }, preg: p10i }, CallRetPair { vreg: Writable { reg: p11i }, preg: p11i }, CallRetPair { vreg: Writable { reg: p12i }, preg: p12i }, CallRetPair { vreg: Writable { reg: p13i }, preg: p13i }, CallRetPair { vreg: Writable { reg: p14i }, preg: p14i }, CallRetPair { vreg: Writable { reg: p15i }, preg: p15i }], clobbers: PRegSet { bits: [1204185006387685819940864, 4294967295] }, callee_pop_size: 0 }
+;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }], defs: [CallRetPair { vreg: Writable { reg: p0i }, preg: p0i }, CallRetPair { vreg: Writable { reg: p1i }, preg: p1i }, CallRetPair { vreg: Writable { reg: p2i }, preg: p2i }, CallRetPair { vreg: Writable { reg: p3i }, preg: p3i }, CallRetPair { vreg: Writable { reg: p4i }, preg: p4i }, CallRetPair { vreg: Writable { reg: p5i }, preg: p5i }, CallRetPair { vreg: Writable { reg: p6i }, preg: p6i }, CallRetPair { vreg: Writable { reg: p7i }, preg: p7i }, CallRetPair { vreg: Writable { reg: p8i }, preg: p8i }, CallRetPair { vreg: Writable { reg: p9i }, preg: p9i }, CallRetPair { vreg: Writable { reg: p10i }, preg: p10i }, CallRetPair { vreg: Writable { reg: p11i }, preg: p11i }, CallRetPair { vreg: Writable { reg: p12i }, preg: p12i }, CallRetPair { vreg: Writable { reg: p13i }, preg: p13i }, CallRetPair { vreg: Writable { reg: p14i }, preg: p14i }, CallRetPair { vreg: Writable { reg: p15i }, preg: p15i }], clobbers: PRegSet { bits: [0, 65279, 4294967295, 0] }, callee_pop_size: 0 }
 ;   x16 = xmov x13
 ;   x18 = xmov x11
 ;   x25 = load64_u OutgoingArg(0) // flags = notrap aligned
diff --git a/cranelift/filetests/filetests/isa/pulley64/call.clif b/cranelift/filetests/filetests/isa/pulley64/call.clif
index b787b0a58..daefab228 100644
--- a/cranelift/filetests/filetests/isa/pulley64/call.clif
+++ b/cranelift/filetests/filetests/isa/pulley64/call.clif
@@ -19,7 +19,7 @@ block0:
 ;   x29 = xmov x27
 ; block0:
 ;   x0 = xconst8 0
-;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }], defs: [CallRetPair { vreg: Writable { reg: p0i }, preg: p0i }], clobbers: PRegSet { bits: [1204185006387685820006398, 4294967295] }, callee_pop_size: 0 }
+;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }], defs: [CallRetPair { vreg: Writable { reg: p0i }, preg: p0i }], clobbers: PRegSet { bits: [65534, 65279, 4294967295, 0] }, callee_pop_size: 0 }
 ;   x0 = xconst8 1
 ;   x28 = load64_u sp+8 // flags = notrap aligned
 ;   x29 = load64_u sp+0 // flags = notrap aligned
@@ -60,7 +60,7 @@ block0:
 ;   x29 = xmov x27
 ; block0:
 ;   x0 = xconst8 0
-;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }], defs: [CallRetPair { vreg: Writable { reg: p0i }, preg: p0i }], clobbers: PRegSet { bits: [1204185006387685820006398, 4294967295] }, callee_pop_size: 0 }
+;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }], defs: [CallRetPair { vreg: Writable { reg: p0i }, preg: p0i }], clobbers: PRegSet { bits: [65534, 65279, 4294967295, 0] }, callee_pop_size: 0 }
 ;   x0 = xconst8 1
 ;   x28 = load64_u sp+8 // flags = notrap aligned
 ;   x29 = load64_u sp+0 // flags = notrap aligned
@@ -106,7 +106,7 @@ block0:
 ;   x1 = xconst8 1
 ;   x2 = xconst8 2
 ;   x3 = xconst8 3
-;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }, CallArgPair { vreg: p1i, preg: p1i }, CallArgPair { vreg: p2i, preg: p2i }, CallArgPair { vreg: p3i, preg: p3i }], defs: [], clobbers: PRegSet { bits: [1204185006387685820006399, 4294967295] }, callee_pop_size: 0 }
+;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }, CallArgPair { vreg: p1i, preg: p1i }, CallArgPair { vreg: p2i, preg: p2i }, CallArgPair { vreg: p3i, preg: p3i }], defs: [], clobbers: PRegSet { bits: [65535, 65279, 4294967295, 0] }, callee_pop_size: 0 }
 ;   x28 = load64_u sp+8 // flags = notrap aligned
 ;   x29 = load64_u sp+0 // flags = notrap aligned
 ;   x30 = xconst8 16
@@ -148,7 +148,7 @@ block0:
 ;   store64 sp+0, x29 // flags =  notrap aligned
 ;   x29 = xmov x27
 ; block0:
-;   call TestCase(%g), CallInfo { uses: [], defs: [CallRetPair { vreg: Writable { reg: p0i }, preg: p0i }, CallRetPair { vreg: Writable { reg: p1i }, preg: p1i }, CallRetPair { vreg: Writable { reg: p2i }, preg: p2i }, CallRetPair { vreg: Writable { reg: p3i }, preg: p3i }], clobbers: PRegSet { bits: [1204185006387685820006384, 4294967295] }, callee_pop_size: 0 }
+;   call TestCase(%g), CallInfo { uses: [], defs: [CallRetPair { vreg: Writable { reg: p0i }, preg: p0i }, CallRetPair { vreg: Writable { reg: p1i }, preg: p1i }, CallRetPair { vreg: Writable { reg: p2i }, preg: p2i }, CallRetPair { vreg: Writable { reg: p3i }, preg: p3i }], clobbers: PRegSet { bits: [65520, 65279, 4294967295, 0] }, callee_pop_size: 0 }
 ;   x4 = xadd64 x0, x2
 ;   x3 = xadd64 x1, x3
 ;   x0 = xadd64 x4, x3
@@ -214,7 +214,7 @@ block0:
 ;   x12 = xmov x15
 ;   x13 = xmov x15
 ;   x14 = xmov x15
-;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }, CallArgPair { vreg: p1i, preg: p1i }, CallArgPair { vreg: p2i, preg: p2i }, CallArgPair { vreg: p3i, preg: p3i }, CallArgPair { vreg: p4i, preg: p4i }, CallArgPair { vreg: p5i, preg: p5i }, CallArgPair { vreg: p6i, preg: p6i }, CallArgPair { vreg: p7i, preg: p7i }, CallArgPair { vreg: p8i, preg: p8i }, CallArgPair { vreg: p9i, preg: p9i }, CallArgPair { vreg: p10i, preg: p10i }, CallArgPair { vreg: p11i, preg: p11i }, CallArgPair { vreg: p12i, preg: p12i }, CallArgPair { vreg: p13i, preg: p13i }, CallArgPair { vreg: p14i, preg: p14i }, CallArgPair { vreg: p15i, preg: p15i }], defs: [], clobbers: PRegSet { bits: [1204185006387685820006399, 4294967295] }, callee_pop_size: 0 }
+;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }, CallArgPair { vreg: p1i, preg: p1i }, CallArgPair { vreg: p2i, preg: p2i }, CallArgPair { vreg: p3i, preg: p3i }, CallArgPair { vreg: p4i, preg: p4i }, CallArgPair { vreg: p5i, preg: p5i }, CallArgPair { vreg: p6i, preg: p6i }, CallArgPair { vreg: p7i, preg: p7i }, CallArgPair { vreg: p8i, preg: p8i }, CallArgPair { vreg: p9i, preg: p9i }, CallArgPair { vreg: p10i, preg: p10i }, CallArgPair { vreg: p11i, preg: p11i }, CallArgPair { vreg: p12i, preg: p12i }, CallArgPair { vreg: p13i, preg: p13i }, CallArgPair { vreg: p14i, preg: p14i }, CallArgPair { vreg: p15i, preg: p15i }], defs: [], clobbers: PRegSet { bits: [65535, 65279, 4294967295, 0] }, callee_pop_size: 0 }
 ;   x30 = xconst8 48
 ;   x27 = xadd32 x27, x30
 ;   x28 = load64_u sp+8 // flags = notrap aligned
@@ -310,7 +310,7 @@ block0:
 ;   store64 sp+48, x18 // flags =  notrap aligned
 ; block0:
 ;   x0 = load_addr OutgoingArg(0)
-;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }], defs: [CallRetPair { vreg: Writable { reg: p0i }, preg: p0i }, CallRetPair { vreg: Writable { reg: p1i }, preg: p1i }, CallRetPair { vreg: Writable { reg: p2i }, preg: p2i }, CallRetPair { vreg: Writable { reg: p3i }, preg: p3i }, CallRetPair { vreg: Writable { reg: p4i }, preg: p4i }, CallRetPair { vreg: Writable { reg: p5i }, preg: p5i }, CallRetPair { vreg: Writable { reg: p6i }, preg: p6i }, CallRetPair { vreg: Writable { reg: p7i }, preg: p7i }, CallRetPair { vreg: Writable { reg: p8i }, preg: p8i }, CallRetPair { vreg: Writable { reg: p9i }, preg: p9i }, CallRetPair { vreg: Writable { reg: p10i }, preg: p10i }, CallRetPair { vreg: Writable { reg: p11i }, preg: p11i }, CallRetPair { vreg: Writable { reg: p12i }, preg: p12i }, CallRetPair { vreg: Writable { reg: p13i }, preg: p13i }, CallRetPair { vreg: Writable { reg: p14i }, preg: p14i }, CallRetPair { vreg: Writable { reg: p15i }, preg: p15i }], clobbers: PRegSet { bits: [1204185006387685819940864, 4294967295] }, callee_pop_size: 0 }
+;   call TestCase(%g), CallInfo { uses: [CallArgPair { vreg: p0i, preg: p0i }], defs: [CallRetPair { vreg: Writable { reg: p0i }, preg: p0i }, CallRetPair { vreg: Writable { reg: p1i }, preg: p1i }, CallRetPair { vreg: Writable { reg: p2i }, preg: p2i }, CallRetPair { vreg: Writable { reg: p3i }, preg: p3i }, CallRetPair { vreg: Writable { reg: p4i }, preg: p4i }, CallRetPair { vreg: Writable { reg: p5i }, preg: p5i }, CallRetPair { vreg: Writable { reg: p6i }, preg: p6i }, CallRetPair { vreg: Writable { reg: p7i }, preg: p7i }, CallRetPair { vreg: Writable { reg: p8i }, preg: p8i }, CallRetPair { vreg: Writable { reg: p9i }, preg: p9i }, CallRetPair { vreg: Writable { reg: p10i }, preg: p10i }, CallRetPair { vreg: Writable { reg: p11i }, preg: p11i }, CallRetPair { vreg: Writable { reg: p12i }, preg: p12i }, CallRetPair { vreg: Writable { reg: p13i }, preg: p13i }, CallRetPair { vreg: Writable { reg: p14i }, preg: p14i }, CallRetPair { vreg: Writable { reg: p15i }, preg: p15i }], clobbers: PRegSet { bits: [0, 65279, 4294967295, 0] }, callee_pop_size: 0 }
 ;   x16 = xmov x13
 ;   x18 = xmov x11
 ;   x25 = load64_u OutgoingArg(0) // flags = notrap aligned
diff --git a/cranelift/filetests/filetests/isa/riscv64/amodes.clif b/cranelift/filetests/filetests/isa/riscv64/amodes.clif
index 545eaf7ce..678b86f30 100644
--- a/cranelift/filetests/filetests/isa/riscv64/amodes.clif
+++ b/cranelift/filetests/filetests/isa/riscv64/amodes.clif
@@ -387,21 +387,19 @@ block0(v0: i64):
 ; VCode:
 ; block0:
 ;   ld a2,0(a0)
-;   mv a4,a2
 ;   ld a1,8(a0)
 ;   sd a2,0(a0)
 ;   sd a1,8(a0)
-;   mv a0,a4
+;   mv a0,a2
 ;   ret
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   ld a2, 0(a0) ; trap: heap_oob
-;   mv a4, a2
 ;   ld a1, 8(a0) ; trap: heap_oob
 ;   sd a2, 0(a0) ; trap: heap_oob
 ;   sd a1, 8(a0) ; trap: heap_oob
-;   mv a0, a4
+;   mv a0, a2
 ;   ret
 
 function %i128_imm_offset(i64) -> i128 {
@@ -414,21 +412,19 @@ block0(v0: i64):
 ; VCode:
 ; block0:
 ;   ld a2,16(a0)
-;   mv a4,a2
 ;   ld a1,24(a0)
 ;   sd a2,16(a0)
 ;   sd a1,24(a0)
-;   mv a0,a4
+;   mv a0,a2
 ;   ret
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   ld a2, 0x10(a0) ; trap: heap_oob
-;   mv a4, a2
 ;   ld a1, 0x18(a0) ; trap: heap_oob
 ;   sd a2, 0x10(a0) ; trap: heap_oob
 ;   sd a1, 0x18(a0) ; trap: heap_oob
-;   mv a0, a4
+;   mv a0, a2
 ;   ret
 
 function %i128_imm_offset_large(i64) -> i128 {
@@ -441,21 +437,19 @@ block0(v0: i64):
 ; VCode:
 ; block0:
 ;   ld a2,504(a0)
-;   mv a4,a2
 ;   ld a1,512(a0)
 ;   sd a2,504(a0)
 ;   sd a1,512(a0)
-;   mv a0,a4
+;   mv a0,a2
 ;   ret
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   ld a2, 0x1f8(a0) ; trap: heap_oob
-;   mv a4, a2
 ;   ld a1, 0x200(a0) ; trap: heap_oob
 ;   sd a2, 0x1f8(a0) ; trap: heap_oob
 ;   sd a1, 0x200(a0) ; trap: heap_oob
-;   mv a0, a4
+;   mv a0, a2
 ;   ret
 
 function %i128_imm_offset_negative_large(i64) -> i128 {
@@ -468,21 +462,19 @@ block0(v0: i64):
 ; VCode:
 ; block0:
 ;   ld a2,-512(a0)
-;   mv a4,a2
 ;   ld a1,-504(a0)
 ;   sd a2,-512(a0)
 ;   sd a1,-504(a0)
-;   mv a0,a4
+;   mv a0,a2
 ;   ret
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   ld a2, -0x200(a0) ; trap: heap_oob
-;   mv a4, a2
 ;   ld a1, -0x1f8(a0) ; trap: heap_oob
 ;   sd a2, -0x200(a0) ; trap: heap_oob
 ;   sd a1, -0x1f8(a0) ; trap: heap_oob
-;   mv a0, a4
+;   mv a0, a2
 ;   ret
 
 function %i128_add_offset(i64) -> i128 {
@@ -496,21 +488,19 @@ block0(v0: i64):
 ; VCode:
 ; block0:
 ;   ld a2,32(a0)
-;   mv a4,a2
 ;   ld a1,40(a0)
 ;   sd a2,32(a0)
 ;   sd a1,40(a0)
-;   mv a0,a4
+;   mv a0,a2
 ;   ret
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   ld a2, 0x20(a0) ; trap: heap_oob
-;   mv a4, a2
 ;   ld a1, 0x28(a0) ; trap: heap_oob
 ;   sd a2, 0x20(a0) ; trap: heap_oob
 ;   sd a1, 0x28(a0) ; trap: heap_oob
-;   mv a0, a4
+;   mv a0, a2
 ;   ret
 
 function %i128_32bit_sextend_simple(i32) -> i128 {
@@ -554,11 +544,10 @@ block0(v0: i64, v1: i32):
 ;   sext.w a1,a1
 ;   add a0,a0,a1
 ;   ld a5,24(a0)
-;   mv a2,a5
 ;   ld a1,32(a0)
 ;   sd a5,24(a0)
 ;   sd a1,32(a0)
-;   mv a0,a2
+;   mv a0,a5
 ;   ret
 ;
 ; Disassembled:
@@ -566,11 +555,10 @@ block0(v0: i64, v1: i32):
 ;   sext.w a1, a1
 ;   add a0, a0, a1
 ;   ld a5, 0x18(a0) ; trap: heap_oob
-;   mv a2, a5
 ;   ld a1, 0x20(a0) ; trap: heap_oob
 ;   sd a5, 0x18(a0) ; trap: heap_oob
 ;   sd a1, 0x20(a0) ; trap: heap_oob
-;   mv a0, a2
+;   mv a0, a5
 ;   ret
 
 function %load_from_get_stack_pointer() -> i64 {
diff --git a/cranelift/filetests/filetests/isa/riscv64/arithmetic.clif b/cranelift/filetests/filetests/isa/riscv64/arithmetic.clif
index 9f20971c8..775137e8f 100644
--- a/cranelift/filetests/filetests/isa/riscv64/arithmetic.clif
+++ b/cranelift/filetests/filetests/isa/riscv64/arithmetic.clif
@@ -587,21 +587,19 @@ block0(v0: i128, v1: i128):
 ; VCode:
 ; block0:
 ;   sub a5,a0,a2
-;   mv a4,a5
-;   sltu a2,a0,a4
-;   mv a0,a4
+;   sltu a2,a0,a5
 ;   sub a3,a1,a3
 ;   sub a1,a3,a2
+;   mv a0,a5
 ;   ret
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   sub a5, a0, a2
-;   mv a4, a5
-;   sltu a2, a0, a4
-;   mv a0, a4
+;   sltu a2, a0, a5
 ;   sub a3, a1, a3
 ;   sub a1, a3, a2
+;   mv a0, a5
 ;   ret
 
 function %add_mul_2(i32, i32, i32) -> i32 {
diff --git a/cranelift/filetests/filetests/isa/riscv64/bitrev.clif b/cranelift/filetests/filetests/isa/riscv64/bitrev.clif
index 83b8c91fa..2d0351644 100644
--- a/cranelift/filetests/filetests/isa/riscv64/bitrev.clif
+++ b/cranelift/filetests/filetests/isa/riscv64/bitrev.clif
@@ -361,12 +361,6 @@ block0(v0: i128):
 }
 
 ; VCode:
-;   addi sp,sp,-16
-;   sd ra,8(sp)
-;   sd fp,0(sp)
-;   mv fp,sp
-;   addi sp,sp,-16
-;   sd s3,8(sp)
 ; block0:
 ;   slli a3,a1,8
 ;   srli a5,a1,8
@@ -404,60 +398,47 @@ block0(v0: i128):
 ;   srli a4,a1,32
 ;   or a5,a3,a4
 ;   brev8 a4,a5##tmp=a1 tmp2=a2 step=a3 ty=i64
-;   mv s3,a4
 ;   slli a1,a0,8
 ;   srli a2,a0,8
-;   slli a4,a2,56
-;   srli a2,a4,56
+;   slli a5,a2,56
+;   srli a2,a5,56
 ;   or a2,a1,a2
-;   slli a4,a2,16
+;   slli a5,a2,16
 ;   srli a1,a0,16
 ;   slli a2,a1,8
-;   srli a5,a1,8
-;   slli a1,a5,56
+;   srli a1,a1,8
+;   slli a1,a1,56
 ;   srli a3,a1,56
-;   or a5,a2,a3
-;   slli a1,a5,48
+;   or a1,a2,a3
+;   slli a1,a1,48
 ;   srli a2,a1,48
-;   or a4,a4,a2
-;   slli a1,a4,32
+;   or a5,a5,a2
+;   slli a1,a5,32
 ;   srli a3,a0,32
-;   slli a4,a3,8
+;   slli a5,a3,8
 ;   srli a0,a3,8
 ;   slli a2,a0,56
-;   srli a5,a2,56
-;   or a0,a4,a5
+;   srli a0,a2,56
+;   or a0,a5,a0
 ;   slli a2,a0,16
-;   srli a4,a3,16
-;   slli a0,a4,8
-;   srli a3,a4,8
-;   slli a4,a3,56
-;   srli a3,a4,56
+;   srli a5,a3,16
+;   slli a0,a5,8
+;   srli a3,a5,8
+;   slli a5,a3,56
+;   srli a3,a5,56
 ;   or a3,a0,a3
-;   slli a4,a3,48
-;   srli a0,a4,48
+;   slli a5,a3,48
+;   srli a0,a5,48
 ;   or a2,a2,a0
-;   slli a4,a2,32
-;   srli a0,a4,32
-;   or a2,a1,a0
-;   brev8 a1,a2##tmp=a4 tmp2=a5 step=a0 ty=i64
-;   mv a0,s3
-;   ld s3,8(sp)
-;   addi sp,sp,16
-;   ld ra,8(sp)
-;   ld fp,0(sp)
-;   addi sp,sp,16
+;   slli a5,a2,32
+;   srli a0,a5,32
+;   or a3,a1,a0
+;   brev8 a1,a3##tmp=a2 tmp2=a5 step=a0 ty=i64
+;   mv a0,a4
 ;   ret
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
-;   addi sp, sp, -0x10
-;   sd ra, 8(sp)
-;   sd s0, 0(sp)
-;   mv s0, sp
-;   addi sp, sp, -0x10
-;   sd s3, 8(sp)
-; block1: ; offset 0x18
 ;   slli a3, a1, 8
 ;   srli a5, a1, 8
 ;   slli a2, a5, 0x38
@@ -512,54 +493,53 @@ block0(v0: i128):
 ;   j -0x28
 ;   slli a2, a2, 1
 ;   j -0x30
-;   mv s3, a4
 ;   slli a1, a0, 8
 ;   srli a2, a0, 8
-;   slli a4, a2, 0x38
-;   srli a2, a4, 0x38
+;   slli a5, a2, 0x38
+;   srli a2, a5, 0x38
 ;   or a2, a1, a2
-;   slli a4, a2, 0x10
+;   slli a5, a2, 0x10
 ;   srli a1, a0, 0x10
 ;   slli a2, a1, 8
-;   srli a5, a1, 8
-;   slli a1, a5, 0x38
+;   srli a1, a1, 8
+;   slli a1, a1, 0x38
 ;   srli a3, a1, 0x38
-;   or a5, a2, a3
-;   slli a1, a5, 0x30
+;   or a1, a2, a3
+;   slli a1, a1, 0x30
 ;   srli a2, a1, 0x30
-;   or a4, a4, a2
-;   slli a1, a4, 0x20
+;   or a5, a5, a2
+;   slli a1, a5, 0x20
 ;   srli a3, a0, 0x20
-;   slli a4, a3, 8
+;   slli a5, a3, 8
 ;   srli a0, a3, 8
 ;   slli a2, a0, 0x38
-;   srli a5, a2, 0x38
-;   or a0, a4, a5
+;   srli a0, a2, 0x38
+;   or a0, a5, a0
 ;   slli a2, a0, 0x10
-;   srli a4, a3, 0x10
-;   slli a0, a4, 8
-;   srli a3, a4, 8
-;   slli a4, a3, 0x38
-;   srli a3, a4, 0x38
+;   srli a5, a3, 0x10
+;   slli a0, a5, 8
+;   srli a3, a5, 8
+;   slli a5, a3, 0x38
+;   srli a3, a5, 0x38
 ;   or a3, a0, a3
-;   slli a4, a3, 0x30
-;   srli a0, a4, 0x30
+;   slli a5, a3, 0x30
+;   srli a0, a5, 0x30
 ;   or a2, a2, a0
-;   slli a4, a2, 0x20
-;   srli a0, a4, 0x20
-;   or a2, a1, a0
+;   slli a5, a2, 0x20
+;   srli a0, a5, 0x20
+;   or a3, a1, a0
 ;   mv a1, zero
 ;   addi a0, zero, 0x40
-;   addi a4, zero, 1
-;   slli a4, a4, 0x3f
+;   addi a2, zero, 1
+;   slli a2, a2, 0x3f
 ;   addi a5, zero, 1
 ;   slli a5, a5, 0x38
 ;   blez a0, 0x34
-;   and t5, a4, a2
+;   and t5, a2, a3
 ;   beq zero, t5, 8
 ;   or a1, a1, a5
 ;   addi a0, a0, -1
-;   srli a4, a4, 1
+;   srli a2, a2, 1
 ;   addi t5, zero, 8
 ;   rem t5, a0, t5
 ;   bnez t5, 0xc
@@ -567,11 +547,6 @@ block0(v0: i128):
 ;   j -0x28
 ;   slli a5, a5, 1
 ;   j -0x30
-;   mv a0, s3
-;   ld s3, 8(sp)
-;   addi sp, sp, 0x10
-;   ld ra, 8(sp)
-;   ld s0, 0(sp)
-;   addi sp, sp, 0x10
+;   mv a0, a4
 ;   ret
 
diff --git a/cranelift/filetests/filetests/isa/riscv64/bswap.clif b/cranelift/filetests/filetests/isa/riscv64/bswap.clif
index cbcfe12e5..400728455 100644
--- a/cranelift/filetests/filetests/isa/riscv64/bswap.clif
+++ b/cranelift/filetests/filetests/isa/riscv64/bswap.clif
@@ -197,43 +197,42 @@ block0(v0: i128):
 ;   slli a1,a5,32
 ;   srli a4,a1,32
 ;   or a5,a3,a4
-;   mv t1,a5
 ;   slli a1,a0,8
 ;   srli a3,a0,8
-;   slli a5,a3,56
-;   srli a2,a5,56
+;   slli a2,a3,56
+;   srli a2,a2,56
 ;   or a3,a1,a2
-;   slli a5,a3,16
-;   srli a1,a0,16
-;   slli a3,a1,8
-;   srli a1,a1,8
-;   slli a1,a1,56
-;   srli a4,a1,56
-;   or a1,a3,a4
-;   slli a1,a1,48
-;   srli a3,a1,48
-;   or a5,a5,a3
-;   slli a1,a5,32
+;   slli a1,a3,16
+;   srli a2,a0,16
+;   slli a3,a2,8
+;   srli a2,a2,8
+;   slli a2,a2,56
+;   srli a4,a2,56
+;   or a2,a3,a4
+;   slli a2,a2,48
+;   srli a3,a2,48
+;   or a1,a1,a3
+;   slli a1,a1,32
 ;   srli a4,a0,32
-;   slli a5,a4,8
+;   slli a0,a4,8
 ;   srli a2,a4,8
 ;   slli a3,a2,56
-;   srli a0,a3,56
-;   or a2,a5,a0
+;   srli a2,a3,56
+;   or a2,a0,a2
 ;   slli a3,a2,16
-;   srli a5,a4,16
-;   slli a2,a5,8
-;   srli a4,a5,8
-;   slli a5,a4,56
-;   srli a4,a5,56
+;   srli a0,a4,16
+;   slli a2,a0,8
+;   srli a4,a0,8
+;   slli a0,a4,56
+;   srli a4,a0,56
 ;   or a4,a2,a4
-;   slli a5,a4,48
-;   srli a2,a5,48
+;   slli a0,a4,48
+;   srli a2,a0,48
 ;   or a3,a3,a2
-;   slli a5,a3,32
-;   srli a2,a5,32
+;   slli a0,a3,32
+;   srli a2,a0,32
 ;   or a1,a1,a2
-;   mv a0,t1
+;   mv a0,a5
 ;   ret
 ;
 ; Disassembled:
@@ -273,42 +272,41 @@ block0(v0: i128):
 ;   slli a1, a5, 0x20
 ;   srli a4, a1, 0x20
 ;   or a5, a3, a4
-;   mv t1, a5
 ;   slli a1, a0, 8
 ;   srli a3, a0, 8
-;   slli a5, a3, 0x38
-;   srli a2, a5, 0x38
+;   slli a2, a3, 0x38
+;   srli a2, a2, 0x38
 ;   or a3, a1, a2
-;   slli a5, a3, 0x10
-;   srli a1, a0, 0x10
-;   slli a3, a1, 8
-;   srli a1, a1, 8
-;   slli a1, a1, 0x38
-;   srli a4, a1, 0x38
-;   or a1, a3, a4
-;   slli a1, a1, 0x30
-;   srli a3, a1, 0x30
-;   or a5, a5, a3
-;   slli a1, a5, 0x20
+;   slli a1, a3, 0x10
+;   srli a2, a0, 0x10
+;   slli a3, a2, 8
+;   srli a2, a2, 8
+;   slli a2, a2, 0x38
+;   srli a4, a2, 0x38
+;   or a2, a3, a4
+;   slli a2, a2, 0x30
+;   srli a3, a2, 0x30
+;   or a1, a1, a3
+;   slli a1, a1, 0x20
 ;   srli a4, a0, 0x20
-;   slli a5, a4, 8
+;   slli a0, a4, 8
 ;   srli a2, a4, 8
 ;   slli a3, a2, 0x38
-;   srli a0, a3, 0x38
-;   or a2, a5, a0
+;   srli a2, a3, 0x38
+;   or a2, a0, a2
 ;   slli a3, a2, 0x10
-;   srli a5, a4, 0x10
-;   slli a2, a5, 8
-;   srli a4, a5, 8
-;   slli a5, a4, 0x38
-;   srli a4, a5, 0x38
+;   srli a0, a4, 0x10
+;   slli a2, a0, 8
+;   srli a4, a0, 8
+;   slli a0, a4, 0x38
+;   srli a4, a0, 0x38
 ;   or a4, a2, a4
-;   slli a5, a4, 0x30
-;   srli a2, a5, 0x30
+;   slli a0, a4, 0x30
+;   srli a2, a0, 0x30
 ;   or a3, a3, a2
-;   slli a5, a3, 0x20
-;   srli a2, a5, 0x20
+;   slli a0, a3, 0x20
+;   srli a2, a0, 0x20
 ;   or a1, a1, a2
-;   mv a0, t1
+;   mv a0, a5
 ;   ret
 
diff --git a/cranelift/filetests/filetests/isa/riscv64/call.clif b/cranelift/filetests/filetests/isa/riscv64/call.clif
index 534cc5398..8fcfe0f70 100644
--- a/cranelift/filetests/filetests/isa/riscv64/call.clif
+++ b/cranelift/filetests/filetests/isa/riscv64/call.clif
@@ -291,7 +291,7 @@ block0:
 ;   addi sp,sp,-32
 ;   fsd fs0,24(sp)
 ;   fsd fs2,16(sp)
-;   fsd fs3,8(sp)
+;   fsd fs4,8(sp)
 ; block0:
 ;   load_sym a3,%g0+0
 ;   callind a3
@@ -301,7 +301,7 @@ block0:
 ;   fmv.d fs2,fa0
 ;   load_sym a3,%g1+0
 ;   callind a3
-;   fmv.d fs3,fa0
+;   fmv.d fs4,fa0
 ;   load_sym a3,%g2+0
 ;   callind a3
 ;   load_sym a4,%g3+0
@@ -311,11 +311,11 @@ block0:
 ;   fmv.d fa0,fs2
 ;   callind a5
 ;   load_sym a0,%g4+0
-;   fmv.d fa0,fs3
+;   fmv.d fa0,fs4
 ;   callind a0
 ;   fld fs0,24(sp)
 ;   fld fs2,16(sp)
-;   fld fs3,8(sp)
+;   fld fs4,8(sp)
 ;   addi sp,sp,32
 ;   ld ra,8(sp)
 ;   ld fp,0(sp)
@@ -331,7 +331,7 @@ block0:
 ;   addi sp, sp, -0x20
 ;   fsd fs0, 0x18(sp)
 ;   fsd fs2, 0x10(sp)
-;   fsd fs3, 8(sp)
+;   fsd fs4, 8(sp)
 ; block1: ; offset 0x20
 ;   auipc a3, 0
 ;   ld a3, 0xc(a3)
@@ -353,7 +353,7 @@ block0:
 ;   .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g1 0
 ;   .byte 0x00, 0x00, 0x00, 0x00
 ;   jalr a3
-;   fmv.d fs3, fa0
+;   fmv.d fs4, fa0
 ;   auipc a3, 0
 ;   ld a3, 0xc(a3)
 ;   j 0xc
@@ -379,11 +379,11 @@ block0:
 ;   j 0xc
 ;   .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g4 0
 ;   .byte 0x00, 0x00, 0x00, 0x00
-;   fmv.d fa0, fs3
+;   fmv.d fa0, fs4
 ;   jalr a0
 ;   fld fs0, 0x18(sp)
 ;   fld fs2, 0x10(sp)
-;   fld fs3, 8(sp)
+;   fld fs4, 8(sp)
 ;   addi sp, sp, 0x20
 ;   ld ra, 8(sp)
 ;   ld s0, 0(sp)
@@ -422,9 +422,9 @@ block0(v0: i64):
 ;   sd fp,0(sp)
 ;   mv fp,sp
 ; block0:
-;   mv a1,a0
 ;   li a2,42
 ;   load_sym a4,%f11+0
+;   mv a1,a0
 ;   mv a0,a2
 ;   callind a4
 ;   ld ra,8(sp)
@@ -439,13 +439,13 @@ block0(v0: i64):
 ;   sd s0, 0(sp)
 ;   mv s0, sp
 ; block1: ; offset 0x10
-;   mv a1, a0
 ;   addi a2, zero, 0x2a
 ;   auipc a4, 0
 ;   ld a4, 0xc(a4)
 ;   j 0xc
 ;   .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f11 0
 ;   .byte 0x00, 0x00, 0x00, 0x00
+;   mv a1, a0
 ;   mv a0, a2
 ;   jalr a4
 ;   ld ra, 8(sp)
@@ -485,9 +485,9 @@ block0(v0: i64):
 ;   sd fp,0(sp)
 ;   mv fp,sp
 ; block0:
-;   mv a1,a0
 ;   li a2,42
 ;   load_sym a4,%f12+0
+;   mv a1,a0
 ;   mv a0,a2
 ;   callind a4
 ;   ld ra,8(sp)
@@ -502,13 +502,13 @@ block0(v0: i64):
 ;   sd s0, 0(sp)
 ;   mv s0, sp
 ; block1: ; offset 0x10
-;   mv a1, a0
 ;   addi a2, zero, 0x2a
 ;   auipc a4, 0
 ;   ld a4, 0xc(a4)
 ;   j 0xc
 ;   .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f12 0
 ;   .byte 0x00, 0x00, 0x00, 0x00
+;   mv a1, a0
 ;   mv a0, a2
 ;   jalr a4
 ;   ld ra, 8(sp)
@@ -548,9 +548,9 @@ block0(v0: i64):
 ;   sd fp,0(sp)
 ;   mv fp,sp
 ; block0:
-;   mv a1,a0
 ;   li a2,42
 ;   load_sym a4,%f13+0
+;   mv a1,a0
 ;   mv a0,a2
 ;   callind a4
 ;   ld ra,8(sp)
@@ -565,13 +565,13 @@ block0(v0: i64):
 ;   sd s0, 0(sp)
 ;   mv s0, sp
 ; block1: ; offset 0x10
-;   mv a1, a0
 ;   addi a2, zero, 0x2a
 ;   auipc a4, 0
 ;   ld a4, 0xc(a4)
 ;   j 0xc
 ;   .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f13 0
 ;   .byte 0x00, 0x00, 0x00, 0x00
+;   mv a1, a0
 ;   mv a0, a2
 ;   jalr a4
 ;   ld ra, 8(sp)
@@ -590,8 +590,8 @@ block0(v0: i128, v1: i128, v2: i128, v3: i64, v4: i128):
 ;   sd fp,0(sp)
 ;   mv fp,sp
 ; block0:
-;   mv a0,a7
 ;   ld a1,-16(incoming_arg)
+;   mv a0,a7
 ;   ld ra,8(sp)
 ;   ld fp,0(sp)
 ;   addi sp,sp,16
@@ -604,8 +604,8 @@ block0(v0: i128, v1: i128, v2: i128, v3: i64, v4: i128):
 ;   sd s0, 0(sp)
 ;   mv s0, sp
 ; block1: ; offset 0x10
-;   mv a0, a7
 ;   ld a1, 0x10(sp)
+;   mv a0, a7
 ;   ld ra, 8(sp)
 ;   ld s0, 0(sp)
 ;   addi sp, sp, 0x10
@@ -627,11 +627,11 @@ block0(v0: i128, v1: i64):
 ;   addi sp,sp,-32
 ;   sd s1,24(sp)
 ; block0:
-;   mv a6,a2
-;   mv a7,a0
 ;   sd a1,0(sp)
-;   mv a5,a1
 ;   load_sym s1,%f14+0
+;   mv a5,a1
+;   mv a6,a2
+;   mv a7,a0
 ;   mv a2,a7
 ;   mv a3,a5
 ;   mv a4,a7
@@ -652,15 +652,15 @@ block0(v0: i128, v1: i64):
 ;   addi sp, sp, -0x20
 ;   sd s1, 0x18(sp)
 ; block1: ; offset 0x18
-;   mv a6, a2
-;   mv a7, a0
 ;   sd a1, 0(sp)
-;   mv a5, a1
 ;   auipc s1, 0
 ;   ld s1, 0xc(s1)
 ;   j 0xc
 ;   .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f14 0
 ;   .byte 0x00, 0x00, 0x00, 0x00
+;   mv a5, a1
+;   mv a6, a2
+;   mv a7, a0
 ;   mv a2, a7
 ;   mv a3, a5
 ;   mv a4, a7
@@ -683,8 +683,8 @@ block0(v0: i128, v1: i128, v2: i128, v3: i64, v4: i128):
 ;   sd fp,0(sp)
 ;   mv fp,sp
 ; block0:
-;   mv a0,a7
 ;   ld a1,-16(incoming_arg)
+;   mv a0,a7
 ;   ld ra,8(sp)
 ;   ld fp,0(sp)
 ;   addi sp,sp,16
@@ -697,8 +697,8 @@ block0(v0: i128, v1: i128, v2: i128, v3: i64, v4: i128):
 ;   sd s0, 0(sp)
 ;   mv s0, sp
 ; block1: ; offset 0x10
-;   mv a0, a7
 ;   ld a1, 0x10(sp)
+;   mv a0, a7
 ;   ld ra, 8(sp)
 ;   ld s0, 0(sp)
 ;   addi sp, sp, 0x10
@@ -720,11 +720,11 @@ block0(v0: i128, v1: i64):
 ;   addi sp,sp,-32
 ;   sd s1,24(sp)
 ; block0:
-;   mv a6,a2
-;   mv a7,a0
 ;   sd a1,0(sp)
-;   mv a5,a1
 ;   load_sym s1,%f15+0
+;   mv a5,a1
+;   mv a6,a2
+;   mv a7,a0
 ;   mv a2,a7
 ;   mv a3,a5
 ;   mv a4,a7
@@ -745,15 +745,15 @@ block0(v0: i128, v1: i64):
 ;   addi sp, sp, -0x20
 ;   sd s1, 0x18(sp)
 ; block1: ; offset 0x18
-;   mv a6, a2
-;   mv a7, a0
 ;   sd a1, 0(sp)
-;   mv a5, a1
 ;   auipc s1, 0
 ;   ld s1, 0xc(s1)
 ;   j 0xc
 ;   .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f15 0
 ;   .byte 0x00, 0x00, 0x00, 0x00
+;   mv a5, a1
+;   mv a6, a2
+;   mv a7, a0
 ;   mv a2, a7
 ;   mv a3, a5
 ;   mv a4, a7
diff --git a/cranelift/filetests/filetests/isa/riscv64/return-call-indirect.clif b/cranelift/filetests/filetests/isa/riscv64/return-call-indirect.clif
index ca12180fa..d5d1d7b57 100644
--- a/cranelift/filetests/filetests/isa/riscv64/return-call-indirect.clif
+++ b/cranelift/filetests/filetests/isa/riscv64/return-call-indirect.clif
@@ -267,12 +267,12 @@ block0:
 ;   sd s10,48(sp)
 ;   sd s11,40(sp)
 ; block0:
-;   li a0,10
-;   sd a0,16(slot)
-;   li a1,15
-;   sd a1,8(slot)
-;   li a2,20
-;   sd a2,0(slot)
+;   li a1,10
+;   sd a1,16(slot)
+;   li a2,15
+;   sd a2,8(slot)
+;   li a3,20
+;   sd a3,0(slot)
 ;   li a3,25
 ;   li a4,30
 ;   li a5,35
@@ -345,12 +345,12 @@ block0:
 ;   sd s10, 0x30(sp)
 ;   sd s11, 0x28(sp)
 ; block1: ; offset 0x54
-;   addi a0, zero, 0xa
-;   sd a0, 0x10(sp)
-;   addi a1, zero, 0xf
-;   sd a1, 8(sp)
-;   addi a2, zero, 0x14
-;   sd a2, 0(sp)
+;   addi a1, zero, 0xa
+;   sd a1, 0x10(sp)
+;   addi a2, zero, 0xf
+;   sd a2, 8(sp)
+;   addi a3, zero, 0x14
+;   sd a3, 0(sp)
 ;   addi a3, zero, 0x19
 ;   addi a4, zero, 0x1e
 ;   addi a5, zero, 0x23
diff --git a/cranelift/filetests/filetests/isa/riscv64/return-call.clif b/cranelift/filetests/filetests/isa/riscv64/return-call.clif
index e119025b9..b472a6c31 100644
--- a/cranelift/filetests/filetests/isa/riscv64/return-call.clif
+++ b/cranelift/filetests/filetests/isa/riscv64/return-call.clif
@@ -285,10 +285,10 @@ block0:
 ;   sd s10,32(sp)
 ;   sd s11,24(sp)
 ; block0:
-;   li a0,10
-;   sd a0,8(slot)
-;   li a1,15
-;   sd a1,0(slot)
+;   li a1,10
+;   sd a1,8(slot)
+;   li a2,15
+;   sd a2,0(slot)
 ;   li a2,20
 ;   li a3,25
 ;   li a4,30
@@ -360,10 +360,10 @@ block0:
 ;   sd s10, 0x20(sp)
 ;   sd s11, 0x18(sp)
 ; block1: ; offset 0x54
-;   addi a0, zero, 0xa
-;   sd a0, 8(sp)
-;   addi a1, zero, 0xf
-;   sd a1, 0(sp)
+;   addi a1, zero, 0xa
+;   sd a1, 8(sp)
+;   addi a2, zero, 0xf
+;   sd a2, 0(sp)
 ;   addi a2, zero, 0x14
 ;   addi a3, zero, 0x19
 ;   addi a4, zero, 0x1e
@@ -561,10 +561,10 @@ block2:
 ; block0:
 ;   li a1,10
 ;   sd a1,16(slot)
-;   li a1,15
-;   sd a1,8(slot)
-;   li a2,20
-;   sd a2,0(slot)
+;   li a2,15
+;   sd a2,8(slot)
+;   li a3,20
+;   sd a3,0(slot)
 ;   li a3,25
 ;   li a4,30
 ;   li a5,35
@@ -572,11 +572,11 @@ block2:
 ;   li a7,45
 ;   li a2,50
 ;   li a1,55
-;   li s5,60
-;   li s4,65
-;   li s3,70
-;   li s2,75
-;   li s1,80
+;   li s1,60
+;   li s5,65
+;   li s4,70
+;   li s3,75
+;   li s2,80
 ;   li t4,85
 ;   li t3,90
 ;   li t2,95
@@ -593,11 +593,11 @@ block2:
 ;   li a0,140
 ;   sd a2,-160(incoming_arg)
 ;   sd a1,-152(incoming_arg)
-;   sd s5,-144(incoming_arg)
-;   sd s4,-136(incoming_arg)
-;   sd s3,-128(incoming_arg)
-;   sd s2,-120(incoming_arg)
-;   sd s1,-112(incoming_arg)
+;   sd s1,-144(incoming_arg)
+;   sd s5,-136(incoming_arg)
+;   sd s4,-128(incoming_arg)
+;   sd s3,-120(incoming_arg)
+;   sd s2,-112(incoming_arg)
 ;   sd t4,-104(incoming_arg)
 ;   sd t3,-96(incoming_arg)
 ;   sd t2,-88(incoming_arg)
@@ -619,11 +619,11 @@ block2:
 ;   ld a0,16(slot)
 ;   sd a2,-144(incoming_arg)
 ;   sd a1,-136(incoming_arg)
-;   sd s5,-128(incoming_arg)
-;   sd s4,-120(incoming_arg)
-;   sd s3,-112(incoming_arg)
-;   sd s2,-104(incoming_arg)
-;   sd s1,-96(incoming_arg)
+;   sd s1,-128(incoming_arg)
+;   sd s5,-120(incoming_arg)
+;   sd s4,-112(incoming_arg)
+;   sd s3,-104(incoming_arg)
+;   sd s2,-96(incoming_arg)
 ;   sd t4,-88(incoming_arg)
 ;   sd t3,-80(incoming_arg)
 ;   sd t2,-72(incoming_arg)
@@ -666,10 +666,10 @@ block2:
 ; block1: ; offset 0x54
 ;   addi a1, zero, 0xa
 ;   sd a1, 0x10(sp)
-;   addi a1, zero, 0xf
-;   sd a1, 8(sp)
-;   addi a2, zero, 0x14
-;   sd a2, 0(sp)
+;   addi a2, zero, 0xf
+;   sd a2, 8(sp)
+;   addi a3, zero, 0x14
+;   sd a3, 0(sp)
 ;   addi a3, zero, 0x19
 ;   addi a4, zero, 0x1e
 ;   addi a5, zero, 0x23
@@ -677,11 +677,11 @@ block2:
 ;   addi a7, zero, 0x2d
 ;   addi a2, zero, 0x32
 ;   addi a1, zero, 0x37
-;   addi s5, zero, 0x3c
-;   addi s4, zero, 0x41
-;   addi s3, zero, 0x46
-;   addi s2, zero, 0x4b
-;   addi s1, zero, 0x50
+;   addi s1, zero, 0x3c
+;   addi s5, zero, 0x41
+;   addi s4, zero, 0x46
+;   addi s3, zero, 0x4b
+;   addi s2, zero, 0x50
 ;   addi t4, zero, 0x55
 ;   addi t3, zero, 0x5a
 ;   addi t2, zero, 0x5f
@@ -698,11 +698,11 @@ block2:
 ;   addi a0, zero, 0x8c
 ;   sd a2, 0x90(sp)
 ;   sd a1, 0x98(sp)
-;   sd s5, 0xa0(sp)
-;   sd s4, 0xa8(sp)
-;   sd s3, 0xb0(sp)
-;   sd s2, 0xb8(sp)
-;   sd s1, 0xc0(sp)
+;   sd s1, 0xa0(sp)
+;   sd s5, 0xa8(sp)
+;   sd s4, 0xb0(sp)
+;   sd s3, 0xb8(sp)
+;   sd s2, 0xc0(sp)
 ;   sd t4, 0xc8(sp)
 ;   sd t3, 0xd0(sp)
 ;   sd t2, 0xd8(sp)
@@ -742,11 +742,11 @@ block2:
 ;   ld a0, 0x10(sp)
 ;   sd a2, 0xa0(sp)
 ;   sd a1, 0xa8(sp)
-;   sd s5, 0xb0(sp)
-;   sd s4, 0xb8(sp)
-;   sd s3, 0xc0(sp)
-;   sd s2, 0xc8(sp)
-;   sd s1, 0xd0(sp)
+;   sd s1, 0xb0(sp)
+;   sd s5, 0xb8(sp)
+;   sd s4, 0xc0(sp)
+;   sd s3, 0xc8(sp)
+;   sd s2, 0xd0(sp)
 ;   sd t4, 0xd8(sp)
 ;   sd t3, 0xe0(sp)
 ;   sd t2, 0xe8(sp)
diff --git a/cranelift/filetests/filetests/isa/riscv64/stack.clif b/cranelift/filetests/filetests/isa/riscv64/stack.clif
index 2d4bd0eb3..88df5938e 100644
--- a/cranelift/filetests/filetests/isa/riscv64/stack.clif
+++ b/cranelift/filetests/filetests/isa/riscv64/stack.clif
@@ -537,47 +537,47 @@ block0(v0: i8):
 ;   addi a0,a0,37
 ;   ld a1,1256(slot)
 ;   addi a1,a1,39
-;   ld a5,1248(slot)
-;   addi a2,a5,31
+;   ld a2,1248(slot)
+;   addi a2,a2,31
 ;   ld a3,1240(slot)
 ;   addi a3,a3,33
-;   ld a5,1232(slot)
-;   addi a4,a5,35
+;   ld a4,1232(slot)
+;   addi a4,a4,35
 ;   ld a5,1224(slot)
 ;   addi a5,a5,37
-;   ld s11,1216(slot)
-;   addi s7,s11,39
-;   ld t2,1208(slot)
-;   addi s8,t2,31
-;   ld t3,1200(slot)
-;   addi s9,t3,33
-;   ld s2,1192(slot)
-;   addi s10,s2,35
-;   ld s5,1184(slot)
-;   addi s11,s5,37
+;   ld t0,1216(slot)
+;   addi s7,t0,39
+;   ld a6,1208(slot)
+;   addi s8,a6,31
+;   ld t4,1200(slot)
+;   addi s9,t4,33
+;   ld s3,1192(slot)
+;   addi s10,s3,35
+;   ld s11,1184(slot)
+;   addi s11,s11,37
 ;   ld t0,1176(slot)
 ;   addi t0,t0,39
-;   ld t1,1160(slot)
-;   ld t2,1168(slot)
-;   add t1,t2,t1
-;   ld a7,1152(slot)
-;   ld t4,1144(slot)
-;   add t2,a7,t4
-;   ld s3,1136(slot)
-;   ld s5,1128(slot)
-;   add a6,s3,s5
+;   ld t1,1168(slot)
+;   ld t2,1160(slot)
+;   add t1,t1,t2
+;   ld s1,1144(slot)
+;   ld t3,1152(slot)
+;   add t2,t3,s1
+;   ld a6,1128(slot)
+;   ld s4,1136(slot)
+;   add a6,s4,a6
 ;   ld a7,1112(slot)
 ;   ld t3,1120(slot)
 ;   add a7,t3,a7
 ;   ld t3,1096(slot)
 ;   ld t4,1104(slot)
 ;   add t3,t4,t3
-;   ld s2,1080(slot)
-;   ld t4,1088(slot)
-;   add t4,t4,s2
+;   ld s1,1088(slot)
+;   ld s3,1080(slot)
+;   add t4,s1,s3
 ;   ld s1,1064(slot)
-;   ld s5,1072(slot)
-;   add s1,s5,s1
+;   ld s2,1072(slot)
+;   add s1,s2,s1
 ;   ld s2,1048(slot)
 ;   ld s3,1056(slot)
 ;   add s2,s3,s2
@@ -743,47 +743,47 @@ block0(v0: i8):
 ;   addi a0, a0, 0x25
 ;   ld a1, 0x4e8(sp)
 ;   addi a1, a1, 0x27
-;   ld a5, 0x4e0(sp)
-;   addi a2, a5, 0x1f
+;   ld a2, 0x4e0(sp)
+;   addi a2, a2, 0x1f
 ;   ld a3, 0x4d8(sp)
 ;   addi a3, a3, 0x21
-;   ld a5, 0x4d0(sp)
-;   addi a4, a5, 0x23
+;   ld a4, 0x4d0(sp)
+;   addi a4, a4, 0x23
 ;   ld a5, 0x4c8(sp)
 ;   addi a5, a5, 0x25
-;   ld s11, 0x4c0(sp)
-;   addi s7, s11, 0x27
-;   ld t2, 0x4b8(sp)
-;   addi s8, t2, 0x1f
-;   ld t3, 0x4b0(sp)
-;   addi s9, t3, 0x21
-;   ld s2, 0x4a8(sp)
-;   addi s10, s2, 0x23
-;   ld s5, 0x4a0(sp)
-;   addi s11, s5, 0x25
+;   ld t0, 0x4c0(sp)
+;   addi s7, t0, 0x27
+;   ld a6, 0x4b8(sp)
+;   addi s8, a6, 0x1f
+;   ld t4, 0x4b0(sp)
+;   addi s9, t4, 0x21
+;   ld s3, 0x4a8(sp)
+;   addi s10, s3, 0x23
+;   ld s11, 0x4a0(sp)
+;   addi s11, s11, 0x25
 ;   ld t0, 0x498(sp)
 ;   addi t0, t0, 0x27
-;   ld t1, 0x488(sp)
-;   ld t2, 0x490(sp)
-;   add t1, t2, t1
-;   ld a7, 0x480(sp)
-;   ld t4, 0x478(sp)
-;   add t2, a7, t4
-;   ld s3, 0x470(sp)
-;   ld s5, 0x468(sp)
-;   add a6, s3, s5
+;   ld t1, 0x490(sp)
+;   ld t2, 0x488(sp)
+;   add t1, t1, t2
+;   ld s1, 0x478(sp)
+;   ld t3, 0x480(sp)
+;   add t2, t3, s1
+;   ld a6, 0x468(sp)
+;   ld s4, 0x470(sp)
+;   add a6, s4, a6
 ;   ld a7, 0x458(sp)
 ;   ld t3, 0x460(sp)
 ;   add a7, t3, a7
 ;   ld t3, 0x448(sp)
 ;   ld t4, 0x450(sp)
 ;   add t3, t4, t3
-;   ld s2, 0x438(sp)
-;   ld t4, 0x440(sp)
-;   add t4, t4, s2
+;   ld s1, 0x440(sp)
+;   ld s3, 0x438(sp)
+;   add t4, s1, s3
 ;   ld s1, 0x428(sp)
-;   ld s5, 0x430(sp)
-;   add s1, s5, s1
+;   ld s2, 0x430(sp)
+;   add s1, s2, s1
 ;   ld s2, 0x418(sp)
 ;   ld s3, 0x420(sp)
 ;   add s2, s3, s2
diff --git a/cranelift/filetests/filetests/isa/riscv64/tail-call-conv.clif b/cranelift/filetests/filetests/isa/riscv64/tail-call-conv.clif
index b0cada1a7..279f8da1a 100644
--- a/cranelift/filetests/filetests/isa/riscv64/tail-call-conv.clif
+++ b/cranelift/filetests/filetests/isa/riscv64/tail-call-conv.clif
@@ -87,10 +87,10 @@ block0:
 ;   sd s10,176(sp)
 ;   sd s11,168(sp)
 ; block0:
-;   li a0,10
-;   sd a0,8(slot)
-;   li a1,15
-;   sd a1,0(slot)
+;   li a1,10
+;   sd a1,8(slot)
+;   li a2,15
+;   sd a2,0(slot)
 ;   li a2,20
 ;   li a3,25
 ;   li a4,30
@@ -173,10 +173,10 @@ block0:
 ;   sd s10, 0xb0(sp)
 ;   sd s11, 0xa8(sp)
 ; block1: ; offset 0x40
-;   addi a0, zero, 0xa
-;   sd a0, 0x98(sp)
-;   addi a1, zero, 0xf
-;   sd a1, 0x90(sp)
+;   addi a1, zero, 0xa
+;   sd a1, 0x98(sp)
+;   addi a2, zero, 0xf
+;   sd a2, 0x90(sp)
 ;   addi a2, zero, 0x14
 ;   addi a3, zero, 0x19
 ;   addi a4, zero, 0x1e
@@ -296,64 +296,62 @@ block0:
 ;   sd s10,48(sp)
 ;   sd s11,40(sp)
 ; block0:
-;   li a3,10
-;   sd a3,24(slot)
-;   li a1,15
+;   li a1,10
 ;   sd a1,16(slot)
+;   li a1,15
+;   sd a1,8(slot)
 ;   li a4,20
-;   sd a4,8(slot)
-;   li a4,25
-;   li a5,30
-;   li a2,35
-;   li s3,40
-;   li s4,45
-;   li s5,50
-;   li s6,55
-;   li s7,60
-;   li s8,65
-;   li s9,70
-;   li s10,75
-;   li s11,80
-;   li t0,85
-;   li t1,90
-;   li t2,95
-;   li a6,100
-;   li a7,105
-;   li t3,110
-;   li t4,115
-;   li s1,120
-;   li s2,125
+;   li a5,25
+;   li a2,30
+;   li s3,35
+;   li s4,40
+;   li s5,45
+;   li s6,50
+;   li s7,55
+;   li s8,60
+;   li s9,65
+;   li s10,70
+;   li s11,75
+;   li t0,80
+;   li t1,85
+;   li t2,90
+;   li a6,95
+;   li a7,100
+;   li t3,105
+;   li t4,110
+;   li s1,115
+;   li s2,120
+;   li a3,125
+;   sd a3,0(slot)
 ;   li a1,130
 ;   li a3,135
-;   sd a3,0(slot)
-;   ld a3,8(slot)
-;   sd a3,0(a0)
-;   sd a4,8(a0)
-;   sd a5,16(a0)
-;   sd a2,24(a0)
-;   sd s3,32(a0)
-;   sd s4,40(a0)
-;   sd s5,48(a0)
-;   sd s6,56(a0)
-;   sd s7,64(a0)
-;   sd s8,72(a0)
-;   sd s9,80(a0)
-;   sd s10,88(a0)
-;   sd s11,96(a0)
-;   sd t0,104(a0)
-;   sd t1,112(a0)
-;   sd t2,120(a0)
-;   sd a6,128(a0)
-;   sd a7,136(a0)
-;   sd t3,144(a0)
-;   sd t4,152(a0)
-;   sd s1,160(a0)
-;   sd s2,168(a0)
+;   sd a4,0(a0)
+;   sd a5,8(a0)
+;   sd a2,16(a0)
+;   sd s3,24(a0)
+;   sd s4,32(a0)
+;   sd s5,40(a0)
+;   sd s6,48(a0)
+;   sd s7,56(a0)
+;   sd s8,64(a0)
+;   sd s9,72(a0)
+;   sd s10,80(a0)
+;   sd s11,88(a0)
+;   sd t0,96(a0)
+;   sd t1,104(a0)
+;   sd t2,112(a0)
+;   sd a6,120(a0)
+;   sd a7,128(a0)
+;   sd t3,136(a0)
+;   sd t4,144(a0)
+;   sd s1,152(a0)
+;   sd s2,160(a0)
+;   ld a4,0(slot)
+;   sd a4,168(a0)
 ;   sd a1,176(a0)
-;   ld a3,0(slot)
 ;   sd a3,184(a0)
-;   ld a0,24(slot)
-;   ld a1,16(slot)
+;   ld a0,16(slot)
+;   ld a1,8(slot)
 ;   ld s1,120(sp)
 ;   ld s2,112(sp)
 ;   ld s3,104(sp)
@@ -390,64 +388,62 @@ block0:
 ;   sd s10, 0x30(sp)
 ;   sd s11, 0x28(sp)
 ; block1: ; offset 0x40
-;   addi a3, zero, 0xa
-;   sd a3, 0x18(sp)
-;   addi a1, zero, 0xf
+;   addi a1, zero, 0xa
 ;   sd a1, 0x10(sp)
+;   addi a1, zero, 0xf
+;   sd a1, 8(sp)
 ;   addi a4, zero, 0x14
-;   sd a4, 8(sp)
-;   addi a4, zero, 0x19
-;   addi a5, zero, 0x1e
-;   addi a2, zero, 0x23
-;   addi s3, zero, 0x28
-;   addi s4, zero, 0x2d
-;   addi s5, zero, 0x32
-;   addi s6, zero, 0x37
-;   addi s7, zero, 0x3c
-;   addi s8, zero, 0x41
-;   addi s9, zero, 0x46
-;   addi s10, zero, 0x4b
-;   addi s11, zero, 0x50
-;   addi t0, zero, 0x55
-;   addi t1, zero, 0x5a
-;   addi t2, zero, 0x5f
-;   addi a6, zero, 0x64
-;   addi a7, zero, 0x69
-;   addi t3, zero, 0x6e
-;   addi t4, zero, 0x73
-;   addi s1, zero, 0x78
-;   addi s2, zero, 0x7d
+;   addi a5, zero, 0x19
+;   addi a2, zero, 0x1e
+;   addi s3, zero, 0x23
+;   addi s4, zero, 0x28
+;   addi s5, zero, 0x2d
+;   addi s6, zero, 0x32
+;   addi s7, zero, 0x37
+;   addi s8, zero, 0x3c
+;   addi s9, zero, 0x41
+;   addi s10, zero, 0x46
+;   addi s11, zero, 0x4b
+;   addi t0, zero, 0x50
+;   addi t1, zero, 0x55
+;   addi t2, zero, 0x5a
+;   addi a6, zero, 0x5f
+;   addi a7, zero, 0x64
+;   addi t3, zero, 0x69
+;   addi t4, zero, 0x6e
+;   addi s1, zero, 0x73
+;   addi s2, zero, 0x78
+;   addi a3, zero, 0x7d
+;   sd a3, 0(sp)
 ;   addi a1, zero, 0x82
 ;   addi a3, zero, 0x87
-;   sd a3, 0(sp)
-;   ld a3, 8(sp)
-;   sd a3, 0(a0)
-;   sd a4, 8(a0)
-;   sd a5, 0x10(a0)
-;   sd a2, 0x18(a0)
-;   sd s3, 0x20(a0)
-;   sd s4, 0x28(a0)
-;   sd s5, 0x30(a0)
-;   sd s6, 0x38(a0)
-;   sd s7, 0x40(a0)
-;   sd s8, 0x48(a0)
-;   sd s9, 0x50(a0)
-;   sd s10, 0x58(a0)
-;   sd s11, 0x60(a0)
-;   sd t0, 0x68(a0)
-;   sd t1, 0x70(a0)
-;   sd t2, 0x78(a0)
-;   sd a6, 0x80(a0)
-;   sd a7, 0x88(a0)
-;   sd t3, 0x90(a0)
-;   sd t4, 0x98(a0)
-;   sd s1, 0xa0(a0)
-;   sd s2, 0xa8(a0)
+;   sd a4, 0(a0)
+;   sd a5, 8(a0)
+;   sd a2, 0x10(a0)
+;   sd s3, 0x18(a0)
+;   sd s4, 0x20(a0)
+;   sd s5, 0x28(a0)
+;   sd s6, 0x30(a0)
+;   sd s7, 0x38(a0)
+;   sd s8, 0x40(a0)
+;   sd s9, 0x48(a0)
+;   sd s10, 0x50(a0)
+;   sd s11, 0x58(a0)
+;   sd t0, 0x60(a0)
+;   sd t1, 0x68(a0)
+;   sd t2, 0x70(a0)
+;   sd a6, 0x78(a0)
+;   sd a7, 0x80(a0)
+;   sd t3, 0x88(a0)
+;   sd t4, 0x90(a0)
+;   sd s1, 0x98(a0)
+;   sd s2, 0xa0(a0)
+;   ld a4, 0(sp)
+;   sd a4, 0xa8(a0)
 ;   sd a1, 0xb0(a0)
-;   ld a3, 0(sp)
 ;   sd a3, 0xb8(a0)
-;   ld a0, 0x18(sp)
-;   ld a1, 0x10(sp)
+;   ld a0, 0x10(sp)
+;   ld a1, 8(sp)
 ;   ld s1, 0x78(sp)
 ;   ld s2, 0x70(sp)
 ;   ld s3, 0x68(sp)
@@ -789,10 +785,10 @@ block0:
 ;   sd s10,384(sp)
 ;   sd s11,376(sp)
 ; block0:
-;   li a0,10
-;   sd a0,8(slot)
-;   li a1,15
-;   sd a1,0(slot)
+;   li a1,10
+;   sd a1,8(slot)
+;   li a2,15
+;   sd a2,0(slot)
 ;   li a2,20
 ;   li a3,25
 ;   li a4,30
@@ -901,10 +897,10 @@ block0:
 ;   sd s10, 0x180(sp)
 ;   sd s11, 0x178(sp)
 ; block1: ; offset 0x40
-;   addi a0, zero, 0xa
-;   sd a0, 0x168(sp)
-;   addi a1, zero, 0xf
-;   sd a1, 0x160(sp)
+;   addi a1, zero, 0xa
+;   sd a1, 0x168(sp)
+;   addi a2, zero, 0xf
+;   sd a2, 0x160(sp)
 ;   addi a2, zero, 0x14
 ;   addi a3, zero, 0x19
 ;   addi a4, zero, 0x1e
diff --git a/cranelift/filetests/filetests/isa/riscv64/user_stack_maps.clif b/cranelift/filetests/filetests/isa/riscv64/user_stack_maps.clif
index 341f7bd4f..4b18ae8ab 100644
--- a/cranelift/filetests/filetests/isa/riscv64/user_stack_maps.clif
+++ b/cranelift/filetests/filetests/isa/riscv64/user_stack_maps.clif
@@ -41,27 +41,21 @@ block0:
 ;   sd s2,32(sp)
 ;   sd s3,24(sp)
 ; block0:
-;   li a0,0
-;   mv s3,a0
-;   li a0,1
-;   li a2,2
+;   li s3,0
+;   li s1,1
+;   li s2,2
 ;   sw zero,0(slot)
-;   sw a0,4(slot)
-;   mv s1,a0
-;   sw a2,8(slot)
-;   mv s2,a2
+;   sw s1,4(slot)
+;   sw s2,8(slot)
 ;   mv a0,s3
 ;   call userextname0
 ;   ; UserStackMap { by_type: [(types::I32, CompoundBitSet {0, 4, 8})], sp_to_sized_stack_slots: None }
-;   mv a0,s1
-;   sw a0,0(slot)
-;   mv a0,s2
-;   sw a0,4(slot)
+;   sw s1,0(slot)
+;   sw s2,4(slot)
 ;   mv a0,s3
 ;   call userextname0
 ;   ; UserStackMap { by_type: [(types::I32, CompoundBitSet {0, 4})], sp_to_sized_stack_slots: None }
-;   mv a0,s2
-;   sw a0,0(slot)
+;   sw s2,0(slot)
 ;   mv a0,s1
 ;   call userextname0
 ;   ; UserStackMap { by_type: [(types::I32, CompoundBitSet {0})], sp_to_sized_stack_slots: None }
@@ -87,27 +81,21 @@ block0:
 ;   sd s2, 0x20(sp)
 ;   sd s3, 0x18(sp)
 ; block1: ; offset 0x20
-;   mv a0, zero
-;   mv s3, a0
-;   addi a0, zero, 1
-;   addi a2, zero, 2
+;   mv s3, zero
+;   addi s1, zero, 1
+;   addi s2, zero, 2
 ;   sw zero, 0(sp)
-;   sw a0, 4(sp)
-;   mv s1, a0
-;   sw a2, 8(sp)
-;   mv s2, a2
+;   sw s1, 4(sp)
+;   sw s2, 8(sp)
 ;   mv a0, s3
 ;   auipc ra, 0 ; reloc_external RiscvCallPlt u0:0 0
 ;   jalr ra
-;   mv a0, s1
-;   sw a0, 0(sp)
-;   mv a0, s2
-;   sw a0, 4(sp)
+;   sw s1, 0(sp)
+;   sw s2, 4(sp)
 ;   mv a0, s3
 ;   auipc ra, 0 ; reloc_external RiscvCallPlt u0:0 0
 ;   jalr ra
-;   mv a0, s2
-;   sw a0, 0(sp)
+;   sw s2, 0(sp)
 ;   mv a0, s1
 ;   auipc ra, 0 ; reloc_external RiscvCallPlt u0:0 0
 ;   jalr ra
@@ -151,41 +139,41 @@ block0(v0: i8, v1: i16, v2: i32, v3: i64, v4: f32, v5: f64):
 ;   addi sp,sp,-160
 ;   sd s1,152(sp)
 ;   sd s2,144(sp)
-;   sd s6,136(sp)
-;   sd s8,128(sp)
-;   sd s10,120(sp)
+;   sd s3,136(sp)
+;   sd s4,128(sp)
+;   sd s9,120(sp)
 ;   fsd fs0,112(sp)
 ;   fsd fs2,104(sp)
 ; block0:
-;   mv s10,a4
+;   mv s2,a4
 ;   sb a0,0(slot)
-;   mv s8,a0
+;   mv s1,a0
 ;   sh a1,8(slot)
-;   mv s6,a1
+;   mv s9,a1
 ;   sw a2,16(slot)
-;   mv s2,a2
+;   mv s4,a2
 ;   fsw fa0,20(slot)
 ;   fmv.d fs2,fa0
 ;   sd a3,24(slot)
-;   mv s1,a3
+;   mv s3,a3
 ;   fsd fa1,32(slot)
 ;   fmv.d fs0,fa1
 ;   call userextname0
 ;   ; UserStackMap { by_type: [(types::I8, CompoundBitSet {0}), (types::I16, CompoundBitSet {8}), (types::I32, CompoundBitSet {16}), (types::F32, CompoundBitSet {20}), (types::I64, CompoundBitSet {24}), (types::F64, CompoundBitSet {32})], sp_to_sized_stack_slots: None }
-;   mv a2,s2
-;   mv a4,s10
+;   mv a2,s4
+;   mv a4,s2
 ;   sw a2,0(a4)
-;   mv a3,s1
+;   mv a3,s3
 ;   sd a3,8(a4)
-;   mv a0,s8
-;   mv a1,s6
+;   mv a0,s1
+;   mv a1,s9
 ;   fmv.d fa0,fs2
 ;   fmv.d fa1,fs0
 ;   ld s1,152(sp)
 ;   ld s2,144(sp)
-;   ld s6,136(sp)
-;   ld s8,128(sp)
-;   ld s10,120(sp)
+;   ld s3,136(sp)
+;   ld s4,128(sp)
+;   ld s9,120(sp)
 ;   fld fs0,112(sp)
 ;   fld fs2,104(sp)
 ;   addi sp,sp,160
@@ -203,41 +191,41 @@ block0(v0: i8, v1: i16, v2: i32, v3: i64, v4: f32, v5: f64):
 ;   addi sp, sp, -0xa0
 ;   sd s1, 0x98(sp)
 ;   sd s2, 0x90(sp)
-;   sd s6, 0x88(sp)
-;   sd s8, 0x80(sp)
-;   sd s10, 0x78(sp)
+;   sd s3, 0x88(sp)
+;   sd s4, 0x80(sp)
+;   sd s9, 0x78(sp)
 ;   fsd fs0, 0x70(sp)
 ;   fsd fs2, 0x68(sp)
 ; block1: ; offset 0x30
-;   mv s10, a4
+;   mv s2, a4
 ;   sb a0, 0(sp)
-;   mv s8, a0
+;   mv s1, a0
 ;   sh a1, 8(sp)
-;   mv s6, a1
+;   mv s9, a1
 ;   sw a2, 0x10(sp)
-;   mv s2, a2
+;   mv s4, a2
 ;   fsw fa0, 0x14(sp)
 ;   fmv.d fs2, fa0
 ;   sd a3, 0x18(sp)
-;   mv s1, a3
+;   mv s3, a3
 ;   fsd fa1, 0x20(sp)
 ;   fmv.d fs0, fa1
 ;   auipc ra, 0 ; reloc_external RiscvCallPlt u0:0 0
 ;   jalr ra
-;   mv a2, s2
-;   mv a4, s10
+;   mv a2, s4
+;   mv a4, s2
 ;   sw a2, 0(a4)
-;   mv a3, s1
+;   mv a3, s3
 ;   sd a3, 8(a4)
-;   mv a0, s8
-;   mv a1, s6
+;   mv a0, s1
+;   mv a1, s9
 ;   fmv.d fa0, fs2
 ;   fmv.d fa1, fs0
 ;   ld s1, 0x98(sp)
 ;   ld s2, 0x90(sp)
-;   ld s6, 0x88(sp)
-;   ld s8, 0x80(sp)
-;   ld s10, 0x78(sp)
+;   ld s3, 0x88(sp)
+;   ld s4, 0x80(sp)
+;   ld s9, 0x78(sp)
 ;   fld fs0, 0x70(sp)
 ;   fld fs2, 0x68(sp)
 ;   addi sp, sp, 0xa0
diff --git a/cranelift/filetests/filetests/isa/riscv64/zca.clif b/cranelift/filetests/filetests/isa/riscv64/zca.clif
index 4086bb635..69b31eb2f 100644
--- a/cranelift/filetests/filetests/isa/riscv64/zca.clif
+++ b/cranelift/filetests/filetests/isa/riscv64/zca.clif
@@ -449,16 +449,15 @@ block0:
 ;   mv fp,sp
 ;   addi sp,sp,-2048
 ; block0:
-;   load_addr a1,1020(slot)
-;   mv a5,a1
+;   load_addr a2,1020(slot)
 ;   load_addr a1,4(slot)
-;   load_addr a2,512(slot)
-;   load_addr a3,256(slot)
-;   load_addr a4,64(slot)
-;   sd a2,0(a0)
-;   sd a3,8(a0)
-;   sd a4,16(a0)
-;   mv a0,a5
+;   load_addr a3,512(slot)
+;   load_addr a4,256(slot)
+;   load_addr a5,64(slot)
+;   sd a3,0(a0)
+;   sd a4,8(a0)
+;   sd a5,16(a0)
+;   mv a0,a2
 ;   lui t6,1
 ;   addi t6,t6,-2048
 ;   add sp,sp,t6
@@ -475,16 +474,15 @@ block0:
 ;   c.mv s0, sp
 ;   addi sp, sp, -0x800
 ; block1: ; offset 0xc
-;   c.addi4spn a1, sp, 0x3fc
-;   c.mv a5, a1
+;   c.addi4spn a2, sp, 0x3fc
 ;   c.addi4spn a1, sp, 4
-;   c.addi4spn a2, sp, 0x200
-;   c.addi4spn a3, sp, 0x100
-;   c.addi4spn a4, sp, 0x40
-;   c.sd a2, 0(a0)
-;   c.sd a3, 8(a0)
-;   c.sd a4, 0x10(a0)
-;   c.mv a0, a5
+;   c.addi4spn a3, sp, 0x200
+;   c.addi4spn a4, sp, 0x100
+;   c.addi4spn a5, sp, 0x40
+;   c.sd a3, 0(a0)
+;   c.sd a4, 8(a0)
+;   c.sd a5, 0x10(a0)
+;   c.mv a0, a2
 ;   c.lui t6, 1
 ;   addi t6, t6, -0x800
 ;   c.add sp, t6
@@ -586,30 +584,28 @@ block0:
 
 ; VCode:
 ; block0:
-;   li a1,0
-;   mv a5,a1
+;   li a2,0
 ;   li a1,1
-;   li a2,-1
-;   li a3,-32
-;   li a4,31
-;   sd a2,0(a0)
-;   sd a3,8(a0)
-;   sd a4,16(a0)
-;   mv a0,a5
+;   li a3,-1
+;   li a4,-32
+;   li a5,31
+;   sd a3,0(a0)
+;   sd a4,8(a0)
+;   sd a5,16(a0)
+;   mv a0,a2
 ;   ret
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
-;   c.li a1, 0
-;   c.mv a5, a1
+;   c.li a2, 0
 ;   c.li a1, 1
-;   c.li a2, -1
-;   c.li a3, -0x20
-;   c.li a4, 0x1f
-;   c.sd a2, 0(a0)
-;   c.sd a3, 8(a0)
-;   c.sd a4, 0x10(a0)
-;   c.mv a0, a5
+;   c.li a3, -1
+;   c.li a4, -0x20
+;   c.li a5, 0x1f
+;   c.sd a3, 0(a0)
+;   c.sd a4, 8(a0)
+;   c.sd a5, 0x10(a0)
+;   c.mv a0, a2
 ;   c.jr ra
 
 function %c_lui() -> i64, i64, i64 {
diff --git a/cranelift/filetests/filetests/isa/riscv64/zcb.clif b/cranelift/filetests/filetests/isa/riscv64/zcb.clif
index 19bedd07f..c5f73c1f7 100644
--- a/cranelift/filetests/filetests/isa/riscv64/zcb.clif
+++ b/cranelift/filetests/filetests/isa/riscv64/zcb.clif
@@ -127,17 +127,15 @@ block0(v0: i64):
 ; VCode:
 ; block0:
 ;   lbu a3,0(a0)
-;   mv a4,a3
 ;   lbu a1,3(a0)
-;   mv a0,a4
+;   mv a0,a3
 ;   ret
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   .byte 0x14, 0x81 ; trap: heap_oob
-;   c.mv a4, a3
 ;   .byte 0x6c, 0x81 ; trap: heap_oob
-;   c.mv a0, a4
+;   c.mv a0, a3
 ;   c.jr ra
 
 function %c_lhu(i64) -> i32, i64 {
@@ -150,17 +148,15 @@ block0(v0: i64):
 ; VCode:
 ; block0:
 ;   lhu a3,0(a0)
-;   mv a4,a3
 ;   lhu a1,2(a0)
-;   mv a0,a4
+;   mv a0,a3
 ;   ret
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   .byte 0x14, 0x85 ; trap: heap_oob
-;   c.mv a4, a3
 ;   .byte 0x2c, 0x85 ; trap: heap_oob
-;   c.mv a0, a4
+;   c.mv a0, a3
 ;   c.jr ra
 
 function %c_lh(i64) -> i16, i16 {
@@ -173,17 +169,15 @@ block0(v0: i64):
 ; VCode:
 ; block0:
 ;   lh a3,0(a0)
-;   mv a4,a3
 ;   lh a1,2(a0)
-;   mv a0,a4
+;   mv a0,a3
 ;   ret
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   .byte 0x54, 0x85 ; trap: heap_oob
-;   c.mv a4, a3
 ;   .byte 0x6c, 0x85 ; trap: heap_oob
-;   c.mv a0, a4
+;   c.mv a0, a3
 ;   c.jr ra
 
 function %c_sb(i64, i8) {
diff --git a/cranelift/filetests/filetests/isa/s390x/arithmetic.clif b/cranelift/filetests/filetests/isa/s390x/arithmetic.clif
index 402408137..a72ea4728 100644
--- a/cranelift/filetests/filetests/isa/s390x/arithmetic.clif
+++ b/cranelift/filetests/filetests/isa/s390x/arithmetic.clif
@@ -1489,10 +1489,11 @@ block0(v0: i64, v1: i64):
 ;   iilf %r4, 4294967295
 ;   xgrk %r5, %r4, %r2
 ;   ngrk %r4, %r5, %r3
+;   lgr %r5, %r3
 ;   cgite %r4, -1
-;   lgr %r4, %r3
 ;   lgr %r3, %r2
-;   dsgr %r2, %r4
+;   lgr %r2, %r5
+;   dsgr %r2, %r2
 ;   lgr %r2, %r3
 ;   br %r14
 ;
@@ -1502,10 +1503,11 @@ block0(v0: i64, v1: i64):
 ;   iilf %r4, 0xffffffff
 ;   xgrk %r5, %r4, %r2
 ;   ngrk %r4, %r5, %r3
+;   lgr %r5, %r3
 ;   cgite %r4, -1 ; trap: int_ovf
-;   lgr %r4, %r3
 ;   lgr %r3, %r2
-;   dsgr %r2, %r4 ; trap: int_divz
+;   lgr %r2, %r5
+;   dsgr %r2, %r2 ; trap: int_divz
 ;   lgr %r2, %r3
 ;   br %r14
 
@@ -1518,16 +1520,16 @@ block0(v0: i64):
 
 ; VCode:
 ; block0:
-;   lgr %r3, %r2
 ;   lghi %r4, 2
+;   lgr %r3, %r2
 ;   dsgr %r2, %r4
 ;   lgr %r2, %r3
 ;   br %r14
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
-;   lgr %r3, %r2
 ;   lghi %r4, 2
+;   lgr %r3, %r2
 ;   dsgr %r2, %r4 ; trap: int_divz
 ;   lgr %r2, %r3
 ;   br %r14
@@ -1601,13 +1603,12 @@ block0(v0: i16, v1: i16):
 ; VCode:
 ; block0:
 ;   lghr %r5, %r2
-;   lgr %r2, %r5
 ;   lhr %r4, %r3
-;   lhi %r5, 32767
-;   lgr %r3, %r2
-;   xr %r5, %r3
-;   nr %r5, %r4
-;   cite %r5, -1
+;   lhi %r2, 32767
+;   xrk %r3, %r2, %r5
+;   nrk %r2, %r3, %r4
+;   cite %r2, -1
+;   lgr %r3, %r5
 ;   dsgfr %r2, %r4
 ;   lgr %r2, %r3
 ;   br %r14
@@ -1615,13 +1616,12 @@ block0(v0: i16, v1: i16):
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   lghr %r5, %r2
-;   lgr %r2, %r5
 ;   lhr %r4, %r3
-;   lhi %r5, 0x7fff
-;   lgr %r3, %r2
-;   xr %r5, %r3
-;   nr %r5, %r4
-;   cite %r5, -1 ; trap: int_ovf
+;   lhi %r2, 0x7fff
+;   xrk %r3, %r2, %r5
+;   nrk %r2, %r3, %r4
+;   cite %r2, -1 ; trap: int_ovf
+;   lgr %r3, %r5
 ;   dsgfr %r2, %r4 ; trap: int_divz
 ;   lgr %r2, %r3
 ;   br %r14
@@ -1658,13 +1658,12 @@ block0(v0: i8, v1: i8):
 ; VCode:
 ; block0:
 ;   lgbr %r5, %r2
-;   lgr %r2, %r5
 ;   lbr %r4, %r3
-;   lhi %r5, 127
-;   lgr %r3, %r2
-;   xr %r5, %r3
-;   nr %r5, %r4
-;   cite %r5, -1
+;   lhi %r2, 127
+;   xrk %r3, %r2, %r5
+;   nrk %r2, %r3, %r4
+;   cite %r2, -1
+;   lgr %r3, %r5
 ;   dsgfr %r2, %r4
 ;   lgr %r2, %r3
 ;   br %r14
@@ -1672,13 +1671,12 @@ block0(v0: i8, v1: i8):
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   lgbr %r5, %r2
-;   lgr %r2, %r5
 ;   lbr %r4, %r3
-;   lhi %r5, 0x7f
-;   lgr %r3, %r2
-;   xr %r5, %r3
-;   nr %r5, %r4
-;   cite %r5, -1 ; trap: int_ovf
+;   lhi %r2, 0x7f
+;   xrk %r3, %r2, %r5
+;   nrk %r2, %r3, %r4
+;   cite %r2, -1 ; trap: int_ovf
+;   lgr %r3, %r5
 ;   dsgfr %r2, %r4 ; trap: int_divz
 ;   lgr %r2, %r3
 ;   br %r14
@@ -1714,19 +1712,19 @@ block0(v0: i64, v1: i64):
 
 ; VCode:
 ; block0:
-;   lgr %r4, %r3
+;   lgr %r5, %r3
 ;   lgr %r3, %r2
 ;   lghi %r2, 0
-;   dlgr %r2, %r4
+;   dlgr %r2, %r5
 ;   lgr %r2, %r3
 ;   br %r14
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
-;   lgr %r4, %r3
+;   lgr %r5, %r3
 ;   lgr %r3, %r2
 ;   lghi %r2, 0
-;   dlgr %r2, %r4 ; trap: int_divz
+;   dlgr %r2, %r5 ; trap: int_divz
 ;   lgr %r2, %r3
 ;   br %r14
 
@@ -1763,19 +1761,19 @@ block0(v0: i32, v1: i32):
 
 ; VCode:
 ; block0:
-;   lgr %r4, %r3
+;   lgr %r5, %r3
 ;   lgr %r3, %r2
 ;   lhi %r2, 0
-;   dlr %r2, %r4
+;   dlr %r2, %r5
 ;   lgr %r2, %r3
 ;   br %r14
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
-;   lgr %r4, %r3
+;   lgr %r5, %r3
 ;   lgr %r3, %r2
 ;   lhi %r2, 0
-;   dlr %r2, %r4 ; trap: int_divz
+;   dlr %r2, %r5 ; trap: int_divz
 ;   lgr %r2, %r3
 ;   br %r14
 
@@ -1811,32 +1809,25 @@ block0(v0: i16, v1: i16):
 }
 
 ; VCode:
-;   stmg %r7, %r15, 56(%r15)
 ; block0:
 ;   lgr %r4, %r3
 ;   lhi %r5, 0
-;   lgr %r7, %r5
 ;   llhr %r3, %r2
-;   llhr %r5, %r4
-;   lgr %r2, %r7
-;   dlr %r2, %r5
+;   llhr %r4, %r4
+;   lgr %r2, %r5
+;   dlr %r2, %r4
 ;   lgr %r2, %r3
-;   lmg %r7, %r15, 56(%r15)
 ;   br %r14
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
-;   stmg %r7, %r15, 0x38(%r15)
-; block1: ; offset 0x6
 ;   lgr %r4, %r3
 ;   lhi %r5, 0
-;   lgr %r7, %r5
 ;   llhr %r3, %r2
-;   llhr %r5, %r4
-;   lgr %r2, %r7
-;   dlr %r2, %r5 ; trap: int_divz
+;   llhr %r4, %r4
+;   lgr %r2, %r5
+;   dlr %r2, %r4 ; trap: int_divz
 ;   lgr %r2, %r3
-;   lmg %r7, %r15, 0x38(%r15)
 ;   br %r14
 
 function %udiv_i16_imm(i16) -> i16 {
@@ -1849,22 +1840,20 @@ block0(v0: i16):
 ; VCode:
 ; block0:
 ;   lhi %r4, 0
-;   lgr %r5, %r4
 ;   llhr %r3, %r2
-;   lhi %r4, 2
-;   lgr %r2, %r5
-;   dlr %r2, %r4
+;   lhi %r5, 2
+;   lgr %r2, %r4
+;   dlr %r2, %r5
 ;   lgr %r2, %r3
 ;   br %r14
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   lhi %r4, 0
-;   lgr %r5, %r4
 ;   llhr %r3, %r2
-;   lhi %r4, 2
-;   lgr %r2, %r5
-;   dlr %r2, %r4 ; trap: int_divz
+;   lhi %r5, 2
+;   lgr %r2, %r4
+;   dlr %r2, %r5 ; trap: int_divz
 ;   lgr %r2, %r3
 ;   br %r14
 
@@ -1875,32 +1864,25 @@ block0(v0: i8, v1: i8):
 }
 
 ; VCode:
-;   stmg %r7, %r15, 56(%r15)
 ; block0:
 ;   lgr %r4, %r3
 ;   lhi %r5, 0
-;   lgr %r7, %r5
 ;   llcr %r3, %r2
-;   llcr %r5, %r4
-;   lgr %r2, %r7
-;   dlr %r2, %r5
+;   llcr %r4, %r4
+;   lgr %r2, %r5
+;   dlr %r2, %r4
 ;   lgr %r2, %r3
-;   lmg %r7, %r15, 56(%r15)
 ;   br %r14
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
-;   stmg %r7, %r15, 0x38(%r15)
-; block1: ; offset 0x6
 ;   lgr %r4, %r3
 ;   lhi %r5, 0
-;   lgr %r7, %r5
 ;   llcr %r3, %r2
-;   llcr %r5, %r4
-;   lgr %r2, %r7
-;   dlr %r2, %r5 ; trap: int_divz
+;   llcr %r4, %r4
+;   lgr %r2, %r5
+;   dlr %r2, %r4 ; trap: int_divz
 ;   lgr %r2, %r3
-;   lmg %r7, %r15, 0x38(%r15)
 ;   br %r14
 
 function %udiv_i8_imm(i8) -> i8 {
@@ -1913,22 +1895,20 @@ block0(v0: i8):
 ; VCode:
 ; block0:
 ;   lhi %r4, 0
-;   lgr %r5, %r4
 ;   llcr %r3, %r2
-;   lhi %r4, 2
-;   lgr %r2, %r5
-;   dlr %r2, %r4
+;   lhi %r5, 2
+;   lgr %r2, %r4
+;   dlr %r2, %r5
 ;   lgr %r2, %r3
 ;   br %r14
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   lhi %r4, 0
-;   lgr %r5, %r4
 ;   llcr %r3, %r2
-;   lhi %r4, 2
-;   lgr %r2, %r5
-;   dlr %r2, %r4 ; trap: int_divz
+;   lhi %r5, 2
+;   lgr %r2, %r4
+;   dlr %r2, %r5 ; trap: int_divz
 ;   lgr %r2, %r3
 ;   br %r14
 
@@ -2077,30 +2057,23 @@ block0(v0: i16, v1: i16):
 }
 
 ; VCode:
-;   stmg %r7, %r15, 56(%r15)
 ; block0:
 ;   lgr %r4, %r3
 ;   lhi %r5, 0
-;   lgr %r7, %r5
 ;   llhr %r3, %r2
-;   llhr %r5, %r4
-;   lgr %r2, %r7
-;   dlr %r2, %r5
-;   lmg %r7, %r15, 56(%r15)
+;   llhr %r4, %r4
+;   lgr %r2, %r5
+;   dlr %r2, %r4
 ;   br %r14
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
-;   stmg %r7, %r15, 0x38(%r15)
-; block1: ; offset 0x6
 ;   lgr %r4, %r3
 ;   lhi %r5, 0
-;   lgr %r7, %r5
 ;   llhr %r3, %r2
-;   llhr %r5, %r4
-;   lgr %r2, %r7
-;   dlr %r2, %r5 ; trap: int_divz
-;   lmg %r7, %r15, 0x38(%r15)
+;   llhr %r4, %r4
+;   lgr %r2, %r5
+;   dlr %r2, %r4 ; trap: int_divz
 ;   br %r14
 
 function %urem_i8(i8, i8) -> i8 {
@@ -2110,29 +2083,22 @@ block0(v0: i8, v1: i8):
 }
 
 ; VCode:
-;   stmg %r7, %r15, 56(%r15)
 ; block0:
 ;   lgr %r4, %r3
 ;   lhi %r5, 0
-;   lgr %r7, %r5
 ;   llcr %r3, %r2
-;   llcr %r5, %r4
-;   lgr %r2, %r7
-;   dlr %r2, %r5
-;   lmg %r7, %r15, 56(%r15)
+;   llcr %r4, %r4
+;   lgr %r2, %r5
+;   dlr %r2, %r4
 ;   br %r14
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
-;   stmg %r7, %r15, 0x38(%r15)
-; block1: ; offset 0x6
 ;   lgr %r4, %r3
 ;   lhi %r5, 0
-;   lgr %r7, %r5
 ;   llcr %r3, %r2
-;   llcr %r5, %r4
-;   lgr %r2, %r7
-;   dlr %r2, %r5 ; trap: int_divz
-;   lmg %r7, %r15, 0x38(%r15)
+;   llcr %r4, %r4
+;   lgr %r2, %r5
+;   dlr %r2, %r4 ; trap: int_divz
 ;   br %r14
 
diff --git a/cranelift/filetests/filetests/isa/s390x/call-tail.clif b/cranelift/filetests/filetests/isa/s390x/call-tail.clif
index e2e930382..1ce224b65 100644
--- a/cranelift/filetests/filetests/isa/s390x/call-tail.clif
+++ b/cranelift/filetests/filetests/isa/s390x/call-tail.clif
@@ -245,16 +245,16 @@ block0(v0: i64):
 ; block0:
 ;   lgr %r10, %r2
 ;   brasl %r14, %f
+;   lgr %r13, %r2
+;   brasl %r14, %f
+;   lgr %r9, %r2
+;   brasl %r14, %f
 ;   lgr %r12, %r2
 ;   brasl %r14, %f
 ;   lgr %r8, %r2
 ;   brasl %r14, %f
-;   lgr %r9, %r2
-;   brasl %r14, %f
 ;   lgr %r11, %r2
 ;   brasl %r14, %f
-;   lgr %r13, %r2
-;   brasl %r14, %f
 ;   stg %r2, 184(%r15)
 ;   brasl %r14, %f
 ;   stg %r2, 176(%r15)
@@ -266,11 +266,11 @@ block0(v0: i64):
 ;   lg %r2, 352(%r15)
 ;   stg %r2, 168(%r15)
 ;   lgr %r2, %r10
-;   lgr %r3, %r12
-;   lgr %r4, %r8
-;   lgr %r5, %r9
-;   lgr %r6, %r11
-;   lgr %r7, %r13
+;   lgr %r3, %r13
+;   lgr %r4, %r9
+;   lgr %r5, %r12
+;   lgr %r6, %r8
+;   lgr %r7, %r11
 ;   brasl %r14, %g ; callee_pop_size 176
 ;   lg %r2, 168(%r15)
 ;   lmg %r8, %r15, 256(%r15)
@@ -283,15 +283,15 @@ block0(v0: i64):
 ; block1: ; offset 0xa
 ;   lgr %r10, %r2
 ;   brasl %r14, 0xe ; reloc_external PLTRel32Dbl %f 2
-;   lgr %r12, %r2
+;   lgr %r13, %r2
 ;   brasl %r14, 0x18 ; reloc_external PLTRel32Dbl %f 2
-;   lgr %r8, %r2
-;   brasl %r14, 0x22 ; reloc_external PLTRel32Dbl %f 2
 ;   lgr %r9, %r2
+;   brasl %r14, 0x22 ; reloc_external PLTRel32Dbl %f 2
+;   lgr %r12, %r2
 ;   brasl %r14, 0x2c ; reloc_external PLTRel32Dbl %f 2
-;   lgr %r11, %r2
+;   lgr %r8, %r2
 ;   brasl %r14, 0x36 ; reloc_external PLTRel32Dbl %f 2
-;   lgr %r13, %r2
+;   lgr %r11, %r2
 ;   brasl %r14, 0x40 ; reloc_external PLTRel32Dbl %f 2
 ;   stg %r2, 0xb8(%r15)
 ;   brasl %r14, 0x4c ; reloc_external PLTRel32Dbl %f 2
@@ -304,11 +304,11 @@ block0(v0: i64):
 ;   lg %r2, 0x160(%r15)
 ;   stg %r2, 0xa8(%r15)
 ;   lgr %r2, %r10
-;   lgr %r3, %r12
-;   lgr %r4, %r8
-;   lgr %r5, %r9
-;   lgr %r6, %r11
-;   lgr %r7, %r13
+;   lgr %r3, %r13
+;   lgr %r4, %r9
+;   lgr %r5, %r12
+;   lgr %r6, %r8
+;   lgr %r7, %r11
 ;   brasl %r14, 0x98 ; reloc_external PLTRel32Dbl %g 2
 ;   lg %r2, 0xa8(%r15)
 ;   lmg %r8, %r15, 0x100(%r15)
diff --git a/cranelift/filetests/filetests/isa/s390x/multivalue-ret.clif b/cranelift/filetests/filetests/isa/s390x/multivalue-ret.clif
index 75937accc..b80531782 100644
--- a/cranelift/filetests/filetests/isa/s390x/multivalue-ret.clif
+++ b/cranelift/filetests/filetests/isa/s390x/multivalue-ret.clif
@@ -40,16 +40,15 @@ block1:
 ; VCode:
 ;   stmg %r6, %r15, 48(%r15)
 ; block0:
-;   lghi %r5, 1
-;   lgr %r6, %r5
+;   lghi %r13, 1
 ;   lghi %r3, 2
 ;   lghi %r4, 3
 ;   lghi %r5, 4
-;   lghi %r13, 5
-;   lghi %r14, 6
-;   stg %r13, 0(%r2)
-;   stg %r14, 8(%r2)
-;   lgr %r2, %r6
+;   lghi %r14, 5
+;   lghi %r6, 6
+;   stg %r14, 0(%r2)
+;   stg %r6, 8(%r2)
+;   lgr %r2, %r13
 ;   lmg %r6, %r15, 48(%r15)
 ;   br %r14
 ;
@@ -57,16 +56,15 @@ block1:
 ; block0: ; offset 0x0
 ;   stmg %r6, %r15, 0x30(%r15)
 ; block1: ; offset 0x6
-;   lghi %r5, 1
-;   lgr %r6, %r5
+;   lghi %r13, 1
 ;   lghi %r3, 2
 ;   lghi %r4, 3
 ;   lghi %r5, 4
-;   lghi %r13, 5
-;   lghi %r14, 6
-;   stg %r13, 0(%r2)
-;   stg %r14, 8(%r2)
-;   lgr %r2, %r6
+;   lghi %r14, 5
+;   lghi %r6, 6
+;   stg %r14, 0(%r2)
+;   stg %r6, 8(%r2)
+;   lgr %r2, %r13
 ;   lmg %r6, %r15, 0x30(%r15)
 ;   br %r14
 
diff --git a/cranelift/filetests/filetests/isa/s390x/return-call-indirect.clif b/cranelift/filetests/filetests/isa/s390x/return-call-indirect.clif
index 2145a60bf..eb4bf5f5c 100644
--- a/cranelift/filetests/filetests/isa/s390x/return-call-indirect.clif
+++ b/cranelift/filetests/filetests/isa/s390x/return-call-indirect.clif
@@ -278,16 +278,16 @@ block0:
 ;   aghi %r15, -600
 ;   stg %r1, 0(%r15)
 ; block0:
-;   lghi %r2, 10
-;   stg %r2, 272(%r15)
-;   lghi %r3, 15
-;   stg %r3, 264(%r15)
-;   lghi %r4, 20
-;   stg %r4, 256(%r15)
-;   lghi %r5, 25
-;   stg %r5, 248(%r15)
-;   lghi %r6, 30
-;   stg %r6, 240(%r15)
+;   lghi %r3, 10
+;   stg %r3, 272(%r15)
+;   lghi %r4, 15
+;   stg %r4, 264(%r15)
+;   lghi %r5, 20
+;   stg %r5, 256(%r15)
+;   lghi %r6, 25
+;   stg %r6, 248(%r15)
+;   lghi %r7, 30
+;   stg %r7, 240(%r15)
 ;   lghi %r7, 35
 ;   stg %r7, 232(%r15)
 ;   lghi %r14, 40
@@ -356,8 +356,8 @@ block0:
 ;   lg %r5, 248(%r15)
 ;   lg %r6, 240(%r15)
 ;   lg %r7, 232(%r15)
-;   lg %r13, 160(%r15)
-;   return_call_ind %r13 ; callee_pop_size 320
+;   lg %r12, 160(%r15)
+;   return_call_ind %r12 ; callee_pop_size 320
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
@@ -366,16 +366,16 @@ block0:
 ;   aghi %r15, -0x258
 ;   stg %r1, 0(%r15)
 ; block1: ; offset 0x14
-;   lghi %r2, 0xa
-;   stg %r2, 0x110(%r15)
-;   lghi %r3, 0xf
-;   stg %r3, 0x108(%r15)
-;   lghi %r4, 0x14
-;   stg %r4, 0x100(%r15)
-;   lghi %r5, 0x19
-;   stg %r5, 0xf8(%r15)
-;   lghi %r6, 0x1e
-;   stg %r6, 0xf0(%r15)
+;   lghi %r3, 0xa
+;   stg %r3, 0x110(%r15)
+;   lghi %r4, 0xf
+;   stg %r4, 0x108(%r15)
+;   lghi %r5, 0x14
+;   stg %r5, 0x100(%r15)
+;   lghi %r6, 0x19
+;   stg %r6, 0xf8(%r15)
+;   lghi %r7, 0x1e
+;   stg %r7, 0xf0(%r15)
 ;   lghi %r7, 0x23
 ;   stg %r7, 0xe8(%r15)
 ;   lghi %r14, 0x28
@@ -449,8 +449,8 @@ block0:
 ;   lg %r5, 0xf8(%r15)
 ;   lg %r6, 0xf0(%r15)
 ;   lg %r7, 0xe8(%r15)
-;   lg %r13, 0xa0(%r15)
-;   lgr %r1, %r13
+;   lg %r12, 0xa0(%r15)
+;   lgr %r1, %r12
 ;   aghi %r15, 0x118
 ;   lmg %r8, %r14, 0x180(%r15)
 ;   br %r1
diff --git a/cranelift/filetests/filetests/isa/s390x/return-call.clif b/cranelift/filetests/filetests/isa/s390x/return-call.clif
index d5eb47729..bd521bc8d 100644
--- a/cranelift/filetests/filetests/isa/s390x/return-call.clif
+++ b/cranelift/filetests/filetests/isa/s390x/return-call.clif
@@ -105,45 +105,45 @@ block0(v0: i64):
 }
 
 ; VCode:
-;   stmg %r11, %r15, 88(%r15)
+;   stmg %r9, %r15, 72(%r15)
 ;   lgr %r1, %r15
 ;   aghi %r15, -160
 ;   stg %r1, 0(%r15)
 ; block0:
-;   lgr %r11, %r2
-;   lgr %r2, %r3
+;   lgr %r9, %r2
 ;   bras %r1, 12 ; data %callee_i64 + 0 ; lg %r7, 0(%r1)
+;   lgr %r2, %r3
 ;   basr %r14, %r7
-;   lgr %r3, %r2
 ;   bras %r1, 12 ; data %callee_i64_multiret + 0 ; lg %r7, 0(%r1)
-;   lgr %r2, %r11
+;   lgr %r3, %r2
+;   lgr %r2, %r9
 ;   return_call_ind %r7
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
-;   stmg %r11, %r15, 0x58(%r15)
+;   stmg %r9, %r15, 0x48(%r15)
 ;   lgr %r1, %r15
 ;   aghi %r15, -0xa0
 ;   stg %r1, 0(%r15)
 ; block1: ; offset 0x14
-;   lgr %r11, %r2
-;   lgr %r2, %r3
-;   bras %r1, 0x28
+;   lgr %r9, %r2
+;   bras %r1, 0x24
 ;   .byte 0x00, 0x00 ; reloc_external Abs8 %callee_i64 0
 ;   .byte 0x00, 0x00
 ;   .byte 0x00, 0x00
 ;   .byte 0x00, 0x00
 ;   lg %r7, 0(%r1)
+;   lgr %r2, %r3
 ;   basr %r14, %r7
-;   lgr %r3, %r2
-;   bras %r1, 0x40
+;   bras %r1, 0x3c
 ;   .byte 0x00, 0x00 ; reloc_external Abs8 %callee_i64_multiret 0
 ;   .byte 0x00, 0x00
 ;   .byte 0x00, 0x00
 ;   .byte 0x00, 0x00
 ;   lg %r7, 0(%r1)
-;   lgr %r2, %r11
-;   lmg %r11, %r15, 0xf8(%r15)
+;   lgr %r3, %r2
+;   lgr %r2, %r9
+;   lmg %r9, %r15, 0xe8(%r15)
 ;   br %r7
 
 ;;;; Test colocated tail calls ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -350,19 +350,18 @@ block0(v0: i32, v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32, v7: i32, v
 ;   aghi %r15, -160
 ;   stg %r1, 0(%r15)
 ; block0:
-;   lgr %r14, %r5
-;   lgr %r9, %r4
-;   lgr %r4, %r6
-;   lgr %r3, %r7
+;   lgr %r9, %r7
+;   lgr %r14, %r6
 ;   llgf %r6, 324(%r15)
 ;   llgf %r7, 332(%r15)
-;   llgf %r5, 340(%r15)
-;   lg %r2, 344(%r15)
-;   stg %r2, 176(%r15)
-;   st %r5, 340(%r15)
-;   lgr %r5, %r3
-;   lgr %r3, %r14
-;   lgr %r2, %r9
+;   llgf %r2, 340(%r15)
+;   lg %r3, 344(%r15)
+;   stg %r3, 176(%r15)
+;   st %r2, 340(%r15)
+;   lgr %r3, %r5
+;   lgr %r5, %r9
+;   lgr %r2, %r4
+;   lgr %r4, %r14
 ;   return_call %one_stack_arg ; callee_pop_size 168
 ;
 ; Disassembled:
@@ -372,22 +371,21 @@ block0(v0: i32, v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32, v7: i32, v
 ;   aghi %r15, -0xa0
 ;   stg %r1, 0(%r15)
 ; block1: ; offset 0x14
-;   lgr %r14, %r5
-;   lgr %r9, %r4
-;   lgr %r4, %r6
-;   lgr %r3, %r7
+;   lgr %r9, %r7
+;   lgr %r14, %r6
 ;   llgf %r6, 0x144(%r15)
 ;   llgf %r7, 0x14c(%r15)
-;   llgf %r5, 0x154(%r15)
-;   lg %r2, 0x158(%r15)
-;   stg %r2, 0xb0(%r15)
-;   st %r5, 0x154(%r15)
-;   lgr %r5, %r3
-;   lgr %r3, %r14
-;   lgr %r2, %r9
+;   llgf %r2, 0x154(%r15)
+;   lg %r3, 0x158(%r15)
+;   stg %r3, 0xb0(%r15)
+;   st %r2, 0x154(%r15)
+;   lgr %r3, %r5
+;   lgr %r5, %r9
+;   lgr %r2, %r4
+;   lgr %r4, %r14
 ;   aghi %r15, 0xb0
 ;   lmg %r9, %r14, 0xf0(%r15)
-;   jg 0x5c ; reloc_external PLTRel32Dbl %one_stack_arg 2
+;   jg 0x58 ; reloc_external PLTRel32Dbl %one_stack_arg 2
 
 function %call_zero_stack_args(i32, i32, i32, i32, i32, i32, i32, i32, i8) -> i8 tail {
     fn0 = colocated %callee_i8(i8) -> i8 tail
@@ -427,51 +425,47 @@ block0(v0: i32, v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32):
 }
 
 ; VCode:
-;   stmg %r9, %r15, 240(%r15)
+;   stmg %r8, %r15, 232(%r15)
 ;   la %r1, 168(%r15)
 ;   aghi %r15, -176
 ;   stg %r1, 0(%r15)
 ; block0:
-;   lgr %r14, %r5
-;   lgr %r9, %r4
-;   lgr %r4, %r6
-;   lgr %r6, %r7
+;   lgr %r8, %r7
 ;   llgf %r7, 340(%r15)
-;   lg %r5, 344(%r15)
-;   stg %r5, 160(%r15)
+;   lg %r10, 344(%r15)
+;   stg %r10, 160(%r15)
 ;   st %r2, 324(%r15)
 ;   st %r2, 332(%r15)
 ;   st %r3, 340(%r15)
-;   lgr %r5, %r4
-;   lgr %r4, %r14
 ;   lgr %r2, %r3
-;   lgr %r3, %r9
+;   lgr %r3, %r4
+;   lgr %r4, %r5
+;   lgr %r5, %r6
+;   lgr %r6, %r8
 ;   return_call %call_one_stack_arg ; callee_pop_size 184
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
-;   stmg %r9, %r15, 0xf0(%r15)
+;   stmg %r8, %r15, 0xe8(%r15)
 ;   la %r1, 0xa8(%r15)
 ;   aghi %r15, -0xb0
 ;   stg %r1, 0(%r15)
 ; block1: ; offset 0x14
-;   lgr %r14, %r5
-;   lgr %r9, %r4
-;   lgr %r4, %r6
-;   lgr %r6, %r7
+;   lgr %r8, %r7
 ;   llgf %r7, 0x154(%r15)
-;   lg %r5, 0x158(%r15)
-;   stg %r5, 0xa0(%r15)
+;   lg %r10, 0x158(%r15)
+;   stg %r10, 0xa0(%r15)
 ;   st %r2, 0x144(%r15)
 ;   st %r2, 0x14c(%r15)
 ;   st %r3, 0x154(%r15)
-;   lgr %r5, %r4
-;   lgr %r4, %r14
 ;   lgr %r2, %r3
-;   lgr %r3, %r9
+;   lgr %r3, %r4
+;   lgr %r4, %r5
+;   lgr %r5, %r6
+;   lgr %r6, %r8
 ;   aghi %r15, 0xa0
-;   lmg %r9, %r14, 0x100(%r15)
-;   jg 0x5c ; reloc_external PLTRel32Dbl %call_one_stack_arg 2
+;   lmg %r8, %r14, 0xf8(%r15)
+;   jg 0x54 ; reloc_external PLTRel32Dbl %call_one_stack_arg 2
 
 ;;;; Test passing many arguments on stack ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
@@ -542,16 +536,16 @@ block0:
 ;   aghi %r15, -592
 ;   stg %r1, 0(%r15)
 ; block0:
-;   lghi %r2, 10
-;   stg %r2, 264(%r15)
-;   lghi %r3, 15
-;   stg %r3, 256(%r15)
-;   lghi %r4, 20
-;   stg %r4, 248(%r15)
-;   lghi %r5, 25
-;   stg %r5, 240(%r15)
-;   lghi %r6, 30
-;   stg %r6, 232(%r15)
+;   lghi %r3, 10
+;   stg %r3, 264(%r15)
+;   lghi %r4, 15
+;   stg %r4, 256(%r15)
+;   lghi %r5, 20
+;   stg %r5, 248(%r15)
+;   lghi %r6, 25
+;   stg %r6, 240(%r15)
+;   lghi %r7, 30
+;   stg %r7, 232(%r15)
 ;   lghi %r7, 35
 ;   stg %r7, 224(%r15)
 ;   lghi %r14, 40
@@ -628,16 +622,16 @@ block0:
 ;   aghi %r15, -0x250
 ;   stg %r1, 0(%r15)
 ; block1: ; offset 0x14
-;   lghi %r2, 0xa
-;   stg %r2, 0x108(%r15)
-;   lghi %r3, 0xf
-;   stg %r3, 0x100(%r15)
-;   lghi %r4, 0x14
-;   stg %r4, 0xf8(%r15)
-;   lghi %r5, 0x19
-;   stg %r5, 0xf0(%r15)
-;   lghi %r6, 0x1e
-;   stg %r6, 0xe8(%r15)
+;   lghi %r3, 0xa
+;   stg %r3, 0x108(%r15)
+;   lghi %r4, 0xf
+;   stg %r4, 0x100(%r15)
+;   lghi %r5, 0x14
+;   stg %r5, 0xf8(%r15)
+;   lghi %r6, 0x19
+;   stg %r6, 0xf0(%r15)
+;   lghi %r7, 0x1e
+;   stg %r7, 0xe8(%r15)
 ;   lghi %r7, 0x23
 ;   stg %r7, 0xe0(%r15)
 ;   lghi %r14, 0x28
diff --git a/cranelift/filetests/filetests/isa/s390x/struct-arg.clif b/cranelift/filetests/filetests/isa/s390x/struct-arg.clif
index e34cf9058..b7b8f2097 100644
--- a/cranelift/filetests/filetests/isa/s390x/struct-arg.clif
+++ b/cranelift/filetests/filetests/isa/s390x/struct-arg.clif
@@ -163,41 +163,41 @@ block0(v0: i64, v1: i64, v2: i64):
 }
 
 ; VCode:
-;   stmg %r7, %r15, 56(%r15)
+;   stmg %r8, %r15, 64(%r15)
 ;   aghi %r15, -1248
 ; block0:
-;   lgr %r7, %r2
-;   lgr %r9, %r4
+;   lgr %r8, %r2
+;   lgr %r10, %r4
 ;   la %r2, 160(%r15)
 ;   la %r3, 0(%r3)
 ;   lghi %r4, 1024
 ;   brasl %r14, %Memcpy
-;   lgr %r4, %r9
+;   lgr %r4, %r10
 ;   mvc 1184(63,%r15), 0(%r4)
 ;   la %r3, 160(%r15)
 ;   la %r4, 1184(%r15)
-;   lgr %r2, %r7
+;   lgr %r2, %r8
 ;   brasl %r14, userextname0
-;   lmg %r7, %r15, 1304(%r15)
+;   lmg %r8, %r15, 1312(%r15)
 ;   br %r14
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
-;   stmg %r7, %r15, 0x38(%r15)
+;   stmg %r8, %r15, 0x40(%r15)
 ;   aghi %r15, -0x4e0
 ; block1: ; offset 0xa
-;   lgr %r7, %r2
-;   lgr %r9, %r4
+;   lgr %r8, %r2
+;   lgr %r10, %r4
 ;   la %r2, 0xa0(%r15)
 ;   la %r3, 0(%r3)
 ;   lghi %r4, 0x400
 ;   brasl %r14, 0x1e ; reloc_external PLTRel32Dbl %Memcpy 2
-;   lgr %r4, %r9
+;   lgr %r4, %r10
 ;   mvc 0x4a0(0x40, %r15), 0(%r4)
 ;   la %r3, 0xa0(%r15)
 ;   la %r4, 0x4a0(%r15)
-;   lgr %r2, %r7
+;   lgr %r2, %r8
 ;   brasl %r14, 0x3a ; reloc_external PLTRel32Dbl u0:0 2
-;   lmg %r7, %r15, 0x518(%r15)
+;   lmg %r8, %r15, 0x520(%r15)
 ;   br %r14
 
diff --git a/cranelift/filetests/filetests/isa/s390x/user_stack_maps.clif b/cranelift/filetests/filetests/isa/s390x/user_stack_maps.clif
index 9ee6c7c1f..053dde2c7 100644
--- a/cranelift/filetests/filetests/isa/s390x/user_stack_maps.clif
+++ b/cranelift/filetests/filetests/isa/s390x/user_stack_maps.clif
@@ -32,73 +32,67 @@ block0:
 }
 
 ; VCode:
-;   stmg %r7, %r15, 56(%r15)
+;   stmg %r6, %r15, 48(%r15)
 ;   aghi %r15, -176
 ; block0:
-;   lhi %r2, 0
-;   lgr %r11, %r2
-;   lhi %r2, 1
-;   lgr %r7, %r2
-;   lhi %r2, 2
-;   lgr %r9, %r2
+;   lhi %r8, 0
+;   lhi %r6, 1
+;   lhi %r7, 2
 ;   la %r2, 160(%r15)
 ;   mvhi 0(%r2), 0
 ;   la %r3, 164(%r15)
 ;   mvhi 0(%r3), 1
 ;   la %r4, 168(%r15)
 ;   mvhi 0(%r4), 2
-;   lgr %r2, %r11
+;   lgr %r2, %r8
 ;   brasl %r14, userextname0
 ;   ; UserStackMap { by_type: [(types::I32, CompoundBitSet {0, 4, 8})], sp_to_sized_stack_slots: None }
 ;   la %r2, 160(%r15)
 ;   mvhi 0(%r2), 1
 ;   la %r3, 164(%r15)
 ;   mvhi 0(%r3), 2
-;   lgr %r2, %r11
+;   lgr %r2, %r8
 ;   brasl %r14, userextname0
 ;   ; UserStackMap { by_type: [(types::I32, CompoundBitSet {0, 4})], sp_to_sized_stack_slots: None }
 ;   la %r5, 160(%r15)
 ;   mvhi 0(%r5), 2
-;   lgr %r2, %r7
+;   lgr %r2, %r6
 ;   brasl %r14, userextname0
 ;   ; UserStackMap { by_type: [(types::I32, CompoundBitSet {0})], sp_to_sized_stack_slots: None }
-;   lgr %r2, %r9
+;   lgr %r2, %r7
 ;   brasl %r14, userextname0
-;   lmg %r7, %r15, 232(%r15)
+;   lmg %r6, %r15, 224(%r15)
 ;   br %r14
 ;
 ; Disassembled:
 ; block0: ; offset 0x0
-;   stmg %r7, %r15, 0x38(%r15)
+;   stmg %r6, %r15, 0x30(%r15)
 ;   aghi %r15, -0xb0
 ; block1: ; offset 0xa
-;   lhi %r2, 0
-;   lgr %r11, %r2
-;   lhi %r2, 1
-;   lgr %r7, %r2
-;   lhi %r2, 2
-;   lgr %r9, %r2
+;   lhi %r8, 0
+;   lhi %r6, 1
+;   lhi %r7, 2
 ;   la %r2, 0xa0(%r15)
 ;   mvhi 0(%r2), 0
 ;   la %r3, 0xa4(%r15)
 ;   mvhi 0(%r3), 1
 ;   la %r4, 0xa8(%r15)
 ;   mvhi 0(%r4), 2
-;   lgr %r2, %r11
-;   brasl %r14, 0x44 ; reloc_external PLTRel32Dbl u0:0 2
+;   lgr %r2, %r8
+;   brasl %r14, 0x38 ; reloc_external PLTRel32Dbl u0:0 2
 ;   la %r2, 0xa0(%r15)
 ;   mvhi 0(%r2), 1
 ;   la %r3, 0xa4(%r15)
 ;   mvhi 0(%r3), 2
-;   lgr %r2, %r11
-;   brasl %r14, 0x62 ; reloc_external PLTRel32Dbl u0:0 2
+;   lgr %r2, %r8
+;   brasl %r14, 0x56 ; reloc_external PLTRel32Dbl u0:0 2
 ;   la %r5, 0xa0(%r15)
 ;   mvhi 0(%r5), 2
+;   lgr %r2, %r6
+;   brasl %r14, 0x6a ; reloc_external PLTRel32Dbl u0:0 2
 ;   lgr %r2, %r7
-;   brasl %r14, 0x76 ; reloc_external PLTRel32Dbl u0:0 2
-;   lgr %r2, %r9
-;   brasl %r14, 0x80 ; reloc_external PLTRel32Dbl u0:0 2
-;   lmg %r7, %r15, 0xe8(%r15)
+;   brasl %r14, 0x74 ; reloc_external PLTRel32Dbl u0:0 2
+;   lmg %r6, %r15, 0xe0(%r15)
 ;   br %r14
 
 function %different_types(i8, i16, i32, i64, f32, f64) -> i8, i16, i32, i64, f32, f64 {
@@ -135,28 +129,28 @@ block0(v0: i8, v1: i16, v2: i32, v3: i64, v4: f32, v5: f64):
 ; block0:
 ;   la %r9, 160(%r15)
 ;   stc %r2, 0(%r9)
-;   lgr %r11, %r2
+;   lgr %r9, %r2
 ;   la %r2, 168(%r15)
 ;   sth %r3, 0(%r2)
-;   lgr %r9, %r3
+;   lgr %r6, %r3
 ;   la %r2, 176(%r15)
 ;   st %r4, 0(%r2)
-;   lgr %r7, %r4
+;   lgr %r11, %r4
 ;   la %r2, 180(%r15)
 ;   ste %f0, 0(%r2)
 ;   vst %v0, 256(%r15)
 ;   la %r2, 184(%r15)
 ;   stg %r5, 0(%r2)
-;   lgr %r6, %r5
+;   lgr %r8, %r5
 ;   la %r3, 192(%r15)
 ;   std %f2, 0(%r3)
 ;   vst %v2, 272(%r15)
 ;   brasl %r14, userextname0
 ;   ; UserStackMap { by_type: [(types::I8, CompoundBitSet {0}), (types::I16, CompoundBitSet {8}), (types::I32, CompoundBitSet {16}), (types::F32, CompoundBitSet {20}), (types::I64, CompoundBitSet {24}), (types::F64, CompoundBitSet {32})], sp_to_sized_stack_slots: None }
-;   lgr %r2, %r11
-;   lgr %r3, %r9
-;   lgr %r4, %r7
-;   lgr %r5, %r6
+;   lgr %r2, %r9
+;   lgr %r3, %r6
+;   lgr %r4, %r11
+;   lgr %r5, %r8
 ;   vl %v0, 256(%r15)
 ;   vl %v2, 272(%r15)
 ;   ld %f8, 288(%r15)
@@ -185,27 +179,27 @@ block0(v0: i8, v1: i16, v2: i32, v3: i64, v4: f32, v5: f64):
 ; block1: ; offset 0x2a
 ;   la %r9, 0xa0(%r15)
 ;   stc %r2, 0(%r9)
-;   lgr %r11, %r2
+;   lgr %r9, %r2
 ;   la %r2, 0xa8(%r15)
 ;   sth %r3, 0(%r2)
-;   lgr %r9, %r3
+;   lgr %r6, %r3
 ;   la %r2, 0xb0(%r15)
 ;   st %r4, 0(%r2)
-;   lgr %r7, %r4
+;   lgr %r11, %r4
 ;   la %r2, 0xb4(%r15)
 ;   ste %f0, 0(%r2)
 ;   vst %v0, 0x100(%r15)
 ;   la %r2, 0xb8(%r15)
 ;   stg %r5, 0(%r2)
-;   lgr %r6, %r5
+;   lgr %r8, %r5
 ;   la %r3, 0xc0(%r15)
 ;   std %f2, 0(%r3)
 ;   vst %v2, 0x110(%r15)
 ;   brasl %r14, 0x78 ; reloc_external PLTRel32Dbl u0:0 2
-;   lgr %r2, %r11
-;   lgr %r3, %r9
-;   lgr %r4, %r7
-;   lgr %r5, %r6
+;   lgr %r2, %r9
+;   lgr %r3, %r6
+;   lgr %r4, %r11
+;   lgr %r5, %r8
 ;   vl %v0, 0x100(%r15)
 ;   vl %v2, 0x110(%r15)
 ;   ld %f8, 0x120(%r15)
diff --git a/cranelift/filetests/filetests/isa/x64/call-conv.clif b/cranelift/filetests/filetests/isa/x64/call-conv.clif
index a3b064088..6b9deb3a5 100644
--- a/cranelift/filetests/filetests/isa/x64/call-conv.clif
+++ b/cranelift/filetests/filetests/isa/x64/call-conv.clif
@@ -193,11 +193,6 @@ block0(
 ;   movq    %rsp, %rbp
 ;   subq    %rsp, $144, %rsp
 ; block0:
-;   movq    %rcx, %rax
-;   movq    %rdx, %rcx
-;   movq    %rsi, %rdx
-;   movq    %rdi, %rsi
-;   movq    %rax, %rdi
 ;   movq    rbp(stack args max - 32), %r10
 ;   movq    rbp(stack args max - 24), %r11
 ;   movss   rbp(stack args max - 16), %xmm11
@@ -216,9 +211,10 @@ block0(
 ;   movl    %r11d, 120(%rsp)
 ;   movss   %xmm11, 128(%rsp)
 ;   movsd   %xmm13, 136(%rsp)
-;   movq    %rdi, %r9
-;   movq    %rcx, %r8
-;   movq    %rsi, %rcx
+;   movq    %rcx, %r9
+;   movq    %rdx, %r8
+;   movq    %rsi, %rdx
+;   movq    %rdi, %rcx
 ;   call    *%rcx
 ;   addq    %rsp, $144, %rsp
 ;   movq    %rbp, %rsp
@@ -231,11 +227,6 @@ block0(
 ;   movq %rsp, %rbp
 ;   subq $0x90, %rsp
 ; block1: ; offset 0xb
-;   movq %rcx, %rax
-;   movq %rdx, %rcx
-;   movq %rsi, %rdx
-;   movq %rdi, %rsi
-;   movq %rax, %rdi
 ;   movq 0x10(%rbp), %r10
 ;   movq 0x18(%rbp), %r11
 ;   movss 0x20(%rbp), %xmm11
@@ -254,9 +245,10 @@ block0(
 ;   movl %r11d, 0x78(%rsp)
 ;   movss %xmm11, 0x80(%rsp)
 ;   movsd %xmm13, 0x88(%rsp)
-;   movq %rdi, %r9
-;   movq %rcx, %r8
-;   movq %rsi, %rcx
+;   movq %rcx, %r9
+;   movq %rdx, %r8
+;   movq %rsi, %rdx
+;   movq %rdi, %rcx
 ;   callq *%rcx
 ;   addq $0x90, %rsp
 ;   movq %rbp, %rsp
@@ -280,12 +272,11 @@ block0(v0: i64, v1:i64, v2:i64, v3:i64, v4:i64):
 ;   movq    %rsp, %rbp
 ;   subq    %rsp, $48, %rsp
 ; block0:
-;   movq    %rdx, %r11
+;   movq    %r8, 32(%rsp)
 ;   movq    %rcx, %r9
+;   movq    %rdx, %r8
 ;   movq    %rsi, %rdx
 ;   movq    %rdi, %rcx
-;   movq    %r8, 32(%rsp)
-;   movq    %r11, %r8
 ;   call    *%rcx
 ;   addq    %rsp, $48, %rsp
 ;   movq    %rbp, %rsp
@@ -298,12 +289,11 @@ block0(v0: i64, v1:i64, v2:i64, v3:i64, v4:i64):
 ;   movq %rsp, %rbp
 ;   subq $0x30, %rsp
 ; block1: ; offset 0x8
-;   movq %rdx, %r11
+;   movq %r8, 0x20(%rsp)
 ;   movq %rcx, %r9
+;   movq %rdx, %r8
 ;   movq %rsi, %rdx
 ;   movq %rdi, %rcx
-;   movq %r8, 0x20(%rsp)
-;   movq %r11, %r8
 ;   callq *%rcx
 ;   addq $0x30, %rsp
 ;   movq %rbp, %rsp
@@ -322,10 +312,6 @@ block0(v0: i32, v1: f32, v2: i64, v3: f64, v4: i32, v5: i32, v6: i32, v7: f32, v
 ;   movq    %rsp, %rbp
 ;   subq    %rsp, $96, %rsp
 ; block0:
-;   movq    %rsi, %r9
-;   movq    %rdi, %rsi
-;   movdqa  %xmm1, %xmm6
-;   movdqa  %xmm0, %xmm1
 ;   movl    %edx, 32(%rsp)
 ;   movl    %ecx, 40(%rsp)
 ;   movl    %r8d, 48(%rsp)
@@ -333,9 +319,10 @@ block0(v0: i32, v1: f32, v2: i64, v3: f64, v4: i32, v5: i32, v6: i32, v7: f32, v
 ;   movsd   %xmm3, 64(%rsp)
 ;   movss   %xmm4, 72(%rsp)
 ;   movsd   %xmm5, 80(%rsp)
-;   movq    %rsi, %rcx
-;   movq    %r9, %r8
-;   movdqa  %xmm6, %xmm3
+;   movq    %rdi, %rcx
+;   movq    %rsi, %r8
+;   movdqa  %xmm1, %xmm3
+;   movdqa  %xmm0, %xmm1
 ;   call    *%rcx
 ;   addq    %rsp, $96, %rsp
 ;   movq    %rbp, %rsp
@@ -348,10 +335,6 @@ block0(v0: i32, v1: f32, v2: i64, v3: f64, v4: i32, v5: i32, v6: i32, v7: f32, v
 ;   movq %rsp, %rbp
 ;   subq $0x60, %rsp
 ; block1: ; offset 0x8
-;   movq %rsi, %r9
-;   movq %rdi, %rsi
-;   movdqa %xmm1, %xmm6
-;   movdqa %xmm0, %xmm1
 ;   movl %edx, 0x20(%rsp)
 ;   movl %ecx, 0x28(%rsp)
 ;   movl %r8d, 0x30(%rsp)
@@ -359,9 +342,10 @@ block0(v0: i32, v1: f32, v2: i64, v3: f64, v4: i32, v5: i32, v6: i32, v7: f32, v
 ;   movsd %xmm3, 0x40(%rsp)
 ;   movss %xmm4, 0x48(%rsp)
 ;   movsd %xmm5, 0x50(%rsp)
-;   movq %rsi, %rcx
-;   movq %r9, %r8
-;   movdqa %xmm6, %xmm3
+;   movq %rdi, %rcx
+;   movq %rsi, %r8
+;   movdqa %xmm1, %xmm3
+;   movdqa %xmm0, %xmm1
 ;   callq *%rcx
 ;   addq $0x60, %rsp
 ;   movq %rbp, %rsp
@@ -415,12 +399,12 @@ block0(v0: i32, v1: i32, v2: i8x16, v3: i64, v4: i8x16):
 ;   movq    %rsp, %rbp
 ;   subq    %rsp, $64, %rsp
 ; block0:
-;   movq    %rsi, %rcx
 ;   movq    %rdx, %r8
 ;   lea     32(%rsp), %rdx
 ;   movdqu  %xmm0, 0(%rdx)
 ;   lea     48(%rsp), %r9
 ;   movdqu  %xmm1, 0(%r9)
+;   movq    %rsi, %rcx
 ;   call    *%rdi
 ;   paddb   %xmm0, %xmm0, %xmm0
 ;   addq    %rsp, $64, %rsp
@@ -434,12 +418,12 @@ block0(v0: i32, v1: i32, v2: i8x16, v3: i64, v4: i8x16):
 ;   movq %rsp, %rbp
 ;   subq $0x40, %rsp
 ; block1: ; offset 0x8
-;   movq %rsi, %rcx
 ;   movq %rdx, %r8
 ;   leaq 0x20(%rsp), %rdx
 ;   movdqu %xmm0, (%rdx)
 ;   leaq 0x30(%rsp), %r9
 ;   movdqu %xmm1, (%r9)
+;   movq %rsi, %rcx
 ;   callq *%rdi
 ;   paddb %xmm0, %xmm0
 ;   addq $0x40, %rsp
@@ -459,10 +443,10 @@ block0(v0: i32, v1: i8x16):
 ;   movq    %rsp, %rbp
 ;   subq    %rsp, $64, %rsp
 ; block0:
-;   movq    %rdi, %r9
 ;   lea     48(%rsp), %rcx
 ;   movdqu  %xmm0, 0(%rcx)
 ;   movq    %rcx, 32(%rsp)
+;   movq    %rdi, %r9
 ;   movq    %r9, %rcx
 ;   movq    %r9, %rdx
 ;   movq    %r9, %r8
@@ -478,10 +462,10 @@ block0(v0: i32, v1: i8x16):
 ;   movq %rsp, %rbp
 ;   subq $0x40, %rsp
 ; block1: ; offset 0x8
-;   movq %rdi, %r9
 ;   leaq 0x30(%rsp), %rcx
 ;   movdqu %xmm0, (%rcx)
 ;   movq %rcx, 0x20(%rsp)
+;   movq %rdi, %r9
 ;   movq %r9, %rcx
 ;   movq %r9, %rdx
 ;   movq %r9, %r8
@@ -503,13 +487,13 @@ block0(v0: i32, v1: i8x16):
 ;   movq    %rsp, %rbp
 ;   subq    %rsp, $80, %rsp
 ; block0:
-;   movq    %rdi, %r9
 ;   lea     48(%rsp), %rcx
 ;   movdqu  %xmm0, 0(%rcx)
 ;   movq    %rcx, 32(%rsp)
 ;   lea     64(%rsp), %r10
 ;   movdqu  %xmm0, 0(%r10)
 ;   movq    %r10, 40(%rsp)
+;   movq    %rdi, %r9
 ;   movq    %r9, %rcx
 ;   movq    %r9, %rdx
 ;   movq    %r9, %r8
@@ -525,13 +509,13 @@ block0(v0: i32, v1: i8x16):
 ;   movq %rsp, %rbp
 ;   subq $0x50, %rsp
 ; block1: ; offset 0x8
-;   movq %rdi, %r9
 ;   leaq 0x30(%rsp), %rcx
 ;   movdqu %xmm0, (%rcx)
 ;   movq %rcx, 0x20(%rsp)
 ;   leaq 0x40(%rsp), %r10
 ;   movdqu %xmm0, (%r10)
 ;   movq %r10, 0x28(%rsp)
+;   movq %rdi, %r9
 ;   movq %r9, %rcx
 ;   movq %r9, %rdx
 ;   movq %r9, %r8
@@ -553,16 +537,15 @@ block0(v0: i32, v1: i8x16):
 ;   movq    %rsp, %rbp
 ;   subq    %rsp, $96, %rsp
 ; block0:
-;   movq    %rdi, %r10
 ;   lea     48(%rsp), %rdx
 ;   movdqu  %xmm0, 0(%rdx)
 ;   lea     64(%rsp), %r9
 ;   movdqu  %xmm0, 0(%r9)
 ;   movq    %r9, 32(%rsp)
-;   lea     80(%rsp), %rdi
-;   movdqu  %xmm0, 0(%rdi)
-;   movq    %rdi, 40(%rsp)
-;   movq    %r10, %r9
+;   lea     80(%rsp), %rax
+;   movdqu  %xmm0, 0(%rax)
+;   movq    %rax, 40(%rsp)
+;   movq    %rdi, %r9
 ;   movq    %r9, %rcx
 ;   movq    %r9, %r8
 ;   call    *%r9
@@ -577,16 +560,15 @@ block0(v0: i32, v1: i8x16):
 ;   movq %rsp, %rbp
 ;   subq $0x60, %rsp
 ; block1: ; offset 0x8
-;   movq %rdi, %r10
 ;   leaq 0x30(%rsp), %rdx
 ;   movdqu %xmm0, (%rdx)
 ;   leaq 0x40(%rsp), %r9
 ;   movdqu %xmm0, (%r9)
 ;   movq %r9, 0x20(%rsp)
-;   leaq 0x50(%rsp), %rdi
-;   movdqu %xmm0, (%rdi)
-;   movq %rdi, 0x28(%rsp)
-;   movq %r10, %r9
+;   leaq 0x50(%rsp), %rax
+;   movdqu %xmm0, (%rax)
+;   movq %rax, 0x28(%rsp)
+;   movq %rdi, %r9
 ;   movq %r9, %rcx
 ;   movq %r9, %r8
 ;   callq *%r9
diff --git a/cranelift/filetests/filetests/isa/x64/fastcall.clif b/cranelift/filetests/filetests/isa/x64/fastcall.clif
index 44b42f962..b12e54522 100644
--- a/cranelift/filetests/filetests/isa/x64/fastcall.clif
+++ b/cranelift/filetests/filetests/isa/x64/fastcall.clif
@@ -245,8 +245,8 @@ block0(v0: i64):
 ;   cvtsi2sd %xmm3, %rcx, %xmm3
 ;   movq    %rcx, 32(%rsp)
 ;   movq    %rcx, 40(%rsp)
-;   movq    %rcx, %rdx
 ;   load_ext_name %g+0, %r11
+;   movq    %rcx, %rdx
 ;   movdqa  %xmm3, %xmm2
 ;   call    *%r11
 ;   addq    %rsp, $48, %rsp
@@ -264,8 +264,8 @@ block0(v0: i64):
 ;   cvtsi2sdq %rcx, %xmm3
 ;   movq %rcx, 0x20(%rsp)
 ;   movq %rcx, 0x28(%rsp)
-;   movq %rcx, %rdx
 ;   movabsq $0, %r11 ; reloc_external Abs8 %g 0
+;   movq %rcx, %rdx
 ;   movdqa %xmm3, %xmm2
 ;   callq *%r11
 ;   addq $0x30, %rsp
diff --git a/cranelift/filetests/filetests/isa/x64/fma-call.clif b/cranelift/filetests/filetests/isa/x64/fma-call.clif
index 8b19a8e94..5572974f0 100644
--- a/cranelift/filetests/filetests/isa/x64/fma-call.clif
+++ b/cranelift/filetests/filetests/isa/x64/fma-call.clif
@@ -187,9 +187,9 @@ block0(v0: f64x2, v1: f64x2, v2: f64x2):
 ;   pshufd  $238, %xmm2, %xmm2
 ;   load_ext_name %FmaF64+0, %r9
 ;   call    *%r9
-;   movdqa  %xmm0, %xmm7
+;   movdqa  %xmm0, %xmm6
 ;   movdqu  rsp(48 + virtual offset), %xmm0
-;   movlhps %xmm0, %xmm7, %xmm0
+;   movlhps %xmm0, %xmm6, %xmm0
 ;   addq    %rsp, $64, %rsp
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -215,9 +215,9 @@ block0(v0: f64x2, v1: f64x2, v2: f64x2):
 ;   pshufd $0xee, %xmm2, %xmm2
 ;   movabsq $0, %r9 ; reloc_external Abs8 %FmaF64 0
 ;   callq *%r9
-;   movdqa %xmm0, %xmm7
+;   movdqa %xmm0, %xmm6
 ;   movdqu 0x30(%rsp), %xmm0
-;   movlhps %xmm7, %xmm0
+;   movlhps %xmm6, %xmm0
 ;   addq $0x40, %rsp
 ;   movq %rbp, %rsp
 ;   popq %rbp
diff --git a/cranelift/filetests/filetests/isa/x64/i128.clif b/cranelift/filetests/filetests/isa/x64/i128.clif
index 62df9b43a..9c1b90167 100644
--- a/cranelift/filetests/filetests/isa/x64/i128.clif
+++ b/cranelift/filetests/filetests/isa/x64/i128.clif
@@ -202,13 +202,13 @@ block0(v0: i128, v1: i128):
 ;   movq    %rdi, %rdx
 ;   imulq   %rdx, %rcx, %rdx
 ;   movq    %rax, %rcx
-;   movq    %rdi, %rax
 ;   imulq   %rsi, %rcx, %rsi
 ;   addq    %rdx, %rsi, %rdx
-;   movq    %rdx, %r9
+;   movq    %rdi, %rax
+;   movq    %rdx, %r8
 ;   mulq    %rax, %rcx, %rax, %rdx
 ;   movq    %rdx, %rcx
-;   movq    %r9, %rdx
+;   movq    %r8, %rdx
 ;   addq    %rdx, %rcx, %rdx
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -223,13 +223,13 @@ block0(v0: i128, v1: i128):
 ;   movq %rdi, %rdx
 ;   imulq %rcx, %rdx
 ;   movq %rax, %rcx
-;   movq %rdi, %rax
 ;   imulq %rcx, %rsi
 ;   addq %rsi, %rdx
-;   movq %rdx, %r9
+;   movq %rdi, %rax
+;   movq %rdx, %r8
 ;   mulq %rcx
 ;   movq %rdx, %rcx
-;   movq %r9, %rdx
+;   movq %r8, %rdx
 ;   addq %rcx, %rdx
 ;   movq %rbp, %rsp
 ;   popq %rbp
@@ -564,8 +564,8 @@ block0(v0: i64):
 ;   pushq   %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movq    %rdi, %rax
 ;   xorq    %rdx, %rdx, %rdx
+;   movq    %rdi, %rax
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
 ;   ret
@@ -575,8 +575,8 @@ block0(v0: i64):
 ;   pushq %rbp
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
-;   movq %rdi, %rax
 ;   xorq %rdx, %rdx
+;   movq %rdi, %rax
 ;   movq %rbp, %rsp
 ;   popq %rbp
 ;   retq
@@ -1251,8 +1251,8 @@ block0(v0: i128):
 ;   movq    %rdi, 32(%rdx)
 ;   movq    %rsi, 40(%rdx)
 ;   movq    %rdi, 48(%rdx)
-;   movq    %rdi, %rcx
 ;   movq    %rsi, 56(%rdx)
+;   movq    %rdi, %rcx
 ;   movq    %rsi, %rdx
 ;   movq    %rcx, %rax
 ;   movq    %rbp, %rsp
@@ -1271,8 +1271,8 @@ block0(v0: i128):
 ;   movq %rdi, 0x20(%rdx)
 ;   movq %rsi, 0x28(%rdx)
 ;   movq %rdi, 0x30(%rdx)
-;   movq %rdi, %rcx
 ;   movq %rsi, 0x38(%rdx)
+;   movq %rdi, %rcx
 ;   movq %rsi, %rdx
 ;   movq %rcx, %rax
 ;   movq %rbp, %rsp
diff --git a/cranelift/filetests/filetests/isa/x64/return-call-indirect.clif b/cranelift/filetests/filetests/isa/x64/return-call-indirect.clif
index 22ba0bb94..d8889e147 100644
--- a/cranelift/filetests/filetests/isa/x64/return-call-indirect.clif
+++ b/cranelift/filetests/filetests/isa/x64/return-call-indirect.clif
@@ -260,16 +260,16 @@ block0:
 ;   movq    %r14, 136(%rsp)
 ;   movq    %r15, 144(%rsp)
 ; block0:
-;   movl    $10, %edi
-;   movq    %rdi, rsp(104 + virtual offset)
-;   movl    $15, %esi
-;   movq    %rsi, rsp(96 + virtual offset)
-;   movl    $20, %edx
-;   movq    %rdx, rsp(88 + virtual offset)
-;   movl    $25, %ecx
-;   movq    %rcx, rsp(80 + virtual offset)
-;   movl    $30, %r8d
-;   movq    %r8, rsp(72 + virtual offset)
+;   movl    $10, %esi
+;   movq    %rsi, rsp(104 + virtual offset)
+;   movl    $15, %edx
+;   movq    %rdx, rsp(96 + virtual offset)
+;   movl    $20, %ecx
+;   movq    %rcx, rsp(88 + virtual offset)
+;   movl    $25, %r8d
+;   movq    %r8, rsp(80 + virtual offset)
+;   movl    $30, %r9d
+;   movq    %r9, rsp(72 + virtual offset)
 ;   movl    $35, %r9d
 ;   movq    %r9, rsp(64 + virtual offset)
 ;   movl    $40, %eax
@@ -354,16 +354,16 @@ block0:
 ;   movq %r14, 0x88(%rsp)
 ;   movq %r15, 0x90(%rsp)
 ; block1: ; offset 0x50
-;   movl $0xa, %edi
-;   movq %rdi, 0x68(%rsp)
-;   movl $0xf, %esi
-;   movq %rsi, 0x60(%rsp)
-;   movl $0x14, %edx
-;   movq %rdx, 0x58(%rsp)
-;   movl $0x19, %ecx
-;   movq %rcx, 0x50(%rsp)
-;   movl $0x1e, %r8d
-;   movq %r8, 0x48(%rsp)
+;   movl $0xa, %esi
+;   movq %rsi, 0x68(%rsp)
+;   movl $0xf, %edx
+;   movq %rdx, 0x60(%rsp)
+;   movl $0x14, %ecx
+;   movq %rcx, 0x58(%rsp)
+;   movl $0x19, %r8d
+;   movq %r8, 0x50(%rsp)
+;   movl $0x1e, %r9d
+;   movq %r9, 0x48(%rsp)
 ;   movl $0x23, %r9d
 ;   movq %r9, 0x40(%rsp)
 ;   movl $0x28, %eax
diff --git a/cranelift/filetests/filetests/isa/x64/return-call.clif b/cranelift/filetests/filetests/isa/x64/return-call.clif
index f6f4250b3..e20657ff8 100644
--- a/cranelift/filetests/filetests/isa/x64/return-call.clif
+++ b/cranelift/filetests/filetests/isa/x64/return-call.clif
@@ -233,15 +233,16 @@ block0(v0: i32, v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32, v7: i32, v
 ;   pushq   %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movq    %rcx, %r10
-;   movq    %rdx, %rdi
-;   movq    %r8, %rdx
-;   movq    %r9, %rcx
+;   movq    %r8, %r10
+;   movq    %r9, %r11
 ;   movq    rbp(stack args max - 32), %r8
 ;   movq    rbp(stack args max - 24), %r9
 ;   movq    rbp(stack args max - 16), %rsi
 ;   movl    %esi, rbp(stack args max - 16)
-;   movq    %r10, %rsi
+;   movq    %rdx, %rdi
+;   movq    %rcx, %rsi
+;   movq    %r10, %rdx
+;   movq    %r11, %rcx
 ;   return_call_known TestCase(%one_stack_arg) (16) tmp=%r11 %rdi=%rdi %rsi=%rsi %rdx=%rdx %rcx=%rcx %r8=%r8 %r9=%r9
 ;
 ; Disassembled:
@@ -249,21 +250,22 @@ block0(v0: i32, v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32, v7: i32, v
 ;   pushq %rbp
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
-;   movq %rcx, %r10
-;   movq %rdx, %rdi
-;   movq %r8, %rdx
-;   movq %r9, %rcx
+;   movq %r8, %r10
+;   movq %r9, %r11
 ;   movq 0x10(%rbp), %r8
 ;   movq 0x18(%rbp), %r9
 ;   movq 0x20(%rbp), %rsi
 ;   movl %esi, 0x20(%rbp)
-;   movq %r10, %rsi
+;   movq %rdx, %rdi
+;   movq %rcx, %rsi
+;   movq %r10, %rdx
+;   movq %r11, %rcx
 ;   movq %rbp, %rsp
 ;   popq %rbp
 ;   movq (%rsp), %r11
 ;   movq %r11, 0x10(%rsp)
 ;   addq $0x10, %rsp
-;   jmp 0x38 ; reloc_external CallPCRel4 %one_stack_arg -4
+;   jmp 0x3b ; reloc_external CallPCRel4 %one_stack_arg -4
 
 function %call_zero_stack_args(i32, i32, i32, i32, i32, i32, i32, i32, i8) -> i8 tail {
     fn0 = colocated %callee_i8(i8) -> i8 tail
@@ -311,16 +313,16 @@ block0(v0: i32, v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32):
 ;   movq    24(%rsp), %r11
 ;   movq    %r11, 8(%rsp)
 ; block0:
-;   movq    %rdx, %r10
-;   movq    %rcx, %rdx
-;   movq    %r8, %rcx
-;   movq    %r9, %r8
+;   movq    %r9, %r10
 ;   movq    rbp(stack args max - 16), %r9
 ;   movl    %edi, rbp(stack args max - 32)
 ;   movl    %edi, rbp(stack args max - 24)
 ;   movl    %esi, rbp(stack args max - 16)
 ;   movq    %rsi, %rdi
-;   movq    %r10, %rsi
+;   movq    %rdx, %rsi
+;   movq    %rcx, %rdx
+;   movq    %r8, %rcx
+;   movq    %r10, %r8
 ;   return_call_known TestCase(%call_one_stack_arg) (32) tmp=%r11 %rdi=%rdi %rsi=%rsi %rdx=%rdx %rcx=%rcx %r8=%r8 %r9=%r9
 ;
 ; Disassembled:
@@ -334,16 +336,16 @@ block0(v0: i32, v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32):
 ;   movq 0x18(%rsp), %r11
 ;   movq %r11, 8(%rsp)
 ; block1: ; offset 0x1e
-;   movq %rdx, %r10
-;   movq %rcx, %rdx
-;   movq %r8, %rcx
-;   movq %r9, %r8
+;   movq %r9, %r10
 ;   movq 0x20(%rbp), %r9
 ;   movl %edi, 0x10(%rbp)
 ;   movl %edi, 0x18(%rbp)
 ;   movl %esi, 0x20(%rbp)
 ;   movq %rsi, %rdi
-;   movq %r10, %rsi
+;   movq %rdx, %rsi
+;   movq %rcx, %rdx
+;   movq %r8, %rcx
+;   movq %r10, %r8
 ;   movq %rbp, %rsp
 ;   popq %rbp
 ;   jmp 0x46 ; reloc_external CallPCRel4 %call_one_stack_arg -4
@@ -423,16 +425,16 @@ block0:
 ;   movq    %r14, 136(%rsp)
 ;   movq    %r15, 144(%rsp)
 ; block0:
-;   movl    $10, %edi
-;   movq    %rdi, rsp(96 + virtual offset)
-;   movl    $15, %esi
-;   movq    %rsi, rsp(88 + virtual offset)
-;   movl    $20, %edx
-;   movq    %rdx, rsp(80 + virtual offset)
-;   movl    $25, %ecx
-;   movq    %rcx, rsp(72 + virtual offset)
-;   movl    $30, %r8d
-;   movq    %r8, rsp(64 + virtual offset)
+;   movl    $10, %esi
+;   movq    %rsi, rsp(96 + virtual offset)
+;   movl    $15, %edx
+;   movq    %rdx, rsp(88 + virtual offset)
+;   movl    $20, %ecx
+;   movq    %rcx, rsp(80 + virtual offset)
+;   movl    $25, %r8d
+;   movq    %r8, rsp(72 + virtual offset)
+;   movl    $30, %r9d
+;   movq    %r9, rsp(64 + virtual offset)
 ;   movl    $35, %r9d
 ;   movq    %r9, rsp(56 + virtual offset)
 ;   movl    $40, %eax
@@ -515,16 +517,16 @@ block0:
 ;   movq %r14, 0x88(%rsp)
 ;   movq %r15, 0x90(%rsp)
 ; block1: ; offset 0x50
-;   movl $0xa, %edi
-;   movq %rdi, 0x60(%rsp)
-;   movl $0xf, %esi
-;   movq %rsi, 0x58(%rsp)
-;   movl $0x14, %edx
-;   movq %rdx, 0x50(%rsp)
-;   movl $0x19, %ecx
-;   movq %rcx, 0x48(%rsp)
-;   movl $0x1e, %r8d
-;   movq %r8, 0x40(%rsp)
+;   movl $0xa, %esi
+;   movq %rsi, 0x60(%rsp)
+;   movl $0xf, %edx
+;   movq %rdx, 0x58(%rsp)
+;   movl $0x14, %ecx
+;   movq %rcx, 0x50(%rsp)
+;   movl $0x19, %r8d
+;   movq %r8, 0x48(%rsp)
+;   movl $0x1e, %r9d
+;   movq %r9, 0x40(%rsp)
 ;   movl $0x23, %r9d
 ;   movq %r9, 0x38(%rsp)
 ;   movl $0x28, %eax
diff --git a/cranelift/filetests/filetests/isa/x64/struct-arg.clif b/cranelift/filetests/filetests/isa/x64/struct-arg.clif
index d7d5ba7b2..95b1c4f6b 100644
--- a/cranelift/filetests/filetests/isa/x64/struct-arg.clif
+++ b/cranelift/filetests/filetests/isa/x64/struct-arg.clif
@@ -114,16 +114,16 @@ block0(v0: i64, v1: i64):
 ;   pushq   %rbp
 ;   movq    %rsp, %rbp
 ;   subq    %rsp, $80, %rsp
-;   movq    %r13, 64(%rsp)
+;   movq    %r14, 64(%rsp)
 ; block0:
-;   movq    %rdi, %r13
+;   movq    %rdi, %r14
 ;   lea     0(%rsp), %rdi
 ;   movl    $64, %edx
 ;   load_ext_name %Memcpy+0, %r10
 ;   call    *%r10
-;   movq    %r13, %rdi
+;   movq    %r14, %rdi
 ;   call    User(userextname0)
-;   movq    64(%rsp), %r13
+;   movq    64(%rsp), %r14
 ;   addq    %rsp, $80, %rsp
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -134,16 +134,16 @@ block0(v0: i64, v1: i64):
 ;   pushq %rbp
 ;   movq %rsp, %rbp
 ;   subq $0x50, %rsp
-;   movq %r13, 0x40(%rsp)
+;   movq %r14, 0x40(%rsp)
 ; block1: ; offset 0xd
-;   movq %rdi, %r13
+;   movq %rdi, %r14
 ;   leaq (%rsp), %rdi
 ;   movl $0x40, %edx
 ;   movabsq $0, %r10 ; reloc_external Abs8 %Memcpy 0
 ;   callq *%r10
-;   movq %r13, %rdi
+;   movq %r14, %rdi
 ;   callq 0x2e ; reloc_external CallPCRel4 u0:0 -4
-;   movq 0x40(%rsp), %r13
+;   movq 0x40(%rsp), %r14
 ;   addq $0x50, %rsp
 ;   movq %rbp, %rsp
 ;   popq %rbp
@@ -196,11 +196,11 @@ block0(v0: i64, v1: i64, v2: i64):
 ;   pushq   %rbp
 ;   movq    %rsp, %rbp
 ;   subq    %rsp, $208, %rsp
-;   movq    %r12, 192(%rsp)
-;   movq    %r14, 200(%rsp)
+;   movq    %rbx, 192(%rsp)
+;   movq    %r13, 200(%rsp)
 ; block0:
-;   movq    %rdi, %r12
-;   movq    %rdx, %r14
+;   movq    %rdx, %rbx
+;   movq    %rdi, %r13
 ;   lea     0(%rsp), %rdi
 ;   movl    $128, %edx
 ;   load_ext_name %Memcpy+0, %r11
@@ -208,12 +208,12 @@ block0(v0: i64, v1: i64, v2: i64):
 ;   lea     128(%rsp), %rdi
 ;   movl    $64, %edx
 ;   load_ext_name %Memcpy+0, %r9
-;   movq    %r14, %rsi
+;   movq    %rbx, %rsi
 ;   call    *%r9
-;   movq    %r12, %rdi
+;   movq    %r13, %rdi
 ;   call    User(userextname0)
-;   movq    192(%rsp), %r12
-;   movq    200(%rsp), %r14
+;   movq    192(%rsp), %rbx
+;   movq    200(%rsp), %r13
 ;   addq    %rsp, $208, %rsp
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -224,11 +224,11 @@ block0(v0: i64, v1: i64, v2: i64):
 ;   pushq %rbp
 ;   movq %rsp, %rbp
 ;   subq $0xd0, %rsp
-;   movq %r12, 0xc0(%rsp)
-;   movq %r14, 0xc8(%rsp)
+;   movq %rbx, 0xc0(%rsp)
+;   movq %r13, 0xc8(%rsp)
 ; block1: ; offset 0x1b
-;   movq %rdi, %r12
-;   movq %rdx, %r14
+;   movq %rdx, %rbx
+;   movq %rdi, %r13
 ;   leaq (%rsp), %rdi
 ;   movl $0x80, %edx
 ;   movabsq $0, %r11 ; reloc_external Abs8 %Memcpy 0
@@ -236,12 +236,12 @@ block0(v0: i64, v1: i64, v2: i64):
 ;   leaq 0x80(%rsp), %rdi
 ;   movl $0x40, %edx
 ;   movabsq $0, %r9 ; reloc_external Abs8 %Memcpy 0
-;   movq %r14, %rsi
+;   movq %rbx, %rsi
 ;   callq *%r9
-;   movq %r12, %rdi
+;   movq %r13, %rdi
 ;   callq 0x5c ; reloc_external CallPCRel4 u0:0 -4
-;   movq 0xc0(%rsp), %r12
-;   movq 0xc8(%rsp), %r14
+;   movq 0xc0(%rsp), %rbx
+;   movq 0xc8(%rsp), %r13
 ;   addq $0xd0, %rsp
 ;   movq %rbp, %rsp
 ;   popq %rbp
diff --git a/cranelift/filetests/filetests/isa/x64/struct-ret.clif b/cranelift/filetests/filetests/isa/x64/struct-ret.clif
index 1947901dd..2664c459c 100644
--- a/cranelift/filetests/filetests/isa/x64/struct-ret.clif
+++ b/cranelift/filetests/filetests/isa/x64/struct-ret.clif
@@ -41,8 +41,8 @@ block0(v0: i64, v1: i64):
 ;   pushq   %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movq    %rsi, %rdi
 ;   load_ext_name %f2+0, %rcx
+;   movq    %rsi, %rdi
 ;   call    *%rcx
 ;   movq    %rdx, %rax
 ;   movq    %rbp, %rsp
@@ -54,8 +54,8 @@ block0(v0: i64, v1: i64):
 ;   pushq %rbp
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
-;   movq %rsi, %rdi
 ;   movabsq $0, %rcx ; reloc_external Abs8 %f2 0
+;   movq %rsi, %rdi
 ;   callq *%rcx
 ;   movq %rdx, %rax
 ;   movq %rbp, %rsp
diff --git a/cranelift/filetests/filetests/isa/x64/tail-call-conv.clif b/cranelift/filetests/filetests/isa/x64/tail-call-conv.clif
index 56a16e31c..c919e5ce8 100644
--- a/cranelift/filetests/filetests/isa/x64/tail-call-conv.clif
+++ b/cranelift/filetests/filetests/isa/x64/tail-call-conv.clif
@@ -62,8 +62,8 @@ block0:
 ;   movq    %r14, 120(%rsp)
 ;   movq    %r15, 128(%rsp)
 ; block0:
-;   movl    $10, %edi
-;   movq    %rdi, rsp(0 + virtual offset)
+;   movl    $10, %esi
+;   movq    %rsi, rsp(0 + virtual offset)
 ;   movl    $15, %esi
 ;   movl    $20, %edx
 ;   movl    $25, %ecx
@@ -111,8 +111,8 @@ block0:
 ;   movq %r14, 0x78(%rsp)
 ;   movq %r15, 0x80(%rsp)
 ; block1: ; offset 0x27
-;   movl $0xa, %edi
-;   movq %rdi, 0x50(%rsp)
+;   movl $0xa, %esi
+;   movq %rsi, 0x50(%rsp)
 ;   movl $0xf, %esi
 ;   movl $0x14, %edx
 ;   movl $0x19, %ecx
@@ -193,29 +193,29 @@ block0:
 ;   movq    %r14, 136(%rsp)
 ;   movq    %r15, 144(%rsp)
 ; block0:
-;   movl    $10, %eax
-;   movq    %rax, rsp(104 + virtual offset)
-;   movl    $15, %ecx
-;   movq    %rcx, rsp(96 + virtual offset)
-;   movl    $20, %edx
-;   movq    %rdx, rsp(88 + virtual offset)
-;   movl    $25, %esi
-;   movq    %rsi, rsp(80 + virtual offset)
-;   movl    $30, %esi
-;   movq    %rsi, rsp(72 + virtual offset)
-;   movl    $35, %r8d
-;   movq    %r8, rsp(64 + virtual offset)
-;   movl    $40, %r9d
-;   movq    %r9, rsp(56 + virtual offset)
-;   movl    $45, %r10d
-;   movq    %r10, rsp(48 + virtual offset)
+;   movl    $10, %ecx
+;   movq    %rcx, rsp(104 + virtual offset)
+;   movl    $15, %edx
+;   movq    %rdx, rsp(96 + virtual offset)
+;   movl    $20, %esi
+;   movq    %rsi, rsp(88 + virtual offset)
+;   movl    $25, %r8d
+;   movq    %r8, rsp(80 + virtual offset)
+;   movl    $30, %eax
+;   movq    %rax, rsp(72 + virtual offset)
+;   movl    $35, %r9d
+;   movq    %r9, rsp(64 + virtual offset)
+;   movl    $40, %r10d
+;   movq    %r10, rsp(56 + virtual offset)
+;   movl    $45, %r11d
+;   movq    %r11, rsp(48 + virtual offset)
 ;   movl    $50, %r11d
 ;   movq    %r11, rsp(40 + virtual offset)
-;   movl    $55, %r13d
-;   movl    $60, %r14d
-;   movl    $65, %r15d
-;   movl    $70, %ebx
-;   movl    $75, %r12d
+;   movl    $55, %r14d
+;   movl    $60, %r15d
+;   movl    $65, %ebx
+;   movl    $70, %r12d
+;   movl    $75, %r13d
 ;   movl    $80, %eax
 ;   movl    $85, %ecx
 ;   movl    $90, %edx
@@ -233,11 +233,11 @@ block0:
 ;   movq    %rsi, rsp(8 + virtual offset)
 ;   movl    $135, %esi
 ;   movq    %rsi, rsp(0 + virtual offset)
-;   movq    %r13, 0(%rdi)
-;   movq    %r14, 8(%rdi)
-;   movq    %r15, 16(%rdi)
-;   movq    %rbx, 24(%rdi)
-;   movq    %r12, 32(%rdi)
+;   movq    %r14, 0(%rdi)
+;   movq    %r15, 8(%rdi)
+;   movq    %rbx, 16(%rdi)
+;   movq    %r12, 24(%rdi)
+;   movq    %r13, 32(%rdi)
 ;   movq    %rax, 40(%rdi)
 ;   movq    %rcx, 48(%rdi)
 ;   movq    %rdx, 56(%rdi)
@@ -285,29 +285,29 @@ block0:
 ;   movq %r14, 0x88(%rsp)
 ;   movq %r15, 0x90(%rsp)
 ; block1: ; offset 0x2d
-;   movl $0xa, %eax
-;   movq %rax, 0x68(%rsp)
-;   movl $0xf, %ecx
-;   movq %rcx, 0x60(%rsp)
-;   movl $0x14, %edx
-;   movq %rdx, 0x58(%rsp)
-;   movl $0x19, %esi
-;   movq %rsi, 0x50(%rsp)
-;   movl $0x1e, %esi
-;   movq %rsi, 0x48(%rsp)
-;   movl $0x23, %r8d
-;   movq %r8, 0x40(%rsp)
-;   movl $0x28, %r9d
-;   movq %r9, 0x38(%rsp)
-;   movl $0x2d, %r10d
-;   movq %r10, 0x30(%rsp)
+;   movl $0xa, %ecx
+;   movq %rcx, 0x68(%rsp)
+;   movl $0xf, %edx
+;   movq %rdx, 0x60(%rsp)
+;   movl $0x14, %esi
+;   movq %rsi, 0x58(%rsp)
+;   movl $0x19, %r8d
+;   movq %r8, 0x50(%rsp)
+;   movl $0x1e, %eax
+;   movq %rax, 0x48(%rsp)
+;   movl $0x23, %r9d
+;   movq %r9, 0x40(%rsp)
+;   movl $0x28, %r10d
+;   movq %r10, 0x38(%rsp)
+;   movl $0x2d, %r11d
+;   movq %r11, 0x30(%rsp)
 ;   movl $0x32, %r11d
 ;   movq %r11, 0x28(%rsp)
-;   movl $0x37, %r13d
-;   movl $0x3c, %r14d
-;   movl $0x41, %r15d
-;   movl $0x46, %ebx
-;   movl $0x4b, %r12d
+;   movl $0x37, %r14d
+;   movl $0x3c, %r15d
+;   movl $0x41, %ebx
+;   movl $0x46, %r12d
+;   movl $0x4b, %r13d
 ;   movl $0x50, %eax
 ;   movl $0x55, %ecx
 ;   movl $0x5a, %edx
@@ -325,11 +325,11 @@ block0:
 ;   movq %rsi, 8(%rsp)
 ;   movl $0x87, %esi
 ;   movq %rsi, (%rsp)
-;   movq %r13, (%rdi)
-;   movq %r14, 8(%rdi)
-;   movq %r15, 0x10(%rdi)
-;   movq %rbx, 0x18(%rdi)
-;   movq %r12, 0x20(%rdi)
+;   movq %r14, (%rdi)
+;   movq %r15, 8(%rdi)
+;   movq %rbx, 0x10(%rdi)
+;   movq %r12, 0x18(%rdi)
+;   movq %r13, 0x20(%rdi)
 ;   movq %rax, 0x28(%rdi)
 ;   movq %rcx, 0x30(%rdi)
 ;   movq %rdx, 0x38(%rdi)
@@ -457,10 +457,10 @@ block0(v0: i64, v1: i64, v2: i64, v3: i64, v4: i64, v5: i64, v6: i64, v7: i64, v
 ;   movq    %rcx, rsp(24 + virtual offset)
 ;   movq    %r8, rsp(32 + virtual offset)
 ;   movq    %r9, rsp(40 + virtual offset)
-;   movq    rbp(stack args max - 176), %r9
-;   movq    %r9, rsp(48 + virtual offset)
-;   movq    rbp(stack args max - 168), %r10
-;   movq    %r10, rsp(56 + virtual offset)
+;   movq    rbp(stack args max - 176), %r10
+;   movq    %r10, rsp(48 + virtual offset)
+;   movq    rbp(stack args max - 168), %r11
+;   movq    %r11, rsp(56 + virtual offset)
 ;   movq    rbp(stack args max - 160), %r11
 ;   movq    %r11, rsp(64 + virtual offset)
 ;   movq    rbp(stack args max - 152), %rdx
@@ -473,17 +473,17 @@ block0(v0: i64, v1: i64, v2: i64, v3: i64, v4: i64, v5: i64, v6: i64, v7: i64, v
 ;   movq    rbp(stack args max - 112), %r9
 ;   movq    rbp(stack args max - 104), %rsi
 ;   movq    %rsi, rsp(88 + virtual offset)
-;   movq    rbp(stack args max - 96), %r13
-;   movq    rbp(stack args max - 88), %r15
-;   movq    rbp(stack args max - 80), %r12
-;   movq    rbp(stack args max - 72), %r14
+;   movq    rbp(stack args max - 96), %rdi
+;   movq    rbp(stack args max - 88), %rcx
+;   movq    rbp(stack args max - 80), %r8
+;   movq    rbp(stack args max - 72), %rsi
 ;   movq    rbp(stack args max - 64), %rbx
-;   movq    rbp(stack args max - 56), %rdi
-;   movq    %rdi, rsp(96 + virtual offset)
-;   movq    rbp(stack args max - 48), %rcx
-;   movq    rbp(stack args max - 40), %r8
-;   movq    rbp(stack args max - 32), %rdi
-;   movq    rbp(stack args max - 24), %rsi
+;   movq    rbp(stack args max - 56), %r13
+;   movq    rbp(stack args max - 48), %r15
+;   movq    rbp(stack args max - 40), %r12
+;   movq    rbp(stack args max - 32), %r14
+;   movq    rbp(stack args max - 24), %rax
+;   movq    %rax, rsp(96 + virtual offset)
 ;   movq    rbp(stack args max - 16), %rax
 ;   movq    %rdx, 0(%rax)
 ;   movq    rsp(72 + virtual offset), %rdx
@@ -495,16 +495,16 @@ block0(v0: i64, v1: i64, v2: i64, v3: i64, v4: i64, v5: i64, v6: i64, v7: i64, v
 ;   movq    %r9, 40(%rax)
 ;   movq    rsp(88 + virtual offset), %r10
 ;   movq    %r10, 48(%rax)
-;   movq    %r13, 56(%rax)
-;   movq    %r15, 64(%rax)
-;   movq    %r12, 72(%rax)
-;   movq    %r14, 80(%rax)
+;   movq    %rdi, 56(%rax)
+;   movq    %rcx, 64(%rax)
+;   movq    %r8, 72(%rax)
+;   movq    %rsi, 80(%rax)
 ;   movq    %rbx, 88(%rax)
-;   movq    rsp(96 + virtual offset), %rdx
-;   movq    %rdx, 96(%rax)
-;   movq    %rcx, 104(%rax)
-;   movq    %r8, 112(%rax)
-;   movq    %rdi, 120(%rax)
+;   movq    %r13, 96(%rax)
+;   movq    %r15, 104(%rax)
+;   movq    %r12, 112(%rax)
+;   movq    %r14, 120(%rax)
+;   movq    rsp(96 + virtual offset), %rsi
 ;   movq    %rsi, 128(%rax)
 ;   movq    rsp(0 + virtual offset), %rax
 ;   movq    rsp(8 + virtual offset), %rcx
@@ -542,10 +542,10 @@ block0(v0: i64, v1: i64, v2: i64, v3: i64, v4: i64, v5: i64, v6: i64, v7: i64, v
 ;   movq %rcx, 0x18(%rsp)
 ;   movq %r8, 0x20(%rsp)
 ;   movq %r9, 0x28(%rsp)
-;   movq 0x10(%rbp), %r9
-;   movq %r9, 0x30(%rsp)
-;   movq 0x18(%rbp), %r10
-;   movq %r10, 0x38(%rsp)
+;   movq 0x10(%rbp), %r10
+;   movq %r10, 0x30(%rsp)
+;   movq 0x18(%rbp), %r11
+;   movq %r11, 0x38(%rsp)
 ;   movq 0x20(%rbp), %r11
 ;   movq %r11, 0x40(%rsp)
 ;   movq 0x28(%rbp), %rdx
@@ -558,17 +558,17 @@ block0(v0: i64, v1: i64, v2: i64, v3: i64, v4: i64, v5: i64, v6: i64, v7: i64, v
 ;   movq 0x50(%rbp), %r9
 ;   movq 0x58(%rbp), %rsi
 ;   movq %rsi, 0x58(%rsp)
-;   movq 0x60(%rbp), %r13
-;   movq 0x68(%rbp), %r15
-;   movq 0x70(%rbp), %r12
-;   movq 0x78(%rbp), %r14
+;   movq 0x60(%rbp), %rdi
+;   movq 0x68(%rbp), %rcx
+;   movq 0x70(%rbp), %r8
+;   movq 0x78(%rbp), %rsi
 ;   movq 0x80(%rbp), %rbx
-;   movq 0x88(%rbp), %rdi
-;   movq %rdi, 0x60(%rsp)
-;   movq 0x90(%rbp), %rcx
-;   movq 0x98(%rbp), %r8
-;   movq 0xa0(%rbp), %rdi
-;   movq 0xa8(%rbp), %rsi
+;   movq 0x88(%rbp), %r13
+;   movq 0x90(%rbp), %r15
+;   movq 0x98(%rbp), %r12
+;   movq 0xa0(%rbp), %r14
+;   movq 0xa8(%rbp), %rax
+;   movq %rax, 0x60(%rsp)
 ;   movq 0xb0(%rbp), %rax
 ;   movq %rdx, (%rax)
 ;   movq 0x48(%rsp), %rdx
@@ -580,16 +580,16 @@ block0(v0: i64, v1: i64, v2: i64, v3: i64, v4: i64, v5: i64, v6: i64, v7: i64, v
 ;   movq %r9, 0x28(%rax)
 ;   movq 0x58(%rsp), %r10
 ;   movq %r10, 0x30(%rax)
-;   movq %r13, 0x38(%rax)
-;   movq %r15, 0x40(%rax)
-;   movq %r12, 0x48(%rax)
-;   movq %r14, 0x50(%rax)
+;   movq %rdi, 0x38(%rax)
+;   movq %rcx, 0x40(%rax)
+;   movq %r8, 0x48(%rax)
+;   movq %rsi, 0x50(%rax)
 ;   movq %rbx, 0x58(%rax)
-;   movq 0x60(%rsp), %rdx
-;   movq %rdx, 0x60(%rax)
-;   movq %rcx, 0x68(%rax)
-;   movq %r8, 0x70(%rax)
-;   movq %rdi, 0x78(%rax)
+;   movq %r13, 0x60(%rax)
+;   movq %r15, 0x68(%rax)
+;   movq %r12, 0x70(%rax)
+;   movq %r14, 0x78(%rax)
+;   movq 0x60(%rsp), %rsi
 ;   movq %rsi, 0x80(%rax)
 ;   movq (%rsp), %rax
 ;   movq 8(%rsp), %rcx
@@ -654,16 +654,16 @@ block0:
 ;   movq    %r14, 456(%rsp)
 ;   movq    %r15, 464(%rsp)
 ; block0:
-;   movl    $10, %edi
-;   movq    %rdi, rsp(96 + virtual offset)
-;   movl    $15, %esi
-;   movq    %rsi, rsp(88 + virtual offset)
-;   movl    $20, %edx
-;   movq    %rdx, rsp(80 + virtual offset)
-;   movl    $25, %ecx
-;   movq    %rcx, rsp(72 + virtual offset)
-;   movl    $30, %r8d
-;   movq    %r8, rsp(64 + virtual offset)
+;   movl    $10, %esi
+;   movq    %rsi, rsp(96 + virtual offset)
+;   movl    $15, %edx
+;   movq    %rdx, rsp(88 + virtual offset)
+;   movl    $20, %ecx
+;   movq    %rcx, rsp(80 + virtual offset)
+;   movl    $25, %r8d
+;   movq    %r8, rsp(72 + virtual offset)
+;   movl    $30, %r9d
+;   movq    %r9, rsp(64 + virtual offset)
 ;   movl    $35, %r9d
 ;   movq    %r9, rsp(56 + virtual offset)
 ;   movl    $40, %esi
@@ -768,16 +768,16 @@ block0:
 ;   movq %r14, 0x1c8(%rsp)
 ;   movq %r15, 0x1d0(%rsp)
 ; block1: ; offset 0x33
-;   movl $0xa, %edi
-;   movq %rdi, 0x1a0(%rsp)
-;   movl $0xf, %esi
-;   movq %rsi, 0x198(%rsp)
-;   movl $0x14, %edx
-;   movq %rdx, 0x190(%rsp)
-;   movl $0x19, %ecx
-;   movq %rcx, 0x188(%rsp)
-;   movl $0x1e, %r8d
-;   movq %r8, 0x180(%rsp)
+;   movl $0xa, %esi
+;   movq %rsi, 0x1a0(%rsp)
+;   movl $0xf, %edx
+;   movq %rdx, 0x198(%rsp)
+;   movl $0x14, %ecx
+;   movq %rcx, 0x190(%rsp)
+;   movl $0x19, %r8d
+;   movq %r8, 0x188(%rsp)
+;   movl $0x1e, %r9d
+;   movq %r9, 0x180(%rsp)
 ;   movl $0x23, %r9d
 ;   movq %r9, 0x178(%rsp)
 ;   movl $0x28, %esi
diff --git a/cranelift/filetests/filetests/isa/x64/udiv.clif b/cranelift/filetests/filetests/isa/x64/udiv.clif
index 619cb7991..56b70ec88 100644
--- a/cranelift/filetests/filetests/isa/x64/udiv.clif
+++ b/cranelift/filetests/filetests/isa/x64/udiv.clif
@@ -38,8 +38,8 @@ block0(v0: i16, v1: i16):
 ;   pushq   %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movq    %rdi, %rax
 ;   xorq    %rdx, %rdx, %rdx
+;   movq    %rdi, %rax
 ;   div     %ax, %dx, %si, %ax, %dx ; trap=int_divz
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -50,8 +50,8 @@ block0(v0: i16, v1: i16):
 ;   pushq %rbp
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
-;   movq %rdi, %rax
 ;   xorq %rdx, %rdx
+;   movq %rdi, %rax
 ;   divw %si ; trap: int_divz
 ;   movq %rbp, %rsp
 ;   popq %rbp
@@ -67,8 +67,8 @@ block0(v0: i32, v1: i32):
 ;   pushq   %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movq    %rdi, %rax
 ;   xorq    %rdx, %rdx, %rdx
+;   movq    %rdi, %rax
 ;   div     %eax, %edx, %esi, %eax, %edx ; trap=int_divz
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -79,8 +79,8 @@ block0(v0: i32, v1: i32):
 ;   pushq %rbp
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
-;   movq %rdi, %rax
 ;   xorq %rdx, %rdx
+;   movq %rdi, %rax
 ;   divl %esi ; trap: int_divz
 ;   movq %rbp, %rsp
 ;   popq %rbp
@@ -96,8 +96,8 @@ block0(v0: i64, v1: i64):
 ;   pushq   %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movq    %rdi, %rax
 ;   xorq    %rdx, %rdx, %rdx
+;   movq    %rdi, %rax
 ;   div     %rax, %rdx, %rsi, %rax, %rdx ; trap=int_divz
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -108,8 +108,8 @@ block0(v0: i64, v1: i64):
 ;   pushq %rbp
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
-;   movq %rdi, %rax
 ;   xorq %rdx, %rdx
+;   movq %rdi, %rax
 ;   divq %rsi ; trap: int_divz
 ;   movq %rbp, %rsp
 ;   popq %rbp
diff --git a/cranelift/filetests/filetests/isa/x64/udivrem.clif b/cranelift/filetests/filetests/isa/x64/udivrem.clif
index 1468447aa..eb1e5da9e 100644
--- a/cranelift/filetests/filetests/isa/x64/udivrem.clif
+++ b/cranelift/filetests/filetests/isa/x64/udivrem.clif
@@ -16,12 +16,12 @@ block0(v0: i8, v1: i8):
 ; block0:
 ;   movzbl  %dil, %eax
 ;   div     %al, %sil, %al ; trap=int_divz
-;   movq    %rax, %r11
+;   movq    %rax, %rcx
 ;   movzbl  %dil, %eax
 ;   div     %al, %sil, %al ; trap=int_divz
 ;   movq    %rax, %rdx
 ;   shrq    $8, %rdx, %rdx
-;   movq    %r11, %rax
+;   movq    %rcx, %rax
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
 ;   ret
@@ -33,12 +33,12 @@ block0(v0: i8, v1: i8):
 ; block1: ; offset 0x4
 ;   movzbl %dil, %eax
 ;   divb %sil ; trap: int_divz
-;   movq %rax, %r11
+;   movq %rax, %rcx
 ;   movzbl %dil, %eax
 ;   divb %sil ; trap: int_divz
 ;   movq %rax, %rdx
 ;   shrq $8, %rdx
-;   movq %r11, %rax
+;   movq %rcx, %rax
 ;   movq %rbp, %rsp
 ;   popq %rbp
 ;   retq
@@ -58,8 +58,8 @@ block0(v0: i16, v1: i16):
 ;   movq    %rdi, %rax
 ;   div     %ax, %dx, %si, %ax, %dx ; trap=int_divz
 ;   movq    %rax, %rcx
-;   movq    %rdi, %rax
 ;   xorq    %rdx, %rdx, %rdx
+;   movq    %rdi, %rax
 ;   div     %ax, %dx, %si, %ax, %dx ; trap=int_divz
 ;   movq    %rcx, %rax
 ;   movq    %rbp, %rsp
@@ -75,8 +75,8 @@ block0(v0: i16, v1: i16):
 ;   movq %rdi, %rax
 ;   divw %si ; trap: int_divz
 ;   movq %rax, %rcx
-;   movq %rdi, %rax
 ;   xorq %rdx, %rdx
+;   movq %rdi, %rax
 ;   divw %si ; trap: int_divz
 ;   movq %rcx, %rax
 ;   movq %rbp, %rsp
@@ -98,8 +98,8 @@ block0(v0: i32, v1: i32):
 ;   movq    %rdi, %rax
 ;   div     %eax, %edx, %esi, %eax, %edx ; trap=int_divz
 ;   movq    %rax, %rcx
-;   movq    %rdi, %rax
 ;   xorq    %rdx, %rdx, %rdx
+;   movq    %rdi, %rax
 ;   div     %eax, %edx, %esi, %eax, %edx ; trap=int_divz
 ;   movq    %rcx, %rax
 ;   movq    %rbp, %rsp
@@ -115,8 +115,8 @@ block0(v0: i32, v1: i32):
 ;   movq %rdi, %rax
 ;   divl %esi ; trap: int_divz
 ;   movq %rax, %rcx
-;   movq %rdi, %rax
 ;   xorq %rdx, %rdx
+;   movq %rdi, %rax
 ;   divl %esi ; trap: int_divz
 ;   movq %rcx, %rax
 ;   movq %rbp, %rsp
@@ -138,8 +138,8 @@ block0(v0: i64, v1: i64):
 ;   movq    %rdi, %rax
 ;   div     %rax, %rdx, %rsi, %rax, %rdx ; trap=int_divz
 ;   movq    %rax, %rcx
-;   movq    %rdi, %rax
 ;   xorq    %rdx, %rdx, %rdx
+;   movq    %rdi, %rax
 ;   div     %rax, %rdx, %rsi, %rax, %rdx ; trap=int_divz
 ;   movq    %rcx, %rax
 ;   movq    %rbp, %rsp
@@ -155,8 +155,8 @@ block0(v0: i64, v1: i64):
 ;   movq %rdi, %rax
 ;   divq %rsi ; trap: int_divz
 ;   movq %rax, %rcx
-;   movq %rdi, %rax
 ;   xorq %rdx, %rdx
+;   movq %rdi, %rax
 ;   divq %rsi ; trap: int_divz
 ;   movq %rcx, %rax
 ;   movq %rbp, %rsp
diff --git a/cranelift/filetests/filetests/isa/x64/urem.clif b/cranelift/filetests/filetests/isa/x64/urem.clif
index e886fcc94..50a63d940 100644
--- a/cranelift/filetests/filetests/isa/x64/urem.clif
+++ b/cranelift/filetests/filetests/isa/x64/urem.clif
@@ -40,8 +40,8 @@ block0(v0: i16, v1: i16):
 ;   pushq   %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movq    %rdi, %rax
 ;   xorq    %rdx, %rdx, %rdx
+;   movq    %rdi, %rax
 ;   div     %ax, %dx, %si, %ax, %dx ; trap=int_divz
 ;   movq    %rdx, %rax
 ;   movq    %rbp, %rsp
@@ -53,8 +53,8 @@ block0(v0: i16, v1: i16):
 ;   pushq %rbp
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
-;   movq %rdi, %rax
 ;   xorq %rdx, %rdx
+;   movq %rdi, %rax
 ;   divw %si ; trap: int_divz
 ;   movq %rdx, %rax
 ;   movq %rbp, %rsp
@@ -71,8 +71,8 @@ block0(v0: i32, v1: i32):
 ;   pushq   %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movq    %rdi, %rax
 ;   xorq    %rdx, %rdx, %rdx
+;   movq    %rdi, %rax
 ;   div     %eax, %edx, %esi, %eax, %edx ; trap=int_divz
 ;   movq    %rdx, %rax
 ;   movq    %rbp, %rsp
@@ -84,8 +84,8 @@ block0(v0: i32, v1: i32):
 ;   pushq %rbp
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
-;   movq %rdi, %rax
 ;   xorq %rdx, %rdx
+;   movq %rdi, %rax
 ;   divl %esi ; trap: int_divz
 ;   movq %rdx, %rax
 ;   movq %rbp, %rsp
@@ -102,8 +102,8 @@ block0(v0: i64, v1: i64):
 ;   pushq   %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movq    %rdi, %rax
 ;   xorq    %rdx, %rdx, %rdx
+;   movq    %rdi, %rax
 ;   div     %rax, %rdx, %rsi, %rax, %rdx ; trap=int_divz
 ;   movq    %rdx, %rax
 ;   movq    %rbp, %rsp
@@ -115,8 +115,8 @@ block0(v0: i64, v1: i64):
 ;   pushq %rbp
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
-;   movq %rdi, %rax
 ;   xorq %rdx, %rdx
+;   movq %rdi, %rax
 ;   divq %rsi ; trap: int_divz
 ;   movq %rdx, %rax
 ;   movq %rbp, %rsp
diff --git a/cranelift/filetests/filetests/isa/x64/user_stack_maps.clif b/cranelift/filetests/filetests/isa/x64/user_stack_maps.clif
index dc258661b..3ebdc9d5c 100644
--- a/cranelift/filetests/filetests/isa/x64/user_stack_maps.clif
+++ b/cranelift/filetests/filetests/isa/x64/user_stack_maps.clif
@@ -36,40 +36,37 @@ block0:
 ;   movq    %rsp, %rbp
 ;   subq    %rsp, $48, %rsp
 ;   movq    %rbx, 16(%rsp)
-;   movq    %r13, 24(%rsp)
+;   movq    %r14, 24(%rsp)
 ;   movq    %r15, 32(%rsp)
 ; block0:
-;   xorl    %edi, %edi, %edi
-;   movq    %rdi, %r15
-;   movl    $1, %edi
-;   movq    %rdi, %rbx
-;   movl    $2, %edi
-;   movq    %rdi, %r13
+;   xorl    %ebx, %ebx, %ebx
+;   movl    $1, %r14d
+;   movl    $2, %r15d
 ;   lea     rsp(0 + virtual offset), %r11
 ;   movl    $0, 0(%r11)
 ;   lea     rsp(4 + virtual offset), %rsi
 ;   movl    $1, 0(%rsi)
 ;   lea     rsp(8 + virtual offset), %rdi
 ;   movl    $2, 0(%rdi)
-;   movq    %r15, %rdi
+;   movq    %rbx, %rdi
 ;   call    User(userextname0)
 ;   ; UserStackMap { by_type: [(types::I32, CompoundBitSet {0, 4, 8})], sp_to_sized_stack_slots: None }
 ;   lea     rsp(0 + virtual offset), %rcx
 ;   movl    $1, 0(%rcx)
 ;   lea     rsp(4 + virtual offset), %rdx
 ;   movl    $2, 0(%rdx)
-;   movq    %r15, %rdi
+;   movq    %rbx, %rdi
 ;   call    User(userextname0)
 ;   ; UserStackMap { by_type: [(types::I32, CompoundBitSet {0, 4})], sp_to_sized_stack_slots: None }
 ;   lea     rsp(0 + virtual offset), %r9
 ;   movl    $2, 0(%r9)
-;   movq    %rbx, %rdi
+;   movq    %r14, %rdi
 ;   call    User(userextname0)
 ;   ; UserStackMap { by_type: [(types::I32, CompoundBitSet {0})], sp_to_sized_stack_slots: None }
-;   movq    %r13, %rdi
+;   movq    %r15, %rdi
 ;   call    User(userextname0)
 ;   movq    16(%rsp), %rbx
-;   movq    24(%rsp), %r13
+;   movq    24(%rsp), %r14
 ;   movq    32(%rsp), %r15
 ;   addq    %rsp, $48, %rsp
 ;   movq    %rbp, %rsp
@@ -82,37 +79,34 @@ block0:
 ;   movq %rsp, %rbp
 ;   subq $0x30, %rsp
 ;   movq %rbx, 0x10(%rsp)
-;   movq %r13, 0x18(%rsp)
+;   movq %r14, 0x18(%rsp)
 ;   movq %r15, 0x20(%rsp)
 ; block1: ; offset 0x17
-;   xorl %edi, %edi
-;   movq %rdi, %r15
-;   movl $1, %edi
-;   movq %rdi, %rbx
-;   movl $2, %edi
-;   movq %rdi, %r13
+;   xorl %ebx, %ebx
+;   movl $1, %r14d
+;   movl $2, %r15d
 ;   leaq (%rsp), %r11
 ;   movl $0, (%r11)
 ;   leaq 4(%rsp), %rsi
 ;   movl $1, (%rsi)
 ;   leaq 8(%rsp), %rdi
 ;   movl $2, (%rdi)
-;   movq %r15, %rdi
-;   callq 0x55 ; reloc_external CallPCRel4 u0:0 -4
+;   movq %rbx, %rdi
+;   callq 0x4e ; reloc_external CallPCRel4 u0:0 -4
 ;   leaq (%rsp), %rcx
 ;   movl $1, (%rcx)
 ;   leaq 4(%rsp), %rdx
 ;   movl $2, (%rdx)
-;   movq %r15, %rdi
-;   callq 0x72 ; reloc_external CallPCRel4 u0:0 -4
+;   movq %rbx, %rdi
+;   callq 0x6b ; reloc_external CallPCRel4 u0:0 -4
 ;   leaq (%rsp), %r9
 ;   movl $2, (%r9)
-;   movq %rbx, %rdi
-;   callq 0x85 ; reloc_external CallPCRel4 u0:0 -4
-;   movq %r13, %rdi
-;   callq 0x8d ; reloc_external CallPCRel4 u0:0 -4
+;   movq %r14, %rdi
+;   callq 0x7e ; reloc_external CallPCRel4 u0:0 -4
+;   movq %r15, %rdi
+;   callq 0x86 ; reloc_external CallPCRel4 u0:0 -4
 ;   movq 0x10(%rsp), %rbx
-;   movq 0x18(%rsp), %r13
+;   movq 0x18(%rsp), %r14
 ;   movq 0x20(%rsp), %r15
 ;   addq $0x30, %rsp
 ;   movq %rbp, %rsp
@@ -152,31 +146,31 @@ block0(v0: i8, v1: i16, v2: i32, v3: i64, v4: f32, v5: f64):
 ;   movq    %r8, %r13
 ;   lea     rsp(0 + virtual offset), %r8
 ;   movb    %dil, 0(%r8)
-;   movq    %rdi, %rbx
+;   movq    %rdi, %r15
 ;   lea     rsp(8 + virtual offset), %r8
 ;   movw    %si, 0(%r8)
-;   movq    %rsi, %r14
+;   movq    %rsi, %r12
 ;   lea     rsp(16 + virtual offset), %r9
 ;   movl    %edx, 0(%r9)
-;   movq    %rdx, %r12
+;   movq    %rdx, %rbx
 ;   lea     rsp(20 + virtual offset), %r10
 ;   movss   %xmm0, 0(%r10)
 ;   movdqu  %xmm0, rsp(96 + virtual offset)
 ;   lea     rsp(24 + virtual offset), %r11
 ;   movq    %rcx, 0(%r11)
-;   movq    %rcx, %r15
+;   movq    %rcx, %r14
 ;   lea     rsp(32 + virtual offset), %rsi
 ;   movsd   %xmm1, 0(%rsi)
 ;   movdqu  %xmm1, rsp(112 + virtual offset)
 ;   call    User(userextname0)
 ;   ; UserStackMap { by_type: [(types::I8, CompoundBitSet {0}), (types::I16, CompoundBitSet {8}), (types::I32, CompoundBitSet {16}), (types::F32, CompoundBitSet {20}), (types::I64, CompoundBitSet {24}), (types::F64, CompoundBitSet {32})], sp_to_sized_stack_slots: None }
-;   movq    %r12, %rdx
+;   movq    %rbx, %rdx
 ;   movq    %r13, %r8
 ;   movl    %edx, 0(%r8)
-;   movq    %r15, %rcx
+;   movq    %r14, %rcx
 ;   movq    %rcx, 8(%r8)
-;   movq    %rbx, %rax
-;   movq    %r14, %rdx
+;   movq    %r15, %rax
+;   movq    %r12, %rdx
 ;   movdqu  rsp(96 + virtual offset), %xmm0
 ;   movdqu  rsp(112 + virtual offset), %xmm1
 ;   movq    128(%rsp), %rbx
@@ -203,30 +197,30 @@ block0(v0: i8, v1: i16, v2: i32, v3: i64, v4: f32, v5: f64):
 ;   movq %r8, %r13
 ;   leaq (%rsp), %r8
 ;   movb %dil, (%r8)
-;   movq %rdi, %rbx
+;   movq %rdi, %r15
 ;   leaq 8(%rsp), %r8
 ;   movw %si, (%r8)
-;   movq %rsi, %r14
+;   movq %rsi, %r12
 ;   leaq 0x10(%rsp), %r9
 ;   movl %edx, (%r9)
-;   movq %rdx, %r12
+;   movq %rdx, %rbx
 ;   leaq 0x14(%rsp), %r10
 ;   movss %xmm0, (%r10)
 ;   movdqu %xmm0, 0x60(%rsp)
 ;   leaq 0x18(%rsp), %r11
 ;   movq %rcx, (%r11)
-;   movq %rcx, %r15
+;   movq %rcx, %r14
 ;   leaq 0x20(%rsp), %rsi
 ;   movsd %xmm1, (%rsi)
 ;   movdqu %xmm1, 0x70(%rsp)
 ;   callq 0x86 ; reloc_external CallPCRel4 u0:0 -4
-;   movq %r12, %rdx
+;   movq %rbx, %rdx
 ;   movq %r13, %r8
 ;   movl %edx, (%r8)
-;   movq %r15, %rcx
+;   movq %r14, %rcx
 ;   movq %rcx, 8(%r8)
-;   movq %rbx, %rax
-;   movq %r14, %rdx
+;   movq %r15, %rax
+;   movq %r12, %rdx
 ;   movdqu 0x60(%rsp), %xmm0
 ;   movdqu 0x70(%rsp), %xmm1
 ;   movq 0x80(%rsp), %rbx
diff --git a/cranelift/filetests/filetests/isa/x64/winch.clif b/cranelift/filetests/filetests/isa/x64/winch.clif
index 9a9fce756..56d042e9c 100644
--- a/cranelift/filetests/filetests/isa/x64/winch.clif
+++ b/cranelift/filetests/filetests/isa/x64/winch.clif
@@ -132,10 +132,10 @@ block0(v0:i64, v1:i64, v2:i64, v3:i64, v4:i64, v5:i64):
 ;   pushq   %rbp
 ;   movq    %rsp, %rbp
 ; block0:
+;   load_ext_name %g+0, %r10
 ;   movq    %rdi, %rax
 ;   movq    %r9, %rdi
 ;   movq    %rax, %r9
-;   load_ext_name %g+0, %r10
 ;   call    *%r10
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -146,10 +146,10 @@ block0(v0:i64, v1:i64, v2:i64, v3:i64, v4:i64, v5:i64):
 ;   pushq %rbp
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
+;   movabsq $0, %r10 ; reloc_external Abs8 %g 0
 ;   movq %rdi, %rax
 ;   movq %r9, %rdi
 ;   movq %rax, %r9
-;   movabsq $0, %r10 ; reloc_external Abs8 %g 0
 ;   callq *%r10
 ;   movq %rbp, %rsp
 ;   popq %rbp
@@ -174,10 +174,10 @@ block0(v0:i64, v1:i64, v2:i64, v3:i64, v4:i64, v5:i64):
 ;   movq    %r14, 24(%rsp)
 ;   movq    %r15, 32(%rsp)
 ; block0:
+;   load_ext_name %g+0, %r10
 ;   movq    %rdi, %rax
 ;   movq    %r9, %rdi
 ;   movq    %rax, %r9
-;   load_ext_name %g+0, %r10
 ;   call    *%r10
 ;   movq    0(%rsp), %rbx
 ;   movq    8(%rsp), %r12
@@ -200,10 +200,10 @@ block0(v0:i64, v1:i64, v2:i64, v3:i64, v4:i64, v5:i64):
 ;   movq %r14, 0x18(%rsp)
 ;   movq %r15, 0x20(%rsp)
 ; block1: ; offset 0x20
+;   movabsq $0, %r10 ; reloc_external Abs8 %g 0
 ;   movq %rdi, %rax
 ;   movq %r9, %rdi
 ;   movq %rax, %r9
-;   movabsq $0, %r10 ; reloc_external Abs8 %g 0
 ;   callq *%r10
 ;   movq (%rsp), %rbx
 ;   movq 8(%rsp), %r12
@@ -349,10 +349,10 @@ block0(v0: i32, v1: i64, v2: i32, v3: i64):
 ;   pushq   %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movq    %rdi, %rax
 ;   movq    %rcx, 12(%r8)
 ;   movl    %edx, 8(%r8)
 ;   movq    %rsi, 0(%r8)
+;   movq    %rdi, %rax
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
 ;   ret
@@ -362,10 +362,10 @@ block0(v0: i32, v1: i64, v2: i32, v3: i64):
 ;   pushq %rbp
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
-;   movq %rdi, %rax
 ;   movq %rcx, 0xc(%r8)
 ;   movl %edx, 8(%r8)
 ;   movq %rsi, (%r8)
+;   movq %rdi, %rax
 ;   movq %rbp, %rsp
 ;   popq %rbp
 ;   retq