The RAM is laid out in a grid with multiple rows and columns. In its simplest form, Latency timing refers to the time taken to retrieve information from a specific cell (a specific location on the RAM grid). CL40 can be interpreted as 40 clock cycles to retrieve the cell. If you have noticed, we have used this format to define the latency time.
However, Latency timings are defined by five parameters. Typically, you would see a sticker on the RAM module that reads “CL40-40-40-77” or similar to this. These are different parameters that break down the process mentioned earlier about retrieving information from a specific cell.
That is a complicated discussion and beyond the scope of this article.