We recommend to select the PHY with ability to adjust its input timing. For example, selecting Realtek's RTL8212 serial PHY, it provides TXDLY / RXDLY pins to adjust its input / output clock delay; selecting Micrel's KSZ9021 serial PHY, it provides RGMII Pad Skew registers  to adjust the signals' skew in step of 0.12ns. Both of those means add addtional delay to signals to compensate the output skew, which can eliminate the timing error in customer board.   For selecting those PHYs without ability to adjust timing, additional glue logic should be applied to the RGMII interface, routing the external HPS EMAC RGMII signals to FPGA side, or bridging HPS EMAC GMII internally to FPGA.