The natural space radiation environment can damage electronic devices and the effects range from a degradation in parametric performance to a complete functional failure. These effects can result in reduced mission lifetimes and sometimes system failures.
Xilinx implements Single Event Upset Mitigation enhancements during the silicon and architecture design phase in critical portions of the circuits. This allows our FPGAs to be tolerant to radiation in the space environment. In addition, the 20nm was designed in a ceramic package which is a robust packaging technology to handle vibration and shock during satellite launches. We test the devices to the MIL-PRF-38535, which are stringent military standards for electrical screening. This involves putting the parts through temperature testing, radiation tests, burn-in, tests for package integrity and reliability.