Job description ChipEdge is an EdTech Company in VLSI / Chip Design, based out of HSR layout, Bangalore. We are looking for Design Verification Trainers, who are passionate in teaching, to deliver classroom training on weekdays (Monday to Friday) in Full-Time Offline mode.   Key responsibilities: As a DV Trainer, you will be responsible for teaching labs in Design Verification courses and doubt clarification Responsible for enabling trainees to get jobs, by teaching them required technical skills Upgrade the Training Materials/Labs/Projects as needed, to give industry-relevant learning experiences to students Responsible for execution of labs/projects Mentor the students on their technical/soft skills   Required Technical Skills: For Design Verification role, candidates with 4+ yrs of teaching experience and Trained in Design Verification covering all aspects of verification using System Verilog, UVM at IP & SOC level. Working experience on EDA tools from Synopsys, Cadence, Mentor. Must be a self-starter, and be able to independently and efficiently drive tasks to completion Ability to provide mentorship and guidance to junior engineers, and be a good team player   Essential Soft Skills required: Passion for teaching and mentoring the Students/Engineers to achieve career growth Excellent communication skills, to translate your rich experience to participants’ level Good Teaching Skills   Remuneration: Best remuneration as per your experience and training industry standards. Please send your profile. We will be glad to have a discussion.