The recommended Write Sequence after power-on is the Counter Reset Method, as detailed in the ADF4106 datasheet. The Write Sequence to the Data Latches is in order of Function Latch, R Counter, N Counter ( A and B), and Function Latch.
Apply VDD.
Do a Function latch load (10 in two LSBs). As part of this, load 1 to the F1 bit. This enables the counter reset.
Do an R counter load (00 in two LSBs).
Do an N (A, B) counter load (01 in two LSBs).
Do a Function latch load (10 in two LSBs). As part of this, load 0 to the F1 bit. This disables the counter reset.
The CE pin method uses the same series of writes , except that the CE pin is brought low before the write sequence and brought high after the write sequence when device power up is required.
Note: that after the CE pin goes high, a duration of 1 μs can be required for the prescaler band gap voltage and oscillator input buffer bias to reach steady state.