AMD listened carefully to the needs of its customers, in HPC and other segments, and addressed those needs as it originally defined the AMD EPYC architecture and product roadmaps.
Specifically, HPC customers told us that they needed a balance of high compute performance, high memory bandwidth, and high I/O bandwidth. We designed AMD EPYC CPUs to be strong and balanced across all those requirements.
For performance, our latest 3rd Gen AMD EPYC CPUs are based the “Zen 3” core architecture with up to 64-cores, and up to 32MB of L3 cache per core on standard products, which helps to increase data analytic speed.
Finally, for I/O bandwidth, EPYC has 128 lanes of PCIe 4.0 to maximize I/O and help reduce data access bottlenecks. The combination of these capabilities has been highly valued by our customers.