One potential limitation of using generative discriminators to guide Verilog generation is the risk of overfitting to the specific downstream tasks for which the discriminator is trained. This could lead to a lack of generalization in the generated Verilog code. To address this limitation, it is important to carefully design the training process for the generative discriminator, ensuring that it is exposed to a diverse set of Verilog variations and downstream tasks. Regular evaluation and fine-tuning of the discriminator on a variety of tasks can help mitigate the risk of overfitting.
Another limitation could be the computational resources required for training and utilizing the generative discriminator. Training a discriminator alongside the LLMs can increase the overall computational cost. This limitation can be addressed by optimizing the training process, utilizing efficient training techniques, and potentially exploring ways to reduce the computational overhead of the discriminator while still maintaining its effectiveness in guiding the LLMs.