Modern parallel computer architectures are prone to system bottlenecks that limit performance for application processing. Historically, this has been known as the “memory wall”, where the rate of improvement in microprocessor performance far exceeds the rate of improvement in DRAM memory speed.
CXL protocol properties for memory-device cohesion and coherency address the memory wall by enabling memory expansion beyond server DIMM slots. CXL memory expansion serves as a two-prong approach by adding bandwidth to overcome the memory wall as well as adding capacity for data-intensive workloads for CXL-enabled servers.