# Nonlinear Variable Resistor-Based FCL for Fault Ride-Through Performance Enhancement of DFIG-Based Wind Turbines

Authors: Mehdi Firouzi; Mohammadreza Shafiee; Mojtaba Nasiri
Journal: Mathematical Problems in Engineering
 (2021)

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## Abstract

Fault ride-through (FRT) requirement is a matter of great concern for doubly fed induction generator (DFIG-) based wind turbines (WTs). This study presents a nonlinear variable resistor- (NVR-) based bridge-type fault current limiter (BFCL) to augment the FRT performance of DFIG-based WTs. First, the BFCL operation and nonlinear control design consideration of the proposed NVR-based BFCL are presented. Then, the NVR-BFCL performance is validated through simulation in PSCAD/EMTDC software. In addition, the NVR-based BFCL performance is compared with the fixed resistor- (FR-) based BFCL for a three-phase symmetrical short circuit fault at the grid side. Simulation results reveal that the NVR-based BFCL provides a smooth and effective FRT scheme and outperforms the FR-based BFCL.


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## Body

## 1. Introduction

Increasing the connection of wind turbines (WTs) impose the adverse effects on the grid reliability and stability, especially under voltage sag conditions. Generally, WTs are classified into fixed speed and variable speed. The variable speed WTs are widely used because of variable speed operation. They include the doubly fed induction generator (DFIG) and permanent magnet synchronous generator (PMSG) [1]. For all of them, even a shallow voltage dip can cause malfunction and operation failure [2]. To ensure secure operation of grid and tackle these problems, grid operators have created new requirements as grid codes. The fault ride-through (FRT) is the main requirement of them for grid connection of WTs. It is the given major focus due to the increasing grid penetration level of wind power. Based on this, WTs must stay connected to grid under grid voltage sag [3]. Compliance with the FRT requirement of WTs differs according to wind generator technology used in them. Recently, DFIG-based WTs are getting more attention due to having partial capacity power converters, in which their ratings are 25–30% of the total rated generator, capability to control both active and reactive powers, power point tracking at variable speed, and low weight and cost compared to the PMSG [4]. However, it is vulnerable to grid voltage sag because the DFIG stator is directly connected to the grid [5].In literature, different schemes based on software and hardware solutions [6] have been suggested and documented. The software solutions are based on the improved or changed control system of the DFIG converters with less cost [7, 8]. However, they are just suitable for handling low voltage sag conditions and cannot ride through sever voltage sag conditions, just relay on the software schemes, and require the hardware protection scheme under this condition [9]. Different types of hardware schemes such as the multistep series braking resistor (MSSBR) [10], reactive power compensators [11], DC link chopper [12], crowbar system [13], series compensators such as dynamic-voltage restorer (DVR) [14] and unified interphase power-controller (UIPC) [15], superconducting magnet energy storage (SMES) [16], and different types fault current limiters (FCLs) [17–19] are presented and reported in literature.Generally, voltage sags in grid are mainly due to occurring short circuit faults in grid [20, 21]. Therefore, researchers are studying on mitigating the adverse effects of grid faults on WTs by using FCLs to enhance the FRT performance of WTs [22, 23]. Therefore, the installation of FCLs is receiving more attention to increase the FRT capability of WTs [24, 25].Regarding using FCLs to increase the FRT capability of the DFIG, studies focus on bridge-type FCLs (BFCLs) and superconducting-type FCLs (SFCLs) [26]. In [27], resistive SFCL (RSFCL) is utilized for enhancing the FRT capability of the DFIG. In [28], the RSFCL is employed in the terminal of rotor windings of the DFIG to protect the rotor-side converter (RSC) from spike overcurrent and the DC-link transient overvoltage under voltage sag condition. In [29, 30], the active-type and flux-coupling-type SFCLs are used to connect the DFIG to grid and limit the transient fluctuations, respectively. In [31], the different locations of flux-coupling SFCL influence mechanism are analyzed on the DFIG FRT performance. In [32], two voltage booster schemes include DVR scheme, and resistive-type SFCL schemes are compared in terms of FRT capability of DFIGs. Simulation results show that both schemes provide fast voltage sag mitigation, which improves the FRT performance of the DFIG. In [33], a combined protection scheme includes an inductive-type SFCL, and the modified grid side converter (GSC) control system is proposed to ride through the DFIG performance. In this approach, the GSC of the DFIG supply dynamic reactive to support the grid connecting voltage. Implementation of inductive-type SFCL and simultaneous transient voltage control can smooth the recovery process of grid coupling voltage after a fault time.The research results confirm that the application of SFCLs in different structures offers a promising interface for enhancing the FRT and facilities the integration of DFIG-based WTs to grid. But this solution requires a high manufacture cost and cooling system. In [34], the BFCL is employed in wind farm for the first time to enhance the FRT performance. In this BFCL, the bypass resistor is located in the DC side of the bridge circuit. In [35], scholars use the BFCL with a bypass resistor in the AC side to enhance the transient stability of the DFIG. From this view point, different configuration and control systems from the one presented in [34] have been developed and reported. In [36], a fuzzy-logic controller is implemented to a parallel-resonance BFCL to augment transient stability of the DFIG. In [37], a capacitor-based BFCL with capability of reactive power compensation has been proposed. In [38], a fuzzy logic controller, which is optimized by the genetic algorithm, is designed to implement the capacitor-based BFCL for enhancing the transient stability of DFIG-based wind farm. In [39], a dynamic multicell FCL (MCFCL) is presented to compensate the wind farm coupling voltage for three low, medium, and severe voltage sag conditions. It inserts the suitable number of cells in fault path to provide smooth FRT performance under whole voltage sag conditions.On the other hand, the power system has inherently nonlinear characteristics and connection of WTs including nonlinear power electronics based converters that increase this characteristic. As a result, utilization of nonlinear controllers has better performance under grid disturbances [38, 40]. It is worthy to state that, there are a few studies regarding implementation of a control system to the BFCL for enhancing a DFIG performance under fault condition.Considering this background, this study presents a simple nonlinear variable resistor-based BFCL (NVR-BFCL) to provide the smooth FRT under voltage sag condition. To realize this objective, a simple nonlinear control based on active power deviation is designed and implemented into the BFCL circuit to generate the nonlinear variable resister under fault condition. The efficiency of the NVR-BFCL is checked through extensive time domain simulation and performance comparison of the FR-based BFCL under 3-phase symmetrical short circuit faults. Simulation studies have been performed in PSCAD/EMTDC software environment.


## 2. DFIG-Based WT Model

The schematic diagram of a grid-connected DFIG-based wind turbine is illustrated in Figure1. The induction generator, wind turbine, drive train system, and the control system of DFIG converters are the main components of the wind generation system, which are modeled as follows.Figure 1
DFIG-based WT.


### 2.1. Aerodynamic Modeling of WT

To model the wind turbine in PSCAD/EMTDC software, there are two models such as MODE 2 and MODE 5 in master library of this software. In this work, to model the wind turbine, the MODE 2 is utilized, in which the mechanical powerPm extracted from wind power is given by the following equation [37]:(1)Pm=0.5πρR2Cpλ,βVW3.In (1), ρ introduces the air density, and R and Vw are the blades radius and wind speed, respectively. Cp in (1) is determined based on tip speed ratio λ and pitch angle β and is known as power coefficient. It is determined as(2)Cpλ,β=0.22116λc−0.4β−5e−12.5λc,λc=11/λ+0.08β−0.035/β3−1.In the MODE 2 wind turbine used in this work, the drive train system is presented by the common two-mass model. The schematic diagram of this model is shown in Figure2, and related equations of this model are given by the following equation.Figure 2
Two-mass model.(3)ωg˙ωt˙δtg˙=Dtg2Hg−Dtg2HgKtg2HgDtg2Ht−Dtg2Ht−Ktg2Ht−110ωgωtδtg+−12Hg00012Ht0000TgTt0.


### 2.2. DFIG Model and Control System

The DFIG is composed of a wounded rotor IG, a RSC connected to the GSC by a DC link capacitor, and a WT, as shown in Figure1. The equivalent power circuit of the DFIG in d−q reference frame is shown in Figure 3. According to this figure, the stator and rotor voltage and flux equations are written as follows:(4)Vdqs=Rsidqs+dλdqsdt−ωsλdqs,Vdqr=Rriqrdqr+dλdqrdt−ωs−ωrλdqr,λdqs=Lsidqs+Lmidqs,λdqr=Lsidqr+Lmidqr.Figure 3
DFIG equivalent circuit and its converters.In these equations,Ls=LlsLm/Lls+Lm,Lr=LlrLm/Llr+Lm. idqs and idqr introduce the d−q component of stator and rotor currents, respectively. idqs and rotor current idqr are the d−q components of the stator and rotor currents. Considering Figure 3, the GSC dynamic equations are written as [40](5)Vdqs=Vdqg+Rgidqg+Lgdλdqgdt+ωsLgidqg.And also the DC link dynamic equation is expressed as(6)Vdcidc=Pg−Pr−Ploss.The DFIG active and reactive powers, i.e.,PS and QS are expressed as(7)PS=32Vqsiqs+Vdsids=−32LmLSVqsiqr,QS=32Vqsids−Vdsiqs=32LmLSVqsims−idr.The control diagram of the RSC and GSC are presented in Figure3. The RSC regulates PS and QS by controlling iqr and idr, respectively. Also, the GSC regulates Vdc and VPCC at the determined level by controlling iqs and ids, respectively. Vdc and VPCC introduce the DC link and the PCC voltage.


## 2.1. Aerodynamic Modeling of WT

To model the wind turbine in PSCAD/EMTDC software, there are two models such as MODE 2 and MODE 5 in master library of this software. In this work, to model the wind turbine, the MODE 2 is utilized, in which the mechanical powerPm extracted from wind power is given by the following equation [37]:(1)Pm=0.5πρR2Cpλ,βVW3.In (1), ρ introduces the air density, and R and Vw are the blades radius and wind speed, respectively. Cp in (1) is determined based on tip speed ratio λ and pitch angle β and is known as power coefficient. It is determined as(2)Cpλ,β=0.22116λc−0.4β−5e−12.5λc,λc=11/λ+0.08β−0.035/β3−1.In the MODE 2 wind turbine used in this work, the drive train system is presented by the common two-mass model. The schematic diagram of this model is shown in Figure2, and related equations of this model are given by the following equation.Figure 2
Two-mass model.(3)ωg˙ωt˙δtg˙=Dtg2Hg−Dtg2HgKtg2HgDtg2Ht−Dtg2Ht−Ktg2Ht−110ωgωtδtg+−12Hg00012Ht0000TgTt0.


## 2.2. DFIG Model and Control System

The DFIG is composed of a wounded rotor IG, a RSC connected to the GSC by a DC link capacitor, and a WT, as shown in Figure1. The equivalent power circuit of the DFIG in d−q reference frame is shown in Figure 3. According to this figure, the stator and rotor voltage and flux equations are written as follows:(4)Vdqs=Rsidqs+dλdqsdt−ωsλdqs,Vdqr=Rriqrdqr+dλdqrdt−ωs−ωrλdqr,λdqs=Lsidqs+Lmidqs,λdqr=Lsidqr+Lmidqr.Figure 3
DFIG equivalent circuit and its converters.In these equations,Ls=LlsLm/Lls+Lm,Lr=LlrLm/Llr+Lm. idqs and idqr introduce the d−q component of stator and rotor currents, respectively. idqs and rotor current idqr are the d−q components of the stator and rotor currents. Considering Figure 3, the GSC dynamic equations are written as [40](5)Vdqs=Vdqg+Rgidqg+Lgdλdqgdt+ωsLgidqg.And also the DC link dynamic equation is expressed as(6)Vdcidc=Pg−Pr−Ploss.The DFIG active and reactive powers, i.e.,PS and QS are expressed as(7)PS=32Vqsiqs+Vdsids=−32LmLSVqsiqr,QS=32Vqsids−Vdsiqs=32LmLSVqsims−idr.The control diagram of the RSC and GSC are presented in Figure3. The RSC regulates PS and QS by controlling iqr and idr, respectively. Also, the GSC regulates Vdc and VPCC at the determined level by controlling iqs and ids, respectively. Vdc and VPCC introduce the DC link and the PCC voltage.


## 3. Nonlinear Variable Resistor (NVR)-BFCL

The single-phase circuit of the NVR-based BFCL is shown in Figure4. It includes of following elements:(1)
Bridge rectifier includes diodesD1–D4(2)
IGBT switch, which is represented byT(3)
DC reactorLD suppresses the increasing rate of fault current and protects the semiconductor switches against di/dt(4)
Discharging resistorRD and(5)
DiodeDm in series with R to prevent inverse current due to forward voltage of IGBT switchFigure 4
Power circuit of the BFCL.


### 3.1. Principle Operation of the DBIFCL

To investigate the NVR-BFCL performance, the system shown in Figure5 is used. Under normal operation, the AC current flow through line is converted to DC current iD by the bridge rectifier circuit. It charges LD to the peak value of line current. T is closed to bypass RD for providing a low impedance path. D1−LD−rD−D4−T and D2−LD−rD−D3−T paths carry the line current under positive and negative half cycles of frequency, respectively. The current flowing through rD and semiconductor switches provides some power losses and voltage drop, which is ignorable in comparison with the line voltage drop. When a fault happens at downstream of grid, the rise of line current and the rate of di/dt are limited by LD to ensure the BFCL’ safe operation and prevent instantaneous voltage drop at coupling point voltage. Then, the BFCL control system switches T to put a NVR in fault path. There are two approaches to achieve this. In approach one, when the coupling point voltage falls below the threshold value, the BFCL control system turns off the IGBT switch and inserts the total limiting resistor in fault path. In the second approach, the control system of the BFCL controls the duty cycle D of IGBT switching to provide a variable resistor based on the D, where D is defined as(8)D=tonT.Figure 5
Test system.T is the period of the PWM currier wave, and ton represents the duration time that the T is ON for each period. In this approach, the BFCL inserts a fraction of the total limiting resistor in fault path to provide a variable resistor RV, which is expressed by following equation:(9)RV=R1−D.In this study, the BFCL is controlled based on the second approach. Under fault condition, the BFCL control system detects the fault and implements the nonlinear control for switchingT to produce a nonlinear variable resistor. To control the switching of T, the active power deviation ΔP=PG−PT is used to implement the nonlinear control to provide adaptive active power-based NVR. Therefore, the faulted line short circuit current is limited, and the PCC voltage is boosted as well. Also, RV dissipates the active power generated by the DFIG, which enhances the FRT capability. When the fault is cleared, the PCC voltage returns back to the prefault level and control system turns on T.


### 3.2. Nonlinear Control of the BFCL Resistor

To provide the NVR-based BFCL, the active power deviationΔP is used as input to provide the duty ratio D under fault condition, which is expressed as(10)D=e−ΔP/Tp.Considering (10), ton is expressed as(11)ton=Te−ΔP/Tp.Considering (10) and (11), RV is expressed by following equation:(12)RV=R1−e−ΔP/Tp.It can be seen from (12) that by implementation of a nonlinear control strategy switching, the BFCL provides a NVR as function of the active power deviation. To select a proper time constant Tp, the active power deviations index is used. It is defined as(13)ΔP=∫0TΔPdt.Figure6 demonstrates the active power deviation index for different values of Tp. It can be seen that for Tp=1ms, the system has better performance.Figure 6
Nonlinear controller response.


### 3.3. NVR-BFCL Control System

The NVR-based BFCL control flowchart is shown in Figure7. According to this flowchart, the PCC bus voltage VPCC is considered as control signal to detect the short circuit at the grid side. When a short circuit fault occurs in the grid side, VPCC experiences a voltage sag. Once VPCC becomes less than the threshold value VT, the control circuit detects the fault. VT considered to be 0.95 pu is considered in this work. After detection of voltage sag at PCC bus, the active power deviation ΔP is measured and is used as input to provide the duty ratio D under fault condition. Considering ΔP, the duty ratio D is determined and implemented to the IGBT switch to provide a NVR under fault condition.Figure 7
Control flowchart of the NVR-based BFCL.


## 3.1. Principle Operation of the DBIFCL

To investigate the NVR-BFCL performance, the system shown in Figure5 is used. Under normal operation, the AC current flow through line is converted to DC current iD by the bridge rectifier circuit. It charges LD to the peak value of line current. T is closed to bypass RD for providing a low impedance path. D1−LD−rD−D4−T and D2−LD−rD−D3−T paths carry the line current under positive and negative half cycles of frequency, respectively. The current flowing through rD and semiconductor switches provides some power losses and voltage drop, which is ignorable in comparison with the line voltage drop. When a fault happens at downstream of grid, the rise of line current and the rate of di/dt are limited by LD to ensure the BFCL’ safe operation and prevent instantaneous voltage drop at coupling point voltage. Then, the BFCL control system switches T to put a NVR in fault path. There are two approaches to achieve this. In approach one, when the coupling point voltage falls below the threshold value, the BFCL control system turns off the IGBT switch and inserts the total limiting resistor in fault path. In the second approach, the control system of the BFCL controls the duty cycle D of IGBT switching to provide a variable resistor based on the D, where D is defined as(8)D=tonT.Figure 5
Test system.T is the period of the PWM currier wave, and ton represents the duration time that the T is ON for each period. In this approach, the BFCL inserts a fraction of the total limiting resistor in fault path to provide a variable resistor RV, which is expressed by following equation:(9)RV=R1−D.In this study, the BFCL is controlled based on the second approach. Under fault condition, the BFCL control system detects the fault and implements the nonlinear control for switchingT to produce a nonlinear variable resistor. To control the switching of T, the active power deviation ΔP=PG−PT is used to implement the nonlinear control to provide adaptive active power-based NVR. Therefore, the faulted line short circuit current is limited, and the PCC voltage is boosted as well. Also, RV dissipates the active power generated by the DFIG, which enhances the FRT capability. When the fault is cleared, the PCC voltage returns back to the prefault level and control system turns on T.


## 3.2. Nonlinear Control of the BFCL Resistor

To provide the NVR-based BFCL, the active power deviationΔP is used as input to provide the duty ratio D under fault condition, which is expressed as(10)D=e−ΔP/Tp.Considering (10), ton is expressed as(11)ton=Te−ΔP/Tp.Considering (10) and (11), RV is expressed by following equation:(12)RV=R1−e−ΔP/Tp.It can be seen from (12) that by implementation of a nonlinear control strategy switching, the BFCL provides a NVR as function of the active power deviation. To select a proper time constant Tp, the active power deviations index is used. It is defined as(13)ΔP=∫0TΔPdt.Figure6 demonstrates the active power deviation index for different values of Tp. It can be seen that for Tp=1ms, the system has better performance.Figure 6
Nonlinear controller response.


## 3.3. NVR-BFCL Control System

The NVR-based BFCL control flowchart is shown in Figure7. According to this flowchart, the PCC bus voltage VPCC is considered as control signal to detect the short circuit at the grid side. When a short circuit fault occurs in the grid side, VPCC experiences a voltage sag. Once VPCC becomes less than the threshold value VT, the control circuit detects the fault. VT considered to be 0.95 pu is considered in this work. After detection of voltage sag at PCC bus, the active power deviation ΔP is measured and is used as input to provide the duty ratio D under fault condition. Considering ΔP, the duty ratio D is determined and implemented to the IGBT switch to provide a NVR under fault condition.Figure 7
Control flowchart of the NVR-based BFCL.


## 4. Simulation Results

To assess the NVR-based BFCL performance, the system shown in Figure5 is simulated in PSCAD/EMTDC software. In this simulation study, a three-phased short circuit fault is applied to the transmission line after the FCL location at the grid side. The fault occurs at t=10s. After 0.15s, the circuit breaker isolates the fault. To FRT analysis, the wind speed is considered 14 m/s. Parameters of this system are presented in Table 1.Table 1
Study system parameters.
ParametersValueGridRated voltage20 kVGrid frequency50 HzDFIGRated active power2 MWRated voltage690 VTransmission lineResistance0.27 Ω/kmReactance0.33 Ω/kmLength20 kmNVR-based BFCLLD0.01 HrD1ΩR20ΩThe simulated DFIG produce the rated nominal power at this speed. To investigate the efficiency of the NVR-based BFCL, three scenarios are simulated as follows:Scenario A: without FCLScenario B: with FR-based BFCLScenario C: with NVR-based BFCLFigure8 shows the PCC voltage for all scenarios. The PCC voltage is reduced to 0.18 pu in scenario A, under fault condition. However, the NVR-based BFCL provides the lowest voltage sag during and after the fault period compared with scenario B. Also, the voltage recovery process is considerably smooth and short in scenario C. The DC link voltage response of the DFIG for 3LG fault is shown in Figure 9. According this figure, the DC link voltage has the lowest overvoltage and fluctuation during and after fault time.Figure 8
PCC voltage for all scenarios.Figure 9
DFIG DC link voltage for all scenarios.Figure10 shows the DFIG active power. It drops to zero during fault in scenario A. In scenarios B and C, the active power of DFIG is prevented from abrupt change under fault condition. But, in scenario C, the proposed BFCL by providing a NVR and insertion in fault path causes the active power fluctuation that is minimized and smoothed under fault condition.Figure 10
DFIG active power output for all scenarios.Figure11 shows the DFIG reactive power. It absorbs −2.5 pu reactive power from the grid in scenario A to recover the PCC voltage. However, it is effectively reduced in scenarios B and C. Also, it is lowest in the scenario C, during and after fault clearance. Figure 12 shows the rotor speed of the DFIG under all scenarios.Figure 11
DFIG reactive power output for all scenarios.Figure 12
Rotor speed of DFIG for all scenarios.By using FCL in scenarios B and C, the rotor speed is limited during fault. But, the NVR-based BFCL provides lower oscillation and faster stabilization. The three-phase DFIG rotor currents are presented for all scenarios shown in Figure13. According to this figure, the rotor current experienced two transient conditions in both end of fault time. It is increased to 2 pu at the beginning and end of fault time without using any FCL in series with WT. However, by using FCL in scenarios B and C, the transient overcurrent at both ends of fault time is restricted. However, the NVR-based BFCL provides smooth transient at both ends of fault time.Figure 13
Rotor currents. (a) Scenario A. (b) Scenario B. (c) Scenario C.
(a)(b)(c)


## 5. Conclusions

In this study, a nonlinear control system is designed and implemented to the conventional BFCL to improve the FRT capability of the DFIG-based WTs. It provides a nonlinear variable resistor (NVR), which provides a variable resistor under fault condition depending on the active power deviations during fault. Simulation results show that the NVR-based BFCL is an extremely competent scheme compared to the FR-based BFCL and has better responses in terms of voltage deviations, active power fluctuation, rotor current mitigation, and DC link overvoltage under short circuit faults.



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*Source: 9934887-2021-06-18.xml*