# Main Circuit Topology and Electromagnetic Interference of Electric Vehicle Bidirectional Charger

Authors: Shaojie Sun; Bubo Zhu
Journal: Journal of Control Science and Engineering
 (2022)

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## Abstract

In order to improve the electromagnetic compatibility performance of electric vehicle bidirectional chargers, the authors propose a main circuit topology and electromagnetic interference of the electric vehicle bidirectional charger. The design adopts the parallel connection of silicon carbide (SiC) MOSFETs and completes the bidirectional charging system based on the cascade connection of dual active bridge (DAB) and three-phase four-wire inverter. This paper mainly analyzes the influence of parasitic inductance on the drive and power loop of the T0-247 packaged switch in actual use, and according to the operating characteristics of the system, different gate resistors are used to reduce switching losses and improve system efficiency. And, we explore on how to reduce the overshoot voltage through the RC absorption circuit, thereby reducing the conducted interference. The result shows the following: the primary side absorption circuit resistance is 470 Ω and the capacitor is 47 nf, the secondary side absorption circuit resistance is 40 Ω and the capacitance is 4.7 nf, and the circuit power is 5000 W. Under the same conditions, without adding the RC absorption circuit, the conducted interference on the AC side does not meet the standard, and the amount of disturbance is large. After adding a suitable RC absorption circuit, the conducted interference on the AC side reaches the required value.Conclusion. This research provides a systematic design scheme and optimization method for designing power electronic devices using SiC.


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## Body

## 1. Introduction

Electric vehicle chargers can be divided into on-board and nonvehicle types according to the installation location. On-board chargers are installed on electric vehicles, and users can charge them in any place with a power interface, but limited by space, weight, and cost; therefore, the power level is generally not high. Compared with on-board chargers, off-board chargers have less space and weight requirements, so the power level is relatively high. However, compared with off-board chargers, on-board chargers are more convenient and flexible. Due to their convenience and flexibility, it is more suitable for the needs of current electric vehicle users, so it has received extensive attention. According to whether the charger can realize the bidirectional flow of power, it is divided into unidirectional chargers and bidirectional chargers [1]. At present, the technology of the one-way charger is relatively advanced, and compared with the two-way charger, it has a relatively large advantage in terms of volume, weight, and cost. However, its disadvantage is that it cannot realize power feedback to the grid and cannot meet the needs of V2G occasions. The two-way car charger, due to its power two-way flow function, can realize energy exchange between the electric vehicle battery and grid [2]. However, there are still relatively big challenges in application at present. One of them is the problem of battery life. Constant energy circulation will speed up the degradation of the battery. Another problem is how to develop high-efficiency, high-power-density bidirectional chargers to improve their performance in bidirectional wide-range applications, as shown in Figure 1.Figure 1
Topological structure of the main circuit of the electric vehicle bidirectional charger.


## 2. Literature Review

Yan et al. conducted research on capacity calculation and net benefit of V2G technology. Through this research, it has been shown that the economic benefits and value of V2G technology are very considerable in the future environment; at the same time, they also proposed corresponding strategies and business models on how to implement V2G technology. Finally, the feasibility of V2G technology is verified by experiments, and the huge economic benefits it contains are proved. At present, the one-way car charger that only realizes the G2V function has been put into use in the market and can be applied to any level of charging. During the charging process, the unidirectional charger only needs basic active power control and has no great impact on the aging of the battery; on the existing basis, this can be achieved without the need to update the charging facility. The two-way vehicle charger that can perform V2G function is still in the laboratory research and development stage, and it is basically only suitable for level 2 charging, which will have a certain impact on the aging of the battery, and some control strategies for power regulation need to be added [3]. Thankachan and Singh proposed that there is a two-way interactive technology that relies on information flow and energy flow between the power grid and electric vehicles. It treats electric vehicles connected to the grid as movable loads and distributed energy storage units, when the grid is in peak operation, and the battery of the electric vehicle has sufficient energy; at this time, the electric vehicle can feed back electric energy to the grid under the V2G protocol, reducing the burden on the grid. Relatively speaking, when the power grid is at a trough, electric vehicles can run in a charging state under the G2V protocol, thereby realizing peak shaving and valley filling of the power grid. In addition, electric vehicles can also regulate the voltage and frequency of the power grid within a certain range through control methods [4]. Viana and Lehn analyzed different control strategies and found that the V/F control adopts the control strategy of capacitor current inner loop voltage outer loop; although it has a harder outer characteristic, the system stability is degraded and the configuration of the sensor is changed compared to the inductor current inner loop voltage outer loop in the PQ control strategy; in the process of switching from V2H to V2G mode, the cost and system volume are increased [5]. Metwally et al. introduced a single-phase full-bridge circuit using SiC MOSFETs as switching devices, as a bidirectional charging topology. The three-phase high-power charging is done in the form of charging piles, and its main topology consists of LCL filter, bidirectional AC/DC converter, and isolated DC/DC converter [6].The authors mainly study the structure, printed circuit board (PCB) parasitic parameter analysis, and optimization design of the three-phase on-board bidirectional charger in G2V, V2G, and V2H modes. And, they study the use of the absorption circuit to absorb the pulse peak, so as to reduce the generation of conduction interference from the source.


## 3. Research Methods

### 3.1. System Structure and Parameter Determination

Due to the low battery voltage of electric vehicles, when the energy stored in the battery is used to complete the function of the vehicle to supply power to the user, the battery voltage needs to be boosted to an appropriate amplitude, the system needs to supply power to a mixed single-phase and three-phase load, and a three-phase four-wire inverter is necessary to handle the neutral current under unbalanced loads [7]. Therefore, the design adopts a three-phase four-wire bidirectional charger topology for electric vehicles.As a simple and easy-to-operate bidirectional DC/DC converter, DAB completes the conversion of high and low DC voltages between the battery and the bus. The three-phase four-wire bidirectional inverter is completed by the traditional three-bridge arm and the split bus capacitor combined with the neutral bridge arm, in order to deal with the hidden dangers of the system caused by the voltage oscillation when the unbalanced load occurs. Because the DAB primary battery voltage is low, the selected SiCMOSFET is SCT3022AL packaged with TO-247, and the SCT3030KL packaged with TO-247 is selected on the inverter side [8]. In order to make the system reach 97% efficiency, the design firstly conducts a double-pulse test on two SiC switches, the gate resistance is 2.7Ω and 2Ω, respectively, and the driving circuit is completed with a 4-layer PCB. The loss curves and the corresponding fitting curve functions at turn-on and turn-off are shown in Figures 2 and 3.Figure 2
Switch performance test.Figure 3
DAB primary SiC switch loss test.The turn-on loss of the switch tube is much greater than the turn-off loss; since the DAB side can easily obtain zero voltage switching (ZVS) technology through the control algorithm, the three-phase inverter side always works in a hard switching state. Therefore, the turn-on time of the inverter side can be appropriately reduced to improve the overall efficiency of the system under the condition of ensuring the safety of the gate drive loop [9]. Therefore, DAB and inverter switch tubes use different gate resistances of 2.7 Ω and 2 Ω, respectively.DAB primary switch tube drain-source voltageUds=320V, and when the gate resistance is 2.7 Ω, the turn-on and turn-off time is 72 ns. Inverter side switch tube Uds=490V, and when the gate resistance is 2 Ω, the turn-on and turn-off times are 30 ns and 80 ns, respectively [10]. Based on the above analysis and design, the turn-on dead time of the upper and lower bridge arms is set to 200 ns, and it is assumed that the DAB realizes ZVS in the entire power range; finally, the loss functions of each part fitted by MATLAB are shown in the following.The DAB part (primary + secondary) is as follows:(1)Pswitchloss=0.3589Ids2−0.834Id+100,(2)Pcontertioniloes=0.29Ids2,(3)Pdeadimeloses=3.2Itb2Dtimef.The inverter side is as follows:(4)Pswitchloos=0.7285Ids2−6.285Id+322,(5)Pcandrationloss=0.0396Ids2,(6)Pdeadimaloes=3.2Ids2Dtimef.In equations (2) and (5), the conduction loss resistance values are all from the data sheet and the dead-time loss in equations (3) and (6) is determined by the dead-time, the conduction voltage drop of the SiC body diode (provided by the data sheet), the current flowing at this moment, and the switching frequency [11]. In order to achieve a system efficiency of 97%, the switching frequency of the DAB part is set to 100 kHz and the switching frequency of the inverter side is set to 50 kHz.For switches with high frequency and high switching speed, the design of gate drive circuit is also one of the key technologies. In order not to increase the complexity of the system power supply, the Schottky Zener diode is used in this system to realize the shutdown of the switch tube by negative pressure [12]. A high-frequency digital isolator (SI8711-CC) is used for isolation between the processor and the high-voltage circuit, and a driver (IXDI609SI) with a wide voltage input range and high peak current is used to complete the control of the SiC switch. Resistors Rg and Rs can choose different values to control the turn-on and turn-off of the switch; in order to ensure that the switch is turned off reliably when the driver chip is powered off, the system uses 30 kΩ gate-source resistors Re and VD, which are Zener diodes; the model selected in this design is MMSZ5228B, which forms a stable −4 V for the switch off.According to the system input (DC: 250∼350V) and output (three-phase AC: line voltage 208 V) requirements, other key device parameters set by the system are as follows: single-phase filter inductor of 120μH, single-phase filter capacitor of 4.7 μF, split capacitor of CNI＝CN2＝220μF, neutral line inductance of 120 μH, neutral line inductance equivalent resistance of 50 mΩ, battery terminal input capacitance of 110 μF, transformer turn ratio of 1 : 1.5, transformer leakage inductance of 11.5 μH, transformer excitation inductance of 0.3 mH, DAB switching frequency of 100 kHz, the inverter switching frequency of 50 kHz, the output voltage frequency of 60 Hz, and the output line voltage amplitude of 208 V.


### 3.2. Parasitic Parameter Analysis and Optimization

Due to the fast switching time and high switching frequency, a large value of parasitic inductance or parasitic capacitance will generate large voltage and current shocks; therefore, analyzing and optimizing parasitic parameters is the main measure to improve the safety and reliability of the system.


#### 3.2.1. PCB Parasitic Parameter Analysis and Optimization

While shortening the switching time to reduce the switching loss, the system is more sensitive to the parasitic parameters of the drive circuit and the power circuit. Circuit models with parasitic parameters are used in the application, the inductanceLg1 is the sum of the parasitic inductance of the gate pin of the switch tube and the parasitic inductance of the PCB wire, and LBs1 is the sum of the parasitic inductance of the source pin and the PCB trace. Therefore, both the main loop and the drive loop will have an inductance of 24 nH. In order to reduce the influence of parasitic parameters, the drive loop should drive the gate of the switch tube as much as possible, and the area of the drive loop should be minimized through a reasonable PCB design, so that the magnetic flux passing through the drive loop is minimized and it can greatly improve the stability of the drive loop [13, 14]. When the parasitic parameters of the switch drive loop are different, the gate drive signal will oscillate to different degrees and even turn on or off delay between the parallel SiC switches; as a result, various unbalanced phenomena such as different currents between the switches and different temperature rises are caused, and the stability of the system is reduced.According to the above analysis, the design driver and power circuit PCB are designed, using ANSYSQ3D simulation software and the circuit PCB parasitic inductances of the available switch tubes V1∼V4 are 5.96 nH, 6.23 nH, 6.3 nH, and 6.02 nH. In order to confirm the symmetry of the PCB design and avoid the influence of unbalanced parameters on the system stability, see Figure 4 for the open and close test waveforms of a group of parallel tubes. It means that the parallel tube can be turned on and off at the same time, preventing the pipe from being damaged due to uneven pressure [3].Figure 4
Delay test of the parallel SiC switch.


#### 3.2.2. Analysis and Design of Parasitic Parameters of DC Busbar

The system adopts a layered design structure, so the DC busbar needs to be completed when the sampling control board is connected with the power board and the input and output capacitors [15]. In order to reduce the parasitic inductance on the busbar, the actual design is done in an overlapping manner, and we make them as close as possible to each other to reduce the area of the loop. The parasitic inductance values are obtained by ANSYSQ3D simulation software, which are 110.8 nH and 55.55 nH, respectively. Therefore, appropriate high-voltage ceramic capacitors need to be added to both the battery input end and the DC bus end to absorb the high-frequency surge voltage during system operation.


#### 3.2.3. Analysis of System Thermal Parameters

In order to enable the switch tube to effectively dissipate heat, by comparing the effects of various thermal pads, the HF300P thermal pad is finally used as a thermal insulation material and attached to the copper heat sink. The test results are shown in Figure5; the thermal resistance of the system is greatly reduced, which can ensure the safe operation of the system for a long time.Figure 5
Thermal resistance test.


### 3.3. Comparison of C, RC, and RCD Snubber Circuits

The commonly used absorption circuits include C, RC, and RCD absorption circuits. Let us compare and analyze these three circuits:(1)
The C absorption circuit is used to connect a capacitor C in parallel with the switch Q, similar to the resonant reset forward circuit, because the voltage spike on the switch tube is generated by the junction capacitance oscillation of the leakage inductance L and Q; if a capacitor C is connected in parallel across the switch tube Q, the frequency and amplitude of the LC oscillation can be changed, but the choice of the capacitor C needs to be considered; first of all, you need to check the junction capacitance Cds of the switch Q; if the capacitance C is much smaller than Cds, then parallel connection will not work. The selection of the capacitor value must also consider the additional loss, because the energy stored in the capacitor C is completely consumed when the switch Q is turned on, and this part of the loss is due to the addition of the capacitor C; in addition, it is necessary to consider the loss caused by the current generated on the capacitor C during the absorption process. When the switch Q is turned off, VDS rises at a certain slope, and the current is not very large; however, in the resonant forward circuit, the capacitor C must be careful; generally, in the resonant forward circuit, the capacitor C will take about tens of nanofarads, and the current is large; then, the capacitor C needs to choose a capacitor with a larger package to withstand such a large current impact.(2)
The loss source of the RC absorption network can be considered to come from two aspects: Even if there is no leakage inductance, because of the existence ofdv/dt, there must be a charging and discharging process on the RC. In the design process, the time constant of the RC is generally much smaller than the switching period. When all parameters remain unchanged, the faster the voltage rises and falls, the greater the loss on the resistor. When all parameters remain unchanged, there is an increase in the resistance and the loss on the resistance increases. When all parameters remain unchanged, there is an increase in the capacitance and the loss on the resistance increases.From a theoretical point of view, all the energy of the leakage inductance is lost in the resistance at the end, so the loss caused by the leakage inductance on the resistance will not change with the selection of RC, but if the RC is changed, the resonant coefficient of the entire LRC will vary, and the peaks generated by the leakage inductance vary [16]. Considering the existence of leakage inductance, it can be considered that the leakage inductance is an initial excitation current, which is finally absorbed by the damping oscillation of the RLC circuit; so no matter what the value of RC is, as long as the oscillation frequency is much smaller than the switching frequency and the oscillation damping is guaranteed to be completed within the (1-D) switching period, then all the energy of the leakage inductance will be lost on R at the end.(3)
The energy of the RCD absorption network can also be considered to come from two aspects: There is no leakage inductance, only the voltage is generated across capacitor C when the FET is turned off.It can actually be thought as a voltage source with a diode for peak sampling.The captured energy is released through the resistance. If the time constant of the resistance and capacitance is much larger than the switching period, it can be considered that the voltage on the resistance is always the turn-off voltage of the FET, and the larger the resistance, the smaller the loss. In the actual circuit, the time constant of the resistance and capacitance is not much larger than the switching period; therefore, there is actually a voltage ripple on the capacitor C. The simulation results show that the smaller the time constant of RC, the greater the loss on the resistor R [17]. From this point of view, the larger the chosen RC constant, the smaller the loss. However, it should be noted that only the loss on the resistance is considered here; in fact, a large current also flows through the diode when it is turned on, the diode is not an ideal PN junction at this moment, and there is also loss; this flowing current is related to the slope of the voltage; the steeper the voltage slope, the greater the current; the flowing current is also related to the size of the capacitor, and when the time constant is constant, the larger the capacitor is, the larger the current will be [18]. Therefore, from the perspective of diode loss, it is necessary to use the RC parameters of large resistors and small capacitors as much as possible. Of course, if the leakage inductance model is considered, such RC parameters are not good for absorbing the energy of the leakage inductance.Based on the actual situation, the authors select the RC absorption network for design and analysis.


### 3.4. RC Absorption Circuit Design

The main function of capacitor C is to absorb, when the switch is turned off, voltage spikes due to stray inductance, etc. Due to the influence of stray inductance circuit layout, etc., it is not easy to measure directly and it is usually obtained by the experimental method [19]. The general method is, in the absence of any absorption circuit, to use an oscilloscope to observe the waveform oscillation of the switch tube when it is turned off, so as to obtain the oscillation period T1 at this time; then, we add a measuring capacitor C0 with a known capacitance value at both ends of the switch tube, and under the same conditions, we observe the oscillation period T2 at this time; the stray inductance of the circuit at this time can be obtained by calculation. That is, we have the following formula:(7)Lp=T22−T124π2C0.After obtaining the stray inductance value, we use the following equation:(8)12LP+LSI2=12CΔU2.Here,ΔU is the voltage overcharge, I is the on-current, and LS is the parasitic inductance, and the required capacitance value of the circuit can be obtained by the following formula:(9)C=LP+LSI2ΔU2.In order to ensure that the energy on the capacitor can be completely released, the discharge time constant of the RC circuit is generally required to be less than 1/4 of the on-time of the switch. That is, we have the following formula:(10)R≤Ton4C.But R is not the smaller the better, too small absorption resistance will lead to circuit current oscillation. Therefore, under the premise of meeting the requirements, R should be as large as possible, and we have the following formula:(11)R≥2LC.Therefore, the resistance value of the absorption resistor is as follows:(12)2LC≤R≤Ton4C.However, due to the fact that there are many influencing factors, the specific parameters need to be combined with the actual situation.


## 3.1. System Structure and Parameter Determination

Due to the low battery voltage of electric vehicles, when the energy stored in the battery is used to complete the function of the vehicle to supply power to the user, the battery voltage needs to be boosted to an appropriate amplitude, the system needs to supply power to a mixed single-phase and three-phase load, and a three-phase four-wire inverter is necessary to handle the neutral current under unbalanced loads [7]. Therefore, the design adopts a three-phase four-wire bidirectional charger topology for electric vehicles.As a simple and easy-to-operate bidirectional DC/DC converter, DAB completes the conversion of high and low DC voltages between the battery and the bus. The three-phase four-wire bidirectional inverter is completed by the traditional three-bridge arm and the split bus capacitor combined with the neutral bridge arm, in order to deal with the hidden dangers of the system caused by the voltage oscillation when the unbalanced load occurs. Because the DAB primary battery voltage is low, the selected SiCMOSFET is SCT3022AL packaged with TO-247, and the SCT3030KL packaged with TO-247 is selected on the inverter side [8]. In order to make the system reach 97% efficiency, the design firstly conducts a double-pulse test on two SiC switches, the gate resistance is 2.7Ω and 2Ω, respectively, and the driving circuit is completed with a 4-layer PCB. The loss curves and the corresponding fitting curve functions at turn-on and turn-off are shown in Figures 2 and 3.Figure 2
Switch performance test.Figure 3
DAB primary SiC switch loss test.The turn-on loss of the switch tube is much greater than the turn-off loss; since the DAB side can easily obtain zero voltage switching (ZVS) technology through the control algorithm, the three-phase inverter side always works in a hard switching state. Therefore, the turn-on time of the inverter side can be appropriately reduced to improve the overall efficiency of the system under the condition of ensuring the safety of the gate drive loop [9]. Therefore, DAB and inverter switch tubes use different gate resistances of 2.7 Ω and 2 Ω, respectively.DAB primary switch tube drain-source voltageUds=320V, and when the gate resistance is 2.7 Ω, the turn-on and turn-off time is 72 ns. Inverter side switch tube Uds=490V, and when the gate resistance is 2 Ω, the turn-on and turn-off times are 30 ns and 80 ns, respectively [10]. Based on the above analysis and design, the turn-on dead time of the upper and lower bridge arms is set to 200 ns, and it is assumed that the DAB realizes ZVS in the entire power range; finally, the loss functions of each part fitted by MATLAB are shown in the following.The DAB part (primary + secondary) is as follows:(1)Pswitchloss=0.3589Ids2−0.834Id+100,(2)Pcontertioniloes=0.29Ids2,(3)Pdeadimeloses=3.2Itb2Dtimef.The inverter side is as follows:(4)Pswitchloos=0.7285Ids2−6.285Id+322,(5)Pcandrationloss=0.0396Ids2,(6)Pdeadimaloes=3.2Ids2Dtimef.In equations (2) and (5), the conduction loss resistance values are all from the data sheet and the dead-time loss in equations (3) and (6) is determined by the dead-time, the conduction voltage drop of the SiC body diode (provided by the data sheet), the current flowing at this moment, and the switching frequency [11]. In order to achieve a system efficiency of 97%, the switching frequency of the DAB part is set to 100 kHz and the switching frequency of the inverter side is set to 50 kHz.For switches with high frequency and high switching speed, the design of gate drive circuit is also one of the key technologies. In order not to increase the complexity of the system power supply, the Schottky Zener diode is used in this system to realize the shutdown of the switch tube by negative pressure [12]. A high-frequency digital isolator (SI8711-CC) is used for isolation between the processor and the high-voltage circuit, and a driver (IXDI609SI) with a wide voltage input range and high peak current is used to complete the control of the SiC switch. Resistors Rg and Rs can choose different values to control the turn-on and turn-off of the switch; in order to ensure that the switch is turned off reliably when the driver chip is powered off, the system uses 30 kΩ gate-source resistors Re and VD, which are Zener diodes; the model selected in this design is MMSZ5228B, which forms a stable −4 V for the switch off.According to the system input (DC: 250∼350V) and output (three-phase AC: line voltage 208 V) requirements, other key device parameters set by the system are as follows: single-phase filter inductor of 120μH, single-phase filter capacitor of 4.7 μF, split capacitor of CNI＝CN2＝220μF, neutral line inductance of 120 μH, neutral line inductance equivalent resistance of 50 mΩ, battery terminal input capacitance of 110 μF, transformer turn ratio of 1 : 1.5, transformer leakage inductance of 11.5 μH, transformer excitation inductance of 0.3 mH, DAB switching frequency of 100 kHz, the inverter switching frequency of 50 kHz, the output voltage frequency of 60 Hz, and the output line voltage amplitude of 208 V.


## 3.2. Parasitic Parameter Analysis and Optimization

Due to the fast switching time and high switching frequency, a large value of parasitic inductance or parasitic capacitance will generate large voltage and current shocks; therefore, analyzing and optimizing parasitic parameters is the main measure to improve the safety and reliability of the system.


### 3.2.1. PCB Parasitic Parameter Analysis and Optimization

While shortening the switching time to reduce the switching loss, the system is more sensitive to the parasitic parameters of the drive circuit and the power circuit. Circuit models with parasitic parameters are used in the application, the inductanceLg1 is the sum of the parasitic inductance of the gate pin of the switch tube and the parasitic inductance of the PCB wire, and LBs1 is the sum of the parasitic inductance of the source pin and the PCB trace. Therefore, both the main loop and the drive loop will have an inductance of 24 nH. In order to reduce the influence of parasitic parameters, the drive loop should drive the gate of the switch tube as much as possible, and the area of the drive loop should be minimized through a reasonable PCB design, so that the magnetic flux passing through the drive loop is minimized and it can greatly improve the stability of the drive loop [13, 14]. When the parasitic parameters of the switch drive loop are different, the gate drive signal will oscillate to different degrees and even turn on or off delay between the parallel SiC switches; as a result, various unbalanced phenomena such as different currents between the switches and different temperature rises are caused, and the stability of the system is reduced.According to the above analysis, the design driver and power circuit PCB are designed, using ANSYSQ3D simulation software and the circuit PCB parasitic inductances of the available switch tubes V1∼V4 are 5.96 nH, 6.23 nH, 6.3 nH, and 6.02 nH. In order to confirm the symmetry of the PCB design and avoid the influence of unbalanced parameters on the system stability, see Figure 4 for the open and close test waveforms of a group of parallel tubes. It means that the parallel tube can be turned on and off at the same time, preventing the pipe from being damaged due to uneven pressure [3].Figure 4
Delay test of the parallel SiC switch.


### 3.2.2. Analysis and Design of Parasitic Parameters of DC Busbar

The system adopts a layered design structure, so the DC busbar needs to be completed when the sampling control board is connected with the power board and the input and output capacitors [15]. In order to reduce the parasitic inductance on the busbar, the actual design is done in an overlapping manner, and we make them as close as possible to each other to reduce the area of the loop. The parasitic inductance values are obtained by ANSYSQ3D simulation software, which are 110.8 nH and 55.55 nH, respectively. Therefore, appropriate high-voltage ceramic capacitors need to be added to both the battery input end and the DC bus end to absorb the high-frequency surge voltage during system operation.


### 3.2.3. Analysis of System Thermal Parameters

In order to enable the switch tube to effectively dissipate heat, by comparing the effects of various thermal pads, the HF300P thermal pad is finally used as a thermal insulation material and attached to the copper heat sink. The test results are shown in Figure5; the thermal resistance of the system is greatly reduced, which can ensure the safe operation of the system for a long time.Figure 5
Thermal resistance test.


## 3.2.1. PCB Parasitic Parameter Analysis and Optimization

While shortening the switching time to reduce the switching loss, the system is more sensitive to the parasitic parameters of the drive circuit and the power circuit. Circuit models with parasitic parameters are used in the application, the inductanceLg1 is the sum of the parasitic inductance of the gate pin of the switch tube and the parasitic inductance of the PCB wire, and LBs1 is the sum of the parasitic inductance of the source pin and the PCB trace. Therefore, both the main loop and the drive loop will have an inductance of 24 nH. In order to reduce the influence of parasitic parameters, the drive loop should drive the gate of the switch tube as much as possible, and the area of the drive loop should be minimized through a reasonable PCB design, so that the magnetic flux passing through the drive loop is minimized and it can greatly improve the stability of the drive loop [13, 14]. When the parasitic parameters of the switch drive loop are different, the gate drive signal will oscillate to different degrees and even turn on or off delay between the parallel SiC switches; as a result, various unbalanced phenomena such as different currents between the switches and different temperature rises are caused, and the stability of the system is reduced.According to the above analysis, the design driver and power circuit PCB are designed, using ANSYSQ3D simulation software and the circuit PCB parasitic inductances of the available switch tubes V1∼V4 are 5.96 nH, 6.23 nH, 6.3 nH, and 6.02 nH. In order to confirm the symmetry of the PCB design and avoid the influence of unbalanced parameters on the system stability, see Figure 4 for the open and close test waveforms of a group of parallel tubes. It means that the parallel tube can be turned on and off at the same time, preventing the pipe from being damaged due to uneven pressure [3].Figure 4
Delay test of the parallel SiC switch.


## 3.2.2. Analysis and Design of Parasitic Parameters of DC Busbar

The system adopts a layered design structure, so the DC busbar needs to be completed when the sampling control board is connected with the power board and the input and output capacitors [15]. In order to reduce the parasitic inductance on the busbar, the actual design is done in an overlapping manner, and we make them as close as possible to each other to reduce the area of the loop. The parasitic inductance values are obtained by ANSYSQ3D simulation software, which are 110.8 nH and 55.55 nH, respectively. Therefore, appropriate high-voltage ceramic capacitors need to be added to both the battery input end and the DC bus end to absorb the high-frequency surge voltage during system operation.


## 3.2.3. Analysis of System Thermal Parameters

In order to enable the switch tube to effectively dissipate heat, by comparing the effects of various thermal pads, the HF300P thermal pad is finally used as a thermal insulation material and attached to the copper heat sink. The test results are shown in Figure5; the thermal resistance of the system is greatly reduced, which can ensure the safe operation of the system for a long time.Figure 5
Thermal resistance test.


## 3.3. Comparison of C, RC, and RCD Snubber Circuits

The commonly used absorption circuits include C, RC, and RCD absorption circuits. Let us compare and analyze these three circuits:(1)
The C absorption circuit is used to connect a capacitor C in parallel with the switch Q, similar to the resonant reset forward circuit, because the voltage spike on the switch tube is generated by the junction capacitance oscillation of the leakage inductance L and Q; if a capacitor C is connected in parallel across the switch tube Q, the frequency and amplitude of the LC oscillation can be changed, but the choice of the capacitor C needs to be considered; first of all, you need to check the junction capacitance Cds of the switch Q; if the capacitance C is much smaller than Cds, then parallel connection will not work. The selection of the capacitor value must also consider the additional loss, because the energy stored in the capacitor C is completely consumed when the switch Q is turned on, and this part of the loss is due to the addition of the capacitor C; in addition, it is necessary to consider the loss caused by the current generated on the capacitor C during the absorption process. When the switch Q is turned off, VDS rises at a certain slope, and the current is not very large; however, in the resonant forward circuit, the capacitor C must be careful; generally, in the resonant forward circuit, the capacitor C will take about tens of nanofarads, and the current is large; then, the capacitor C needs to choose a capacitor with a larger package to withstand such a large current impact.(2)
The loss source of the RC absorption network can be considered to come from two aspects: Even if there is no leakage inductance, because of the existence ofdv/dt, there must be a charging and discharging process on the RC. In the design process, the time constant of the RC is generally much smaller than the switching period. When all parameters remain unchanged, the faster the voltage rises and falls, the greater the loss on the resistor. When all parameters remain unchanged, there is an increase in the resistance and the loss on the resistance increases. When all parameters remain unchanged, there is an increase in the capacitance and the loss on the resistance increases.From a theoretical point of view, all the energy of the leakage inductance is lost in the resistance at the end, so the loss caused by the leakage inductance on the resistance will not change with the selection of RC, but if the RC is changed, the resonant coefficient of the entire LRC will vary, and the peaks generated by the leakage inductance vary [16]. Considering the existence of leakage inductance, it can be considered that the leakage inductance is an initial excitation current, which is finally absorbed by the damping oscillation of the RLC circuit; so no matter what the value of RC is, as long as the oscillation frequency is much smaller than the switching frequency and the oscillation damping is guaranteed to be completed within the (1-D) switching period, then all the energy of the leakage inductance will be lost on R at the end.(3)
The energy of the RCD absorption network can also be considered to come from two aspects: There is no leakage inductance, only the voltage is generated across capacitor C when the FET is turned off.It can actually be thought as a voltage source with a diode for peak sampling.The captured energy is released through the resistance. If the time constant of the resistance and capacitance is much larger than the switching period, it can be considered that the voltage on the resistance is always the turn-off voltage of the FET, and the larger the resistance, the smaller the loss. In the actual circuit, the time constant of the resistance and capacitance is not much larger than the switching period; therefore, there is actually a voltage ripple on the capacitor C. The simulation results show that the smaller the time constant of RC, the greater the loss on the resistor R [17]. From this point of view, the larger the chosen RC constant, the smaller the loss. However, it should be noted that only the loss on the resistance is considered here; in fact, a large current also flows through the diode when it is turned on, the diode is not an ideal PN junction at this moment, and there is also loss; this flowing current is related to the slope of the voltage; the steeper the voltage slope, the greater the current; the flowing current is also related to the size of the capacitor, and when the time constant is constant, the larger the capacitor is, the larger the current will be [18]. Therefore, from the perspective of diode loss, it is necessary to use the RC parameters of large resistors and small capacitors as much as possible. Of course, if the leakage inductance model is considered, such RC parameters are not good for absorbing the energy of the leakage inductance.Based on the actual situation, the authors select the RC absorption network for design and analysis.


## 3.4. RC Absorption Circuit Design

The main function of capacitor C is to absorb, when the switch is turned off, voltage spikes due to stray inductance, etc. Due to the influence of stray inductance circuit layout, etc., it is not easy to measure directly and it is usually obtained by the experimental method [19]. The general method is, in the absence of any absorption circuit, to use an oscilloscope to observe the waveform oscillation of the switch tube when it is turned off, so as to obtain the oscillation period T1 at this time; then, we add a measuring capacitor C0 with a known capacitance value at both ends of the switch tube, and under the same conditions, we observe the oscillation period T2 at this time; the stray inductance of the circuit at this time can be obtained by calculation. That is, we have the following formula:(7)Lp=T22−T124π2C0.After obtaining the stray inductance value, we use the following equation:(8)12LP+LSI2=12CΔU2.Here,ΔU is the voltage overcharge, I is the on-current, and LS is the parasitic inductance, and the required capacitance value of the circuit can be obtained by the following formula:(9)C=LP+LSI2ΔU2.In order to ensure that the energy on the capacitor can be completely released, the discharge time constant of the RC circuit is generally required to be less than 1/4 of the on-time of the switch. That is, we have the following formula:(10)R≤Ton4C.But R is not the smaller the better, too small absorption resistance will lead to circuit current oscillation. Therefore, under the premise of meeting the requirements, R should be as large as possible, and we have the following formula:(11)R≥2LC.Therefore, the resistance value of the absorption resistor is as follows:(12)2LC≤R≤Ton4C.However, due to the fact that there are many influencing factors, the specific parameters need to be combined with the actual situation.


## 4. Analysis of Results

The AC/DC part is a common full-bridge topology, and the DC/DC part is a dual active bridge topology. Experiments on the influence of RC snubber circuit on electromagnetic conducted interference in electric vehicle bidirectional charger discharge mode are carried out on the dual active bridge topology. We conducted interference analysis on the AC side.Through theoretical calculation and practical adjustment, the primary side absorption circuit resistance is 470 Ω and the capacitor is 47 nf, the secondary side absorption circuit resistance is 40 Ω and the capacitance is 4.7 nf, and the circuit power is 5000 W. The authors compare the conducted interference on the AC grid side, and the results are shown in Figure6.Figure 6
Results without adding the RC snubber circuit.From Figure6, we can get the following: under the same conditions, without adding RC absorption circuit, the conducted interference on the AC side does not meet the standard, and the amount of disturbance is large; after adding a suitable RC absorption circuit, the conducted interference on the AC side reaches the required value.


## 5. Conclusion

As a new application field of electric vehicles, V2H firstly analyzes the development requirements of on-board bidirectional chargers and adopts the cascade connection method of the DAB and three-phase four-wire inverter to form the on-board bidirectional charging system. Combined with the topology, a suitable RC absorption circuit is selected through calculation and actual adjustment, and the conducted interference on the AC side of the circuit is greatly reduced to meet the standard requirements. Therefore, the RC absorption circuit connected in parallel with the switch tube can effectively reduce the current impact generated by the switch tube during the turn-off process, thereby effectively reducing the conduction interference of the electronic equipment during the working process. It is effective to select a suitable RC absorption circuit for the bidirectional charger of electric vehicles to reduce conducted interference and ensure the safety of the power grid.



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*Source: 9507377-2022-10-03.xml*