# VM and CM Universal Filters Based on Single DVCCTA

Authors: Neeta Pandey; Sajal K. Paul
Journal: Active and Passive Electronic Components
 (2011)

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## Abstract

A universal voltage-mode filter (VM) and a current-mode filter (CM) based on recently proposed active building block, namely, differential voltage current conveyor transconductance amplifier (DVCCTA) are proposed. Both the circuits use a single DVCCTA, two capacitors, and a single resistor. The filters enjoy low-sensitivity performance and low component spread and exhibit electronic tunability of filter parameters via bias currents of DVCCTA. SPICE simulation using 0.25μm TSMC CMOS technology parameters is included to show the workability of the proposed circuits.


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## Body

## 1. Introduction

The current mode approach for analog signal processing circuits and systems has emerged as an alternate method besides the traditional voltage-mode circuits [1]. The current mode active elements are appropriate to operate with signals in current, voltage, or mixed mode and are gaining acceptance as building blocks in high-performance circuit designs. A number of current mode active elements such as operational transconductance amplifier (OTA) [2], current conveyors (CC) [3–5], differential voltage current conveyor (DVCC) [6], differential difference current conveyor (DDCC) [7], and current feedback operational amplifier (CFOA) [8] are available in the literature.Recently there is report of some new analog building blocks, such as current-conveyor transconductance amplifier (CCTA) [9, 10], current controlled current conveyor transconductance amplifier (CCCCTA) [11], current difference transconductance amplifier (CDTA) [12], current controlled current difference transconductance amplifier (CCCDTA) [13], differential voltage current conveyor transconductance amplifier (DVCCTA) [14], and differential voltage current controlled conveyor transconductance amplifier DVCCCTA [15], which may be obtained by cascading of current mode building blocks with TA analog building blocks in monolithic chip for compact implementation of signal processing circuits and systems. It is well known that DVCC has some advantages [6, 16, 17], specially for applications demanding differential  and floating inputs, over CCII or CCCII owing to two high input impedance terminals for DVCC compared to one high input impedance terminal for CCII or CCCII. However, DVCC does not have a powerful inbuilt tuning property in contrast to CCCII.This paper presents a universal voltage-mode filter and a universal current mode filter based on recently proposed active building block, namely, differential voltage current conveyor transconductance amplifier (DVCCTA) [15] which has DVCC [6] as input block and is followed by transconductance amplifier (TA). The DVCCTA has all the good properties of CCTA or CCCCTA including the possibility of inbuilt tuning of the parameters of the signal processing circuits to be implemented and also all the versatile and special properties of DVCC such as easy implementation of differential and floating input circuits [6, 16, 17]. The proposed circuits have been implemented using 0.25 μm TSMC CMOS technology and are validated through SPICE simulations for their functionality.


## 2. Circuit Description

### 2.1. DVCCTA

The DVCCTA is based on DVCC [6] and consists of differential amplifier, current mirrors, and transconductance amplifier (TA). The port relationships of the DVCCTA as shown in Figure 1 can be characterized by the following matrix: (1)[IY1IY2VXIZ+IZ-IO-]=[0000000000001-1000000100000-1000000-gm00][VY1VY2IXVZ+VZ-VO-],
where gm is transconductance of the DVCCTA.Figure 1
Circuit symbol of  DVCCTA.The CMOS-based internal circuit of DVCCTA in CMOS is depicted in Figure2 and is based on internal circuit of DVCC [6] which is followed by a transconductance amplifier. The value of gm is obtained as 2μCox(W/L)I0 which can be adjusted by bias current I0. The TSMC 0.25 μm CMOS process model parameters and supply voltages of VDD=-VSS=1.25V and VBB=-0.8V are used. The aspect ratio of various transistors for DVCC is given in Table 1.Table 1
Aspect ratio of various transistors.
TransistorAspect ratio (W(μm)/L(μm))M1–M410/0.5M5, M65/0.5M7, M827.25/0.5M9, M11, M13, M15, M168.5/0.5M10, M12, M14, M17, M1844/0.5M19, M20, M23–M265/0.5M21, M2227/0.5Figure 2
Internal circuit of DVCCTA.


### 2.2. Universal Voltage-Mode Filter

In this section, a universal voltage-mode (VM) filter is proposed. It uses a single DVCCTA, two capacitors, and a grounded resistor. The proposed universal VM filter is shown in Figure3. The analysis of circuit yields the output voltages at two nodes as follows(2)Vout1=(sC2+gm)Vin1+s2C1C2RVin2-sC2RgmVin3D(s),(3)Vout2=-sC1Vin1+sC1Vin2+Vin3D(s)-gmVin3D(s),
where(4)D(s)=s2C1C2R+sC2+gm.Figure 3
Proposed universal voltage-mode filter.Table2 shows the availability of each filter response and corresponding selection of input voltages Vin1, Vin2, and Vin3. Thus the proposed structure is a three-input and two output voltage-mode filter. The responses are characterized by pole frequency (ω0), bandwidth (ω0/Q0), and quality factor (Q0) as follows:(5)ω0=(gmRC1C2)1/2,ω0Q0=1RC1,Q0=(gmRC1C2)1/2.Table 2
TheVin1, Vin2, and Vin3 values selection for each filter function response.
Filter responsesInputsOutputVin1Vin2Vin3Low-pass101Vout1,R=1/gmHigh-pass010Vout1101Vout2,R=1/gmBand-pass001Vout1100Vout2010Vout2Notch111Vout1,R=1/gmAll pass111Vout1,R=2/gmIt may be noted that the value ofgm can easily be varied by bias currents I0. The resistance R being a grounded one may easily be implemented as a variable resistance using only two MOSs [17] or replacing DVCCTA along with resistor R by DVCCCTA [15]. Equation (5) reveals that for high-pass and band-pass responses, the pole frequency (ω0) and quality factor (Q0) can be adjusted by gm, that is, by bias current (I0) of DVCCTA, without disturbing ω0/Q0. The ω0 and Q0 are orthogonally adjustable with simultaneous adjustment of gm and R such that the product gmR remains constant, and the quotient gm/R varies and vice versa.  Equation (5) also indicates that high values of Q factor will be obtained from moderate values of ratios of passive components, that is, from low component spread [21]. These ratios can be chosen as gmR=(C1/C2)=Q0. Hence, the spread of the component values becomes of the order ofQ0. This feature of the filter related to the component spread allows the realization of high Q0 values more accurately compared to the topologies where the spread of passive components becomes Q0 or Q02. It can also be easily evaluated to show that the sensitivities of pole ω0 and pole Q0 are within unity in magnitude. Thus, the proposed structures can be classified as insensitive.A detailed study of the available similar type of single active element- (such as CCCTA, DBTA, and DVCCCTA) based voltage-mode filters and the proposed one is given in Table3. It reveals that the topology in [18] uses excessive number of passive components whereas the proposed topology uses one extra passive component, namely, resistor (R) in comparison to structures in [11, 15]; however this resistor (R) may be eliminated as discussed above.  Structures in [15, 18] do not provide for all standard universal filter functions. Topology in [11] needs input signal Vin, -Vin, and -2Vin; hence, there is a requirement of additional circuits. Thus the proposed structure possesses all the advantageous features as tabulated in Table 3 without any additional components, rather passive components used may be reduced to 2 by eliminating resistor (R) at x terminal with the use of DVCCCTA instead of DVCCTA.Table 3
Comparative study of the available similar type of single active element-based VM filters.
ReferenceActive element used and number of passive componentsAvailability of universal filter responses (i.e., low-pass, band-pass, high-pass, notch, and all pass)No  inversion of input voltageNo requirement of gain of input signal such as 2Vin and 3VinTunabilitySimple/no matching condition[11]CCCCTA,   2YesNoNoYesYes[15]DVCCCTA,  2NoYesYesYesYes[18]DBTA,   5NoYesYesYesYesProposedDVCCTA,  3*YesYesYesYesYes*Passive components may be reduced to 2 by replacing DVCCTA with DVCCCTA.To verify the functionality of the proposed single DVCCTA-based voltage-mode filter, SPICE simulations have been carried out  using TSMC 0.25μm CMOS process model parameters and supply voltages of VDD=-VSS=1.25V and VBB=-0.8V. The aspect ratio of various transistors is given in Table 1. The filter is designed for a pole frequency of f0 = 1.59 MHz, Q=1, the component values are found to be C=C1=C2=100pF, R=1kΩ, and bias current of DVCCTA equals 100 μA. Figure 4(a) shows the simulation results for low-pass (Vout1) and high-pass (Vout2)  filter responses which are available simultaneously for Vin = Vin1 = Vin3, Vin2 = 0.  Figure 4(b) shows the simulation results for high  pass (Vout1) and band-pass (Vout2)  filter responses which are available simultaneously for Vin = Vin2, Vin1 = Vin3 = 0.  Notch and all pass responses are shown in Figures 4(c) and 4(d) with Vin = Vin1 = Vin2 = Vin3 and R = 1 kΩ and 2 kΩ, respectively.Simulated response of the proposed universal voltage-mode filter: (a) high-pass and low-pass, (b) high-pass and band-pass,   (c) notch, (d) all pass.
(a)(b)(c)(d)


### 2.3. MISO Current Mode Universal Filter

A multiple-input single-output (MISO) universal current mode (CM) filter is proposed in this section which is obtained by grounding all voltage inputs in Figure3 and exciting them with current inputs as shown in Figure 5. Here, an extra Z-terminal is added to obtain Iout at high impedance. It employs a single DVCCTA, two grounded capacitors, and a grounded resistor. Analysis of this circuit gives the output current as follows:(6)Iout=s2C1C2RIin1-sC2Iin3+gmIin2D(s),
where (7)D(s)=s2C1C2R+sC2+gmFigure 5
Current mode universal filter.Table4 shows the availability of each filter response and corresponding selection of input currents Iin1,Iin2, and Iin3. Thus, the proposed structure is a three-input single output current mode filter. It may be noted that there is no component matching constraint for obtaining any filter response. The filter parameters are the same as given in (5). The grounded resistance (R) may easily be implemented as variable one using only two MOSs [17] for full electronic control of filter parameters. The ω0,Q0, and ω0/Q0 can be orthogonally adjusted the way discussed in Section 2.2.Table 4
TheIin1, Iin2, and Iin3  values selection for each filter function response.
Filter responsesInputsIoutIin1Iin2Iin3Low-pass010High-pass100Band-pass001All pass111Notch110A detailed study of the available similar type of active element (such as CCCCTA, CCCDTA, and CC-CCTA) based CM filters and the proposed one is given in Table5. It reveals that although the proposed structure needs one extra resistor, the reported structures in [11, 13, 19, 20] suffer from one or more features. In addition some active elements are required to sense current [13, 20]. Thus structures in [11, 13, 19, 20] will require some extra circuits to compensate the short comings in their features in comparison to the proposed one.Table 5
Comparative study of the available similar type of single active element based CM filters.
ReferenceActive element used and number of passive componentsGrounded passive componentsAvailability of low-pass, band-pass, high-pass, notch, and all pass responsesNo requirement of current inversionNo requirement of gain of input signal such as 2Iin and 3IinOutput current at high impedanceTunabilitySimple/No matching condition[11]CCCCTA,  2YesYesYesNoYesYesYes[13]CCCDTA,  2YesYesNoYesNoYesYes[19]CCCDTA,  2YesYesYesNoYesYesYes[20]CCCCTA, 2YesNoYesYesNoYesYesProposedDVCCTA,3YesYesYesYesYesYesYesThe proposed universal MISO current mode filter is validated through SPICE simulations. The circuit of Figure5 for a pole frequency of f0 = 1.59 MHz, Q = 1 has been designed with the component values of C = C1 = C2 = 100 pF, R = 1 kΩ and bias current of DVCCTA equals to 100 μA. The low-pass, band-pass, high-pass, notch, and all pass responses are shown in Figure 6 which show close agreement with the theoretical formation.Simulated response of the proposed current mode universal filter: (a) high-pass, low-pass and band-pass, (b) notch, (c) all pass.
(a)(b)(c)The orthogonal adjustment off0 with Q0 is depicted in Figure 7. This is designed for a constant value of Q0 = 1 with C1 = C2 = 100 pF for different values of f0 as given in Table 6. Figure 8 shows orthogonal adjustment of Q0 with f0 = 1.59 MHz. The values of Q0 for constant value of f0 as obtained with C1 = C2 = 100 pF and other component values are listed in Table 7.Table 6
Component values for orthogonal adjustment off0 with Q0.
Sl. no.Bias current (μA)ResistanceR (kΩ)Q0f0 (MHz)1501.311.2221001.011.5932000.73212.1744000.60412.63Table 7
Component values for orthogonal adjustment ofQ with f0.
Sl. no.Bias current (μA)ResistanceR (kΩ)f0 (MHz)Q01500.7081.590.721001.01.591.032001.2591.591.344001.5261.591.5Figure 7
Response of band-pass filter for constantQ0 = 1 and different f0.Figure 8
Response of band-pass filter for constantf0 = 1.59 MHz  and different Q0.The simulations have also been carried out to study the limits on tunability. Figure9 shows the tuning of pole frequency (f0) of the band-pass filter with bias current (I0) (i.e., with gm) for C1 = C2 = 100 pF and R = 1 kΩ. It may be noted that the tuning of pole frequency (f0) is adequate up to about 200 μA and then the tuning is slow till 450 μA. The decreases in pole frequency for larger bias currents than 450 μA are due to transistors (M21, M22) entering in linear region of operation from saturation region.Figure 9
Tunability of pole frequency with bias current.


## 2.1. DVCCTA

The DVCCTA is based on DVCC [6] and consists of differential amplifier, current mirrors, and transconductance amplifier (TA). The port relationships of the DVCCTA as shown in Figure 1 can be characterized by the following matrix: (1)[IY1IY2VXIZ+IZ-IO-]=[0000000000001-1000000100000-1000000-gm00][VY1VY2IXVZ+VZ-VO-],
where gm is transconductance of the DVCCTA.Figure 1
Circuit symbol of  DVCCTA.The CMOS-based internal circuit of DVCCTA in CMOS is depicted in Figure2 and is based on internal circuit of DVCC [6] which is followed by a transconductance amplifier. The value of gm is obtained as 2μCox(W/L)I0 which can be adjusted by bias current I0. The TSMC 0.25 μm CMOS process model parameters and supply voltages of VDD=-VSS=1.25V and VBB=-0.8V are used. The aspect ratio of various transistors for DVCC is given in Table 1.Table 1
Aspect ratio of various transistors.
TransistorAspect ratio (W(μm)/L(μm))M1–M410/0.5M5, M65/0.5M7, M827.25/0.5M9, M11, M13, M15, M168.5/0.5M10, M12, M14, M17, M1844/0.5M19, M20, M23–M265/0.5M21, M2227/0.5Figure 2
Internal circuit of DVCCTA.


## 2.2. Universal Voltage-Mode Filter

In this section, a universal voltage-mode (VM) filter is proposed. It uses a single DVCCTA, two capacitors, and a grounded resistor. The proposed universal VM filter is shown in Figure3. The analysis of circuit yields the output voltages at two nodes as follows(2)Vout1=(sC2+gm)Vin1+s2C1C2RVin2-sC2RgmVin3D(s),(3)Vout2=-sC1Vin1+sC1Vin2+Vin3D(s)-gmVin3D(s),
where(4)D(s)=s2C1C2R+sC2+gm.Figure 3
Proposed universal voltage-mode filter.Table2 shows the availability of each filter response and corresponding selection of input voltages Vin1, Vin2, and Vin3. Thus the proposed structure is a three-input and two output voltage-mode filter. The responses are characterized by pole frequency (ω0), bandwidth (ω0/Q0), and quality factor (Q0) as follows:(5)ω0=(gmRC1C2)1/2,ω0Q0=1RC1,Q0=(gmRC1C2)1/2.Table 2
TheVin1, Vin2, and Vin3 values selection for each filter function response.
Filter responsesInputsOutputVin1Vin2Vin3Low-pass101Vout1,R=1/gmHigh-pass010Vout1101Vout2,R=1/gmBand-pass001Vout1100Vout2010Vout2Notch111Vout1,R=1/gmAll pass111Vout1,R=2/gmIt may be noted that the value ofgm can easily be varied by bias currents I0. The resistance R being a grounded one may easily be implemented as a variable resistance using only two MOSs [17] or replacing DVCCTA along with resistor R by DVCCCTA [15]. Equation (5) reveals that for high-pass and band-pass responses, the pole frequency (ω0) and quality factor (Q0) can be adjusted by gm, that is, by bias current (I0) of DVCCTA, without disturbing ω0/Q0. The ω0 and Q0 are orthogonally adjustable with simultaneous adjustment of gm and R such that the product gmR remains constant, and the quotient gm/R varies and vice versa.  Equation (5) also indicates that high values of Q factor will be obtained from moderate values of ratios of passive components, that is, from low component spread [21]. These ratios can be chosen as gmR=(C1/C2)=Q0. Hence, the spread of the component values becomes of the order ofQ0. This feature of the filter related to the component spread allows the realization of high Q0 values more accurately compared to the topologies where the spread of passive components becomes Q0 or Q02. It can also be easily evaluated to show that the sensitivities of pole ω0 and pole Q0 are within unity in magnitude. Thus, the proposed structures can be classified as insensitive.A detailed study of the available similar type of single active element- (such as CCCTA, DBTA, and DVCCCTA) based voltage-mode filters and the proposed one is given in Table3. It reveals that the topology in [18] uses excessive number of passive components whereas the proposed topology uses one extra passive component, namely, resistor (R) in comparison to structures in [11, 15]; however this resistor (R) may be eliminated as discussed above.  Structures in [15, 18] do not provide for all standard universal filter functions. Topology in [11] needs input signal Vin, -Vin, and -2Vin; hence, there is a requirement of additional circuits. Thus the proposed structure possesses all the advantageous features as tabulated in Table 3 without any additional components, rather passive components used may be reduced to 2 by eliminating resistor (R) at x terminal with the use of DVCCCTA instead of DVCCTA.Table 3
Comparative study of the available similar type of single active element-based VM filters.
ReferenceActive element used and number of passive componentsAvailability of universal filter responses (i.e., low-pass, band-pass, high-pass, notch, and all pass)No  inversion of input voltageNo requirement of gain of input signal such as 2Vin and 3VinTunabilitySimple/no matching condition[11]CCCCTA,   2YesNoNoYesYes[15]DVCCCTA,  2NoYesYesYesYes[18]DBTA,   5NoYesYesYesYesProposedDVCCTA,  3*YesYesYesYesYes*Passive components may be reduced to 2 by replacing DVCCTA with DVCCCTA.To verify the functionality of the proposed single DVCCTA-based voltage-mode filter, SPICE simulations have been carried out  using TSMC 0.25μm CMOS process model parameters and supply voltages of VDD=-VSS=1.25V and VBB=-0.8V. The aspect ratio of various transistors is given in Table 1. The filter is designed for a pole frequency of f0 = 1.59 MHz, Q=1, the component values are found to be C=C1=C2=100pF, R=1kΩ, and bias current of DVCCTA equals 100 μA. Figure 4(a) shows the simulation results for low-pass (Vout1) and high-pass (Vout2)  filter responses which are available simultaneously for Vin = Vin1 = Vin3, Vin2 = 0.  Figure 4(b) shows the simulation results for high  pass (Vout1) and band-pass (Vout2)  filter responses which are available simultaneously for Vin = Vin2, Vin1 = Vin3 = 0.  Notch and all pass responses are shown in Figures 4(c) and 4(d) with Vin = Vin1 = Vin2 = Vin3 and R = 1 kΩ and 2 kΩ, respectively.Simulated response of the proposed universal voltage-mode filter: (a) high-pass and low-pass, (b) high-pass and band-pass,   (c) notch, (d) all pass.
(a)(b)(c)(d)


## 2.3. MISO Current Mode Universal Filter

A multiple-input single-output (MISO) universal current mode (CM) filter is proposed in this section which is obtained by grounding all voltage inputs in Figure3 and exciting them with current inputs as shown in Figure 5. Here, an extra Z-terminal is added to obtain Iout at high impedance. It employs a single DVCCTA, two grounded capacitors, and a grounded resistor. Analysis of this circuit gives the output current as follows:(6)Iout=s2C1C2RIin1-sC2Iin3+gmIin2D(s),
where (7)D(s)=s2C1C2R+sC2+gmFigure 5
Current mode universal filter.Table4 shows the availability of each filter response and corresponding selection of input currents Iin1,Iin2, and Iin3. Thus, the proposed structure is a three-input single output current mode filter. It may be noted that there is no component matching constraint for obtaining any filter response. The filter parameters are the same as given in (5). The grounded resistance (R) may easily be implemented as variable one using only two MOSs [17] for full electronic control of filter parameters. The ω0,Q0, and ω0/Q0 can be orthogonally adjusted the way discussed in Section 2.2.Table 4
TheIin1, Iin2, and Iin3  values selection for each filter function response.
Filter responsesInputsIoutIin1Iin2Iin3Low-pass010High-pass100Band-pass001All pass111Notch110A detailed study of the available similar type of active element (such as CCCCTA, CCCDTA, and CC-CCTA) based CM filters and the proposed one is given in Table5. It reveals that although the proposed structure needs one extra resistor, the reported structures in [11, 13, 19, 20] suffer from one or more features. In addition some active elements are required to sense current [13, 20]. Thus structures in [11, 13, 19, 20] will require some extra circuits to compensate the short comings in their features in comparison to the proposed one.Table 5
Comparative study of the available similar type of single active element based CM filters.
ReferenceActive element used and number of passive componentsGrounded passive componentsAvailability of low-pass, band-pass, high-pass, notch, and all pass responsesNo requirement of current inversionNo requirement of gain of input signal such as 2Iin and 3IinOutput current at high impedanceTunabilitySimple/No matching condition[11]CCCCTA,  2YesYesYesNoYesYesYes[13]CCCDTA,  2YesYesNoYesNoYesYes[19]CCCDTA,  2YesYesYesNoYesYesYes[20]CCCCTA, 2YesNoYesYesNoYesYesProposedDVCCTA,3YesYesYesYesYesYesYesThe proposed universal MISO current mode filter is validated through SPICE simulations. The circuit of Figure5 for a pole frequency of f0 = 1.59 MHz, Q = 1 has been designed with the component values of C = C1 = C2 = 100 pF, R = 1 kΩ and bias current of DVCCTA equals to 100 μA. The low-pass, band-pass, high-pass, notch, and all pass responses are shown in Figure 6 which show close agreement with the theoretical formation.Simulated response of the proposed current mode universal filter: (a) high-pass, low-pass and band-pass, (b) notch, (c) all pass.
(a)(b)(c)The orthogonal adjustment off0 with Q0 is depicted in Figure 7. This is designed for a constant value of Q0 = 1 with C1 = C2 = 100 pF for different values of f0 as given in Table 6. Figure 8 shows orthogonal adjustment of Q0 with f0 = 1.59 MHz. The values of Q0 for constant value of f0 as obtained with C1 = C2 = 100 pF and other component values are listed in Table 7.Table 6
Component values for orthogonal adjustment off0 with Q0.
Sl. no.Bias current (μA)ResistanceR (kΩ)Q0f0 (MHz)1501.311.2221001.011.5932000.73212.1744000.60412.63Table 7
Component values for orthogonal adjustment ofQ with f0.
Sl. no.Bias current (μA)ResistanceR (kΩ)f0 (MHz)Q01500.7081.590.721001.01.591.032001.2591.591.344001.5261.591.5Figure 7
Response of band-pass filter for constantQ0 = 1 and different f0.Figure 8
Response of band-pass filter for constantf0 = 1.59 MHz  and different Q0.The simulations have also been carried out to study the limits on tunability. Figure9 shows the tuning of pole frequency (f0) of the band-pass filter with bias current (I0) (i.e., with gm) for C1 = C2 = 100 pF and R = 1 kΩ. It may be noted that the tuning of pole frequency (f0) is adequate up to about 200 μA and then the tuning is slow till 450 μA. The decreases in pole frequency for larger bias currents than 450 μA are due to transistors (M21, M22) entering in linear region of operation from saturation region.Figure 9
Tunability of pole frequency with bias current.


## 3. Conclusion

New universal voltage-mode and current-mode filters using a single DVCCTA have been presented. The circuits use one DVCCTA, two capacitors, and a resistor for realization. The resistor being grounded may easily be implemented as a variable one using only two MOSs [17]. The resistor may be eliminated by replacing DVCCTA with DVCCCTA in the case of VM filter. The simulation results verify the theory. The salient features of the proposed circuits are as follows: they employ a single DVCCTA, low sensitivity performance, electronic tunability of both ω0  and   ω0/Q0  and ω0 and  Q0,  high output impedance for CM filter, which are suitable for cascading, and  low component spread for high-Q application.



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*Source: 929507-2011-04-19.xml*