# Hybrid Modeling Method and Bifurcation Characteristics Analysis for Buck Converter with Constant Power Load

Authors: Liangyu Huang; Yimin Lu
Journal: Mathematical Problems in Engineering
 (2019)

---

## Abstract

We establish a novel hybrid model of a continuous conduction mode buck converter with a constant power load based on the mixed logical dynamical modeling method. Based on the proposed model, the influence of the constant power load’s negative impedance (R
C
P
L) on the dynamics of the buck converter with a constant power load is studied by computing bifurcation diagrams and the spectrum of the largest Lyapunov exponents with the variation of the absolute value of R
C
P
L. Numerical results show that the system’s bifurcations exhibit two different types of behavior, namely, Hopf bifurcations and state jumping. Moreover, the accuracy and effectiveness of the established mathematical model are verified via simulation and experimental results. Because of including different discrete mappings of the system exhibited in different working modes in a unified model, the proposed hybrid model solves the problem of choosing different discrete mappings according to different working models. That is, the hybrid model in this paper provides a new unified model for future research on the dynamic properties and design of controllers for such systems.


---

## Body

## 1. Introduction

DC-DC converters with constant power loads (hereafter called CPLs) are widely present in distributed power systems [1, 2]. Because of the influence of the nonlinear characteristics of DC-DC converters and the negative impedance characteristics of CPLs, DC-DC converters with CPLs exhibit nonlinear behaviors such as bifurcation and chaos in their operation. These nonlinear behaviors may cause strange or irregular phenomena in distributed power systems. Therefore, in recent years, increasing attention has been devoted to the nonlinear behavior of DC-DC converters with CPLs [3, 4]. DC-DC converters with CPLs are piecewise smooth dynamical systems; these systems feature two or more switching modes, and there are voltage or current boundaries between different switching modes [5]. When the system’s parameter changes beyond this boundary, the dynamic characteristics of the system change abruptly. Therefore, there are two different bifurcations in systems featuring DC-DC converters with CPLs: bifurcations of smooth dynamical systems, such as period doubling bifurcation, Hopf bifurcation and saddle node bifurcation [6], and state jumping, which is the typical phenomenon in piecewise smooth dynamical systems [7].The discrete model has been proven to be effective for studying the dynamics of power electronic systems [8]. A large number of studies have been published on the discrete modeling of DC-DC converters with resistive loads [9, 10].Because of the nonlinear term caused by the negative impedance of CPL in the state equations of a DC-DC converter with a CPL, the discrete mapping of a DC-DC converter with a resistance load cannot be used to describe a DC-DC converter with a CPL directly. In recent years, with the increasing application of multiconverter distributed power systems, the nonlinear characteristics and discrete modeling of DC-DC converters with a CPL have also attracted much attention from researchers [11, 12]. Reference [11] presented a discrete-mapping model for a boost converter with CPL based on the switching mode. There are different discrete mappings of a system in different switching modes. Therefore, the most appropriate model must be chosen based on the switching mode to study the nonlinear characteristics and controller design of a system. Reference [12] presented a discrete sampled model of DC-DC converters with a CPL. The model is based on the sampled values in the switching frequency. The main disadvantage in modeling is that the approximate relationship between measured values and state variables makes the model incredibly complicated to analyze and calculate. Moreover, high-frequency sampling easily introduces parasitic superposition and crossover distortion of measured values; thus, the measured values cannot accurately reflect the dynamics of the system.To provide a unified and reliable model for studying dynamics and designing controllers for DC-DC converters with CPLs, it is necessary to establish a discrete model that can reflect the overall characteristics of the system.Because of their powerful abilities, hybrid modeling methods have been used to build accurate models of DC-DC converters [13]. The mixed logical dynamical (MLD) model, one of hybrid models, generalizes a wide set of systems, including linear hybrid systems and nonlinear dynamical systems [14]. Many studies have been performed to build MLD models of DC-DC converters [15, 16]. The achieved results can provide references for the hybrid modeling of DC-DC converters with a CPL.Based on the MLD modeling method, a novel hybrid model of a DC-DC converter with a CPL is presented in this paper.The remainder of this paper is organized as follows. Section2 shows the circuit model of a buck converter with a CPL. Section 3 proposes a new hybrid model of a DC-DC converter system with a CPL based on the MLD modeling method. Section 4 studies the border collision bifurcations of a buck converter with a CPL. The simulation and the experimental results are discussed in Section 5. Finally, the conclusion is given in Section 6.


## 2. Description of Buck Converter with CPL

Figure1 shows the circuit model used to investigate a DC-DC converter with a CPL. The converter is a buck converter that operates in the voltage-controlled continuous conduction mode (hereafter called the CCM), and the CPL cascaded behind the buck converter is represented by a boost converter, as shown in Figure 2.Figure 1
Circuit model of buck converter with CPL.Figure 2
Schematic of boost converter modeled as CPL.U
in is the voltage source; S1,L,C, and D1 are the switch, inductance, capacitor, and diode of the buck converter, respectively;R
e is the integrated equivalent impedance of the power supply and cable; andR
u andR
d are the voltage sampling resistors.u
C (t) andi
L (t) are the capacitor voltage and inductor current, respectively.The PI controller consists ofR
1,R
f, Cf and the ideal operational amplifier A1.U
ref is the reference voltage. v
c
o
n
(
t
) is the output voltage of the PI controller. The integrator of the PI controller is cleared at the beginning of each cycle.U
tri(t) is a sawtooth ramp voltage. A2 is the PWM signal generator of switch S1. The operation of the control strategy can be briefly described as follows: when v
c
o
n
(
t
)
>
U
tri (t), the output voltage of A2 is high, S1 is on, and D is OFF; this mode is called switching mode 1. When v
c
o
n
(
t
)
<
U
tri (t), the output voltage of A2 is low, S1 is off, and D is ON; this mode is called switching mode 2.v
c
o
n
(
t
) can be described as follows:(1)
v
c
o
n
=
u
r
e
f
+
k
P
u
1
-
u
r
e
f
+
k
I
∫
0
T
u
1
-
u
r
e
f
d
twherek
P = R
1/R
f,k
P = 1/C
f
R
f, and u
1 = u
C
R
d/(R
u +R
d).The sawtooth rampU
tri (t) can be described as follows:(2)
U
t
r
i
t
1
=
V
L
+
V
M
-
V
L
∗
t
1
TwhereT,V,
M andV
L are the control period and the upper and lower threshold voltages of U
t
r
i
t, respectively.According to the above control strategy, in the steady state, the effective value ofu
C (t) can be obtained as follows:(3)
U
C
=
U
r
e
f
R
u
+
R
d
R
dIt is assumed that the load boost converter shown in Figure2 can remain in a stable state regardless of the dynamic behaviors of the changes in the buck converter; moreover, the converter exhibits fine regulation and a fast response. Therefore, the boost converter can be simplified as a CPL over a reasonable frequency range and input voltage span. All the components of the system are considered ideal.Thus, the output power of the buck converter is(4)
P
O
=
u
C
2
R
L
o
a
dHere,R
L
o
a
d is the equivalent input resistance of buck converter and its duty cycle is DBuck and R
L
o
a
d =R
o2/(D
B
u
c
k)2.The input current of the CPL isi
L
2 = P
O/u
C, the change rate of i
L
2 is ∂
i
L
2
/
∂
u
C = - P
O/u
C
2, and in the steady state i
L
2 = P
O/U
C. Hence, i
L
2 can be described as(5)
i
L
2
=
-
P
O
U
C
2
u
C
+
2
P
O
U
CThat is,i
L
2 can be approximated by a constant current sourceI
CPL = 2P
O/U
C parallel to a negative resistance R
C
P
L = - U
C
2
/
P
O. According to the above analysis, in the steady state, R
C
P
L andI
CPL can be obtained according to the given P
O.


## 3. Modeling DC-DC Converter with CPL by MLD Method

In this section, we derive the hybrid model that describes the dynamics of the buck converter with a CPL based on the boundary voltage. Therefore, we derive the mathematical expression of the boundary voltage first.


### 3.1. Analysis of the Boundary Voltage

The state variables of the system are set to X =i
L
u
C
T. When the system operates in the CCM mode throughout an entire control period, the system can experience two switching modes in the nth control period.The state equations of the converter operating in switching modes 1 and 2 can be expressed as follows, respectively:(6)
d
i
L
d
t
=
1
L
U
i
n
-
u
C
d
u
C
d
t
=
1
C
i
L
-
u
C
R
C
P
L
-
I
C
P
L
,
v
c
o
n
t
>
U
t
r
i
t
(7)
d
i
L
d
t
=
1
L
-
u
C
d
u
C
d
t
=
1
C
i
L
-
u
C
R
C
P
L
-
I
C
P
L
,
v
c
o
n
t
<
U
t
r
i
tAccording to (6) and (7), the general state equation of the converter operating in switching modek(t) (k(t) = 1, 2) can be expressed as(8)
X
˙
=
A
k
X
t
+
B
k
,
t
k
≤
t
≤
t
k
′
,
k
=
1,2where t
∈
[
t
k
,
t
k
′
] is the running time in mode k and the other coefficient matrices are described as follows:(9)
A
1
=
A
2
=
0
-
1
L
1
C
-
1
R
C
P
L
C
,
B
1
=
U
i
n
L
-
I
C
P
L
C
,
B
2
=
0
-
I
C
P
L
C
,
A
1
-
1
=
A
2
-
1
=
-
L
R
C
P
L
C
-
L
0
,
X
=
i
L
u
C
,
I
=
1
0
0
1
.Therefore, the discrete-mapping model is given by(10)
X
t
=
f
k
X
t
k
,
t
=
e
A
k
t
k
′
-
t
k
X
t
k
+
∫
t
k
t
k
′
e
A
k
t
k
′
-
s
B
k
d
s
=
e
A
k
Δ
t
k
X
t
k
+
e
A
k
Δ
t
k
-
I
A
k
-
1
B
kwhere the exponential matrices can be obtained by the Cayley-Hamilton theorem and described as follows:(11)
e
A
1
Δ
t
1
=
a
Δ
t
1
-
b
Δ
t
1
L
b
Δ
t
1
C
c
Δ
t
1
,
e
A
2
Δ
t
2
=
a
Δ
t
2
-
b
Δ
t
2
L
b
Δ
t
2
C
c
Δ
t
2
,
e
A
3
Δ
t
3
=
1
0
0
e
-
2
·
α
·
Δ
t
3wherea
(
t
) = e
-
α
t
[
α
sin
⁡
ω
t
+
ω
cos
⁡
(
ω
t
)
]
/
ω, b
(
t
) = e
-
α
t
sin
⁡
(
ω
t
)
/
ω, c
(
t
) = e
-
α
t
[
ω
cos
⁡
ω
t
-
α
sin
⁡
(
ω
t
)
]
/
ω, and α
=
1
/
(
2
R
C
P
L
C
), ω
=
1
/
L
C
-
1
/
4
R
C
P
L
2
C
2.Under different initial conditions, the system will undergo different switching modes in a switching period. We define the situation in which the system undergoes switching mode 1 only in a switching period as working modeF
1 and the situation in which the system undergoes switching mode 1 and switching mode 2 in a switching period as working mode F
2.Figure3 shows the typical waveforms of capacitor voltageu
C and inductor currenti
L of working modes F
1 and F
2, respectively. Figures 3(a) and 3(c) show the typical waveforms of the capacitor voltage and inductor current in working mode F
1. Moreover, the boundary voltage V
b
1 is shown in Figure 3(a). Figures 3(b) and 3(d) show the typical waveforms of the capacitor voltage and inductor current in working mode F
2.Figure 3
Typical waveforms ofu
C andi
L in different working modes. (a) The typical waveform ofu
C in working mode F
1. (b) The typical waveform ofi
L in working mode F
1. (c) The typical waveform ofu
C in working mode F
2. (d) The typical waveform ofi
L in working mode F
2.The initial valuesX
n = (i
Ln,u
Cn) can be obtained by variable sampling at the beginning of each switching period. According to formula (10), the discrete mapping ofX
n = (i
Ln,u
Cn) to X
n
+
1 = (i
L
n
+
1, u
C
n
+
1) can be described as follows [5]:(12)
X
n
+
1
=
f
m
f
m
-
1
⋯
f
1
X
n
,
Δ
t
1
,
Δ
t
m
-
1
,
Δ
t
mThe discrete mapping of the system varies between the two different working modes. For convenience, we definei
Ln andu
Cn as the initial values ofi
L andu
C, respectively.The discrete mapping of the system in working modeF
1 is described as follows:(13)
X
n
+
1
=
F
1
X
n
=
e
A
1
T
i
n
v
n
+
e
A
1
T
-
I
A
1
-
1
B
1In this working mode, ifv
c
o
n
(
t
) exactly reaches v
c
o
n
(
T
) =U
tri(T) at timet = T under the conditionu
Cn =V
b1; thus,V
b1 is called the boundary voltage. The expression forV
b1 can be obtained from the condition v
c
o
n
(
T
) =U
tri(T) and formula (13).V
b1 is expressed as follows: (14)
V
b
1
=
V
r
e
f
/
r
1
+
B
V
b
1
T
-
V
U
/
r
+
A
V
b
1
b
T
U
i
n
+
I
C
P
L
R
C
P
L
-
R
C
P
L
i
L
n
/
R
C
P
L
C
-
1
-
c
T
U
i
n
A
V
b
1
c
T
-
B
V
b
1Here,A
Vb1 = (1+C
f
R
f)/R
1
C
f andB
Vb1 = 1/R
1
C
f.Formula (14) indicates thati
Ln is the only factor that affects the value ofV
b1 when the relevant parameters of the system are given.Therefore, ifi
Ln andu
Cn can be obtained at the beginning of a switching period,V
b1 and the system’s working mode in the following switching period are determined.According to the definition of boundary voltageV
b1, whenu
Cn <V
b1, the system will operate in working mode F
1. Otherwise, the system will operate in working mode F
2.The discrete mapping of this working modeF
2 is given as follows:(15)
X
n
+
1
=
F
2
X
n
=
e
A
2
t
2
i
t
1
v
t
1
+
e
A
2
t
2
-
I
A
2
-
1
B
2
=
e
A
2
t
2
e
A
1
t
1
i
n
v
n
+
e
A
1
t
1
-
I
A
1
-
1
B
1
+
e
A
2
t
2
-
I
A
2
-
1
B
2where t
1 and t
2 are the working times in switching modes 1 and 2, respectively and t
2=T- t
1. t
1 can be obtained as follows based on the conditionv
con(t
1) =U
tri(t
1) and formulas (1) and (2).(16)
t
1
=
K
P
u
1
-
u
r
e
f
+
u
r
e
f
-
V
L
V
H
-
V
L
/
L
-
K
I
u
1
-
u
r
e
fFormula (16) indicates that the initial value ofu
C is the only factor that affects t
1 when the relevant parameters of the system are given. Therefore, the value of t
1 is determined at the beginning of each switching period.The above analysis suggests that ifi
Ln andu
Cn can be obtained at the beginning of a switching period, the system’s discrete mapping in the following switching period can be determined by comparingu
Cn withV
b1 at the beginning of a switching period. Based on this concept, we build a hybrid model of the system based on the boundary voltageV
b1 in the next section.


### 3.2. Modeling of Hybrid Model Based on Boundary Voltage

According to the analysis presented in Section3.1, the system has different discrete mappings in different working modes. This situation is inconvenient for the further analysis of the dynamics of the system. To solve this problem, a hybrid model is modeled based on the boundary voltageV
b1 and by using the MLD modeling method. This hybrid model includes all discrete mappings of different working modes in a unified model.The primary task of modeling is to find the constraints between system working modes and boundary voltage.The constraints of the DC-DC converter with a CPL in different working modes can be described as follows:Assume that the system was in working mode F1 in the last switching period; ifu
Cn -V
b1≥ 0 at the beginning of a new switching period, the system will switch to working mode F2; otherwise, ifu
Cn -V
b1 < 0, the system will still be in working mode F1.Assume that the system was in working mode F2 in the last switching period; ifu
Cn -V
b1 < 0 at the beginning of a new switching period, the system will switch to working mode F1; otherwise, ifu
Cn -V
b1 ≥ 0, the system will still be in working mode F2.The above constraints are formulated in Figure4.Figure 4
Constraints of buck converter with CPL operating in CCM.To obtain a hybrid model of the buck converter with a CPL, logical variablesδ
k
∈
{
0,1
} (k represents the working mode of the system,k = 1, 2) and continuous functionsW(x),G(x),P(x), andQ(x) are introduced to represent logical statements of the system.Figure4 can be described by logical statements (17) and (18).(17)
u
C
n
-
V
b
1
<
0
↔
δ
1
=
1
is  true  iff
u
C
n
-
V
b
1
≥
m
1
δ
1
u
C
n
-
V
b
1
≤
M
1
-
δ
1
M
1
+
ε
(18)
u
C
n
-
V
b
1
≥
0
↔
δ
2
=
1
is  true  iff
u
C
n
-
V
b
1
≥
-
m
2
δ
2
-
1
u
C
n
-
V
b
1
≤
δ
2
M
2
+
ε
-
εwhere m1 and m2 represent the minimum values ofu
Cn -V
b1 in working modes 1 and 2, respectively; M1 and M2 represent the maximum values ofu
Cn -V
b1 in working modes 1 and 2, respectively;εis a sufficien0tly small positive number; and “↔” means “iff ”, i.e., if and only if.According to the basic equivalent translation principle between logical statements and linear inequalities given by [13], constraint (17) can be equivalently expressed as follows:(19)
u
C
n
-
V
b
1
m
1
≤
δ
1
≤
M
1
-
u
C
n
-
V
b
1
M
1
+
εAccording to (13) and (19), the discrete model of the system in working mode F1 can be described as follows:(20)
X
n
+
1
=
e
w
1
X
n
,
k
i
L
n
u
C
n
+
e
g
1
X
n
,
k
A
2
t
2
e
A
1
t
1
-
I
A
1
-
1
B
1
+
g
1
X
n
,
k
e
A
2
t
2
-
I
A
2
-
1
B
2
p
1
X
n
,
k
≤
δ
1
≤
q
1
X
n
,
kwhere w
1(x
n,k) =δ
1
A
1
t
1, g
1(x
n,k) = δ
1-1, p
2(x
n,k) = (u
Cn -V
b1) / m
1, and q
1(x
n,k) = [M
1-(u
Cn -V
b1)]/ (M
1+ε).Similarly, previously indicated, constraint (18) can be equivalently expressed as follows:(21)
u
C
n
-
V
b
1
+
ε
M
2
+
ε
≤
δ
2
≤
1
-
u
C
n
-
V
b
1
m
2According to (15) and (21), the discrete model of the system in working mode F2 can be described as follows:(22)
X
n
+
1
=
e
w
2
X
n
,
k
i
L
n
u
C
n
+
e
g
2
X
n
,
k
A
2
t
2
e
A
1
t
1
-
I
A
1
-
1
B
1
+
g
2
X
n
,
k
e
A
2
t
2
-
I
A
2
-
1
B
2
p
2
X
n
,
k
≤
δ
2
≤
q
2
X
n
,
kwhere w
2(x
n,k)=δ
2(A
2
t
2+A
1
t
1), g
2(x
n,k)=δ
2, p
2(x
n,k)=[(u
Cn -V
b1)+ε]/(M
2+ε), and q
2(x
n,k)=1-(u
Cn -V
b1)/m
2.According to the above analysis, the functions W and G can be defined as(23)
W
A
n
,
t
n
,
k
=
h
1
k
·
w
1
x
n
,
k
+
h
2
k
·
w
2
x
n
,
k
-
w
1
x
n
,
k
G
A
n
,
t
n
,
k
=
h
1
k
g
1
x
n
,
k
+
h
2
k
g
2
x
n
,
kwhere h
1(k)= (δ
2-δ
1)k +(2δ
1+δ
2) and h
2(k)= (δ
2-δ
1+1)k +(2δ
1-δ
2 -2).Similarly, according to (19) and (21), the constraint of the system can be described as(24)
P
X
n
,
k
=
e
1
k
p
1
X
n
+
e
2
k
p
2
X
n
Q
X
n
,
k
=
e
1
k
q
1
X
n
+
e
2
k
q
2
X
nwhere e
1(k) = -k + 2, e
2(k) =k - 1.As a result, buck converters operating in CCM with a CPL can be described by (13) and (15). Furthermore, according to (20) and (22), a unified model that includes (13) and (15) is obtained as follows:(25)
X
n
+
1
=
e
W
A
n
,
t
n
,
k
X
n
+
e
G
X
n
,
k
A
2
t
2
e
A
1
t
1
-
I
A
1
-
1
B
1
+
G
X
n
,
k
e
A
2
t
2
-
I
A
2
-
1
B
2
P
X
n
,
k
<
δ
<
Q
X
n
,
kwhere the functionsW,G,P, and Q are as described by (23) and (24), respectively.The hybrid model (25) includes the dynamic, logical, and switching relationship between the dynamics and the constraints of the system in a unified model. Equation (24) is equivalent to the switching condition of the converter, which ensures that the system can switch between different modes. The logical variableδ determined by functionsP(x,k) andQ(x,k) has been found to be either 1 or 0. Based on the rated operating condition of the converter, functionsW(x,k) andG(x,k) can be obtained from (23). The converter operates in mode k whenδ
k = 1, and the converter transitions to modek + 1 whenδ
k = 0. Noting thatP(x,k) andQ(x,k) are functions of the controller outputv
con, (25) can be applied to study the dynamics of converters under different control schemes.The proposed hybrid model (25) provides a unified model for the theoretical analysis and practical engineering design of a buck converter with a CPL.


## 3.1. Analysis of the Boundary Voltage

The state variables of the system are set to X =i
L
u
C
T. When the system operates in the CCM mode throughout an entire control period, the system can experience two switching modes in the nth control period.The state equations of the converter operating in switching modes 1 and 2 can be expressed as follows, respectively:(6)
d
i
L
d
t
=
1
L
U
i
n
-
u
C
d
u
C
d
t
=
1
C
i
L
-
u
C
R
C
P
L
-
I
C
P
L
,
v
c
o
n
t
>
U
t
r
i
t
(7)
d
i
L
d
t
=
1
L
-
u
C
d
u
C
d
t
=
1
C
i
L
-
u
C
R
C
P
L
-
I
C
P
L
,
v
c
o
n
t
<
U
t
r
i
tAccording to (6) and (7), the general state equation of the converter operating in switching modek(t) (k(t) = 1, 2) can be expressed as(8)
X
˙
=
A
k
X
t
+
B
k
,
t
k
≤
t
≤
t
k
′
,
k
=
1,2where t
∈
[
t
k
,
t
k
′
] is the running time in mode k and the other coefficient matrices are described as follows:(9)
A
1
=
A
2
=
0
-
1
L
1
C
-
1
R
C
P
L
C
,
B
1
=
U
i
n
L
-
I
C
P
L
C
,
B
2
=
0
-
I
C
P
L
C
,
A
1
-
1
=
A
2
-
1
=
-
L
R
C
P
L
C
-
L
0
,
X
=
i
L
u
C
,
I
=
1
0
0
1
.Therefore, the discrete-mapping model is given by(10)
X
t
=
f
k
X
t
k
,
t
=
e
A
k
t
k
′
-
t
k
X
t
k
+
∫
t
k
t
k
′
e
A
k
t
k
′
-
s
B
k
d
s
=
e
A
k
Δ
t
k
X
t
k
+
e
A
k
Δ
t
k
-
I
A
k
-
1
B
kwhere the exponential matrices can be obtained by the Cayley-Hamilton theorem and described as follows:(11)
e
A
1
Δ
t
1
=
a
Δ
t
1
-
b
Δ
t
1
L
b
Δ
t
1
C
c
Δ
t
1
,
e
A
2
Δ
t
2
=
a
Δ
t
2
-
b
Δ
t
2
L
b
Δ
t
2
C
c
Δ
t
2
,
e
A
3
Δ
t
3
=
1
0
0
e
-
2
·
α
·
Δ
t
3wherea
(
t
) = e
-
α
t
[
α
sin
⁡
ω
t
+
ω
cos
⁡
(
ω
t
)
]
/
ω, b
(
t
) = e
-
α
t
sin
⁡
(
ω
t
)
/
ω, c
(
t
) = e
-
α
t
[
ω
cos
⁡
ω
t
-
α
sin
⁡
(
ω
t
)
]
/
ω, and α
=
1
/
(
2
R
C
P
L
C
), ω
=
1
/
L
C
-
1
/
4
R
C
P
L
2
C
2.Under different initial conditions, the system will undergo different switching modes in a switching period. We define the situation in which the system undergoes switching mode 1 only in a switching period as working modeF
1 and the situation in which the system undergoes switching mode 1 and switching mode 2 in a switching period as working mode F
2.Figure3 shows the typical waveforms of capacitor voltageu
C and inductor currenti
L of working modes F
1 and F
2, respectively. Figures 3(a) and 3(c) show the typical waveforms of the capacitor voltage and inductor current in working mode F
1. Moreover, the boundary voltage V
b
1 is shown in Figure 3(a). Figures 3(b) and 3(d) show the typical waveforms of the capacitor voltage and inductor current in working mode F
2.Figure 3
Typical waveforms ofu
C andi
L in different working modes. (a) The typical waveform ofu
C in working mode F
1. (b) The typical waveform ofi
L in working mode F
1. (c) The typical waveform ofu
C in working mode F
2. (d) The typical waveform ofi
L in working mode F
2.The initial valuesX
n = (i
Ln,u
Cn) can be obtained by variable sampling at the beginning of each switching period. According to formula (10), the discrete mapping ofX
n = (i
Ln,u
Cn) to X
n
+
1 = (i
L
n
+
1, u
C
n
+
1) can be described as follows [5]:(12)
X
n
+
1
=
f
m
f
m
-
1
⋯
f
1
X
n
,
Δ
t
1
,
Δ
t
m
-
1
,
Δ
t
mThe discrete mapping of the system varies between the two different working modes. For convenience, we definei
Ln andu
Cn as the initial values ofi
L andu
C, respectively.The discrete mapping of the system in working modeF
1 is described as follows:(13)
X
n
+
1
=
F
1
X
n
=
e
A
1
T
i
n
v
n
+
e
A
1
T
-
I
A
1
-
1
B
1In this working mode, ifv
c
o
n
(
t
) exactly reaches v
c
o
n
(
T
) =U
tri(T) at timet = T under the conditionu
Cn =V
b1; thus,V
b1 is called the boundary voltage. The expression forV
b1 can be obtained from the condition v
c
o
n
(
T
) =U
tri(T) and formula (13).V
b1 is expressed as follows: (14)
V
b
1
=
V
r
e
f
/
r
1
+
B
V
b
1
T
-
V
U
/
r
+
A
V
b
1
b
T
U
i
n
+
I
C
P
L
R
C
P
L
-
R
C
P
L
i
L
n
/
R
C
P
L
C
-
1
-
c
T
U
i
n
A
V
b
1
c
T
-
B
V
b
1Here,A
Vb1 = (1+C
f
R
f)/R
1
C
f andB
Vb1 = 1/R
1
C
f.Formula (14) indicates thati
Ln is the only factor that affects the value ofV
b1 when the relevant parameters of the system are given.Therefore, ifi
Ln andu
Cn can be obtained at the beginning of a switching period,V
b1 and the system’s working mode in the following switching period are determined.According to the definition of boundary voltageV
b1, whenu
Cn <V
b1, the system will operate in working mode F
1. Otherwise, the system will operate in working mode F
2.The discrete mapping of this working modeF
2 is given as follows:(15)
X
n
+
1
=
F
2
X
n
=
e
A
2
t
2
i
t
1
v
t
1
+
e
A
2
t
2
-
I
A
2
-
1
B
2
=
e
A
2
t
2
e
A
1
t
1
i
n
v
n
+
e
A
1
t
1
-
I
A
1
-
1
B
1
+
e
A
2
t
2
-
I
A
2
-
1
B
2where t
1 and t
2 are the working times in switching modes 1 and 2, respectively and t
2=T- t
1. t
1 can be obtained as follows based on the conditionv
con(t
1) =U
tri(t
1) and formulas (1) and (2).(16)
t
1
=
K
P
u
1
-
u
r
e
f
+
u
r
e
f
-
V
L
V
H
-
V
L
/
L
-
K
I
u
1
-
u
r
e
fFormula (16) indicates that the initial value ofu
C is the only factor that affects t
1 when the relevant parameters of the system are given. Therefore, the value of t
1 is determined at the beginning of each switching period.The above analysis suggests that ifi
Ln andu
Cn can be obtained at the beginning of a switching period, the system’s discrete mapping in the following switching period can be determined by comparingu
Cn withV
b1 at the beginning of a switching period. Based on this concept, we build a hybrid model of the system based on the boundary voltageV
b1 in the next section.


## 3.2. Modeling of Hybrid Model Based on Boundary Voltage

According to the analysis presented in Section3.1, the system has different discrete mappings in different working modes. This situation is inconvenient for the further analysis of the dynamics of the system. To solve this problem, a hybrid model is modeled based on the boundary voltageV
b1 and by using the MLD modeling method. This hybrid model includes all discrete mappings of different working modes in a unified model.The primary task of modeling is to find the constraints between system working modes and boundary voltage.The constraints of the DC-DC converter with a CPL in different working modes can be described as follows:Assume that the system was in working mode F1 in the last switching period; ifu
Cn -V
b1≥ 0 at the beginning of a new switching period, the system will switch to working mode F2; otherwise, ifu
Cn -V
b1 < 0, the system will still be in working mode F1.Assume that the system was in working mode F2 in the last switching period; ifu
Cn -V
b1 < 0 at the beginning of a new switching period, the system will switch to working mode F1; otherwise, ifu
Cn -V
b1 ≥ 0, the system will still be in working mode F2.The above constraints are formulated in Figure4.Figure 4
Constraints of buck converter with CPL operating in CCM.To obtain a hybrid model of the buck converter with a CPL, logical variablesδ
k
∈
{
0,1
} (k represents the working mode of the system,k = 1, 2) and continuous functionsW(x),G(x),P(x), andQ(x) are introduced to represent logical statements of the system.Figure4 can be described by logical statements (17) and (18).(17)
u
C
n
-
V
b
1
<
0
↔
δ
1
=
1
is  true  iff
u
C
n
-
V
b
1
≥
m
1
δ
1
u
C
n
-
V
b
1
≤
M
1
-
δ
1
M
1
+
ε
(18)
u
C
n
-
V
b
1
≥
0
↔
δ
2
=
1
is  true  iff
u
C
n
-
V
b
1
≥
-
m
2
δ
2
-
1
u
C
n
-
V
b
1
≤
δ
2
M
2
+
ε
-
εwhere m1 and m2 represent the minimum values ofu
Cn -V
b1 in working modes 1 and 2, respectively; M1 and M2 represent the maximum values ofu
Cn -V
b1 in working modes 1 and 2, respectively;εis a sufficien0tly small positive number; and “↔” means “iff ”, i.e., if and only if.According to the basic equivalent translation principle between logical statements and linear inequalities given by [13], constraint (17) can be equivalently expressed as follows:(19)
u
C
n
-
V
b
1
m
1
≤
δ
1
≤
M
1
-
u
C
n
-
V
b
1
M
1
+
εAccording to (13) and (19), the discrete model of the system in working mode F1 can be described as follows:(20)
X
n
+
1
=
e
w
1
X
n
,
k
i
L
n
u
C
n
+
e
g
1
X
n
,
k
A
2
t
2
e
A
1
t
1
-
I
A
1
-
1
B
1
+
g
1
X
n
,
k
e
A
2
t
2
-
I
A
2
-
1
B
2
p
1
X
n
,
k
≤
δ
1
≤
q
1
X
n
,
kwhere w
1(x
n,k) =δ
1
A
1
t
1, g
1(x
n,k) = δ
1-1, p
2(x
n,k) = (u
Cn -V
b1) / m
1, and q
1(x
n,k) = [M
1-(u
Cn -V
b1)]/ (M
1+ε).Similarly, previously indicated, constraint (18) can be equivalently expressed as follows:(21)
u
C
n
-
V
b
1
+
ε
M
2
+
ε
≤
δ
2
≤
1
-
u
C
n
-
V
b
1
m
2According to (15) and (21), the discrete model of the system in working mode F2 can be described as follows:(22)
X
n
+
1
=
e
w
2
X
n
,
k
i
L
n
u
C
n
+
e
g
2
X
n
,
k
A
2
t
2
e
A
1
t
1
-
I
A
1
-
1
B
1
+
g
2
X
n
,
k
e
A
2
t
2
-
I
A
2
-
1
B
2
p
2
X
n
,
k
≤
δ
2
≤
q
2
X
n
,
kwhere w
2(x
n,k)=δ
2(A
2
t
2+A
1
t
1), g
2(x
n,k)=δ
2, p
2(x
n,k)=[(u
Cn -V
b1)+ε]/(M
2+ε), and q
2(x
n,k)=1-(u
Cn -V
b1)/m
2.According to the above analysis, the functions W and G can be defined as(23)
W
A
n
,
t
n
,
k
=
h
1
k
·
w
1
x
n
,
k
+
h
2
k
·
w
2
x
n
,
k
-
w
1
x
n
,
k
G
A
n
,
t
n
,
k
=
h
1
k
g
1
x
n
,
k
+
h
2
k
g
2
x
n
,
kwhere h
1(k)= (δ
2-δ
1)k +(2δ
1+δ
2) and h
2(k)= (δ
2-δ
1+1)k +(2δ
1-δ
2 -2).Similarly, according to (19) and (21), the constraint of the system can be described as(24)
P
X
n
,
k
=
e
1
k
p
1
X
n
+
e
2
k
p
2
X
n
Q
X
n
,
k
=
e
1
k
q
1
X
n
+
e
2
k
q
2
X
nwhere e
1(k) = -k + 2, e
2(k) =k - 1.As a result, buck converters operating in CCM with a CPL can be described by (13) and (15). Furthermore, according to (20) and (22), a unified model that includes (13) and (15) is obtained as follows:(25)
X
n
+
1
=
e
W
A
n
,
t
n
,
k
X
n
+
e
G
X
n
,
k
A
2
t
2
e
A
1
t
1
-
I
A
1
-
1
B
1
+
G
X
n
,
k
e
A
2
t
2
-
I
A
2
-
1
B
2
P
X
n
,
k
<
δ
<
Q
X
n
,
kwhere the functionsW,G,P, and Q are as described by (23) and (24), respectively.The hybrid model (25) includes the dynamic, logical, and switching relationship between the dynamics and the constraints of the system in a unified model. Equation (24) is equivalent to the switching condition of the converter, which ensures that the system can switch between different modes. The logical variableδ determined by functionsP(x,k) andQ(x,k) has been found to be either 1 or 0. Based on the rated operating condition of the converter, functionsW(x,k) andG(x,k) can be obtained from (23). The converter operates in mode k whenδ
k = 1, and the converter transitions to modek + 1 whenδ
k = 0. Noting thatP(x,k) andQ(x,k) are functions of the controller outputv
con, (25) can be applied to study the dynamics of converters under different control schemes.The proposed hybrid model (25) provides a unified model for the theoretical analysis and practical engineering design of a buck converter with a CPL.


## 4. Bifurcation Analysis of System

In this section, based on (25), we study the influence of R
C
P
L on the dynamics of a buck converter with a CPL by computing bifurcation diagrams and the spectrum of the largest Lyapunov exponents (hereafter called LLEs) with the variation of R
C
P
L.In this paper, the parameters of the system are chosen as follows:U
in = 30 V,L = 10 mH,C = 200 μF,T = 0.0025 s,V
u = 1.5 V,V
l = 0.05 V,U
ref = 1.5 V,C
f = 50 mF,R
f = 300 Ω, R
1 = 1000 Ω,R
u = 90 kΩ,R
d = 10 kΩ, L
2 = 1000 μH, C
2 = 600 μF,R
f2 = 51 kΩ, Cf2= 2.2 nF,U
ref2=2.5V,R
w2 = 10 kΩ, R
3 = 15 kΩ,R
u2 = 150 kΩ, andR
d2 = 10 kΩ,K=0.2 and the duty cycles of the buck converter and the boost converter are both 0.5.Figure5 shows the bifurcation diagrams ofu
C with the variation of R
C
P
L. As shown in the diagrams, when R
C
P
L < 13.6 Ω, there is a period-1 orbit. By increasing R
C
P
L, the system enters a chaotic state because of the occurrence of a Hopf bifurcation at R
C
P
L = 13.6 Ω, and the system then jumps into multiperiod orbits immediately. With further variation of R
C
P
L, the state jumps between different periodic orbits in the region of R
C
P
L
ϵ
(
13.6
Ω
,
25.9
Ω
). The system exhibits multiperiod orbits at different values of R
C
P
L. At R
C
P
L = 25.9 Ω, the system enters a chaotic state again because of the occurrence of a Hopf bifurcation. At R
C
P
L = 28.3 Ω, the state suddenly jumps from a chaotic state to five-period orbits.Figure 5
Bifurcation diagram withu
C varying with R
C
P
L.The above description indicates that there are two types of bifurcation behaviors in the diagram. One is a Hopf bifurcation observed smooth dynamical systems. The other is a sudden jump between different periodic orbits or a jump from periodic orbits to chaotic orbits, which is the typical phenomenon observed for border collision bifurcations of piecewise smooth dynamical systems.Moreover, as shown in Figure6, the spectrum of the LLEs λ
max of the system is computed based on the hybrid model (25). Compared with the bifurcation diagram shown in Figure 5, λ
max changes with the change in the system’s state. According to the Lyapunov exponent discrimination criterion [17], the spectrum of λ
max shown in Figure 6 exhibits the same state as the system shown in Figure 5.Figure 6
Spectrum of LLEs varying withR
C
P
L.According to the above analysis, because of the effects of the negative impedance of the CPL and the mode switching of the buck converter, the buck converter with a CPL exhibits complex dynamic characteristics, such as Hopf bifurcation and state jumping.


## 5. Simulation and Experimental Verification

Based on (25), the simulation results of the proposed model are as shown in Figure 7. Figure 7(a) shows the 6-period orbits ofu
C at R
C
P
L = 15 Ω. Figure 7(b) shows the 3-period orbits ofu
C at R
C
P
L = 18 Ω. Figure 7(c) shows the 5-period orbits ofu
C at R
C
P
L = 25 Ω. Figure 7(d) shows the chaotic orbits ofu
C at R
C
P
L = 27 Ω.Figure 7
Simulation waveforms ofu
C based on proposed model. (a) The 6-periodic orbits ofu
C at R
C
P
L = 15Ω. (b) The 3-periodic orbits ofu
C at R
C
P
L = 18Ω. (c) The 5-periodic orbits ofu
C at R
C
P
L = 25Ω. (d) The chaotic orbits ofu
C at R
C
P
L = 27Ω.
(a)
(b)
(c)
(d)To verify the proposed model, a prototype of a buck converter cascaded with a boost converter is built according to Figures1 and 2 and tested in the laboratory. The parameters of the prototype are the same as those in the above simulation. A power MOSFET IRF840 is used as switch S1, a MUR20100 Schottky diode is used as diode D, a TLP250 is used as the drive circuit, and two LM311 chips are used as comparators A1 and A2, respectively. The power MOSFET of IRFP460 is used as switch S2, and the APT30D60B is used as diode D2. Both the PWM drive signals of switches S1 and S2 are produced by the chips of TL949. According to the different requirements of the CPL, the output power of the boost converter can be controlled to different constants near the stability working point.The experimental results are shown in Figure8(a) which shows the 6-period orbits ofu
C at R
C
P
L = 15 Ω. Figure 8(b) shows the 3-period orbits ofu
C at R
C
P
L = 18 Ω. Figure 8(c) shows the 5-period orbits ofu
C at R
C
P
L = 25 Ω. Figure 8(d) shows the chaotic orbits ofu
C at R
C
P
L = 27 Ω.Figure 8
Experimental waveforms ofu
C. (a) The 6-periodic orbits ofu
C at R
C
P
L = 15Ω. (b) The 3-periodic orbits ofu
C at R
C
P
L = 18Ω. (c) The 5-periodic orbits ofu
C at R
C
P
L = 25Ω. (d) The chaotic orbits ofu
C at R
C
P
L = 27Ω.
(a)
(b)
(c)
(d)Figures7 and 8 shows that, except for tiny differences in the shapes of the waveforms caused by the parasitic parameters in the actual circuit, the experimental results are consistent with the simulation results, which further confirms the validity of the proposed model presented in this paper.


## 6. Conclusion

In this paper, a novel hybrid model is built to describe a DC-DC converter with a CPL. The modeling method relies on the basic equivalent translation principle between logical statements and voltage boundary constraints. The hybrid model provides a unified model for describing a DC-DC converter with a CPL in different working modes. This hybrid model includes the dynamic, logical, and switching relationship between the dynamics and the constraints of the system. The consistency between the simulation and experimental results verifies the accuracy of the proposed model. Therefore, the novel hybrid model proposed in this paper provides new possibilities for future research in accurately modeling DC-DC converters with a CPL.



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*Source: 9342064-2019-03-06.xml*