# A Coupled Inductor-Based Bidirectional DC-DC Converter with Step-Up Step-Down Operation for Electric Vehicle Applications

Authors: Muhammad Zeeshan Malik; Shiqing Zhang; Yuanyuan Hong; Ayham Riyad A’Yesh Alwahkyan; Amjad Ali; Ajmal Farooq
Journal: International Transactions on Electrical Energy Systems
 (2023)

---

## Abstract

A coupled-inductor-based high step-up high step-down DC-DC converter with bidirectional capability suitable for electric vehicle (EV) applications is proposed in this paper. The voltage gain in both step-up and step-down operations is increased by a two-winding coupled inductor. The current ripple in the low-voltage port is low making it suitable for renewable energy sources. In addition, the low number of components causes the efficiency of the proposed converter to be competitive with similar topologies in the literature. Due to the use of only three bidirectional switches with low voltage stress, the cost and volume of the converter are reduced. To demonstrate the performance of the proposed bidirectional converter, an analysis of the operation modes in the steady state is presented. Also, a comparison between the suggested converter and other similar converters in the literature is provided. The results of these comparisons show that the proposed converter has a lower number of components and higher efficiency than the others. In addition, lower voltage stress and noticeable voltage gain in comparison with others are further results of these comparisons. Eventually, the experimental results in step-up and step-down operations are presented. In step-up operation, the experimental prototype is tested underfs = 50 kHz, VLow = 20 V, VHigh = 110 V, rated power = 120 W, with 94.60% efficiency. Furthermore, VHigh is considered 100 V with VLow = 33 V and 94.43% efficiency at 50 W rated power in step-down mode operation.


---

## Body

## 1. Introduction

In recent years, electric vehicles (EVs) utilization has risen because of the widespread evolution of environmental disintegration and circumstances such as economic crises and lack of fossil fuels [1, 2]. Due to using hybrid energy systems (HES) in EVs, the bidirectional power flow must be insured [3, 4]. Among the renewable sources, photovoltaic (PV) energy is stunning for generating electricity due to its pollution-free, scalable flexibility, and low maintenance [5, 6]. However, because of the dependence of its power on the level of sunlight, ambient temperature, and unexpected shading, a PV-based system must be augmented with other alternative energy sources to ensure a reliable power supply [7, 8]. To overcome these challenges, bidirectional DC-DC converters have been developed in which the power can transfer in both directions between the input and output ports [9, 10].Considerable types of research on bidirectional DC-DC converters have been presented in various articles. In [11], a bidirectional nonisolated DC-DC converter consisting of power storage units is presented for HESs in EVs. This converter has acceptable performance in both charging and discharging modes. As a result, the output voltage of the converter might be greater than or less than the input voltage. For distributed energy storage systems, the authors of [12] introduce a bidirectional high-voltage gain DC-DC converter based on switched capacitors and coupled inductors. However, due to the enormous number of power switches employed, it is not a high-efficiency and cost-effective topology. The topology presented in [13] features a buck-boost function and can be utilized in EVs. The voltage gain of this topology, however, is lower than those of other comparable converters. In [14], a three-port bidirectional topology for HES is presented. This converter offers a soft-switching feature, which results in reduced losses and excellent efficiency. This topology, however, has a significant input current ripple, so the CCM is not achieved in all modes. A topology for HES is presented in [15]. This converter has step-down, step-up, and buck-boost operations. Nevertheless, it is restricted by high peak voltage on the semiconductor. The authors in [16] give a bidirectional multiport topology to regulate bidirectional power in hybrid battery systems. Nonetheless, a huge number of semiconductors are used. A DC-DC topology for EVs with HES is given in [17–19]. The enormous number of components is the main downside of these structures. Isolated bidirectional topologies are presented in [20, 21]. A costly transformer is included in the structure of these two converters. Furthermore, converters [22, 23] have a large voltage gain as well as a low peak voltage of the switches and diodes. These converters can even be interconnected to diverse power inputs. However, these structures suffer from a lack of bidirectional power flow. As a result, they are unsuitable for HESs. In [24], a switched capacitor-based topology is recommended for EV application. The low number of components, low voltage stress across power switches, and simple structure are its main advantages. A nonisolated multiport DC-DC converter consisting of a battery port is presented in [25]. The high number of semiconductors, lack of bidirectional power flow, and its inability to simultaneously transfer inputs power to the output ports are the major weaknesses of this converter. A transformer-less bidirectional multiport DC-DC converter is given in [26]. Continuous charging/discharging current of the battery, low normalized peak voltage stress (NPVS) on semiconductors, and step-up capability are advantages of this converter. However, the input and output ports do not share a common ground. The authors introduce a dual-input DC-DC converter with bidirectional power flow [27]. Step-up capability, the low voltage stress on semiconductors, and the smaller number of passive elements are advantages of the converter. The use of a high number of switches is the main drawback of this topology. An interleaved soft-switched boost converter without any auxiliary switch is given in [28]. Smaller current stress of the devices, low conduction and switching losses, and its simple control system are the main benefits of this converter. The authors in [29] have designed a series LC-basedsingle-stage boost converter and expanded its voltage gain by a multistage boost converter using the switched capacitor method. This converter has only one auxiliary switch and works using the minimum number of components required to create a very high voltage gain DC-DC converter. A simple and systematic method to synthesize a robust adaptive fuzzy fractional-order nonsingular terminal sliding mode controller to enhance the output voltage tracking control performance of the DC-DC step-down converters is presented in [30]. Improved flexibility acquired by fractional-order computation, enhancing robustness to disruptions and parameter variations provided by the conventional sliding mode controllers as well as finite time convergence properties of the output voltage error to the balance point during the output load variations, simultaneously is the main advantage of this idea. A high step-up DC-DC converter ideal for photovoltaic applications is given in [31]. Reduced current ripple, low voltage stress across the main and auxiliary switches, and soft-switching conditions of all switches and diodes are the major advantages of this topology. In Reference [32], an extendable high step-up topology is presented for the low input voltage applications, that is, fuel cell (FC) source. In the mentioned converter, the input current ripple is zero. However, an inductor has been added at the input, which does not increase the voltage gain and only reduces the input current ripple. Thus, the cost of the converter will be high.In this paper, a new bidirectional high step-up, step-down DC-DC converter based on the coupled inductor technique is proposed for EV applications. A two-winding coupled inductor increases the voltage gain in both step-up and step-down operations. The current ripple in the low voltage port is low makes the proposed converter suitable for renewable energy sources. The lower number of components causes the power efficiency to be high. Also, due to the existence of only three bidirectional power switches with low voltage stress, the cost and volume of the converter are reduced.The rest of the paper is organized as follows: Section2 is devoted to the proposed topology explanation. Analysis of the operation principle is presented in Section 3. A steady-state analysis of the converter is done in Section 4. Design considerations and power loss analysis are investigated in Sections 5 and 6, respectively. A comparison with other solutions in the literature is accomplished in Section 7. The experimental results of a prototype-based converter are presented in Section 8, and the paper ends with a conclusion in Section 9.


## 2. Proposed Converter Description

The topology of the proposed converter is shown in Figure1. As can be seen in this figure, the suggested converter has three bidirectional power switches (Q1, Q2, and Q3), three capacitors (C1, C2, and C3), and two magnetic cores, which one core is used for inductor L1 and another one is used for the coupled inductor. The coupled inductor is modeled as an ideal transformer with the number of turns (n1 and n2), leakage, and magnetizing inductances (Lk and Lm). Also, the turns ratio of the coupled inductor is defined as N = n1/n2. VLow is the voltage of the port with a lower voltage level, and VHigh presents the voltage of the port with a higher voltage. This converter can operate in both step-up and step-down modes. In the next section, these operation modes are analyzed.Figure 1
The power circuit of the suggested converter.


## 3. Analysis of the Operation Principle

The key waveforms of the proposed converter in step-up and step-down operation modes are shown in Figures2(a) and 2(b), respectively. As can be seen from Figure 2, when switch Q1 is turned on, switches Q2 and Q3 are turned off, and vice versa. In other words, switch Q1 is switched in complementary with switches Q2 and Q3. If D1, D2, and D3 are considered the duty cycle of Q1, Q2, and Q3, respectively, the following equation is used in both operation modes according to Figure 2:(1)D1Ts=1−D2Ts=1−D3Ts,1−D1Ts=D2Ts=D3Ts.Figure 2
The main waveforms: (a) step-up mode and (b) step-down mode.
(a)(b)


### 3.1. Step-Up Operation Mode

This operation mode has two switching states. In both states, the power is transferred fromVLow to VHigh which is discussed in detail as follows:State 1: At the start of state 1,Q1 is turned on while Q2 and Q3 are turned off. Therefore, the voltage across L1 is positive, and its current is increased. However, the voltage across the primary side of the coupled inductor is equal to the voltage difference between C1 and C3, and it is negative. The load Ro is supplied by C2 current. The current path of this switching state is shown in Figure 3(a).(2)VL1=VLow−NVLm,(3)VLm1−N=VC1−VC3,(4)VHigh=VC2+VC3,(5)iLow=iQ1+iC1,(6)iC2=−iHigh,(7)iC3=iLk−iHigh.Figure 3
The equivalent circuits in step-up mode: (a) state 1 and (b) state 2.
(a)(b)State 2: This switching state starts whenQ1 is turned off, and two other switches are turned on. The voltage across L1 obtained by (9) is negative, and so, its current is decreased. Vice versa, the voltage across the primary side of the coupled inductor is positive resulting in increasing its leakage and magnetizing currents. C1 is charged by the energy stored in the secondary winding of the coupled inductor. Also, the energy stored in Lk and Lm is transferred to C2, C3, and Ro. The equivalent circuit in this state is shown in Figure 3(b) resulting in the following equations:(8)VLm=VC2,(9)VL1=VLow−VC3−NVC2,(10)VC1=VLm1−N,(11)iQ3=iHigh+iC2,(12)iC3=iLow−iHigh,(13)iC1=−iQ3+iLk,(14)in2=iQ2.


### 3.2. Step-Down Operation Mode

The step-down mode also includes two switching states. In both states, the power is transferred from high voltage port VHigh to low voltage port VLow. It should be noticed that the output loadRo is linked to the port with a lower voltage level.State 1: At the beginning of step-down mode,Q2 and Q3 are turned on while Q1 is turned off. The voltage across L1 calculated by (15) is positive. Thus, its current is increased. The energy of VHigh is transferred to C2, the primary side of the coupled inductor, and Ro through Q2 and Q3. On the other hand, C1 and C3 are discharged. The current path of state 1 in this mode is illustrated in Figure 4(a), and the equations are obtained as follows:(15)VL1=VC3+NVC2−VLow,(16)iHigh=iQ3+iC2=iLk+iC1+iC2,(17)iL1=iQ2+iC1=iLow+iCL.Figure 4
The equivalent circuits in step-down mode: (a) state 1 and (b) state 2.
(a)(b)State 2: This switching state starts whenQ2 and Q3 are turned off, and Q1 is turned on. Same as state 2 at step-up mode, the voltage across L1 is negative. Therefore, its current is decreased, and vice versa, the voltage across the primary side of the coupled inductor is positive, and its leakage and magnetizing currents are increased. During this switching state, C1 and C3 are charged by the energy stored in the coupled inductor. The equivalent circuit of state 2 in step-down mode is depicted in Figure 4(b).(18)VL1=NVLm−VLow.


## 3.1. Step-Up Operation Mode

This operation mode has two switching states. In both states, the power is transferred fromVLow to VHigh which is discussed in detail as follows:State 1: At the start of state 1,Q1 is turned on while Q2 and Q3 are turned off. Therefore, the voltage across L1 is positive, and its current is increased. However, the voltage across the primary side of the coupled inductor is equal to the voltage difference between C1 and C3, and it is negative. The load Ro is supplied by C2 current. The current path of this switching state is shown in Figure 3(a).(2)VL1=VLow−NVLm,(3)VLm1−N=VC1−VC3,(4)VHigh=VC2+VC3,(5)iLow=iQ1+iC1,(6)iC2=−iHigh,(7)iC3=iLk−iHigh.Figure 3
The equivalent circuits in step-up mode: (a) state 1 and (b) state 2.
(a)(b)State 2: This switching state starts whenQ1 is turned off, and two other switches are turned on. The voltage across L1 obtained by (9) is negative, and so, its current is decreased. Vice versa, the voltage across the primary side of the coupled inductor is positive resulting in increasing its leakage and magnetizing currents. C1 is charged by the energy stored in the secondary winding of the coupled inductor. Also, the energy stored in Lk and Lm is transferred to C2, C3, and Ro. The equivalent circuit in this state is shown in Figure 3(b) resulting in the following equations:(8)VLm=VC2,(9)VL1=VLow−VC3−NVC2,(10)VC1=VLm1−N,(11)iQ3=iHigh+iC2,(12)iC3=iLow−iHigh,(13)iC1=−iQ3+iLk,(14)in2=iQ2.


## 3.2. Step-Down Operation Mode

The step-down mode also includes two switching states. In both states, the power is transferred from high voltage port VHigh to low voltage port VLow. It should be noticed that the output loadRo is linked to the port with a lower voltage level.State 1: At the beginning of step-down mode,Q2 and Q3 are turned on while Q1 is turned off. The voltage across L1 calculated by (15) is positive. Thus, its current is increased. The energy of VHigh is transferred to C2, the primary side of the coupled inductor, and Ro through Q2 and Q3. On the other hand, C1 and C3 are discharged. The current path of state 1 in this mode is illustrated in Figure 4(a), and the equations are obtained as follows:(15)VL1=VC3+NVC2−VLow,(16)iHigh=iQ3+iC2=iLk+iC1+iC2,(17)iL1=iQ2+iC1=iLow+iCL.Figure 4
The equivalent circuits in step-down mode: (a) state 1 and (b) state 2.
(a)(b)State 2: This switching state starts whenQ2 and Q3 are turned off, and Q1 is turned on. Same as state 2 at step-up mode, the voltage across L1 is negative. Therefore, its current is decreased, and vice versa, the voltage across the primary side of the coupled inductor is positive, and its leakage and magnetizing currents are increased. During this switching state, C1 and C3 are charged by the energy stored in the coupled inductor. The equivalent circuit of state 2 in step-down mode is depicted in Figure 4(b).(18)VL1=NVLm−VLow.


## 4. Steady-State Analysis

In this section, the voltage gain of the proposed converter in step-up and step-down operation modes, peak voltage across power switches, and the current of used elements is analyzed.


### 4.1. Voltage Calculation

Using the volt-second balance law on inductorLm, the following equation is achieved:(19)VLmTs=0⟶D1VC1−VC31−N+1−D1VC11−N=0.With the simplification of (19), the voltage of capacitor C1 can be written versus VC3:(20)VC1=D1VC3.Also, using (8) and (10), the voltage of capacitor C1 can be written versus VC2:(21)VC1=1−NVC2.Using the volt-second balance law on inductorL1, equation (22) can be expressed as follows:(22)VL1Ts=0⟶D1VLow+D1N1−D11−NVC3+1−D1VLow=0.Simplifying (22) causes the voltage of capacitor C3 to be calculated versus VLow and power switches duty cycles:(23)VC3=VLow1−D1=VLowD2.Therefore,VC1 and VC2 can be written as follows:(24)VC1=D1VLow1−D1,(25)VC2=D1VLow1−D11−N.Finally, the voltage of the high voltage port and step-up voltage gain are calculated using (4):(26)VHigh=VC2+VC3=D1+1−ND21−NVLow⟶M=VHighVLow=D1+1−ND21−N.Using the same method, the capacitors’ voltage and step-down voltage gain can be calculated as follows:(27)VC1=1−N1−D2+1−NVHigh,VC2=1−D21−D2+1−NVHigh,VC3=1−N1−D21−D2+1−NVHigh,(28)MBuck=VLowVHigh=D21−ND1+1−N.The peak voltage across power switchQ3 (VQ3) can be obtained from state 1 of step-up mode:(29)VQ3=VC2−VLm.Replacing (3), (24), and (25) into (29), VQ3 is calculated as follows:(30)VQ3=D1D21−NVLow−11−ND1D2VLow−1D2VLow=VLowD21−N.Also, using step-up voltage gain,VQ3 can be expressed versus high voltage port:(31)VQ3=VHighD1+1−N.The peak voltage across power switchQ2 (VQ2) also can be achieved from state 1 of step-up mode:(32)VQ2=VC1+1−NVLm=VLowD2.Finally, the peak voltage across power switchQ1 (VQ2) is calculated from state 2 of step-up mode:(33)VQ1=VC3=VQ2=1−ND1+1−NVHigh.Figures5(a) and 5(b) show the voltage gain of the suggested structure in step-up and step-down operation modes versus duty cycle and turns ratio (N), respectively. A 3D view of the voltage gains is presented in Figure 6. Furthermore, Figure 7 illustrates the normalized peak voltage of the power switches versus N for D1 = 1 − D2 = 1 − D3 = 0.6.Figure 5
Voltage gains versus duty cycle: (a) step-up and (b) step-down (D1 = 1 − D2 = 1 − D3).
(a)(b)Figure 6
3D view of the voltage gains versus duty cycle: (a) step-up and (b) step-down.
(a)(b)Figure 7
Peak voltage versus duty cycle (D1 = 1 − D2 = 1 − D3 = 0.6).


### 4.2. Currents Calculation

The average current of the low voltage port (ILow) is equal to the average current of inductor L1 and is calculated versus the high voltage port current based on the voltage gain relation:(34)ILow=MIHigh=D1+1−ND21−NIHigh.Considering the configuration of the proposed converter, the average current of power switchesQ2 and Q3 is equal to the current of magnetizing inductance as follows:(35)IQ3=IQ2=ILm=IHigh.The average current ofQ1 can be written versus currents of low voltage port and power switch Q2 as follows:(36)IQ1=ILow−IQ2=M−1IHigh=D12−ND21−NIHigh.Using the average currents obtained, the power switches current stresses are determined as follows:(37)iQ1=2−ND21−NIHigh,iQ2=iQ3=2D2IHigh.Also, the root mean square (RMS) currents of the power switches are calculated as follows:(38)IQ1RMS=D12−ND21−NIHigh,IQ2RMS=IQ3RMS=2D2IHigh.Furthermore, the RMS currents of the coupled inductor and capacitors are summarized as follows:(39)In2RMS=D121+D1−N2D21−N2+D1+1−N1+D12D21−N2IHigh,(40)IC1RMS=D11+D12+D12D21−N2D21−N2IHigh,IC2RMS=1+D2D2IHigh,IC3RMS=1+2−N2D21−N2D1IHigh.


## 4.1. Voltage Calculation

Using the volt-second balance law on inductorLm, the following equation is achieved:(19)VLmTs=0⟶D1VC1−VC31−N+1−D1VC11−N=0.With the simplification of (19), the voltage of capacitor C1 can be written versus VC3:(20)VC1=D1VC3.Also, using (8) and (10), the voltage of capacitor C1 can be written versus VC2:(21)VC1=1−NVC2.Using the volt-second balance law on inductorL1, equation (22) can be expressed as follows:(22)VL1Ts=0⟶D1VLow+D1N1−D11−NVC3+1−D1VLow=0.Simplifying (22) causes the voltage of capacitor C3 to be calculated versus VLow and power switches duty cycles:(23)VC3=VLow1−D1=VLowD2.Therefore,VC1 and VC2 can be written as follows:(24)VC1=D1VLow1−D1,(25)VC2=D1VLow1−D11−N.Finally, the voltage of the high voltage port and step-up voltage gain are calculated using (4):(26)VHigh=VC2+VC3=D1+1−ND21−NVLow⟶M=VHighVLow=D1+1−ND21−N.Using the same method, the capacitors’ voltage and step-down voltage gain can be calculated as follows:(27)VC1=1−N1−D2+1−NVHigh,VC2=1−D21−D2+1−NVHigh,VC3=1−N1−D21−D2+1−NVHigh,(28)MBuck=VLowVHigh=D21−ND1+1−N.The peak voltage across power switchQ3 (VQ3) can be obtained from state 1 of step-up mode:(29)VQ3=VC2−VLm.Replacing (3), (24), and (25) into (29), VQ3 is calculated as follows:(30)VQ3=D1D21−NVLow−11−ND1D2VLow−1D2VLow=VLowD21−N.Also, using step-up voltage gain,VQ3 can be expressed versus high voltage port:(31)VQ3=VHighD1+1−N.The peak voltage across power switchQ2 (VQ2) also can be achieved from state 1 of step-up mode:(32)VQ2=VC1+1−NVLm=VLowD2.Finally, the peak voltage across power switchQ1 (VQ2) is calculated from state 2 of step-up mode:(33)VQ1=VC3=VQ2=1−ND1+1−NVHigh.Figures5(a) and 5(b) show the voltage gain of the suggested structure in step-up and step-down operation modes versus duty cycle and turns ratio (N), respectively. A 3D view of the voltage gains is presented in Figure 6. Furthermore, Figure 7 illustrates the normalized peak voltage of the power switches versus N for D1 = 1 − D2 = 1 − D3 = 0.6.Figure 5
Voltage gains versus duty cycle: (a) step-up and (b) step-down (D1 = 1 − D2 = 1 − D3).
(a)(b)Figure 6
3D view of the voltage gains versus duty cycle: (a) step-up and (b) step-down.
(a)(b)Figure 7
Peak voltage versus duty cycle (D1 = 1 − D2 = 1 − D3 = 0.6).


## 4.2. Currents Calculation

The average current of the low voltage port (ILow) is equal to the average current of inductor L1 and is calculated versus the high voltage port current based on the voltage gain relation:(34)ILow=MIHigh=D1+1−ND21−NIHigh.Considering the configuration of the proposed converter, the average current of power switchesQ2 and Q3 is equal to the current of magnetizing inductance as follows:(35)IQ3=IQ2=ILm=IHigh.The average current ofQ1 can be written versus currents of low voltage port and power switch Q2 as follows:(36)IQ1=ILow−IQ2=M−1IHigh=D12−ND21−NIHigh.Using the average currents obtained, the power switches current stresses are determined as follows:(37)iQ1=2−ND21−NIHigh,iQ2=iQ3=2D2IHigh.Also, the root mean square (RMS) currents of the power switches are calculated as follows:(38)IQ1RMS=D12−ND21−NIHigh,IQ2RMS=IQ3RMS=2D2IHigh.Furthermore, the RMS currents of the coupled inductor and capacitors are summarized as follows:(39)In2RMS=D121+D1−N2D21−N2+D1+1−N1+D12D21−N2IHigh,(40)IC1RMS=D11+D12+D12D21−N2D21−N2IHigh,IC2RMS=1+D2D2IHigh,IC3RMS=1+2−N2D21−N2D1IHigh.


## 5. Design Considerations

This section presents the design process of each capacitor and inductor. For this work, the currents and voltages obtained in the previous section are used.


### 5.1. Inductors

The minimum value of inductorsL1 and Lm is calculated based on the following equation:(41)L≥DVL20%fsIL.For attaining CCM operation, the inductor current ripple is considered 20% of the average current. Therefore, the value ofL1 and Lm can be expressed as follows:(42)L1≥D1VL120%fsIL1=D1VLow20%fs1−NILow,Lm≥D1VLm20%fsILm=D12VLow20%fsD21−NIHigh.


### 5.2. Capacitors

The minimum value of capacitorsC1, C2, and C3 is calculated based on the following equation:(43)C≥DIC2%fsVC.∆VC is defined as the voltage ripple of the capacitors and considered ∆VC≤2%VC. Thus, the minimum value of each capacitor can be obtained by the following equation:(44)C1≥D1IC12%fsVC1=D1IHigh2%fsVLow,C2≥D11−NIHigh2%fsVLow,C3≥D122−N1−DIHigh2%fsD21−NVLow.


### 5.3. Coupled Inductor

The magnetizing inductor is designed with an assumption as follows:(45)∆iLm≥20%ILm.On the other hand, the relationship between voltage and current of an inductor can be written as follows:(46)VLm=LmdiLmdt.Therefore, the value ofLm can be obtained from (8) and (25) of the main manuscript file:(47)Lm≥D1Vlow20%ILmfs.The average current ofLm is calculated as follows:(48)ILm=Io.By replacing (48) with (47), the following equation can be obtained:(49)Lm≥D1Vlow20%Iofs.The related equations for designing the size of the core, turn ratio, and the wire size are completely discussed in [33]. The coupled inductor is designed related to the maximum current of magnetizing inductances. Therefore, the magnetizing inductance should be defined, which is indicated in (47). The maximum current of magnetizing inductance current is equal to(50)IM,max=IM+∆iM.The root mean square (RMS) of the winding current of the coupled inductor can be obtained as follows:(51)Itot=iLk1+n2n1iLk2.In order to design the coupled inductor in detail, the following steps are utilized [30]:(i)
Determine core sizekg≥ρLM2ItotIM.max2×108/Bmax2Pcuku(ii)
Determine the air gaps are neglected(iii)
Determine the winding number of the first side of the coupled inductorn1=LMIM,max×104/BmaxAc(iv)
Determine the winding number of the second side of the coupled inductorn2=n1/2(v)
Evaluate the fraction of window area allocated for each windinga1=n1I1/Itot,a2=n2I2/n1Itot(vi)
Evaluate the wire sizeAw1≤a1kgWA/n1,Aw2≤a2kgWA/n2It has to be mentioned that in order to design the coupled inductor, the EPCOS B66344 (Ferrite core EE60) model is utilized. The magnetizing inductance (Lm) is chosen at 200 µH. For the coupled inductor with Lm = 200 µH, the number of the first side of the coupled inductor winding is 34 turns, and also, the number of the second side of the coupled inductor winding is 68 turns. Regarding equation (52), if we consider the coupling coefficient about 0.98 and Lm = 200 µH in the experimental result, the leakage inductance (Lk) can be calculated as follows:(52)K=LmLm+Lk.By solving equation (52), the leakage inductance (Lk) is obtained about 4.08 µH. Extreme care has been taken in the design of the coupled inductor to have a low leakage inductance.


### 5.4. Power Switches

The switching frequency of the proposed converter has been selected according to the available facilities in the laboratory, and the frequency of 50 kHz is suitable for laboratory structures and is also large enough to reduce the size of the elements. For determining the volume and the cost of the components, the main factor is normalized voltage stress (NVS) throughout the semiconductors which is equal to (VPEAK/Vo) and should be defined. In the recommended converter, only three semiconductor devices are utilized. The switches Q1, Q2, and Q3 are the main semiconductor elements of the presented structure. The NVS throughout the switches is defined as follows:(53)VQ1=1−ND1+1−NVHigh,VQ2=VLowD2,VQ3=VHighD1+1−N.The switch current stress is explained as follows:(54)iQ1=2−ND21−NIHigh,iQ2=iQ3=2D2IHigh.Based on (53), it can be concluded that the maximum voltage throughout the switches is acceptable and low compared to the output voltage in the multi-input converters. Besides, the switches are selected based on the nominal value of voltage and current stress throughout the switches, which are indicated in (53) and (54).


## 5.1. Inductors

The minimum value of inductorsL1 and Lm is calculated based on the following equation:(41)L≥DVL20%fsIL.For attaining CCM operation, the inductor current ripple is considered 20% of the average current. Therefore, the value ofL1 and Lm can be expressed as follows:(42)L1≥D1VL120%fsIL1=D1VLow20%fs1−NILow,Lm≥D1VLm20%fsILm=D12VLow20%fsD21−NIHigh.


## 5.2. Capacitors

The minimum value of capacitorsC1, C2, and C3 is calculated based on the following equation:(43)C≥DIC2%fsVC.∆VC is defined as the voltage ripple of the capacitors and considered ∆VC≤2%VC. Thus, the minimum value of each capacitor can be obtained by the following equation:(44)C1≥D1IC12%fsVC1=D1IHigh2%fsVLow,C2≥D11−NIHigh2%fsVLow,C3≥D122−N1−DIHigh2%fsD21−NVLow.


## 5.3. Coupled Inductor

The magnetizing inductor is designed with an assumption as follows:(45)∆iLm≥20%ILm.On the other hand, the relationship between voltage and current of an inductor can be written as follows:(46)VLm=LmdiLmdt.Therefore, the value ofLm can be obtained from (8) and (25) of the main manuscript file:(47)Lm≥D1Vlow20%ILmfs.The average current ofLm is calculated as follows:(48)ILm=Io.By replacing (48) with (47), the following equation can be obtained:(49)Lm≥D1Vlow20%Iofs.The related equations for designing the size of the core, turn ratio, and the wire size are completely discussed in [33]. The coupled inductor is designed related to the maximum current of magnetizing inductances. Therefore, the magnetizing inductance should be defined, which is indicated in (47). The maximum current of magnetizing inductance current is equal to(50)IM,max=IM+∆iM.The root mean square (RMS) of the winding current of the coupled inductor can be obtained as follows:(51)Itot=iLk1+n2n1iLk2.In order to design the coupled inductor in detail, the following steps are utilized [30]:(i)
Determine core sizekg≥ρLM2ItotIM.max2×108/Bmax2Pcuku(ii)
Determine the air gaps are neglected(iii)
Determine the winding number of the first side of the coupled inductorn1=LMIM,max×104/BmaxAc(iv)
Determine the winding number of the second side of the coupled inductorn2=n1/2(v)
Evaluate the fraction of window area allocated for each windinga1=n1I1/Itot,a2=n2I2/n1Itot(vi)
Evaluate the wire sizeAw1≤a1kgWA/n1,Aw2≤a2kgWA/n2It has to be mentioned that in order to design the coupled inductor, the EPCOS B66344 (Ferrite core EE60) model is utilized. The magnetizing inductance (Lm) is chosen at 200 µH. For the coupled inductor with Lm = 200 µH, the number of the first side of the coupled inductor winding is 34 turns, and also, the number of the second side of the coupled inductor winding is 68 turns. Regarding equation (52), if we consider the coupling coefficient about 0.98 and Lm = 200 µH in the experimental result, the leakage inductance (Lk) can be calculated as follows:(52)K=LmLm+Lk.By solving equation (52), the leakage inductance (Lk) is obtained about 4.08 µH. Extreme care has been taken in the design of the coupled inductor to have a low leakage inductance.


## 5.4. Power Switches

The switching frequency of the proposed converter has been selected according to the available facilities in the laboratory, and the frequency of 50 kHz is suitable for laboratory structures and is also large enough to reduce the size of the elements. For determining the volume and the cost of the components, the main factor is normalized voltage stress (NVS) throughout the semiconductors which is equal to (VPEAK/Vo) and should be defined. In the recommended converter, only three semiconductor devices are utilized. The switches Q1, Q2, and Q3 are the main semiconductor elements of the presented structure. The NVS throughout the switches is defined as follows:(53)VQ1=1−ND1+1−NVHigh,VQ2=VLowD2,VQ3=VHighD1+1−N.The switch current stress is explained as follows:(54)iQ1=2−ND21−NIHigh,iQ2=iQ3=2D2IHigh.Based on (53), it can be concluded that the maximum voltage throughout the switches is acceptable and low compared to the output voltage in the multi-input converters. Besides, the switches are selected based on the nominal value of voltage and current stress throughout the switches, which are indicated in (53) and (54).


## 6. Power Losses and Efficiency Analysis

In this section, the efficiency of the suggested bidirectional converter is analyzed. The efficiency is determined based on the following relation:(55)η=OutputPowerOutputPower+TotalLosses×100%,where Total Losses of the proposed converter are defined as follows:(56)TotalLosses=∆PSwitches+∆PCapacitors+∆PInductors,∆PSwitches is the losses of the switches Q1, Q2, and Q3 which is obtained as follows:(57)∆PSwitches=∆PConduction+∆PSwitching=∑i=13rds_oniIQiRMS2+∑i=1312fsTRi+TFiIQiVQi.In (57), rds is the ON-state resistance of switches. IQ and VQ refer to the average current and voltage across the switch Q. Average current of the switches has been calculated in subsection 4.2. TR and TF are the rise and fall times, respectively, available in the switches datasheet. The losses of capacitors and inductors are calculated based on RMS currents and equivalent series resistance (rC and rL) values as follows:(58)∆PCapacitors=∑i=13rCiICiRMS2,∆PInductors=rL1IL1RMS2+rn1N+rn2In2RMS2.


## 7. Comparison Study

This part summarizes the comparison of the proposed topology and other similar topologies. In this comparison, input current ripple, peak voltage across semiconductors, step-up voltage gain, rated power, efficiency, switching frequency (fs), bidirectional features, and the total number of used elements include power switches, power diodes, capacitors, and magnetic cores are taken into account.Among the converters introduced in Table1, the converters in [11, 14, 17, 19, 25], and [26] employ four power switches, and the converter in [27] includes five power switches. Additionally, all the structures in Table 1 contain a minimum of one power diode, while the power diode does not exist in the proposed topology. On the other hand, the proposed converter has only eight elements in its structures which are the minimum value among the converters in this table. The input current ripple is an essential parameter for renewable energy and HESs. According to Table 1, the converters in [14, 19, 25], and [27] suffer from high input current ripple and discontinued current. The comparison of the peak voltage across power switches shows that [14, 19, 25], and [27] have higher peak voltage than other topologies.Table 1
Comparison of the proposed converter with other topologies.
Specification[11][14][17][19][25][26][27]ProposedTotal no. of elements111312101011128No. of capacitors12242313No. of magnetic cores22211222No. of diodes45413220No. of power switches44444473Input current rippleLowHighLowHighHighLowHighLowPeak voltage across semiconductorsVHigh−VLowVHighVHigh−VLowVHighVHighNot reportedVHighVHigh/D+1−NStep-up voltage gain1−D2/1−D+1D1−D1/D21−D2−D2−D1D2−D+1/1−D21/1−D1/1−DNot reportedNot reportedD−N+1/1−NDBidirectional√√√√√√√√Eff. at 80 WNot reported90%90%Not reportedNot reportedNot reportedNot reported95.22%Rated power (W)2208014085236200200120fs (kHz)2030300.410404050Also, the suggested topology has a lower peak voltage across power switches with comparable voltage gain than other converters. The converters in [11, 25–27] are built with higher-rated power. However, the efficiency is not reported in these papers. The proposed converter has higher efficiency at the same output power (80 W). Finally, the suggested bidirectional topology is built with a 50 kHz switching frequency higher than other converters. As a result, considering the comparison of the proposed converter and different similar topologies, it can be mentioned that the suggested bidirectional DC-DC converter benefits from the low number of components, higher efficiency, lower peak voltage across power switches, justifiable voltage gain, and rated power. These advantages make the proposed topology proper for EVs and other applications such as renewable energy systems.


## 8. Controller Method

The proposed paper control design in both step-up and step-down modes is carried out in this section. If the duty cycle of the power switches is controlled properly, the voltage will be adjusted. In order to design the controller for the suggested converter, the dynamic analysis should be provided. The state-space average method is utilized for dynamic modeling. The system equations are prepared as the state, input, and control variable functions which are indicated in the state-space form in the following [32]:(59)x^i′t=Ax^it+Bu^it,y^it=Cx^it+Du^it.In (18), x^i′t is the vector of state variables, u^it is the vector of input variables, and y^it is the vector of output variables which are expressed as follows for both boost and buck operation modes:(60)x^=i^L1,i^Ln1,i^Ln2,v^C1,v^C2,v^C3Tu^=v^low,i^high,d^1,d^2Ty^=i^low,v^highT⟶Step−up,x^=i^L1,i^Ln1,i^Ln2,v^C1,v^C2,v^C3Tu^=v^high,i^low,d^1,d^2Ty^=i^high,v^lowT⟶Step−down.In dynamic modeling, the following assumptions are considered.(i)
All passive and active elements are considered ideal(ii)
The voltage ripple of the capacitors is ignoredTherefore, by considering the above considerations, the equations related to the state and output variables can be achieved by using Kirchhoff’s voltage and current principles.The dynamic performance of the recommended structure can be indicated with a small-signal frequency response. In this section, the values of the elements are presented in Table2 and the “Experimental” result section. The simulation result of the control to the output transfer function in the Laplace domain (the magnitude dB and phase frequency response) for boost mode and buck mode has been demonstrated in Figures 8(a) and 8(b), respectively. The closed-loopsmall-signal transfer function from the output voltage to each duty cycle is illustrated in Figure 8(c). The output voltage can be controlled properly by using a proportional-integral (PI) controller. The proper interpolation is produced by comparing the appropriate duty cycle with a carrier wave. It has to be mentioned that the PI controller includes a gain and time constant that the values of them are obtained by a trade-off. By defining a reference current and voltage for the expected power level of the proposed converter, the current of the inductor and output voltage are read. If there is a change in the values of the input ports, the command to regulate the voltage at the output and the inductor current is applied through the microcontroller, and it produces a suitable pulse for the power switches based on the load requirement.Table 2
Experimental specifications.
ParametersStep-up modeStep-down modeInput voltage20 V100 VOutput voltage110 V33 VOutput power (Pout)120 W50 WFrequency (fs)50 kHz50 kHzDuty cycle (D1)0.60.4Duty cycle (D2, D3)0.40.6ComponentsCL200 V/220µFQ1, Q3, & Q2IRFP260NCapacitorsC1, C2, and C3200 V/220µFInductorsL1Ferric core (200µH)Coupled inductorFerric core (200µH, N = 2/1)Figure 8
Bode plod and controller scheme of the suggested converter: (a) frequency response in boost mode, (b) frequency response in buck mode, and (c) control loop of the suggested structure.
(a)(b)(c)


## 9. Experimental Results

This section presents the experimental results of the proposed bidirectional converter, to verify the mathematical equations and the effectiveness of the suggested topology. The specifications of the experimental prototype are given in Table2. The rated power in step-up mode operation is equal to 120 W, and the rated power in step-down operation is 50 W. The voltage conversion ratio in step-up mode is 20∼110 V, and in step-down mode is 100∼33 V. The results are presented in two subsections to demonstrate the step-up and step-down operations. The experimental prototype is added and is shown in Figure 9.Figure 9
Experimental prototype of the suggested converter.


### 9.1. Step-Up Operation Mode

The power switches’ gate PWM pulses are shown in Figures10(a)–10(c). According to these figures, when Q1 is turned on, Q2 and Q3 are turned off. The current waveform of L1 is depicted in Figure 11(a). Its peak-to-peak and average values are 8.5 A and 7.5 A, respectively. The voltage across C1, C2, and C3 is shown in Figures 11(b)–11(d), respectively. The voltage of C1 is obtained at 29 V. Additionally, VC2 and VC3 are 57 V and 50 V, respectively. These results verify equations (23)–(25). The experimental voltage waveforms of the power switches are demonstrated in Figures 12(a)–12(c). The peak voltage across Q1 is obtained at 50 V. Furthermore, based on Figures 12(a) and 12(b), the peak voltage over Q2 and Q3 is measured at 50 V and 97 V, respectively. The measured output voltage in step-up mode (VHigh) is shown in Figure 12(d). As can be seen in this figure, VHigh is obtained 108 V. Therefore, considering VLow = 20 V, the experimental step-up voltage gain is equal to 5.4. This result verifies the presented theoretical step-up voltage gain in equation (26).Figure 10
Gate pulses in step-up operation mode: (a)VG1, (b) VG2, and (c) VG3.
(a)(b)(c)Figure 11
Waveforms in step-up mode: (a)iL1, (b) VC1, (c) VC2, and (d) VC3.
(a)(b)(c)(d)Figure 12
Voltages in step-up operation: (a)VQ1, (b) VQ2, (c) VQ3, and (d) Vo.
(a)(b)(c)(d)


### 9.2. Step-Down Operation Mode

The power switches’ gate PWM pulses in step-down operation mode are shown in Figures13(a)–13(c). According to these figures, when Q1 is turned off, Q2 and Q3 are turned on, simultaneously. The current waveform of L1 is depicted in Figure 14(a). When Q1 is turned on, iL1 is reduced, linearly. The average value of iL1 is measured at 1.7 A, which is obtained lower than the step-up mode. The voltage waveforms of capacitors C1-C3 are shown in Figures 14(b)–14(d). According to these figures, the voltage across C1 is 22 V. Also, VC2 and VC3 are 44 V and 55 V, respectively, which verify the mathematical analysis of step-down mode related to capacitors voltages (equation (27)). Additionally, based on Figures 11 and 14, in both step-up and step-down operation modes, the voltage ripple across used capacitors is significantly low. The power switch’s voltage waveforms are demonstrated in Figures 15(a)–15(c). As can be seen in these figures, the voltages across power switches are obtained without spikes. Therefore, low-rated power switches can be used for the implementation of the proposed converter. The peak voltage across Q1 is measured at 55 V. Furthermore, the peak voltage over Q2 and Q3 is achieved at 55 V and 110 V. The output voltage in step-down mode (VLow) is depicted in Figure 15(d). Based on this figure, VLow is measured at 33 V. Therefore, equation (28) can be verified by this experimental waveform. Considering VHigh = 100 V, the experimental step-down voltage gain is equal to 0.33.Figure 13
Gate pulse in step-down operation: (a)VG1, (b) VG2, and (c) VG3.
(a)(b)(c)Figure 14
Waveforms in step-down operation: (a)iL1, (b) VC1, (c) VC2, and (d) VC3.
(a)(b)(c)(d)Figure 15
Waveforms in step-down operation: (a)VQ1, (b) VQ2, (c) VQ3, and (d) Vo.
(a)(b)(c)(d)Measured power efficiency in step-up and step-down operation modes is depicted in Figure16. In step-up mode, the lower efficiency is measured at 94.6% at 120 W, and maximum efficiency is obtained at 96.11% at 20 W. In step-down mode, the maximum efficiency is 94.43% at 50 W, and 92.79% is the lowest value. Based on the power losses analysis and the achieved result in the experimental section, the power losses calculation is presented in Table 3.Figure 16
Measured efficiency.Table 3
Power loss specification in the step-up and step-down modes based on efficiency calculation.
Step-up modeStep-down modePSwitches = 3.48 WPSwitches = 1.36 WPInductors = 2.05 WPInductors = 0.98 WPCapacitors = 1.31 WPCapacitors = 0.6 WTotal losses = 6.84 WTotal losses = 2.94 WRated power = 120 WRated power = 50 WAs described in previous sections, the suggested converter has a low-voltage port and a high-voltage port. This topology has the ability to operate in boost (discharging) and buck (charging) modes and share a bidirectional power flow between low-voltage and high-voltage ports. The main advantages of this converter are low component count, low volume, low cost, and high efficiency. The suggested converter can play an important role in supporting and recovering energy for the battery. In fact, this converter can transfer energy in two directions between two sources. The battery balances the transfer of energy between the load and the source. The voltage difference between the battery and the DC bus is high. Therefore, a bidirectional converter with high and low voltage conversion ratio is needed. Therefore, the recommended converter with mentioned features can be utilized as a supporting energy converter in EV with HESs applications. Considering the mathematical analysis and experimental results, the proposed converter has step-up and step-down operations, and bidirectional power flow is obtained. Additionally, high efficiency and low input current ripple make the presented converter sensible for EVs and renewable energy applications.


## 9.1. Step-Up Operation Mode

The power switches’ gate PWM pulses are shown in Figures10(a)–10(c). According to these figures, when Q1 is turned on, Q2 and Q3 are turned off. The current waveform of L1 is depicted in Figure 11(a). Its peak-to-peak and average values are 8.5 A and 7.5 A, respectively. The voltage across C1, C2, and C3 is shown in Figures 11(b)–11(d), respectively. The voltage of C1 is obtained at 29 V. Additionally, VC2 and VC3 are 57 V and 50 V, respectively. These results verify equations (23)–(25). The experimental voltage waveforms of the power switches are demonstrated in Figures 12(a)–12(c). The peak voltage across Q1 is obtained at 50 V. Furthermore, based on Figures 12(a) and 12(b), the peak voltage over Q2 and Q3 is measured at 50 V and 97 V, respectively. The measured output voltage in step-up mode (VHigh) is shown in Figure 12(d). As can be seen in this figure, VHigh is obtained 108 V. Therefore, considering VLow = 20 V, the experimental step-up voltage gain is equal to 5.4. This result verifies the presented theoretical step-up voltage gain in equation (26).Figure 10
Gate pulses in step-up operation mode: (a)VG1, (b) VG2, and (c) VG3.
(a)(b)(c)Figure 11
Waveforms in step-up mode: (a)iL1, (b) VC1, (c) VC2, and (d) VC3.
(a)(b)(c)(d)Figure 12
Voltages in step-up operation: (a)VQ1, (b) VQ2, (c) VQ3, and (d) Vo.
(a)(b)(c)(d)


## 9.2. Step-Down Operation Mode

The power switches’ gate PWM pulses in step-down operation mode are shown in Figures13(a)–13(c). According to these figures, when Q1 is turned off, Q2 and Q3 are turned on, simultaneously. The current waveform of L1 is depicted in Figure 14(a). When Q1 is turned on, iL1 is reduced, linearly. The average value of iL1 is measured at 1.7 A, which is obtained lower than the step-up mode. The voltage waveforms of capacitors C1-C3 are shown in Figures 14(b)–14(d). According to these figures, the voltage across C1 is 22 V. Also, VC2 and VC3 are 44 V and 55 V, respectively, which verify the mathematical analysis of step-down mode related to capacitors voltages (equation (27)). Additionally, based on Figures 11 and 14, in both step-up and step-down operation modes, the voltage ripple across used capacitors is significantly low. The power switch’s voltage waveforms are demonstrated in Figures 15(a)–15(c). As can be seen in these figures, the voltages across power switches are obtained without spikes. Therefore, low-rated power switches can be used for the implementation of the proposed converter. The peak voltage across Q1 is measured at 55 V. Furthermore, the peak voltage over Q2 and Q3 is achieved at 55 V and 110 V. The output voltage in step-down mode (VLow) is depicted in Figure 15(d). Based on this figure, VLow is measured at 33 V. Therefore, equation (28) can be verified by this experimental waveform. Considering VHigh = 100 V, the experimental step-down voltage gain is equal to 0.33.Figure 13
Gate pulse in step-down operation: (a)VG1, (b) VG2, and (c) VG3.
(a)(b)(c)Figure 14
Waveforms in step-down operation: (a)iL1, (b) VC1, (c) VC2, and (d) VC3.
(a)(b)(c)(d)Figure 15
Waveforms in step-down operation: (a)VQ1, (b) VQ2, (c) VQ3, and (d) Vo.
(a)(b)(c)(d)Measured power efficiency in step-up and step-down operation modes is depicted in Figure16. In step-up mode, the lower efficiency is measured at 94.6% at 120 W, and maximum efficiency is obtained at 96.11% at 20 W. In step-down mode, the maximum efficiency is 94.43% at 50 W, and 92.79% is the lowest value. Based on the power losses analysis and the achieved result in the experimental section, the power losses calculation is presented in Table 3.Figure 16
Measured efficiency.Table 3
Power loss specification in the step-up and step-down modes based on efficiency calculation.
Step-up modeStep-down modePSwitches = 3.48 WPSwitches = 1.36 WPInductors = 2.05 WPInductors = 0.98 WPCapacitors = 1.31 WPCapacitors = 0.6 WTotal losses = 6.84 WTotal losses = 2.94 WRated power = 120 WRated power = 50 WAs described in previous sections, the suggested converter has a low-voltage port and a high-voltage port. This topology has the ability to operate in boost (discharging) and buck (charging) modes and share a bidirectional power flow between low-voltage and high-voltage ports. The main advantages of this converter are low component count, low volume, low cost, and high efficiency. The suggested converter can play an important role in supporting and recovering energy for the battery. In fact, this converter can transfer energy in two directions between two sources. The battery balances the transfer of energy between the load and the source. The voltage difference between the battery and the DC bus is high. Therefore, a bidirectional converter with high and low voltage conversion ratio is needed. Therefore, the recommended converter with mentioned features can be utilized as a supporting energy converter in EV with HESs applications. Considering the mathematical analysis and experimental results, the proposed converter has step-up and step-down operations, and bidirectional power flow is obtained. Additionally, high efficiency and low input current ripple make the presented converter sensible for EVs and renewable energy applications.


## 10. Conclusion

In this article, a high step-up, step-down DC-DC converter based on the coupled inductor technique for EV applications with bidirectional features was proposed. In this converter, a two-winding coupled inductor increases the voltage gain in both step-up and step-down operation modes. The current ripple of the low voltage port is low, which can be suitable for renewable energy sources like PV-based systems. Due to the low number of components, the power efficiency of the suggested topology is higher than similar topologies. Additionally, the proposed converter uses only three bidirectional semiconductors with low-rated voltages, which reduces the cost and volume. To demonstrate the performance of the proposed bidirectional DC-DC converter, operation modes, steady state, and efficiency analysis were presented. A comparison between the suggested converter and other similar converters was provided. Finally, the experimental results in step-up and step-down operations were presented. In step-up operation, the experimental prototype is tested forfs = 50 kHz, VLow = 20 V, VHigh = 110 V, and rated power = 120 W, with 94.60% efficiency. Furthermore, VHigh is considered 100 V with VLow = 33 V and 94.43% efficiency at 50 W rated power in step-down mode operation. Thus, with mentioned features, the proposed converter is sensible for EVs and renewable energy applications.



---

*Source: 9277881-2023-03-09.xml*