# New OTRA-Based Generalized Impedance Simulator

Authors: Ashish Gupta; Raj Senani; D. R. Bhaskar; A. K. Singh
Journal: ISRN Electronics
 (2013)

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## Abstract

Operational transresistance amplifier (OTRA) has attracted considerable attention in the recent literature in several applications such as impedance simulation, universal biquad filter realization, realization of sinusoidal oscillators and multivibrators. However, to the best knowledge of the authors, any OTRA-based generalized impedance simulator circuits have not been reported so far. The purpose of this paper is to present such a circuit.


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## Body

## 1. Introduction

Although a large number of building blocks have been considered as an alternative to the classical voltage-mode operational amplifier (VOA) which suffers from the well-known disadvantage of gain-bandwidth conflict, the OTRA introduced in [1, 2] has been found to be particularly attractive in analog signal processing/signal generation due to the following advantageous features: transmission properties similar to the current feedback op-amp, lack of slew rate limitations as encountered in VOAs, and having two low-impedance inputs and one low-impedance output. The OTRA is a three-terminal analog building block defined by the following matrix equation:
(1)[V1V2Vo]=[000000Rm-Rm0][I1I2Io].The circuit symbol of the OTRA is shown in Figure1. In an OTRA, both input terminals are virtually grounded, and the output voltage is the difference between the two input currents multiplied by the transresistance gain Rm, such that
(2)Vo=Rm(I1-I2).Figure 1
Circuit symbol of the OTRA.Thus, both input and output terminals are characterized by low impedance, thereby eliminating response limitations incurred by capacitive time constants leading to circuits that are insensitive to the stray capacitances at the input terminals. For ideal operation, the transresistance gainRm approaches infinity forcing the input currents to be equal. Thus, the OTRA is employed in a negative feedback configuration in a way similar to the operational amplifiers.For discrete designs, the OTRA can be implemented using two current feedback operational amplifiers (CFOA) (see [3–5], and references cited therein) as shown in Figure 2. On the other hand, from the viewpoint of analog VLSI implementation, several high-performance CMOS OTRA realizations have also been introduced in the current literature for instance, see [1, 6, 7] and the references cited therein. An exemplary CMOS implementation from [6] is shown in Figure 3. The use of OTRAs has been widely investigated in a number of applications such as immitance simulators [3, 5, 8, 9], integrators [10], filters [11–22], square-wave generators [23], current-mode monostable multivibrators [24] and oscillators [4, 25, 26], to name a few.Figure 2
Implementation of an OTRA using two CFOAs.Figure 3
CMOS implementation of an OTRA [6].There have been few earlier attempts on simulating various kinds of impedances using OTRAs for instance, see [3, 5, 8, 9]. In [8], the authors have proposed six circuits for simulating ±L parallel with ±R and L and C parallel with ±R using single OTRA, under different conditions. In [3], the authors have proposed a circuit for simulating negative inductance with conditions. In [5], the authors have proposed the circuit for simulating ±L parallel with R using two OTRAs. In [9], two circuits each using two OTRAs along with one capacitor and five resistors are proposed to realize grounded inductors; however, both circuits require fulfilling a condition in terms of four resistors to realize lossless positive inductors. Recently, in [4] the present authors introduced new grounded frequency dependent negative resistance (FDNR) and grounded inductance simulation circuits each employing an operational transresistance amplifier (OTRA) alongwith two capacitors, two resistors and a voltage follower.The object of this paper is to introduce a new configuration that realizes positive generalized impedance simulator which has wider applications than the circuits reported earlier in [4]. The workability of the proposed circuit has been demonstrated through a number of application examples using discrete as well as CMOS implementations of the OTRAs.


## 2. The Proposed Generalized Positive Impedance Simulator

The proposed configuration is shown in Figure4. Assuming the OTRAs to be characterized by the equation Vp=Vn=0, and Vo=Rm(Ip-In) where Rm is the transresistance gain and considering the OTRAs to be ideal (i.e., Rm→∞), a routine analysis of the circuit gives the following expression for input impedance:
(3)Zin=Z1Z3Z5Z2Z4.Figure 4
Positive generalized impedance simulator.From (3) it is clear that by appropriate (resistive/capacitive) choice of impedances, the circuit can be easily used to realize an ideal inductor, frequency-dependent-negative resistance (FDNR) having Zin=1/Ds2 where D is known as supercapacitance, resistively-variable capacitance and frequency-dependent negative-capacitance (FDNC) having Zin=Ms2 where M is known as super-inductance.


### 2.1. Grounded Inductor

With the choice of impedanceZ2 or Z4 as a capacitor and the other impedances as resistors, the circuit of Figure 4 can realize a grounded inductor in two ways. (i) with Z1=R1, Z2=1/sC2, Z3=R3, Z4=R4 and  Z5=R5, the input impedance is given by Zin=sC2R1R3R5/R4 resulting in a simulated grounded inductor having L=C2R1R3R5/R4. (ii) with Z1=R1, Z2=R2, Z3=R3, Z4=1/sC4 and Z5=R5, the input impedance is given by Zin=sC4R1R3R5/R2 and the simulated grounded inductance has a value  L=C4R1R3R5/R2.


### 2.2. Grounded FDNR

With any two of the three impedancesZ1, Z3 and Z5 as capacitors, the circuit shown in Figure 4 can realize an FDNR in three ways. (i) with Z1=1/sC1, Z2=R2, Z3=R3, Z4=R4 and Z5=1/sC5, the input impedance is found to be Zin=R3/s2C1C5R2R4 and thus, the circuit realizes an ideal grounded FDNR (Z(s)=1/s2D, where, D=C1C5R2R4/R3). (ii) with Z1=R1, Z2=R2, Z3=1/sC3, Z4=R4 and Z5=1/sC5, the input impedance is found to be Zin=R1/s2C3C5R2R4 with D=C3C5R2R4/R1 and (iii) with Z1=1/sC1, Z2=R2, Z3=1/sC3, Z4=R4 and Z5=R5, the input impedance is found to be Zin=R5/s2C1C3R2R4 having D=C1C3R2R4/R5.


### 2.3. Resistively Variable Capacitor

Resistively variable capacitors have several applications in analog circuit design, for instance see [27, 28]. With any one of the three impedances Z1, Z3, and Z5 taken as a capacitor, the circuit of Figure 4 realizes a grounded resistively-variable-capacitor in three different ways: (i) with Z1=1/sC1, Z2=R2, Z3=R3, Z4=R4, and Z5=R5, the value of input impedance is found to be Zin=R3R5/sC1R2R4, realizing a resistively variable capacitor having Ceq=C1R2R4/R3R5 (ii) with Z1=R1, Z2=R2, Z3=1/sC3, Z4=R4, and Z5=R5, the input impedance is found to be Zin=R1R5/sC3R2R4 with Ceq=C3R2R4/R1R5, (iii) with Z1=R1, Z2=R2, Z3=R3, Z4=R4, and Z5=1/sC5 input impedance is Zin=R1R3/sC5R2R4 where Ceq=C5R2R4/R1R3. It is easy to see that in all cases, Ceq can be varied by a single variable resistance.


### 2.4. Grounded FDNC

With the values of the impedances taken asZ1=R1, Z2=1/sC2, Z3=R3, Z4=1/sC4 and Z5=R5, the value of input impedance is found to be Zin=s2C2C4R1R3R5. Thus, the circuit of Figure 4 realizes an FDNC whose M value is given by M=C2C4R1R3R5.


## 2.1. Grounded Inductor

With the choice of impedanceZ2 or Z4 as a capacitor and the other impedances as resistors, the circuit of Figure 4 can realize a grounded inductor in two ways. (i) with Z1=R1, Z2=1/sC2, Z3=R3, Z4=R4 and  Z5=R5, the input impedance is given by Zin=sC2R1R3R5/R4 resulting in a simulated grounded inductor having L=C2R1R3R5/R4. (ii) with Z1=R1, Z2=R2, Z3=R3, Z4=1/sC4 and Z5=R5, the input impedance is given by Zin=sC4R1R3R5/R2 and the simulated grounded inductance has a value  L=C4R1R3R5/R2.


## 2.2. Grounded FDNR

With any two of the three impedancesZ1, Z3 and Z5 as capacitors, the circuit shown in Figure 4 can realize an FDNR in three ways. (i) with Z1=1/sC1, Z2=R2, Z3=R3, Z4=R4 and Z5=1/sC5, the input impedance is found to be Zin=R3/s2C1C5R2R4 and thus, the circuit realizes an ideal grounded FDNR (Z(s)=1/s2D, where, D=C1C5R2R4/R3). (ii) with Z1=R1, Z2=R2, Z3=1/sC3, Z4=R4 and Z5=1/sC5, the input impedance is found to be Zin=R1/s2C3C5R2R4 with D=C3C5R2R4/R1 and (iii) with Z1=1/sC1, Z2=R2, Z3=1/sC3, Z4=R4 and Z5=R5, the input impedance is found to be Zin=R5/s2C1C3R2R4 having D=C1C3R2R4/R5.


## 2.3. Resistively Variable Capacitor

Resistively variable capacitors have several applications in analog circuit design, for instance see [27, 28]. With any one of the three impedances Z1, Z3, and Z5 taken as a capacitor, the circuit of Figure 4 realizes a grounded resistively-variable-capacitor in three different ways: (i) with Z1=1/sC1, Z2=R2, Z3=R3, Z4=R4, and Z5=R5, the value of input impedance is found to be Zin=R3R5/sC1R2R4, realizing a resistively variable capacitor having Ceq=C1R2R4/R3R5 (ii) with Z1=R1, Z2=R2, Z3=1/sC3, Z4=R4, and Z5=R5, the input impedance is found to be Zin=R1R5/sC3R2R4 with Ceq=C3R2R4/R1R5, (iii) with Z1=R1, Z2=R2, Z3=R3, Z4=R4, and Z5=1/sC5 input impedance is Zin=R1R3/sC5R2R4 where Ceq=C5R2R4/R1R3. It is easy to see that in all cases, Ceq can be varied by a single variable resistance.


## 2.4. Grounded FDNC

With the values of the impedances taken asZ1=R1, Z2=1/sC2, Z3=R3, Z4=1/sC4 and Z5=R5, the value of input impedance is found to be Zin=s2C2C4R1R3R5. Thus, the circuit of Figure 4 realizes an FDNC whose M value is given by M=C2C4R1R3R5.


## 3. Nonideal Analysis

Practically, the trans-resistance gain of an OTRA is finite and therefore the frequency limitations associated with the OTRA should be considered. Considering a single-pole model, the trans-resistance gain,Rm, can be expressed as
(4)Rm(s)=Ro11+(s/ωo)=Ro1ωos+ωo=1(s/Ro1ωo)+(1/Ro1),whereωo=1CpRo1.For(5)Ro1⟶∞,Rm(s)≅1sCp,whereRo1 is the DC transresistance gain and Cp is the parasitic capacitance. By straight forward analysis, the general expression for the input impedance of the positive generalized impedance simulator shown in Figure 4 (when the parasitic capacitance of the OTRA is taken into consideration as per (5)) is found to be
(6)Zin=Z1Z3Z5Z2Z4[s2Cp2Z2Z4+sCp(Z2+Z4)+1s2Cp2Z1Z5+sCp(Z1Z5/Z4)+1].Similarly, a still more generalized expression for the input impedance of the positive generalized impedance simulator shown in Figure4, when the finite output resistance (Ro, typically 15 Ω) and the parasitic capacitance (Cp, typically 5 pF) of the OTRA both were taken into consideration, has been found to be(7)Zin=Z1Z3Z5Z2Z4[s2Cp2(Z2Z4+RoZ2+RoZ4+Ro(Z2Z4/Z1)+Ro(Z2Z4/Z3)+Ro2+Ro2(Z2/Z3)+Ro2(Z4/Z1)+Ro2(Z2Z4/Z1Z3))+sCp(Z2+Z4+2Ro+Ro(Z2/Z3)+Ro(Z4/Z1))+1s2Cp2(Z1Z5+RoZ5+Ro(Z1Z5/Z2)+Ro(Z1Z5/Z4)+Ro2(Z5/Z2)+Ro2(Z1Z5/Z2Z4))+sCp((Z1Z5/Z4)+Ro(Z1Z5/Z2Z4))+1].It is now useful to consider the various special cases. However, to conserve space, we have dealt with only that realization in each case which has been found to be better than the other alternatives.


### 3.1. Grounded Inductor

WithZ1=R1, Z2=1/sC2, Z3=R3, Z4=R4 and Z5=R5 the expression for the input impedance, considering the non-idealities of OTRA, is found to be(8)Zin=sC2R1R3R5R4[s2Cp2RoR4(1+(Ro/R4)+(Ro/R1))+s[(Cp2/C2)R4(1+(Ro/R1)+(Ro/R3)+(Ro/R4)+(Ro2/R1R3)+(Ro2/R3R4))+CpRo(2+(R4/Ro)+(R4/R1))]+(Cp/C2)(1+(Ro/R3))+1s3Cp2C2RoR1R5(1+(Ro/R1)+(Ro/R4))+s2C2CpR1R5[(Ro/R4)+(Cp/C2)(1+(Ro/R1)+(Ro/R4))]+sCp(R1R5/R4)+1].It is obviously not very fruitful to try to make an equivalent nonideal circuit from the above mentioned because it not likely to give any insight about the effect of various parasitic impedances. However, ifZin(jω) is represented as Zin(jω)=Re{Zin(jω)}+jIm{Zin(jω)}=Req(ω)+jωLeq(ω), then it would be useful to know the frequency domain behavior of the real and imaginary parts from where we can infer to what extent (in magnitude) and up to what frequency, the non-ideal resistive part, (Re{Zin(jω)}) and the inductive part (Im{Zin(jω)}/ω) remain close to their intended design values. These plots obtained from SPICE simulations are shown in Figures 5 and 6, respectively, for the circuit designed by taking component values as C2=0.05 nF, R1=R3=R4=R5=7.07 KΩ, yielding the value of lossless grounded inductor to be L=2.5 mH.Figure 5
Variation of real part of input impedance,Zin(Req) with respect to  frequency, ω.Figure 6
Variation of inductance value (Leq) with respect to  frequency, ω.In order to simplify the expression of (8), we consider the following assumptions:
(9)(i)ω3C2Cp2RoR1R5(1+RoR1+RoR4)≪1,(ii)ω2Cp2RoR4(1+RoR1+RoR4)≪1,ω2C2CpR1R5[RoR4+CpC2(1+RoR1+RoR4)]≪1.The simplified expression for the input resistance (Zin) from (8), after making the previous assumptions, is found to be(10)Zin=sC2R1R3R5R4[1+(Cp/C2)(1+(Ro/R3))+sCpRo(2+(R4/Ro)+(R4/R1))+s(Cp2R4/C2)(1+(Ro/R1)+(Ro/R3)+(Ro/R4)+(Ro2/R1R3)+Ro2/(R3R4))][1+sCp(R1R5/R4)].Z
in can now be expressed in the following form:
(11)Zin=R(ω)+jωL(ω),where(12)R(ω)=C2R1R3R5R4ω2(ατ2-τ1)1+ω2τ22,(13)L(ω)=C2R1R3R5R4(α+ω2τ1τ2)1+ω2τ22,with(14)τ1=CpRo(2+R4Ro+R4R1)τ1=+Cp2R4C2(1+RoR1+RoR3+RoR4+Ro2R1R3+Ro2R3R4),τ2=Cp(R1R5R4),α=1+CpC2(1+RoR3).From (13), the appropriate non-ideal value of the inductor simulated by the circuit (at ω=0) is found to be
(15)L(ω)=C2R1R3R5R4[1+CpC2(1+RoR3)].Thus, it is seen that due to the non-ideal effects, the actual value of the simulated inductor would be slightly more than the intended value. Furthermore, (15) can also be used to obtain a predistorted design of the circuit utilizing known values of Cp and Ro.From the plots shown in Figures5 and 6 it is found that the resistive part remains nearly zero ohms as required, showing a value of 14.5 Ω at a frequency of 0.795 MHz and remains very small up to a frequency of about 10 MHz whereas the inductive part shows L=2.759 mH as also predicted by the theoretical formula of (15) which remains almost invariant till a frequency of about 10 MHz. Hence, the usable frequency range of the circuit is till about 10 MHz.


### 3.2. Grounded FDNR

WithZ1=R1, Z2=R2, Z3=1/sC3, Z4=R4 and Z5=1/sC5 the expression for the input impedance considering the non-idealities of OTRA is found to be(16)Zin=R1s2C3C5R2R4[s3Cp2C3RoR2R4(1+(Ro/R1)+(Ro/R4))+s2[Cp2R2R4(1+(Ro/R1)+(Ro/R2)+(Ro/R4)+(Ro2/R1R2)+(Ro2/R2R4))+CpC3RoR2]+sCpRo(2+(R2/Ro)+(R4/Ro)+(R4/R1))+1s(Cp2/C5)Ro(1+(Ro/R2))(1+(R1/Ro)+(R1/R4))+(CpR1/C5R4)(1+(Ro/R2))+1].From (16) it can be shown that Zin(jω) can be expressed as Zin(jω)=(1/jωCeq)-(1/ω2Deq). From SPICE simulations we have extracted plots showing variation of Deq(ω) and Ceq(ω) as functions of frequency, ω which are shown respectively in Figures 7 and 8, for component values taken as C1=C5=0.22 nF and R2=R3=R4=1 KΩ, resulting in an ideal value of D=4.84×10-17 Ω.Figure 7
Variation of real part of input impedance,Zin(Deq) with respect to  frequency, ω.Figure 8
Variation of imaginary part of input impedance,Zin(Ceq) with respect to  frequency, ω.From the plots shown in Figures7 and 8 it is found that the resistive part remains nearly constant showing a value of Deq=4.952×10-17 Ω (as required) up to a frequency of about 10 MHz whereas the equivalent capacitive value is Ceq=4.895 nF (as also verified by the theoretical formula) which remains almost invariant till a frequency of 10 MHz. Hence, the usable frequency range of the circuit as an FDNR is till about 10 MHz.


### 3.3. Resistively-Variable Capacitor

WithZ1=R1, Z2=R2, Z3=R3, Z4=R4 and Z5=1/sC5 the expression for the input impedance considering the non-idealities of OTRA was found to be (17)Zin=R1R3sC5R2R4[s2Cp2[Ro2+RoR2(1+(Ro/R3))+RoR4(1+(Ro/R1))+R2R4(1+(Ro/R1)+(Ro/R3)+(Ro2/R1R3))(1+(Ro/R1)+(Ro/R3)+(Ro2/R1R3))]+sCpRo[2+(R2/Ro)+(R4/Ro)+(R2/R3)+(R4/R1)]+1s(Cp2/C5)[(1+(Ro/R2))(Ro+R1+(RoR1/R4))]+(CpR1/C5R4)(1+(Ro/R2))+1].From (17) it can be shown that Zin(jω) can be expressed as Zin(jω)=(1/jωCeq)+(Req). From SPICE simulations we have extracted plots showing variation of Req(ω) and Ceq(ω) as function of frequency (ω) which are shown respectively in Figures 9 and 10, with component values taken as R1=R2=R3=R4=1 KΩ and C5=1 nF, with ideal value of Ceq=1 nF.Figure 9
Variation of Real Part of Input Impedance,Zin(Req) with respect to  Frequency, ω.Figure 10
Variation of Imaginary Part of Input Impedance,Zin(Ceq) with respect to  Frequency, ω.From the plots shown in Figures9 and 10 it is found that the resistive part remains nearly constant showing a value of Req=5.2475 Ω (which is quite small) up to a frequency of about 10 MHz whereas the equivalent capacitive value is Ceq=1.01 nF (as also verified by the theoretical formula) which remains almost invariant till a frequency of 10 MHz. Hence, the usable frequency range of the circuit is till about 10 MHz.


### 3.4. Grounded FDNC

WithZ1=R1, Z2=1/sC2, Z3=R3, Z4=1/sC4 and Z5=R5 the expression for the input impedance considering the non-idealities of OTRA was found to be(18)Zin=s2C2C4R1R3R5[s2Cp2Ro2+sCpRo[(Cp/C2)(1+(Ro/R3))+(Cp/C4)(1+(Ro/R1))+2]+[1+(Cp/C2)(1+(Ro/R3))][1+(Cp/C4)(1+(Ro/R1))]s4Cp2C2C4Ro2R1R5+s3CpC2C4RoR1R5[(1+(Cp/C2))+(Cp/C4)(1+(Ro/R1))]+s2CpC4R1R5[1+(Cp/C4)(1+(Ro/R1))]+1].From (18) it can be shown that Zin(jω) can be expressed as Zin(jω)=(-ω2Meq)+jω(Leq). From SPICE simulations we have extracted plots showing variation of Meq(ω) and Leq(ω) as function of frequency (ω) which is shown respectively in Figures 11 and 12, with component values taken as C2=C4=0.001 μF, R1=R3=R5=10 KΩ yielding an ideal value of M=1×10-6 Ω.Figure 11
Frequency Response of the Band Pass Filter using a simulated inductor realized from the configuration of Figure4 has to be replaced by Variation of Real Part of Input Impedance, Zin(Meq) with respect to Frequency, ω.Figure 12
Variation of real part of input impedance,Zin(Meq) with respect to  frequency, ω has to be replaced by Variation of imaginary part of input impedance, Zin(Leq) with respect to frequency, ω.From the plots shown in Figures11 and 12 it is found that the resistive part remains nearly constant showing a value of Meq=1.024×10-6 Ω (which is almost negligible) up to a frequency of about 10 MHz. Hence, the usable frequency range of the circuit is till about 10 MHz.


## 3.1. Grounded Inductor

WithZ1=R1, Z2=1/sC2, Z3=R3, Z4=R4 and Z5=R5 the expression for the input impedance, considering the non-idealities of OTRA, is found to be(8)Zin=sC2R1R3R5R4[s2Cp2RoR4(1+(Ro/R4)+(Ro/R1))+s[(Cp2/C2)R4(1+(Ro/R1)+(Ro/R3)+(Ro/R4)+(Ro2/R1R3)+(Ro2/R3R4))+CpRo(2+(R4/Ro)+(R4/R1))]+(Cp/C2)(1+(Ro/R3))+1s3Cp2C2RoR1R5(1+(Ro/R1)+(Ro/R4))+s2C2CpR1R5[(Ro/R4)+(Cp/C2)(1+(Ro/R1)+(Ro/R4))]+sCp(R1R5/R4)+1].It is obviously not very fruitful to try to make an equivalent nonideal circuit from the above mentioned because it not likely to give any insight about the effect of various parasitic impedances. However, ifZin(jω) is represented as Zin(jω)=Re{Zin(jω)}+jIm{Zin(jω)}=Req(ω)+jωLeq(ω), then it would be useful to know the frequency domain behavior of the real and imaginary parts from where we can infer to what extent (in magnitude) and up to what frequency, the non-ideal resistive part, (Re{Zin(jω)}) and the inductive part (Im{Zin(jω)}/ω) remain close to their intended design values. These plots obtained from SPICE simulations are shown in Figures 5 and 6, respectively, for the circuit designed by taking component values as C2=0.05 nF, R1=R3=R4=R5=7.07 KΩ, yielding the value of lossless grounded inductor to be L=2.5 mH.Figure 5
Variation of real part of input impedance,Zin(Req) with respect to  frequency, ω.Figure 6
Variation of inductance value (Leq) with respect to  frequency, ω.In order to simplify the expression of (8), we consider the following assumptions:
(9)(i)ω3C2Cp2RoR1R5(1+RoR1+RoR4)≪1,(ii)ω2Cp2RoR4(1+RoR1+RoR4)≪1,ω2C2CpR1R5[RoR4+CpC2(1+RoR1+RoR4)]≪1.The simplified expression for the input resistance (Zin) from (8), after making the previous assumptions, is found to be(10)Zin=sC2R1R3R5R4[1+(Cp/C2)(1+(Ro/R3))+sCpRo(2+(R4/Ro)+(R4/R1))+s(Cp2R4/C2)(1+(Ro/R1)+(Ro/R3)+(Ro/R4)+(Ro2/R1R3)+Ro2/(R3R4))][1+sCp(R1R5/R4)].Z
in can now be expressed in the following form:
(11)Zin=R(ω)+jωL(ω),where(12)R(ω)=C2R1R3R5R4ω2(ατ2-τ1)1+ω2τ22,(13)L(ω)=C2R1R3R5R4(α+ω2τ1τ2)1+ω2τ22,with(14)τ1=CpRo(2+R4Ro+R4R1)τ1=+Cp2R4C2(1+RoR1+RoR3+RoR4+Ro2R1R3+Ro2R3R4),τ2=Cp(R1R5R4),α=1+CpC2(1+RoR3).From (13), the appropriate non-ideal value of the inductor simulated by the circuit (at ω=0) is found to be
(15)L(ω)=C2R1R3R5R4[1+CpC2(1+RoR3)].Thus, it is seen that due to the non-ideal effects, the actual value of the simulated inductor would be slightly more than the intended value. Furthermore, (15) can also be used to obtain a predistorted design of the circuit utilizing known values of Cp and Ro.From the plots shown in Figures5 and 6 it is found that the resistive part remains nearly zero ohms as required, showing a value of 14.5 Ω at a frequency of 0.795 MHz and remains very small up to a frequency of about 10 MHz whereas the inductive part shows L=2.759 mH as also predicted by the theoretical formula of (15) which remains almost invariant till a frequency of about 10 MHz. Hence, the usable frequency range of the circuit is till about 10 MHz.


## 3.2. Grounded FDNR

WithZ1=R1, Z2=R2, Z3=1/sC3, Z4=R4 and Z5=1/sC5 the expression for the input impedance considering the non-idealities of OTRA is found to be(16)Zin=R1s2C3C5R2R4[s3Cp2C3RoR2R4(1+(Ro/R1)+(Ro/R4))+s2[Cp2R2R4(1+(Ro/R1)+(Ro/R2)+(Ro/R4)+(Ro2/R1R2)+(Ro2/R2R4))+CpC3RoR2]+sCpRo(2+(R2/Ro)+(R4/Ro)+(R4/R1))+1s(Cp2/C5)Ro(1+(Ro/R2))(1+(R1/Ro)+(R1/R4))+(CpR1/C5R4)(1+(Ro/R2))+1].From (16) it can be shown that Zin(jω) can be expressed as Zin(jω)=(1/jωCeq)-(1/ω2Deq). From SPICE simulations we have extracted plots showing variation of Deq(ω) and Ceq(ω) as functions of frequency, ω which are shown respectively in Figures 7 and 8, for component values taken as C1=C5=0.22 nF and R2=R3=R4=1 KΩ, resulting in an ideal value of D=4.84×10-17 Ω.Figure 7
Variation of real part of input impedance,Zin(Deq) with respect to  frequency, ω.Figure 8
Variation of imaginary part of input impedance,Zin(Ceq) with respect to  frequency, ω.From the plots shown in Figures7 and 8 it is found that the resistive part remains nearly constant showing a value of Deq=4.952×10-17 Ω (as required) up to a frequency of about 10 MHz whereas the equivalent capacitive value is Ceq=4.895 nF (as also verified by the theoretical formula) which remains almost invariant till a frequency of 10 MHz. Hence, the usable frequency range of the circuit as an FDNR is till about 10 MHz.


## 3.3. Resistively-Variable Capacitor

WithZ1=R1, Z2=R2, Z3=R3, Z4=R4 and Z5=1/sC5 the expression for the input impedance considering the non-idealities of OTRA was found to be (17)Zin=R1R3sC5R2R4[s2Cp2[Ro2+RoR2(1+(Ro/R3))+RoR4(1+(Ro/R1))+R2R4(1+(Ro/R1)+(Ro/R3)+(Ro2/R1R3))(1+(Ro/R1)+(Ro/R3)+(Ro2/R1R3))]+sCpRo[2+(R2/Ro)+(R4/Ro)+(R2/R3)+(R4/R1)]+1s(Cp2/C5)[(1+(Ro/R2))(Ro+R1+(RoR1/R4))]+(CpR1/C5R4)(1+(Ro/R2))+1].From (17) it can be shown that Zin(jω) can be expressed as Zin(jω)=(1/jωCeq)+(Req). From SPICE simulations we have extracted plots showing variation of Req(ω) and Ceq(ω) as function of frequency (ω) which are shown respectively in Figures 9 and 10, with component values taken as R1=R2=R3=R4=1 KΩ and C5=1 nF, with ideal value of Ceq=1 nF.Figure 9
Variation of Real Part of Input Impedance,Zin(Req) with respect to  Frequency, ω.Figure 10
Variation of Imaginary Part of Input Impedance,Zin(Ceq) with respect to  Frequency, ω.From the plots shown in Figures9 and 10 it is found that the resistive part remains nearly constant showing a value of Req=5.2475 Ω (which is quite small) up to a frequency of about 10 MHz whereas the equivalent capacitive value is Ceq=1.01 nF (as also verified by the theoretical formula) which remains almost invariant till a frequency of 10 MHz. Hence, the usable frequency range of the circuit is till about 10 MHz.


## 3.4. Grounded FDNC

WithZ1=R1, Z2=1/sC2, Z3=R3, Z4=1/sC4 and Z5=R5 the expression for the input impedance considering the non-idealities of OTRA was found to be(18)Zin=s2C2C4R1R3R5[s2Cp2Ro2+sCpRo[(Cp/C2)(1+(Ro/R3))+(Cp/C4)(1+(Ro/R1))+2]+[1+(Cp/C2)(1+(Ro/R3))][1+(Cp/C4)(1+(Ro/R1))]s4Cp2C2C4Ro2R1R5+s3CpC2C4RoR1R5[(1+(Cp/C2))+(Cp/C4)(1+(Ro/R1))]+s2CpC4R1R5[1+(Cp/C4)(1+(Ro/R1))]+1].From (18) it can be shown that Zin(jω) can be expressed as Zin(jω)=(-ω2Meq)+jω(Leq). From SPICE simulations we have extracted plots showing variation of Meq(ω) and Leq(ω) as function of frequency (ω) which is shown respectively in Figures 11 and 12, with component values taken as C2=C4=0.001 μF, R1=R3=R5=10 KΩ yielding an ideal value of M=1×10-6 Ω.Figure 11
Frequency Response of the Band Pass Filter using a simulated inductor realized from the configuration of Figure4 has to be replaced by Variation of Real Part of Input Impedance, Zin(Meq) with respect to Frequency, ω.Figure 12
Variation of real part of input impedance,Zin(Meq) with respect to  frequency, ω has to be replaced by Variation of imaginary part of input impedance, Zin(Leq) with respect to frequency, ω.From the plots shown in Figures11 and 12 it is found that the resistive part remains nearly constant showing a value of Meq=1.024×10-6 Ω (which is almost negligible) up to a frequency of about 10 MHz. Hence, the usable frequency range of the circuit is till about 10 MHz.


## 4. Application Examples

To verify the workability of the proposed structure we now show some sample application circuits and their verification using SPICE simulations.


### 4.1. Grounded Inductor

With the values of components chosen asC2=0.05 nF, R1=R3=R4=R5=7.07 KΩ, the simulated lossless grounded inductor has a value of 2.5 mH. The simulated ideal grounded inductor realized using positive generalized impedance simulator circuit shown in Figure 4 is used to design a Second-order band pass filter shown in Figure 13 (having R=14.145 KΩ and C=12.489 pF) for which the transfer function is given by
(19)VoVin=s(1/CR)s2+s(1/CR)+(1/LC).Figure 13
Variation of imaginary part of input impedance,Zin(Leq) with respect to radian frequency, ω has to be replaced by Second-order passive RLC band pass filter.The circuit realizes a Second-order band pass filter for which the filter parameters are given by: (i) center frequencyfo=1/2πLC and (ii) bandwidth ωo/Q=1/CR. With the choice of impedances as Z1=R1, Z3=R3, Z4=R4, Z5=R5 and Z2=1/sC2 the input impedance of grounded inductor was found to be L=C2R1R3R5/R4 resulting in the value of filter parameters as: (i) fo=(1/2π)R4/CC2R1R3R5 and (ii) ωo/Q=1/CR.A Second-order band pass filter having a center frequency offo=897.443 KHz, BW=1.02584 MHz and Q=0.89 was realized using this inductor by using the component values as C2=0.05 nF, R1=R3=R4=R5=7.07 KΩ. The OTRA was implemented using AD844 type CFOAs as per the schematic of Figure  2 of [4]. The experimentally observed frequency response is shown in Figure 14 which confirms the workability of the circuit as a band pass filter.Figure 14
Second-order passive RLC band pass filter has to be replaced by Frequency Response of the Band Pass Filter using a simulated inductor realized from the configuration of Figure4.


### 4.2. Grounded FDNR

This was used to realize a Second-order low pass filter consisting of a series RC branch (havingRo=0.09 KΩ and Co=1 nF) and FDNR (having D=4.84×10-17 Ω with the choice of components taken as C1=0.22 nF, R2=1 KΩ, R3=1 KΩ and R4=1 KΩ, C5=0.22 nF) with the previous values for the FDNR in shunt arm to have a cut-off frequency of fo=1. 5886 MHz.The simulated lossless grounded FDNR was used to design a Second-order low pass filter shown in Figure15 for which the transfer function is given by
(20)VoVin=(1/DR)s2+s(1/CR)+(1/DR).Figure 15
Second-order passive RCD low pass filter.The transfer function thus obtained realizes a Second-order low-pass filter for which the filter parameters are found to be: (i) cut-off frequencyfo=1/2πDR and (ii) quality factor Q=CR/D. With the choice of impedances as Z1=1/sC1, Z3=R3, Z4=R4, Z5=1/sC5 and Z2=R2 the input impedance of an ideal grounded FDNR is given by D=C1C5R2R4/R3 resulting in the value of filter parameters as: (i) fo=(1/2π)R3/C1C5RR2R4 and (ii) Q=CRR3/C1C5R2R4.The SPICE generated frequency response using a CMOS implementation of the OTRA (taken from Figure  6 of [6] with 0.5 μm CMOS process parameters and aspect ratios of MOSFETs as given in Table  2 therein of [6]) is shown in Figure 16, which confirms the validity of the FDNR realization.Figure 16
SPICE generated frequency response of low pass filter.


### 4.3. Resistively-Variable Capacitor

This simulated capacitor was used to realize a variable cut-off frequency first order RC low pass (LP) filter circuit whose cut-off frequency was linearly controlled by varying the resistanceR5. The simulated capacitor realized using positive generalized impedance simulator circuit shown in Figure 4 was used to design a first order low pass filter circuit shown in Figure 17 for which the transfer function is given by
(21)VoVin=11+sCR.Figure 17
First-order passive RC low pass filter.The transfer function thus obtained realizes a first order low pass filter for which the cut-off frequency isfo=1/2πCeqR. With the choice of impedances as Z1=1/sC1, Z3=R3, Z4=R4, Z5=R5 and Z2=R2 the input impedance of resistively-variable capacitor gives Ceq=C1R2R4/R3R5 resulting in the value of filter cut-off frequency as fo=(1/2π)(R3R5/C1RR2R4). For values of R5 as 100 Ω, 1 KΩ and 10 KΩ the cut-off frequency is found to be 3.3524 KHz, 23.019 KHz and 188.159 KHz respectively. The simulation results are shown in Figure 18, which therefore confirm the realizability of the resistively variable capacitance.Figure 18
Frequency response of low pass filter with variable cut-off frequency.


### 4.4. Grounded FDNC

The FDNC was tested as a resonator as shown in Figure19 obtained by shunting it with a resistor R resulting in resonant frequency given by f0=(1/2π)R/C2C4R1R3R5. With component values C2=C4=0.001 μF and R=R1=R3=R5=10 KΩ, the SPICE simulation results showed a resonant frequency of 15.625 KHz which is in good agreement with the theoretical value of fo=15.9 KHz as shown in Figure 20.Figure 19
FDNC as a resonator.Figure 20
Simulation result of FDNC as a resonator.The applications and the simulation results described earlier, thus, confirm the practical validity of the various modes of operation of the proposed configuration.


## 4.1. Grounded Inductor

With the values of components chosen asC2=0.05 nF, R1=R3=R4=R5=7.07 KΩ, the simulated lossless grounded inductor has a value of 2.5 mH. The simulated ideal grounded inductor realized using positive generalized impedance simulator circuit shown in Figure 4 is used to design a Second-order band pass filter shown in Figure 13 (having R=14.145 KΩ and C=12.489 pF) for which the transfer function is given by
(19)VoVin=s(1/CR)s2+s(1/CR)+(1/LC).Figure 13
Variation of imaginary part of input impedance,Zin(Leq) with respect to radian frequency, ω has to be replaced by Second-order passive RLC band pass filter.The circuit realizes a Second-order band pass filter for which the filter parameters are given by: (i) center frequencyfo=1/2πLC and (ii) bandwidth ωo/Q=1/CR. With the choice of impedances as Z1=R1, Z3=R3, Z4=R4, Z5=R5 and Z2=1/sC2 the input impedance of grounded inductor was found to be L=C2R1R3R5/R4 resulting in the value of filter parameters as: (i) fo=(1/2π)R4/CC2R1R3R5 and (ii) ωo/Q=1/CR.A Second-order band pass filter having a center frequency offo=897.443 KHz, BW=1.02584 MHz and Q=0.89 was realized using this inductor by using the component values as C2=0.05 nF, R1=R3=R4=R5=7.07 KΩ. The OTRA was implemented using AD844 type CFOAs as per the schematic of Figure  2 of [4]. The experimentally observed frequency response is shown in Figure 14 which confirms the workability of the circuit as a band pass filter.Figure 14
Second-order passive RLC band pass filter has to be replaced by Frequency Response of the Band Pass Filter using a simulated inductor realized from the configuration of Figure4.


## 4.2. Grounded FDNR

This was used to realize a Second-order low pass filter consisting of a series RC branch (havingRo=0.09 KΩ and Co=1 nF) and FDNR (having D=4.84×10-17 Ω with the choice of components taken as C1=0.22 nF, R2=1 KΩ, R3=1 KΩ and R4=1 KΩ, C5=0.22 nF) with the previous values for the FDNR in shunt arm to have a cut-off frequency of fo=1. 5886 MHz.The simulated lossless grounded FDNR was used to design a Second-order low pass filter shown in Figure15 for which the transfer function is given by
(20)VoVin=(1/DR)s2+s(1/CR)+(1/DR).Figure 15
Second-order passive RCD low pass filter.The transfer function thus obtained realizes a Second-order low-pass filter for which the filter parameters are found to be: (i) cut-off frequencyfo=1/2πDR and (ii) quality factor Q=CR/D. With the choice of impedances as Z1=1/sC1, Z3=R3, Z4=R4, Z5=1/sC5 and Z2=R2 the input impedance of an ideal grounded FDNR is given by D=C1C5R2R4/R3 resulting in the value of filter parameters as: (i) fo=(1/2π)R3/C1C5RR2R4 and (ii) Q=CRR3/C1C5R2R4.The SPICE generated frequency response using a CMOS implementation of the OTRA (taken from Figure  6 of [6] with 0.5 μm CMOS process parameters and aspect ratios of MOSFETs as given in Table  2 therein of [6]) is shown in Figure 16, which confirms the validity of the FDNR realization.Figure 16
SPICE generated frequency response of low pass filter.


## 4.3. Resistively-Variable Capacitor

This simulated capacitor was used to realize a variable cut-off frequency first order RC low pass (LP) filter circuit whose cut-off frequency was linearly controlled by varying the resistanceR5. The simulated capacitor realized using positive generalized impedance simulator circuit shown in Figure 4 was used to design a first order low pass filter circuit shown in Figure 17 for which the transfer function is given by
(21)VoVin=11+sCR.Figure 17
First-order passive RC low pass filter.The transfer function thus obtained realizes a first order low pass filter for which the cut-off frequency isfo=1/2πCeqR. With the choice of impedances as Z1=1/sC1, Z3=R3, Z4=R4, Z5=R5 and Z2=R2 the input impedance of resistively-variable capacitor gives Ceq=C1R2R4/R3R5 resulting in the value of filter cut-off frequency as fo=(1/2π)(R3R5/C1RR2R4). For values of R5 as 100 Ω, 1 KΩ and 10 KΩ the cut-off frequency is found to be 3.3524 KHz, 23.019 KHz and 188.159 KHz respectively. The simulation results are shown in Figure 18, which therefore confirm the realizability of the resistively variable capacitance.Figure 18
Frequency response of low pass filter with variable cut-off frequency.


## 4.4. Grounded FDNC

The FDNC was tested as a resonator as shown in Figure19 obtained by shunting it with a resistor R resulting in resonant frequency given by f0=(1/2π)R/C2C4R1R3R5. With component values C2=C4=0.001 μF and R=R1=R3=R5=10 KΩ, the SPICE simulation results showed a resonant frequency of 15.625 KHz which is in good agreement with the theoretical value of fo=15.9 KHz as shown in Figure 20.Figure 19
FDNC as a resonator.Figure 20
Simulation result of FDNC as a resonator.The applications and the simulation results described earlier, thus, confirm the practical validity of the various modes of operation of the proposed configuration.


## 5. Conclusions

A new generalized positive (it is interesting to point out that a generalized negative impedance simulator using OTRAs can be devised by interchanging the input terminals of OTRA1 and leaving the p-terminal of the same OTRA open with impedance Z4 used in the feedback path with impedance Z5 connected to the negative terminal. The performance, evaluation, and application of this circuit are, however, a matter of continuing investigations) impedance simulator using OTRAs was presented and its various applications were confirmed by hardware implementation of OTRAs using commercially available AD844-type CFOAs as well as a CMOS implementation of OTRA known earlier.It is worth pointing out that with CMOS OTRAs and MOS capacitors, the special cases of the proposed configuration can be made completely compatible with CMOS technology by replacing CMOS voltage-controlled resistances (VCRs) in which case, thefloating nature of the resistors employed would not create any difficulty since it is well known that grounded and  floating VCRs both can be realized with exactly the same number of MOSFETs; for instance, see [29–31].It is expected that the proposed configuration may find useful applications in the design of analog filters and oscillator design as well as in higher order filter design using methods based upon impedance simulation.



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*Source: 907597-2013-05-09.xml*