# A Novel Soft-Switching Synchronous Buck Converter for Portable Applications

Authors: Anup Kumar Panda; Swapnajit Pattnaik; K. K. Mohapatra
Journal: International Journal of Power Management Electronics
 (2008)

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## Abstract

This paper proposes a zero-voltage-transition (ZVT) pulse-width-modulated (PWM) synchronous buck converter, which is designed to operate at low voltage and high efficiency typically required for portable systems. A new passive auxiliary circuit that allows the main switch to operate with zero-voltage switching has been incorporated in the conventional PWM synchronous buck converter. The operation principles and a detailed steady-state analysis of the ZVT-PWM synchronous converter implemented with the auxiliary circuit are presented. Besides, the main switch and all of the semiconductor devices operate under soft-switching conditions. Thus, the auxiliary circuit provides a larger overall efficiency. The feasibility of the auxiliary circuit is confirmed by simulation and experimental results.


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## Body

## 1. Introduction

Current trends in consumer
electronics demand progressively lower-voltage supplies. Portable electronics
equipment, such as laptop computers, cellular phones, and future microprocessor and memory chips, requires low-power circuitry to maximize battery run time. Because of significantly lower conduction losses, synchronous rectifiers are now used in essentially all low-voltage DC power
supplies [1–4]. A synchronous
rectifier is an electronic switch that improves power-conversion efficiency by
placing a low-resistance conduction path across the diode rectifier in a
switch-mode regulator. MOSFETs usually serve this purpose.However, higher input
voltages and lower output voltages have brought about very low duty cycles,
increasing switching losses and decreasing conversion efficiency. So in this paper, we have optimized
the efficiency of the synchronous buck converter by eliminating switching
losses using soft-switching technique. The voltage-mode soft-switching method that has attracted most interest in
recent years is the zero-voltage transition [5–24]. This is because of its low additional conduction
losses and because its operation is closest to the PWM converters. The
auxiliary circuit of the ZVT converters is activated just before the main
switch is turned on and ceases after it is accomplished. The auxiliary circuit components in this
circuit have lower ratings than those in the main power circuit because the
auxiliary circuit is active for only a fraction of the switching cycle; this
allows a device that can turn on with fewer switching losses than the main
switch to be used as the auxiliary switch. The improvement in efficiency caused
by the auxiliary circuit is mainly due to the difference in switching losses
between the auxiliary switch and the main power switch if it were to operate
without the help of the auxiliary circuit. Previously proposed ZVT-PWM
converters have at least one of the following key drawbacks. (i) The auxiliary
switch is turned off while it is conducting current. This causes the switching losses and EMI to appear, which offsets the benefits of using the auxiliary circuit. In converters such as the ones proposed in [6, 12, 15, 16], the turnoff is very hard. (ii) The auxiliary circuit causes the main
converter switch to operate with a higher peak current stress and with more
circulating current. This results in the need for a higher current-rated device
for the main switch and an increase in conduction losses. The converters proposed in [5, 8, 9, 13, 14, 17] are having
high current stresses on the main switch. (iii) The auxiliary circuit
components have high voltage and/or current stresses, such as converters
proposed in [5, 8, 9, 14, 17]. The converter proposed in [23] reduces
the current stress on the main switch, but the circuit is very complex. (iv) In
addition, most active circuits are seriously criticized due to their
complexity, high cost, difficult control, large circulating energy, excessive
voltage and current stresses, and also narrow line and load ranges. Additionally,
it has been reported that the passive circuits are cheaper and more reliable and
have a higher performance/cost ratio than the active ones [25, 26].Reducing switching losses for low-power
circuit such as synchronous buck is not known to be present in the literatures
[1–26]. The
converter shown in Figure 1 is designed for a low-voltage, high-current circuit,
and it is found to be highly efficient. Hence, this paper presents a new class
of ZVT synchronous buck converters. By using a resonant auxiliary network, the proposed converters achieve zero-voltage switching for the main switch and synchronous switch, and
zero-current switching for the auxiliary switch without increasing their
voltage and current stresses.Figure 1
The proposed synchronous buck converter.The
paper is organized as follows. Section2 gives a short description of the
proposed circuit followed by a review of the various modes of operation with
their key waveforms and the representation of their equivalent operation modes
and analysis. Section 3 presents the design considerations and Section 4
includes basic features of the converter. Section 5 includes simulation and
experimental results to illustrate the features of the proposed converter
scheme. Section 6 includes some conclusions.


## 2. The ZVT-PWM Synchronous Buck Converter

### 2.1. Circuit Description and Assumption

The ZVT-PWM synchronous buck
converter is shown in Figure1. It is the combination of the conventional PWM
synchronous buck converter and the proposed auxiliary snubber circuit. The
auxiliary circuit consists of a resonant inductor Lr, resonant
capacitor Cr, a buffer capacitor Cb, and three auxiliary Schottky
diodes DS1, DS2, and DS3. Body diodes of main
switch S and synchronous switch S1 are also utilized in this
converter.To analyze the steady-state
operations of the proposed circuit, the following assumptions are made during
one switching cycle.(1)
Input voltageVi is constant.(2)
Output voltageVo is constant or output capacitor Co is large enough.(3)
Output currentIo is constant or output inductor Lo is large enough.(4)
Output inductorLo is much larger than resonant
circuit inductor Lr.(5)
Resonant circuits are ideal.(6)
Semiconductor devices are ideal.(7)
Reverse recovery time of all diodes is ignored.


### 2.2. Operation Principles and Analysis

Based on these assumptions, circuit operations in one
switching cycle can be divided into eight stages. The key waveforms of these
stages are given in Figure2 and the equivalent circuit schemes of the
operation stages are given in Figure 3. The detailed analysis of every stage is
presented as follows.Figure 2
Key theoretical waveforms of the proposed converter.Modes of operation.
(a)(b)(c)(d)(e)(f)(g)(h)Mode 1t0-t1.
Prior
to t1, the body diode of switch S1 was conducting, while
the main switch S was off. The equations iS=0, iD1=Io,
iLr=0, vCr=0, vCb=0 are valid at the
beginning of this stage. At t = t0, the main switch is
turned on, which realizes zero-current turn-on as it is in series with the
resonant inductor Lr. During this stage, iLr rises and
current iD1 through body diode of switch S1 falls
simultaneously at the same rate linearly. The mode ends at t = t1 when
iLr reaches Io and iD1 becomes zero. The body
diode D1 is turned off with ZVS because of Cr and Cb being existent. In this state,
(1)iS=iLr=ViLr(t−t0),iD1=Io−iLr=−ViLr(t−t0)+Io,t01=LrViIo.Mode 2t1-t2.
The
diode DS2 starts conducting at the instant when body diode D1 is turned off. At t = t1, IS=iLr=Io,
iD1 = 0, vCr=0, and vCb=0. In this interval,
resonance occurs with the inductor Lr and capacitors Cr and Cb. This mode ends with Cr charged up to the input
voltage Vi;
(2)iLr(t−t1)=ViZ1sinω1(t−t1)+Io,vCr(t−t1)=CeCr[−Vicosω1(t−t1)+Vi],vCb(t−t1)=CeCb[−Vicosω1(t−t1)+Vi],
where
(3)Ce=CrCbCr+Cb,ω1=1LrCe,Z1=LrCe.
The diode DS1 is turned on with ZVS
at the moment when vCr becomes Vi. In this state,
(4)t12=1ω1sin−1(CrCe−1).Mode 3t2-t3.
At
t = t2, iS=Io, iLr=iLrmax,
vCr=VCrmax=Vi, and vCb=VCb1.
When diode DS1 turns
on, new resonance starts with Lr and Cb. This mode ends
when iLr becomes equal to load current Io, and Cb is charged up to its maximum voltage VCbm. Both diodes DS1 and DS2 are turned off under ZCS due to the existence of Lr. The voltage and
current expressions that govern this circuit mode are given by
(5)iLr(t−t2)=(ILrmax−Io)cosω2(t−t2)−VCb1Z2sinω2(t−t2)+Io,vCb(t−t2)=(ILrmax−Io)Z2sinω2(t−t2)+VCb1cosω2(t−t2). The time
interval of this stage can be found as follows:
(6)t23=1ω2tan−1(ILrmax−IoVCb1),
where
(7)ω2=1LrCb,Z2=LrCb.Mode 4t3-t4.
Since
both diodes DS1 and DS2 have been turned off at t3, now only
the main switch  S and inductor Lr carry the load current. There is
no resonance in this mode and the circuit operation is identical to that of a
conventional PWM buck converter. The voltage and current equations for this
mode are
(8)iS=iLr=Io.Mode 5t4-t5.
This
mode starts with the initial conditions iS=Io, iLr=Io, vCr=VCrmax=Vi, VCb=VCbm. The main switch is turned off under ZVS, and at the same instant,
the synchronous switch is turned on under ZCS. Since the synchronous switch S1 is conducting the voltage across capacitor, Cb is clamped to zero. Resonance occurs with Lr and Cr.
The voltage and current equations for this mode are
(9)vCb(t−t4)=0,iLr(t−t4)=Iocosω3(t−t4)−ViZ3sinω3(t−t4),(10)vCr(t−t4)=IoZ3sinω3(t−t4)+Vicosω3(t−t4).The time
duration of this mode can be found as follows:(11)t45=1ω3tan−1ViIoZ3,
where
(12)ω3=1LrCr,Z3=LrCr. This mode ends when voltage across Cr becomes
zero. Therefore, the diode DS2 turns on under ZVS.Mode 6t5-t6.
In
this stage, new resonance takes place through Lr-Cb-DS2-DS1.
At t = t5, iS = 0, iLr=ILr2, vCr=0, and vCb=0 are initial conditions for this mode. For this
state, the equations are
(13)vCb(t−t5)=ILr2Z2sinω2(t−t5),iLr(t−t5)=ILr2cosω2(t−t5). When iLr becomes Io, this mode comes to an end. The time interval for this
mode is given as
(14)t56=1ω2tan−1(IoILr2),
where
(15)ω2=1LrCb,Z2=LrCb.Mode 7t6-t7.
At
t = t6, iS=0, iLr=Io, vCr=0, and vCb=VCb2  are initial conditions for this mode.
As iLr becomes Io, synchronous switch is turned off under
ZCS. Stored energy of inductor Lr and capacitor Cb is now
transferred to load. ON state resistances of diodes and switches are neglected.
The voltage and current equations for this mode are given as
(16)vCb(t−t6)=−IoCb(t−t6)+VCb2,iLr(t−t6)=−VoLr(t−t6)+Io. This
mode ends when iLr becomes zero. The interval of this mode is given
by
(17)t67=IoLrVo.Mode 8t7-t8.
Now
the load current will flow through body diode of synchronous switch S1.
During this mode, the converter operates like a conventional PWM buck converter
until the switch S is turned on in the next switching cycle. In this mode,
(18)iD1=Io.


### 2.3. Output Voltage

The output voltage can be specified by evaluating the
energy from the supply, through the input resonant inductorLr [27].
The output voltage is given by
(19)Vo=Viτ(12t01+t12+t23+t45+t56+t67)=Viτ(12IoLrVi+1ω1sin−1(CrCe−1)+1ω2tan−1(ILrmax−IoVCb1)+1ω3tan−1(VCrmaxIoZ3)+1ω2tan−1(IoILr2)+12IoLrVo).Since time
intervals of Modes 1 and 7 have low value as compared to other terms in the
above expression, the first and last terms are neglected for simplification.Then, the voltage conversion ratio will be(20)VoVi=1τ(1ω1sin−1(CrCe−1)+1ω2tan−1(ILrmax−IoVCb1)+1ω3tan−1(VCrmaxIoZ3)+1ω2tan−1(IoILr2)),
where τ=1/fS,andfS is the switching frequency.From the expression,
it can be seen that the voltage conversion ratio depends upon switching
frequency rather than duty ratio.


## 2.1. Circuit Description and Assumption

The ZVT-PWM synchronous buck
converter is shown in Figure1. It is the combination of the conventional PWM
synchronous buck converter and the proposed auxiliary snubber circuit. The
auxiliary circuit consists of a resonant inductor Lr, resonant
capacitor Cr, a buffer capacitor Cb, and three auxiliary Schottky
diodes DS1, DS2, and DS3. Body diodes of main
switch S and synchronous switch S1 are also utilized in this
converter.To analyze the steady-state
operations of the proposed circuit, the following assumptions are made during
one switching cycle.(1)
Input voltageVi is constant.(2)
Output voltageVo is constant or output capacitor Co is large enough.(3)
Output currentIo is constant or output inductor Lo is large enough.(4)
Output inductorLo is much larger than resonant
circuit inductor Lr.(5)
Resonant circuits are ideal.(6)
Semiconductor devices are ideal.(7)
Reverse recovery time of all diodes is ignored.


## 2.2. Operation Principles and Analysis

Based on these assumptions, circuit operations in one
switching cycle can be divided into eight stages. The key waveforms of these
stages are given in Figure2 and the equivalent circuit schemes of the
operation stages are given in Figure 3. The detailed analysis of every stage is
presented as follows.Figure 2
Key theoretical waveforms of the proposed converter.Modes of operation.
(a)(b)(c)(d)(e)(f)(g)(h)Mode 1t0-t1.
Prior
to t1, the body diode of switch S1 was conducting, while
the main switch S was off. The equations iS=0, iD1=Io,
iLr=0, vCr=0, vCb=0 are valid at the
beginning of this stage. At t = t0, the main switch is
turned on, which realizes zero-current turn-on as it is in series with the
resonant inductor Lr. During this stage, iLr rises and
current iD1 through body diode of switch S1 falls
simultaneously at the same rate linearly. The mode ends at t = t1 when
iLr reaches Io and iD1 becomes zero. The body
diode D1 is turned off with ZVS because of Cr and Cb being existent. In this state,
(1)iS=iLr=ViLr(t−t0),iD1=Io−iLr=−ViLr(t−t0)+Io,t01=LrViIo.Mode 2t1-t2.
The
diode DS2 starts conducting at the instant when body diode D1 is turned off. At t = t1, IS=iLr=Io,
iD1 = 0, vCr=0, and vCb=0. In this interval,
resonance occurs with the inductor Lr and capacitors Cr and Cb. This mode ends with Cr charged up to the input
voltage Vi;
(2)iLr(t−t1)=ViZ1sinω1(t−t1)+Io,vCr(t−t1)=CeCr[−Vicosω1(t−t1)+Vi],vCb(t−t1)=CeCb[−Vicosω1(t−t1)+Vi],
where
(3)Ce=CrCbCr+Cb,ω1=1LrCe,Z1=LrCe.
The diode DS1 is turned on with ZVS
at the moment when vCr becomes Vi. In this state,
(4)t12=1ω1sin−1(CrCe−1).Mode 3t2-t3.
At
t = t2, iS=Io, iLr=iLrmax,
vCr=VCrmax=Vi, and vCb=VCb1.
When diode DS1 turns
on, new resonance starts with Lr and Cb. This mode ends
when iLr becomes equal to load current Io, and Cb is charged up to its maximum voltage VCbm. Both diodes DS1 and DS2 are turned off under ZCS due to the existence of Lr. The voltage and
current expressions that govern this circuit mode are given by
(5)iLr(t−t2)=(ILrmax−Io)cosω2(t−t2)−VCb1Z2sinω2(t−t2)+Io,vCb(t−t2)=(ILrmax−Io)Z2sinω2(t−t2)+VCb1cosω2(t−t2). The time
interval of this stage can be found as follows:
(6)t23=1ω2tan−1(ILrmax−IoVCb1),
where
(7)ω2=1LrCb,Z2=LrCb.Mode 4t3-t4.
Since
both diodes DS1 and DS2 have been turned off at t3, now only
the main switch  S and inductor Lr carry the load current. There is
no resonance in this mode and the circuit operation is identical to that of a
conventional PWM buck converter. The voltage and current equations for this
mode are
(8)iS=iLr=Io.Mode 5t4-t5.
This
mode starts with the initial conditions iS=Io, iLr=Io, vCr=VCrmax=Vi, VCb=VCbm. The main switch is turned off under ZVS, and at the same instant,
the synchronous switch is turned on under ZCS. Since the synchronous switch S1 is conducting the voltage across capacitor, Cb is clamped to zero. Resonance occurs with Lr and Cr.
The voltage and current equations for this mode are
(9)vCb(t−t4)=0,iLr(t−t4)=Iocosω3(t−t4)−ViZ3sinω3(t−t4),(10)vCr(t−t4)=IoZ3sinω3(t−t4)+Vicosω3(t−t4).The time
duration of this mode can be found as follows:(11)t45=1ω3tan−1ViIoZ3,
where
(12)ω3=1LrCr,Z3=LrCr. This mode ends when voltage across Cr becomes
zero. Therefore, the diode DS2 turns on under ZVS.Mode 6t5-t6.
In
this stage, new resonance takes place through Lr-Cb-DS2-DS1.
At t = t5, iS = 0, iLr=ILr2, vCr=0, and vCb=0 are initial conditions for this mode. For this
state, the equations are
(13)vCb(t−t5)=ILr2Z2sinω2(t−t5),iLr(t−t5)=ILr2cosω2(t−t5). When iLr becomes Io, this mode comes to an end. The time interval for this
mode is given as
(14)t56=1ω2tan−1(IoILr2),
where
(15)ω2=1LrCb,Z2=LrCb.Mode 7t6-t7.
At
t = t6, iS=0, iLr=Io, vCr=0, and vCb=VCb2  are initial conditions for this mode.
As iLr becomes Io, synchronous switch is turned off under
ZCS. Stored energy of inductor Lr and capacitor Cb is now
transferred to load. ON state resistances of diodes and switches are neglected.
The voltage and current equations for this mode are given as
(16)vCb(t−t6)=−IoCb(t−t6)+VCb2,iLr(t−t6)=−VoLr(t−t6)+Io. This
mode ends when iLr becomes zero. The interval of this mode is given
by
(17)t67=IoLrVo.Mode 8t7-t8.
Now
the load current will flow through body diode of synchronous switch S1.
During this mode, the converter operates like a conventional PWM buck converter
until the switch S is turned on in the next switching cycle. In this mode,
(18)iD1=Io.


## 2.3. Output Voltage

The output voltage can be specified by evaluating the
energy from the supply, through the input resonant inductorLr [27].
The output voltage is given by
(19)Vo=Viτ(12t01+t12+t23+t45+t56+t67)=Viτ(12IoLrVi+1ω1sin−1(CrCe−1)+1ω2tan−1(ILrmax−IoVCb1)+1ω3tan−1(VCrmaxIoZ3)+1ω2tan−1(IoILr2)+12IoLrVo).Since time
intervals of Modes 1 and 7 have low value as compared to other terms in the
above expression, the first and last terms are neglected for simplification.Then, the voltage conversion ratio will be(20)VoVi=1τ(1ω1sin−1(CrCe−1)+1ω2tan−1(ILrmax−IoVCb1)+1ω3tan−1(VCrmaxIoZ3)+1ω2tan−1(IoILr2)),
where τ=1/fS,andfS is the switching frequency.From the expression,
it can be seen that the voltage conversion ratio depends upon switching
frequency rather than duty ratio.


## 3. Design Procedure

Design of
conventional PWM converters has been well presented in literatures. Thus, it is
more significant to focus on design procedures of the auxiliary circuit. The
resonant inductor and
resonant capacitor are the most important components when designing the
auxiliary circuit. The proposed auxiliary resonant circuit provides soft-switching
conditions for the main transistor. The following design procedure is developed
considering procedures such as those presented previously in [5–7].(1)
Snubber inductorLr is selected to permit its current to rise up to at
most the maximum output current within tr time periods, during the
turn-on of the main transistor or the turnoff of the synchronous switch. In this
case, from (1),
(21)ViLrtr≤Iomax
can be written.
Here, tr is the rise time of the main transistor. These equations
provide ZCS turn-on for the main transistor and ZVS turnoff for the body diode
of synchronous switch.(2)
Snubber capacitorCr is selected to
be discharged from
Vi to zero with the maximum output current over at least the time
period tf during the turnoff of the main transistor. For this state,
according to (10) and (11),
(22)1IomaxZ3Vi≥tf.
Here,
tf is the
fall time of the main transistor and
(23)Z3=LrCr.(3)
Buffer capacitorCb is selected to be charged
from zero up to at most a value decided before, such as half the input voltage.
This capacitor takes on the energies that are stored in the snubber inductor
during the turnoff of the synchronous switch and charge of the snubber
capacitor. This energy balance can be defined as follows:
(24)12CrVi2+12CbVCbm2=12LrIomax2.
The value of Cb is normally larger
than the value of Cr. Consequently, the bigger the value of selected
Cb is, the lower the value of VCbmax will be. Moreover, if the value of Cb increases, the voltage across the synchronous
switch falls, but the time periods t23, t45, t56,
and t67 during
which the inductor energies are transferred to Cb or the load rise.


## 4. Converter Features

The features of
the proposed soft-switching converter are briefly summarized as follows.(1)
All of the active and passive semiconductor devices are turned on and off under
exact ZVS and/or ZCS.(2)
The proposed converter has a simple structure, low cost, and ease of control.(3)
The converter acts as a conventional PWM converter during most of the switching
cycles.(4)
The presented snubber cell can be easily applied to the other basic PWM DC-DC
converters and to all switching converters.(5)
The proposed converter has a larger total efficiency and a wider load range.(6)
The main switch and the auxiliary switch are not subjected to additional
voltage stresses. Current stress on the main switch is slightly higher, but
current stress on the auxiliary switch is within safe limit.


## 5. Simulation and Experimental Results

A prototype
of the proposed converter, as shown in Figure1, has been built in the
laboratory. The newly proposed converter operates with an input voltage Vi=12V, output voltage Vo=3.3V, load current of 11 A, and a
switching frequency of 500 kHz. The converter is simulated using simulation
software PSIM, version 6.0. The major parameters and components are given in
Table 1.Table 1
Components used in the proposed converter.
ComponentValue/modelSimulationExperimentMain switch (S)IdealIRF1312Synchronous switch
(S1)IdealIRF1010ESchottky diode
(DS1)IdealMBR60L45CTGSchottky diode
(DS2)IdealMBR60L45CTGSchottky diode
(DS3)IdealMBR60L45CTGResonant inductor
(Lr)15 nH15 nHResonant capacitor
(Cr)1 nF1 nFBuffer capacitor
(Cb)3.3 nF3.3 nFOutput capacitor
(Co)15μF15μFOutput inductor
(Lo)5μH5μHFigures4(a)–4(d) show the
simulation results of the proposed converter and Figures 5(a)–5(d) present the
experimental results. All the waveforms except the efficiency curve represent a
time period of one switching cycle, which is 2 microseconds in this case. The
amplitudes are denoted in
Figure 4
with each of their
waveforms, respectively.Simulated voltage and current waveforms: (a) main switchS: VS, IS;
(b) synchronous switch S1: VS1, IS1; (c) diode
DS1 and capacitor Cr; (d) capacitor Cb and diode
DS3.
(a)(b)(c)(d)Experimental voltage and current waveforms: (a) main
switchS: VS, IS (V: 5 V/div, I: 10 A/div, time: 0.2 μs/div); (b) synchronous switch S1: VS1, IS1 (V: 5 V/div, I: 10 A/div, time: 0. 2 μs/div);
(c) diode DS1 and capacitor Cr: VDS1, VCr (V: 5 V/div, I: 2 V/div, time: 0. 2 μs/div); (d) capacitor Cb and diode
DS3:
VCb, VDS3 (V: 5 V/div, I: 2 V/div, time: 0.2 μs/div).
(a)(b)(c)(d)


### 5.1. Main SwitchS

It is noted from Figures4(a) and 5(a)
that the main switch S is turned on under ZCS, and the body diode D1 of synchronous switch S1 is turned off under ZVS. The main switch
takes the load current and the charging current of the capacitors Cr and Cb. The inductor starts to transfer its stored energy to
capacitors Cr and Cb during the turn-on period of main
switch. The converter has not exceeded
the voltage limits; however, the current stress is slightly higher for a very
short period of time. The main switch also switches off under ZVS. The current
and voltage wave shapes are identical to theoretical waveforms.


### 5.2. Synchronous SwitchS1

After the main switch is turned on under
ZCS, the body diode of synchronous switch is turned off under ZVS, which can be
observed from Figures4(b) and 5(b). The
synchronous switch is turned on under ZCS when the main switch is turned off
under ZVS. After the turnoff of the main switch, both capacitors Cr and Cb are
discharged. As soon as both capacitors are discharged near zero, the body diode of synchronous
switch S1 is turned on under ZVS. The converter has not exceeded the
current limits; however, the voltage stress across the switch is slightly
higher for a very short period of time. The synchronous switch operates within
the safe limits, and it can be noted here that the conduction period of S1 is more confining to the design values and it operates at a low power when
compared to the other switches. The shapes of the figures are identified to
confine much to the
theoretical waveforms.


### 5.3. Schottky DiodesDS1, DS2, and DS3

The Schottky diodes work for a very short
period to discharge the resonant capacitorsCr
and Cb as can be
observed from Figures 4(c), 4(d), 5(c), and 5(d). Moreover, it can be seen that the Schottky
diodes DS1, DS2, and DS3 operate under soft-switching
conditions. The Schottky diodes are turned on and off under ZVS. The conduction
of Schottky diodes may cause a considerable drop in output voltage for low-power
circuits, but due to the advancement in semiconductor techniques, Schottky
diodes are also now available with a low-forward-voltage drop for high-frequency
circuits.Additionally, during the turn-on and
turnoff of main switchS and synchronous switch S1, a slight overlap
occurs between their own voltages and currents. Therefore, the switching losses are
zero, but a little additional conduction loss takes place, and so the conduction losses dominate
the total loss in the soft-switching converter.Efficiency Curve
From Figure6, it can be observed that the
efficiency values of the soft-switching converter are relatively high with
respect to those of the hard-switching converter. The efficiency values towards
the minimum output power decrease naturally because the converter is designed
for the maximum output current. At 70% output power, the overall efficiency of
the proposed converter increases to about 96% from the value of 87% in its
counterpart hard-switching converter. The high efficiency concludes the
correctness of the design values.Figure 6
Efficiency curve.


## 5.1. Main SwitchS

It is noted from Figures4(a) and 5(a)
that the main switch S is turned on under ZCS, and the body diode D1 of synchronous switch S1 is turned off under ZVS. The main switch
takes the load current and the charging current of the capacitors Cr and Cb. The inductor starts to transfer its stored energy to
capacitors Cr and Cb during the turn-on period of main
switch. The converter has not exceeded
the voltage limits; however, the current stress is slightly higher for a very
short period of time. The main switch also switches off under ZVS. The current
and voltage wave shapes are identical to theoretical waveforms.


## 5.2. Synchronous SwitchS1

After the main switch is turned on under
ZCS, the body diode of synchronous switch is turned off under ZVS, which can be
observed from Figures4(b) and 5(b). The
synchronous switch is turned on under ZCS when the main switch is turned off
under ZVS. After the turnoff of the main switch, both capacitors Cr and Cb are
discharged. As soon as both capacitors are discharged near zero, the body diode of synchronous
switch S1 is turned on under ZVS. The converter has not exceeded the
current limits; however, the voltage stress across the switch is slightly
higher for a very short period of time. The synchronous switch operates within
the safe limits, and it can be noted here that the conduction period of S1 is more confining to the design values and it operates at a low power when
compared to the other switches. The shapes of the figures are identified to
confine much to the
theoretical waveforms.


## 5.3. Schottky DiodesDS1, DS2, and DS3

The Schottky diodes work for a very short
period to discharge the resonant capacitorsCr
and Cb as can be
observed from Figures 4(c), 4(d), 5(c), and 5(d). Moreover, it can be seen that the Schottky
diodes DS1, DS2, and DS3 operate under soft-switching
conditions. The Schottky diodes are turned on and off under ZVS. The conduction
of Schottky diodes may cause a considerable drop in output voltage for low-power
circuits, but due to the advancement in semiconductor techniques, Schottky
diodes are also now available with a low-forward-voltage drop for high-frequency
circuits.Additionally, during the turn-on and
turnoff of main switchS and synchronous switch S1, a slight overlap
occurs between their own voltages and currents. Therefore, the switching losses are
zero, but a little additional conduction loss takes place, and so the conduction losses dominate
the total loss in the soft-switching converter.Efficiency Curve
From Figure6, it can be observed that the
efficiency values of the soft-switching converter are relatively high with
respect to those of the hard-switching converter. The efficiency values towards
the minimum output power decrease naturally because the converter is designed
for the maximum output current. At 70% output power, the overall efficiency of
the proposed converter increases to about 96% from the value of 87% in its
counterpart hard-switching converter. The high efficiency concludes the
correctness of the design values.Figure 6
Efficiency curve.


## 6. Conclusion

The concepts of ZVT used in medium and high
power were implemented in synchronous buck converter, and it was shown that the
switching losses in synchronous buck were eliminated. Besides, the main switch ZCS is turned on and ZVS is turned off. The synchronous switch is also turned on under
ZCS and turned off under ZVS. Hence, switching losses are reduced and the newly
proposed ZVT synchronous buck is highly efficient than the conventional
converter. The additional voltage and current stresses on the main devices do
not take place, and the auxiliary devices are subjected to allowable voltage
and current values. Moreover, the converter has a simple structure, low cost,
and ease of control. A prototype of a 3.3 V, 11 A, 500 kHz system was implemented
to experimentally verify the improved performance.



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*Source: 862510-2008-02-13.xml*