# Figure-of-Merit-Based Area-Constrained Design of Differential Amplifiers

Authors: Alpana Agarwal; Chandra Shekhar
Journal: VLSI Design
 (2008)

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## Abstract

A new methodology based on the concept of figure of merit under area constraints is described for designing optimum performance differential amplifiers. First a figure of merit is introduced that includes the three performance parameters, namely, input-referred noise, differential dc gain, and unity-gain bandwidth. Expressions for these parameters have been derived analytically and finally arrived at an expression for the figure of merit.  Next it is shown how these performance parameters vary with the relative allocation of the total available area between the input and load transistors. The figure of merit peaks at a certain value of relative area allocation in the range of 60% to 80% of the available area to the input transistors. The peak value of figure of merit is a function of area. However, it is independent of biasing current (and, therefore, power consumption) subject to the minimum current (and, therefore, a minimum power) required to keep all the transistors biased in the saturation region. The peak figure of merit and minimum power required to achieve the peak figure of merit are also plotted as a function of area. These analyses help in synthesizing optimal differential amplifier circuit designs under area constraints.


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## Body

## 1. Introduction

The first stage of an operational amplifier and several
types of comparators is typically a   differential amplifier that needs to
provide sufficient gain and bandwidth while introducing as little noise as
possible. Moreover, if this is desired with a constraint on area, the problem
becomes more difficult. The classical noise optimization techniques for low noise
amplifier (LNA) design presume a device given with fixed characteristics, and
thus offer no explicit guidance on how to best exercise the IC designer’s
freedom in tailoring device geometries under the constraints of area [1].


## 2. Concept of Figure of Merit

To compare different solutions for an analog circuit
design, first a figure of merit must be agreed upon. One of the key issues is
the design of a circuit with maximal figure of merit under constraints of area.
Here, a figure of merit has been proposed that takes into account the three key
performance parameters, that is, the differential dc gain, unity-gain bandwidth,
and input-referred noise. The proposed figure of merit in this paper is given
by(1)FoM=UGB∗AdIRN, where UGB is the unity-gain bandwidth, Ad is the differential dc gain, and IRN is the peak input-referred noise spectral
density; the differential amplifier
illustrated in Figure 1.Figure 1
Differential amplifier.


## 3. Performance Parameters

## 3.1. Noise Model for Most

Each semiconductor device
in the circuit introduces noise. Various types of noises that could be possible
in a device are shot, thermal, flicker
(1/f), avalanche, burst, and so forth.At low frequencies,
flicker (1/f) noise dominates all other noises. Therefore, here only flicker
noise has been considered to introduce the concept developed.There exist numerous
models for flicker noise in the MOS transistor [2–10].
According to the most popular model [10], the flicker noise due to a MOS
transistor can be lumped as a voltage source at the gate and is given by (2)Veq2¯=KFCOX⋅Weff⋅Leff⋅Δff, in the noise  bandwidth of Δf at frequency f. Weff and Leff are the effective width and length of the gate
of the MOS transistor, KF is the flicker noise coefficient for the MOS
transistor, and COX is the gate capacitance per unit area.However, the overall circuit noise depends on the circuit
configuration.


## 3.2. Input-Referred Noise

For the differential
amplifier shown in Figure1, there are four voltage noise sources connected at
the gate of each transistor. If all these sources are lumped together at the
gate of transistor M1, the mean-square value of the equivalent noise voltage
source at input (gate of M1) for the total circuit noise is given by (3)VeqT2¯=Veq12¯+Veq22¯+(gmlgmi)2⋅(Veq32¯+Veq42¯), where Veq12¯, Veq22¯, Veq32¯, Veq42¯ are the noise sources at the gates of
transistors M1, M2, M3, and M4. gmi and gml are the transconductance of the input (M1 and
M2) and load (M3 and M4) transistors, respectively, and are given by (4)gmi=2⋅kn⋅(WiLi)⋅(Io2),gml=2⋅kp⋅(WlLl)⋅(Io2),where Wi, Wl, Li,
and Ll are the widths and lengths of input and load
transistors, respectively, kn and kp are the process transconductance parameters
for n-channel and p-channel MOS transistors, and Io is the tail current of the differential
amplifier.Using (2), (3), and (4), the power spectral density of noise
at the gate of M1 is written as (5)SVG2=VeqT2¯Δf=2⋅KFnCOX⋅Wi⋅Li⋅f⋅[1+kp⋅KFp⋅Li2kn⋅KFn⋅Ll2]. Therefore, root-mean-square value of spectral power density
better known as input-referred noise at frequency f is written as (6)IRN=2⋅KFnCOX⋅Wi⋅Li⋅f⋅[1+kp⋅KFp⋅Li2kn⋅KFn⋅Ll2].


## 3.3. Unity-Gain Bandwidth

Unity-gain bandwidth of the circuit, UGB,
is given by(7)UGB=gmi2⋅π⋅CL=12⋅π⋅CLkn⋅Wi⋅IoLi, as CL is the total load capacitance at the output
node.


## 3.4. Differential dc Gain

The differential dc gain, Ad,
of the differential amplifier is given by(8)Ad=gmigdi+gdl=20⋅knIo⋅(WiLi)⋅(1Li+12⋅Ll)−1, where gdi and gdl are the drain to source conductance of input
and load transistors, respectively. The drain to source conductance gd is approximated as (9)gd=Io2⋅L⋅(dxddVDS), where (dxd/dVDS) (known as channel-length modulation parameter)
is a process parameter [11],   and its value has been taken as 0.1 μm/V for NMOS and 0.05 μm/V
for PMOS
transistors.


## 3.5. Figure of Merit

Substituting the values of UGB, Ad, and IRN from (6), (7), and (8) in (1), we get the following: (10)FoM=52⋅μn⋅COX3/2⋅Wi3/2⋅Li3/2π⋅CL⋅Kfn⋅(1/f)⋅1Li⋅(1+Li2⋅Ll)−1⋅(1+kp⋅Kfp⋅Li2kn⋅Kfn⋅Ll2)−1/2.


## 4. Maximization of Figure of Merit under Area Constraints

IfA is the total area available for the devices in
the differential amplifier, then let us assign x% of A,
that is, x⋅A to the input transistors and (1−x)⋅A to load transistors. Then, writing the
expressions for UGB, Ad,
and peak IRN (at f=1) in terms of x,
area (A), bias current (Io), and technology parameters, we get (11)Ad=20⋅kn⋅(x⋅A)Io⋅(1+Li2⋅Ll)−1,UGB=kn⋅Io⋅(x⋅A)22⋅π⋅CL⋅1Li,IRN=4⋅KFnCOX⋅(x⋅A)⋅[1+kp⋅KFp⋅Li2kn⋅KFn⋅Ll2]. Hence,  from (1) and (11) figure of merit (FoM)
in terms of x, area (A), bias current (Io), and technology
parameters is written as (12)FoM=52⋅kn⋅COX1/2⋅(x⋅A)3/2π⋅CL⋅KFn1/2⋅1Li⋅(1+Li2⋅Ll)−1⋅(1+kp⋅KFp⋅Li2kn⋅KFn⋅Ll2)−1/2. From (12), the following conclusions can be
drawn.(i)
Figure of merit, FoM,
is dependent on technology parameters,kn, kp, COX, KFn, KFp.(ii)
It is
inversely proportional to the output loadCL.(iii)
To maximize FoM,
length of input transistorLi should be kept minimum for a given area A,
as it maximizes all the three product terms wherever it appears.(iv)
Figure of merit is independent of the width of load transistor,Wi,
hence it should be kept as minimum.(v)
Length of load transistorLl should be as large as possible under the constraints of area since it maximizes the last two product terms and hence maximizes figure of merit FoM.


## 5. Analytical Results

Figure2 shows the variation of
differential dc gain as a function of relative area allocated to input
transistors at different values of total area. It is clear that as the total
area increases, the differential dc gain increases. But it does not keep on
increasing with the increase in input transistors area. The peak value of dc
gain is obtained for x in the range of 0.6 to 0.8. Figure 3 shows
that the unity-gain bandwidth is a monotonically increasing function of x.Figure 2
The differential
dc gain as a function of input transistor area.Figure 3
Unity-gain bandwidth (in MHz) as a function of
input transistor area.The variation of peak value of
input-referred noise as a function ofx is shown in Figure 4. For larger values of x,
the noise is reducing because with increasing x,
the gate area of input transistors is increasing and their noise contribution
is decreasing. But it is interesting to note that it starts increasing beyond a
point for all the values of A.
It implies that beyond this point, the contribution of noise from load
transistors over and above the contribution of input transistors increases.Figure 4
Input-referred noise (inμV/rt (Hz)) as a function of input transistor
area.Next the figure of merit is
plotted as a function of percent area allocated to input transistors. Figure of
merit is a peaking function ofx in the range 60% to 80% as shown in Figure 5.
It is clear that figure of merit increases with total area A.Figure 5
The figure
of merit, FoM, (in *1012 Hz3/2/V) as a function of input
transistor area.It also indicates that for a
fixed value of total area, about how much percent of total area should be
assigned to input transistors to obtain a maximum value of figure of merit.
Peak value of figure of merit as a function of total area is plotted in Figure6.Figure 6
Peak value of figure of merit, FoM, as a
function of area.The value of figure of merit is
independent of bias currentIo.
However, a minimum value of power is essential to keep all the transistors in
saturation. Figure  7 shows the minimum bias current required for keeping all
the transistors in the circuit in saturation region (and in strong inversion)
as a function of total area. It implies that for a given area, a minimum power
has to be provided. To increase the figure of merit, area increase alone is not
enough; more power is also required to keep the transistors in saturation.Figure 7
Minimum power
desired as a function of total area.


## 6. Simulation Results

Simulations using Tanner Tools Pro also
validated the analytical results. To perform this task, a value of total area
was chosen. The total area was divided between input and load  transistors in a
predefined ratio. Then, for this distribution of areas, all combinations of
aspect ratio of input and load transistors were simulated to obtain the
differential dc gain, unity-gain bandwidth, and peak value of input-referred
noise. The figure of merit was computed from these parameters. The peak figure
of merit as a function of input transistor area in percent (ratio of area
allocated to input transistors to the total available areaA) for various values of total area is plotted
as shown in Figure 8. This plot matches well with the analytical results shown
in the previous section.Figure 8
Simulated plot of figure of merit, FoM, (in *1012 Hz3/2/V)
as a function of input transistor area.In order to demonstrate the utility of
figure of merit as a tool to optimize the design, we define three new
parameters as follows:Ad%
is the differential dc gain at
peak figure of merit as a percentage of maximum differential dc gain achievable
for a given area;UGB%
is unity-gain bandwidth at peak figure of
merit as a percentage of maximum unity-gain bandwidth achievable for a given
area;IRN%
is input-referred noise at peak figure of
merit as a percentage of minimum input-referred noise achievable for a given
area.Table1 compares the analytical and
simulated values of peak figure of merit, Ad%, UGB%, and IRN% for constant
area. In most cases, value of Ad% is more than 95%, and the value of UGB% is
more than 91%. IRN% is less than 101% in all cases.Table 1
Comparison between analytical and simulated
performance at peak figure of merit.
Area
(μm2)Peak figure
of merit
(in *1012 Hz3/2/V)Ad%UGB%IRN%AnalyticalSimulatedAnalyticalSimulatedAnalyticalSimulatedAnalyticalSimulated50325.44369.4798.0594.5596.3695.06100.1610080787.86594.2198.2395.2595.4592.681001001001179.8723.5598.1199.5695.5594.841001001502405.631091.7898.7198.9295.6591.2100.131002003938.291397.6998.6694.2495.7481.85100.16100


## 7. Conclusion

The concept of figure of merit is a
suitable tool for synthesizing optimal design of differential amplifiers under
area constraints and leads to the realization of differential dc  gain,
unity-gain bandwidth, and input-referred noise values that are also very close
to their individually achievable maximum values under the same area constraints.
The above analyses validate that the idea of FoM may be deployed in a CAD tool
for automatically synthesizing the differential amplifiers and can be extended
for many other building blocks for low frequency applications. The paper also
highlights the dependence of peak figure of merit and the minimum power
required to achieve it on the area available for the circuit.



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*Source: 847932-2008-02-13.xml*