# Modelling, Simulation, and Implementation of Effective Controller for KY Stepping Up Converter

Authors: K. Ramash Kumar; T. S. Anandhi; B. Vijayakrishna; S. Balakumar
Journal: Modelling and Simulation in Engineering
 (2022)

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## Abstract

This paper studies on a new Hybrid Posicast Control (HPC) for Fundamental KY Boost Converter (FKYBC) worked in Continuous Current Mode (CCM). Posicast is a feed-forward compensator. It reduces the overshoot in the step result of the flippantly damped plant. But the conventional controller approach is sensitive owing to the changes in the natural frequency. So, as to reduce this undesirable sensitivity and load potential control of FKYBC, a HPC is designed in this article. Structure of HPC is posicast with feedback loop. The independent computational time delay is the main design function of the posicast. The enactment of the FKYBC with HPC is confirmed at various operating regions by making the MATLAB/Simulink and experimental model. The posicast function values are implemented in Arduino Uno-ATmega328P microcontroller. The results of new HPC have produced minimal noise in control signal in comparison with traditional PID control.


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## Body

## 1. Introduction

A positive/negative DC source is important for most of the real-time applications such as audio amplifier, LED driver, the medical instruments, the mobile communications, the robot communication systems, the signal generator, central processing unit in PC, and the data transmission interface devices. Therefore, DC source is not directly taken from supply mains, and it is derived from the DC-DC converters. Based on this reasons, many DC-DC converters was designed such as Cuk, KY, and Luo converters (LC) [1–4]. Amid these converters, KY converters are simple in structure, small voltage stresses/volume of the circuit components, minimized voltage/current ripples, and less number of circuit components in comparisons with LCs and Cuk converters [5]. In this article, Fundamental KY Boost Converter (FKYBC) is considered for study. Though the controller design is a challenging one for nonlinear damped dynamics of FKYBC that are functions of the load parameters, the new research in modern digital signal technology has recommended a new control to enhancing FKYBC regulation [5].Hence, in this article, a new Hybrid Posicast Control (HPC) is designed for FKYBC operated in Continuous Conduction Mode (CCM). Posicast Control (PC) is a feed-frontward controller approach for flippantly damped plants [6]. Control of this approach is capable to suppress the waver response of a lightly damped plant; still, the problem is warmth to plant ambiguity. This problem is solved by designing a new posicast in feedback loop, which minimizes the sensitivity to parameter changes of the plant. Many researchers has detailed the conventional PID control for power electronics converter needs the additional arrangement changes to attain the proficient transient and steady state performance [7]. Therefore, the digital implementation of PID control for power converter is more complicated. The main benefits of the closed loop effect of HPC over the PID control has excellent transient and steady state behavior, easy to obtain the controller parameters, predictable response by small-signal averaged model, easy to implement in digital-time platform, eliminate the damping effects provided for multiple sets of control gains, no need of extra changes in the control structure, and naturally minimizes the high frequency noise [8, 9].A KY boost converter with only voltage loop classical PI control has been well executed [10]. From this article, the authors have not addressed controller design; output voltage ripples of this converter has produced 0.6 V and also not discussed input voltage and load resistance changes of same converter. Small signal mathematical modeling of KY converter in CCM is well presented [11]. Still, the authors have carried out only simulation study of this converter model, and besides, the same converter has twisted output ripple voltage of -0.8 V in open-loop mode. Nonlinear control for KY converter has been presented [12]. Conversely, load potential and coil current controls of this model have created overshoots of 1 V/0 V and took settling time of 0.02 s/0 s in line/load variations with minimal ripples of current and voltage. Implementation of linear quadratic regulator plus FLC for LC is well executed [13]. It is seen from this article that the output voltage ripples of this model has generated -0.95 V and output current ripple of -0.15 A. Fixed and FM operation of SMC for various topologies of LCs is well recorded [14–16]. But the load potential and coil current of it have produced huge overshoots, trifling steady-state errors, and took setting time in line modifications. The PC for stepping-down converter is well addressed [17]. The broad analysis of various nonlinear controllers for LCs was addressed [18, 19]. Though the output voltage of the LCs has spawned huge overshoots in load troubles, the detailed modeling of various DC-DC converters was deliberated [20]. However, the linear controllers are very complex for LCs and KY converters at different operating states. In the above literature reviews, it is seen that a new HPC for FKYBC have not been reported.Hence, this paper discusses how to attempt the design and implementation of a new HPC for FKYBC in CCM. Posicast parameters are derived with support of the small-signal averaged model of FKYBC.The main contributions of this article are as follows: first, the mathematical modelling of FKYBC is derived and then designed the HPC/PID control for FKYBC. Secondly, simulation and experimental analysis are carried out using designed HPC for FKYBC over the conventional PID control. Thirdly, the time domain specifications of proposed controller is discussed with PID control.The organization of this article is as follows: the introduction and literature review of KY converters and LCs along with their control methodologies are detailed in Section1. Operation and averaged modeling of FKYBC are discussed in Sections 2 and 3. Open-loop analysis of FKYBC is presented in Section 4. The design of HPC and PID control for FKYBC is detailed in Section 5. In Sections 6 and 7, the results of the converter with controllers are discussed. In Section 8, the conclusions are addressed.


## 2. Operation and Modeling of FKYBC

The FKYBC circuit is exemplified in Figure1(a). It contains two switches (POWER) S1 and S2, diode Db, energy storage-shifting capacitor Cb, output filter components L, and C0. Moreover, Vb and V0 are the potential across Cb and C0, and iL is inductor current. The FKYBC is one of the modern DC-DC converter topologies. It produces that the output voltage is more than the Vin with microlevel ripples in the V0 as well as iL. Here, the FKYBC is operated in CCM with two states of operation, and its circuits are represented in Figures 1(b) and 1(c). In state 1 operation (refer to Figure 1(b)), S1 is ON and S2 is OFF, and Db is nonconduction mode during the time period of 0,δT. So, the current flow path is indicated in arrow direction as shown in Figure 1(b). Consequently, the potential across inductor VL plus the output potential Vo will equal the input potential Vin plus the potential Vb, causing the L to be energized. Furthermore, the flow of electrons through C0=flowofelectronsthroughLminusflowofelectronsthroughloadR. Also, Cb released the energy in this mode. Consequently, the state space differential equations of the FKYBC during mode 1 is engraved as
(1)diLdt=Vin+Vb−VoL,dVodt=iLCo−VoRCo,dVbdt=−iLCb,SwitchON.Figure 1
FKYBC: (a) topology, (b) state 1 operation, and (c) state 2 operation.
(a)(b)(c)During state 2 operation (see Figure1(c)), S2 is closed, Db is conducted, and S1 is open. The current flow direction is marked in the arrow as shown in Figure 1(c). Consequently, VL=VinminustheV0, so coil L is to be deenergized. Also, the Cb gets energized to Vin in a short span of period during this mode. So, the state space differential equations of same converter in state 2 is expressed as
(2)diLdt=Vin−VoL,dVodt=iLCo−VoRCo,vb=Vin,SwitchOFF.During steady-state operating region of FKYBC, theiL does not vary shortly; the current is equal during both at the end of switches’ ON and OFF states. In addition, the iL is equal at the starting of switch OFF state and at the end of switch ON state. So, the gain of voltage of FKYBC is written as
(3)VoVin=1+δ.Meanwhile,0<δ<1, Vo>Vin.Assume no losses in the FKYBC, input power = output power, which is expressed as(4)VoIo=VinIin.Substituting (3) in (4) to obtains
(5)IoIin=1+δ.The improved averaged and transfer function models of the FKYBC are derived and discussed in the next sections. The specifications of FKYBC circuit are enumerated in Table1.Table 1
Specification of FKYBC.
Parameter nameSymbolValueSource voltageVin16 VLoad voltageVo24 VFilter coilL8μHCapacitorsCb and Co1953μF and 866 μFOperating frequencyfs100 kHzLoadR5.769 ΩOvershootλ0.978Damped natural periodTd0.00053 sDuty cycleδ0.5


## 3. Improved Averaged Model of FKYBC

The averaged model of the FKYBC Equation (6) can be derived from Equations (1) and (2) with the help of averaging technique
(6)diLdt=Vin−VoL+VbδL,dVodt=iLCo−VoRCo.From (6), iL, Vo, Vb, and Vin are the equivalent averaged value of iL, Vo, Vb, and Vin.TheVb in Equation (7) can be derived from Figure 1(a) by presumptuous that the Vb falls linearly within the time period of 0,δT and its slope=−iL/Cb.
(7)Vb=Vin−iL2fsCbδ2.Then, substituting Equation (7) in Equation (6) to attain the proficient averaged model of the FKYBC, it is expressed as
(8)diLdt=Vin1+δL−VoL−iLδ32fsCbL,dVodt=iLCo−VoRCo.Adding theCb and the fs in Equation (8) studied the theoretical dynamic characteristics of the FKYBC. Suppose that iL, V0, Vin, δ, and Vb are the dc values of iL, V0, Vin, δ, and Vb, correspondingly. iL^,Vo^, Vin^, δ^ and Vb^ are the small ac disparities of iL, V0, Vin, δ, and Vb, correspondingly. Hence, the equivalent dc values plus the overlaid small ac changes can be expressed by the iL, V0, Vin, δ, and Vb, with the assumption that the ac modifications are low in magnitude compared to the dc value, and it is written as
(9)iL=IL+iL^,Vo=Vo−Vo^,Vin=Vin−Vin^,δ=δ−δ^,Vb=Vb−Vb^,withiL^<<IL.Vo^<<Vo.Vin^<<Vin.δ^<<δ.Vb^<<Vb.Considering Equation (9) into Equation (8) and then removing the corresponding DC values obtained
(10)dILdt=Vin1+δL−VoL−ILδ32fsCbL,dVodt=ILCo−VoRCo.Accordingly,(11)Vo=2Vin1+δfsCbR2fsCbR+δ3,IL=2Vin1+δfsCb2fsCbR+δ3.Equation (12) can be attained by combining Equation (9) and Equation (8), then removing the ac values and ignoring the complex order ac relations due to their ranges are little.
(12)dILdt=Vinδ^+Vin^1+δL−Vo^L−3δ2ILδ^+δ3iL^2fsCbL,dVodt=iL^Co−Vo^RCo.Model from the duty ratio to theVo of the FKYBC can be derived with help of the Laplace transform on Equation (12), and it is expressed as
(13)Gs=vo∧δ∧=Vin/LCo+3δ2IL/2LCofsCbs2+δ3/2fsLCb+1/RCos+δ3/2RfsLCoCb+1/LCo.


## 4. Open-Loop Response of FKYBC

The MATLAB/Simulink model and its simulated open-loop response of FKYBC are exposed in Figures2(a) and 2(b) by Vin=16V and Vo=24V. It is clearly found that the FKYBC in open-loop mode has created large peak overshoots and took a long time to settle. In order to solve this problem, a new posicast control is designed for FKYBC in CCM.Figure 2
(a) MATLAB/Simulink model of FKYBC and (b) simulated open-loop response of FKYBC.
(a)(b)


## 5. Design of Effective Controllers

### 5.1. Fundamental of Posicast

The step result of lightly damped model is revealed in Figure3. It is categorized by overshoot λ and the damped time period Td [6–9].Figure 3
Result of a lightly damped FKYBC 55 with step input.Figure4 indicates the structure of a classical half-cycle posicast. It is intended based on the λ and the Td. Precise information of the step result constraints produces a control whose smallest zeros frequency revoke the leading plant pair. It is known as half-cycle since the surrounded time delay is Td/2. Therefore, HPC arrangement is explained in Figure 5.Figure 4
The classical half-cycle posicast.Figure 5
FKYBC with HPC.The posicast function is prearranged via(14)Ps=λ1+λe−sTd/2−1.Ps is the λ and the Td. It fundamentally reforms the set values into two portions; primarily, control minus the scale quantity from the set value (R), in order to the peak of a lightly damped result matches to the set final value of FKYBC result. The peak time of the step response is Td/2. Next, this time delay, the complete value of the step reference is smeared to Gs, ensuring that the Vo remains constant at set value. Alternative clarification is that the set value, which was previously removed from the input, now cancels any undesirable overshoots since it is delayed by Td/2.


### 5.2. Fundamental of Posicast

The main components of new HPC,Ps is a scaling factor parameterized by λ and the time delay element parameterized by Td. There are two design steps for new HPC. First, Ps is developed for the averaged model of the FKYBC. Then, Cs is framed to compensate joined model of the 1+PsGs. The classical frequency domain approach is provided. A pure integrator type compensator is matched for the FKYBC to stabilize steady-state disturbances.
(15)Cs=ks.TheK gain is selected to reduce the settling time as much as feasible, but not to the point where the overshoot is excessive. A new HPC model (16) is attained by joining the compensator Cs and the Ps.
(16)Cs1+Ps=Ks1+λ1+λe−sTd/2−1.


### 5.3. New HPC

The small signal transfer function model of FKYBC along with their specifications is(17)Gs=vo∧λ∧=16144125275s2+240s+144349820.Undamped natural frequency is(18)ωn=1LC,(19)Td=2πωn1−ζ2,(20)λ=e−πζ/1−ζ2.The values of the new HPC parameters are computed using Equations (18) to (20). Then, Td=0.00053s and λ=0.978. The K is designed to be as large as possible to reduce settling time while avoiding unjustified overshoot, and it is set to be 15 in this work.Substituting the controller parameters in (16), it is rewritten as
(21)Cs1+Ps=15s1+0.492e−0.000265s−1.Figure6 shows the frequency analysis of HPC in an open-loop function, Cs1+PsGs. The gain margin remains 392 db, while the phase margin is around 89.8°.Figure 6
Frequency analysis of HPC.


### 5.4. PID Controller

For theVo of FKYBC, standard controllers based on the PID control are frequently utilized. The PID controller approach may effectively control the low-order dynamics of power modulators.The PID controller is difficult to surpass in this case because the integrator raises the converter type number, reducing the error (steady sate). Controller has double zeros allowed for resonant physiognomies to be dampened and the transient result to be enhancing. The PID controller is simple structure for understanding in comparison with other control methodology. For new HPC comparison, the PID compensator was designed for the FKYBC. In this article, the Ziegler Nichols tuning method [7, 15, 20] is used to evaluate the PID control parameters for transfer function model FKYBC, which are derived from the previous sections. Then, transfer function of PID control is expressed as (22), and its frequency response of open-loop function is illustrated in Figure 7.
(22)GCs=0.051+200s+0.95s.Figure 7
Frequency response of PID control.From Figures6 and 7, new HPC with system removes huge frequency noise superior than the PID control.


## 5.1. Fundamental of Posicast

The step result of lightly damped model is revealed in Figure3. It is categorized by overshoot λ and the damped time period Td [6–9].Figure 3
Result of a lightly damped FKYBC 55 with step input.Figure4 indicates the structure of a classical half-cycle posicast. It is intended based on the λ and the Td. Precise information of the step result constraints produces a control whose smallest zeros frequency revoke the leading plant pair. It is known as half-cycle since the surrounded time delay is Td/2. Therefore, HPC arrangement is explained in Figure 5.Figure 4
The classical half-cycle posicast.Figure 5
FKYBC with HPC.The posicast function is prearranged via(14)Ps=λ1+λe−sTd/2−1.Ps is the λ and the Td. It fundamentally reforms the set values into two portions; primarily, control minus the scale quantity from the set value (R), in order to the peak of a lightly damped result matches to the set final value of FKYBC result. The peak time of the step response is Td/2. Next, this time delay, the complete value of the step reference is smeared to Gs, ensuring that the Vo remains constant at set value. Alternative clarification is that the set value, which was previously removed from the input, now cancels any undesirable overshoots since it is delayed by Td/2.


## 5.2. Fundamental of Posicast

The main components of new HPC,Ps is a scaling factor parameterized by λ and the time delay element parameterized by Td. There are two design steps for new HPC. First, Ps is developed for the averaged model of the FKYBC. Then, Cs is framed to compensate joined model of the 1+PsGs. The classical frequency domain approach is provided. A pure integrator type compensator is matched for the FKYBC to stabilize steady-state disturbances.
(15)Cs=ks.TheK gain is selected to reduce the settling time as much as feasible, but not to the point where the overshoot is excessive. A new HPC model (16) is attained by joining the compensator Cs and the Ps.
(16)Cs1+Ps=Ks1+λ1+λe−sTd/2−1.


## 5.3. New HPC

The small signal transfer function model of FKYBC along with their specifications is(17)Gs=vo∧λ∧=16144125275s2+240s+144349820.Undamped natural frequency is(18)ωn=1LC,(19)Td=2πωn1−ζ2,(20)λ=e−πζ/1−ζ2.The values of the new HPC parameters are computed using Equations (18) to (20). Then, Td=0.00053s and λ=0.978. The K is designed to be as large as possible to reduce settling time while avoiding unjustified overshoot, and it is set to be 15 in this work.Substituting the controller parameters in (16), it is rewritten as
(21)Cs1+Ps=15s1+0.492e−0.000265s−1.Figure6 shows the frequency analysis of HPC in an open-loop function, Cs1+PsGs. The gain margin remains 392 db, while the phase margin is around 89.8°.Figure 6
Frequency analysis of HPC.


## 5.4. PID Controller

For theVo of FKYBC, standard controllers based on the PID control are frequently utilized. The PID controller approach may effectively control the low-order dynamics of power modulators.The PID controller is difficult to surpass in this case because the integrator raises the converter type number, reducing the error (steady sate). Controller has double zeros allowed for resonant physiognomies to be dampened and the transient result to be enhancing. The PID controller is simple structure for understanding in comparison with other control methodology. For new HPC comparison, the PID compensator was designed for the FKYBC. In this article, the Ziegler Nichols tuning method [7, 15, 20] is used to evaluate the PID control parameters for transfer function model FKYBC, which are derived from the previous sections. Then, transfer function of PID control is expressed as (22), and its frequency response of open-loop function is illustrated in Figure 7.
(22)GCs=0.051+200s+0.95s.Figure 7
Frequency response of PID control.From Figures6 and 7, new HPC with system removes huge frequency noise superior than the PID control.


## 6. Simulation Results and Discussions

Simulation results and discussions of FKYBC with HPC and PID controllers are discussed in this part. The enactment of same converter with controllers is tested at various operating conditions via line variations, load variations, and steady-state region changes. The MATLAB/Simulink model of FKYBC with HPC is exposed in Figure8.Figure 8
MATLAB/Simulink model of HPC for FKYBC.


### 6.1. Line Variations

Figures9(a), 9(b), and 10 display the simulated Vo and duty cycle of FKYBC with HPC and PID control in transient state for various Vin such as 12 V, 16 V, and 18 V, respectively. From these responses, it is evident that the FKYBC with HPC has produced null overshoots and quick settling times of 0.02 s, 0.017 s, and 0.016 s, respectively, whereas the same model with PID control had more overshoots of 22 V and settling times of 0.032 s, 0.03 s, and 0.028 s at different Vin.Figure 9
SimulatedVo responses of FKYBC for different Vi using (a) HPC and (b) PID controller.
(a)(b)Figure 10
Simulated response of duty cycle of FKYBC with HPC for variousVin.


### 6.2. Load Variations

Figures11 and 12 demonstrate the simulated responses in the start-up for Vo and output current of FKYBC with HPC and PID control for various load R such as 4.76 ohm, 5.76 ohm, and 6.76 ohm. It is seen that Vo of the same converter with HYC has produced insignificant overshoot and settling time of 0.022 s, 0.021 s, and 0.02 s, while FKYBC model with PID control have generated more overshoots of 22 V and settling times of 0.032 s, 0.031 s, and 0.028 s at different load R.Figure 11
SimulatedVo results of FKYBC for various R (a) with HPC and (b) with PID control.
(a)(b)Figure 12
Simulated responses ofIo of FKYBC for unalike load R (a) with HPC and (b) with PID control.
(a)(b)


### 6.3. Various Controller Parameters

The simulatedVo responses of the FKYBC with HPC for various values Td and compensator gain K are displayed in Figures 13 and 14. From these results, it is evident that Vo of FKYBC with control has null overshoots and minimal steady-state error for different values of Td and K.Figure 13
Simulated response ofVo of FKYBC with HPC for dissimilar Td.Figure 14
Simulated results ofVo of FKYBC with HPC for various K.Figure15 shows the simulated Vo, δ, and noise quantity of the FKYBC with HPC. It is visibly seen that the Vo of FKYBC with new HPC has null overshoots and quick settling time during noise signal.Figure 15
Simulated results ofVo, δ, and noise of FKYBC with controller for constant Vin and controller parameters.


### 6.4. Comprehensive Analysis of Controllers

Figure16 shows the simulated Vo responses of FKYBC using an HPC and a PID controller. Over the PID controllers, the Vo of FKYBC with HPC has a negligible overshoot, a rapid settling time, and excellent noise suppression. The proposed HPC has performed well in this region.Figure 16
Simulated response ofVo FKYBC for fixed Vin=16V and load R=5.76Ω.


### 6.5. Steady-State Region and Set Point Variations

Table2 shows the recorded simulated output voltage of FKYBC with HPC for various Vin from 3 V to 20 V in steady-state region. From this table, it is found that the designed controller has proficient performance during the steady-state operating condition with small deviations. Figures 17(a) and 17(b) show the simulated Vo responses of FKYBC with HPC and PID control for the step change reference output voltage from 24 V to 30 V. From these figures, it is evident that the designed HPC is performed well during step change reference output voltage without overshoot and quick settling time over the PID control.Table 2
Variations with HPC forK=15, Td=0.00053s and λ=0.978, R=5.76Ω, Vref=24V.
Vin (V)Vo (V)Deviation (V)323.9820.018423.9900.01523.9920.008623.99250.0055723.9940.006823.99510.0051923.99610.00311023.9970.0031123.9980.0021223.99840.00161323.99860.00141423.9990.0011523.9990.0011624Nil1724.010.011824.020.021924.040.042024.060.06Figure 17
Response ofVo of FKYBC with designed controller when reference output voltage from 24 V to 30 V: (a) HPC and (b) PID control.
(a)(b)


## 6.1. Line Variations

Figures9(a), 9(b), and 10 display the simulated Vo and duty cycle of FKYBC with HPC and PID control in transient state for various Vin such as 12 V, 16 V, and 18 V, respectively. From these responses, it is evident that the FKYBC with HPC has produced null overshoots and quick settling times of 0.02 s, 0.017 s, and 0.016 s, respectively, whereas the same model with PID control had more overshoots of 22 V and settling times of 0.032 s, 0.03 s, and 0.028 s at different Vin.Figure 9
SimulatedVo responses of FKYBC for different Vi using (a) HPC and (b) PID controller.
(a)(b)Figure 10
Simulated response of duty cycle of FKYBC with HPC for variousVin.


## 6.2. Load Variations

Figures11 and 12 demonstrate the simulated responses in the start-up for Vo and output current of FKYBC with HPC and PID control for various load R such as 4.76 ohm, 5.76 ohm, and 6.76 ohm. It is seen that Vo of the same converter with HYC has produced insignificant overshoot and settling time of 0.022 s, 0.021 s, and 0.02 s, while FKYBC model with PID control have generated more overshoots of 22 V and settling times of 0.032 s, 0.031 s, and 0.028 s at different load R.Figure 11
SimulatedVo results of FKYBC for various R (a) with HPC and (b) with PID control.
(a)(b)Figure 12
Simulated responses ofIo of FKYBC for unalike load R (a) with HPC and (b) with PID control.
(a)(b)


## 6.3. Various Controller Parameters

The simulatedVo responses of the FKYBC with HPC for various values Td and compensator gain K are displayed in Figures 13 and 14. From these results, it is evident that Vo of FKYBC with control has null overshoots and minimal steady-state error for different values of Td and K.Figure 13
Simulated response ofVo of FKYBC with HPC for dissimilar Td.Figure 14
Simulated results ofVo of FKYBC with HPC for various K.Figure15 shows the simulated Vo, δ, and noise quantity of the FKYBC with HPC. It is visibly seen that the Vo of FKYBC with new HPC has null overshoots and quick settling time during noise signal.Figure 15
Simulated results ofVo, δ, and noise of FKYBC with controller for constant Vin and controller parameters.


## 6.4. Comprehensive Analysis of Controllers

Figure16 shows the simulated Vo responses of FKYBC using an HPC and a PID controller. Over the PID controllers, the Vo of FKYBC with HPC has a negligible overshoot, a rapid settling time, and excellent noise suppression. The proposed HPC has performed well in this region.Figure 16
Simulated response ofVo FKYBC for fixed Vin=16V and load R=5.76Ω.


## 6.5. Steady-State Region and Set Point Variations

Table2 shows the recorded simulated output voltage of FKYBC with HPC for various Vin from 3 V to 20 V in steady-state region. From this table, it is found that the designed controller has proficient performance during the steady-state operating condition with small deviations. Figures 17(a) and 17(b) show the simulated Vo responses of FKYBC with HPC and PID control for the step change reference output voltage from 24 V to 30 V. From these figures, it is evident that the designed HPC is performed well during step change reference output voltage without overshoot and quick settling time over the PID control.Table 2
Variations with HPC forK=15, Td=0.00053s and λ=0.978, R=5.76Ω, Vref=24V.
Vin (V)Vo (V)Deviation (V)323.9820.018423.9900.01523.9920.008623.99250.0055723.9940.006823.99510.0051923.99610.00311023.9970.0031123.9980.0021223.99840.00161323.99860.00141423.9990.0011523.9990.0011624Nil1724.010.011824.020.021924.040.042024.060.06Figure 17
Response ofVo of FKYBC with designed controller when reference output voltage from 24 V to 30 V: (a) HPC and (b) PID control.
(a)(b)


## 7. Experimental Results and Discussions

Experimental result of FKYBC with HPC is discussed in this section. The performance of the FKYBC with HPC is verified at transient state and line variations. The prototype model of FKYBC with HPC (LED driver load) is shown in Figure18. The parameters of the power circuits are as follows:Figure 18
Hardware model of FKYBC with HPC.S1−S2IRFN540MOSFETDbFR306DiodesCb–Co1953μF&866μF/1000VL8μH/5AThe constraints of the HPC are implemented in ArduinoUno-ATmega328P microcontroller as shown in Figure18. Here, opto-coupler MCT2E along with amplification circuit is used as driver circuit. Figures 19(a)–19(c) show the experimental Vo and Vin responses of the FKYBC with HPC through the transient region and input voltage changing from 16 V to 12 V and 16 V to 18 V. From these results, it is evident that the FKYBC with HPC has minimal peak overshoots and quick settling time in line and start-up regions. Figure 20 shows the graphical numerical simulation and experimental analysis of output voltage of FKYBC with HPC at various input voltage. From this result, the small deviations of Vo of same converter with different input voltage for simulation/experiments are found.Figure 19
ExperimentalVo responses of FKYBC with HPC: (a) transient state, (b) input voltage change from 16 V to 12 V, and (c) Vin change from 16 V to 18 V [Ch 1: 10 V/Div, Ch 2: 5 V/Div].
(a)(b)(c)Figure 20
Graphical numerical simulation and experimental analysis ofVo of FKYBC with HPC at different Vin.


## 8. Conclusion

A new HPC for output voltage regulation of FKYBC in CCM has been established effectively using Simulink software besides prototype models. The new HPC parameters were implemented in digital platform with the help of the Arduino Uno-ATmega328P microcontroller. The elements of posicast are directly computed for analytical and ideal approaches of FKYBC. The main benefits of new designed HPC over PID control have better damping abilities, proficient output voltage regulation in line/load variations, minimized overshoots, quick settling time, reduced high frequency noise, easy digital implementation, and minimizing sensitivity of traditional approach. The steady-state response of the FKYBC has improved based on the integral compensator along with single gain of new HPC. In gap to the PID control, the new HPC only desires to adjust theK, and the compensated plant has enhanced the gain/phase margins and, its constricted open-loop bandwidth confirms conquest of huge frequency noise. Finally, the designed new HPC has proficient output voltage regulation for FKYBC in CCM. It is apt for power supply in LED driver, medical instruments, solar system, and mobile communication.



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*Source: 8495432-2022-01-11.xml*