# Open Circuit Fault Diagnosis in Five-Level Cascaded H-Bridge Inverter

Authors: Pavan Mehta; Subhanarayan Sahoo; Harsh Dhiman
Journal: International Transactions on Electrical Energy Systems
 (2022)

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## Abstract

The development of power electronic converter, especially multilevel converter, is remarkable for several decades. The complex switching and increased power of semiconductor devices are prime reasons for faults in multilevel inverters and have raised question about reliability. To improve the reliability, a cost-effective solution in terms of fault diagnosis is essential. In this context, this study proposed an open circuit fault (OCF) diagnosis technique for a switching device in a five-level cascaded H-bridge multilevel inverter using fuzzy logic control. The OCF features like output voltage total harmonic distortion (THD) and normalized average output voltage are fuzzed as input variables of the fuzzy logic controller. These input variables are divided into various triangular antecedent membership function (MF). The output produced by the fuzzy controller as consequent MFs is divided into different levels to identify the faulty switch. In order to make a complete fault-tolerant structure, a reduced modulation index-based postfault control is suggested to get a balanced output voltage. The MATLAB/Simulink results and prototype results are the evidence to support the proposed fault diagnosis technique.


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## Body

## 1. Introduction

Over the last several decades, the application area of multilevel (ML) inverters is grown very fast. The different applications of ML inverters are mine hoists, gas turbine starters, hydro-pumped storage, high-voltage DC (HVDC) transmission, reactive power compensation, wind energy conversion, power generation using PV cells, railway traction, AC drives, and marine propulsion [1]. Traditionally, the two-level three-phase voltage source inverters (VSIs) were used to operate the drives. For the high-power applications, the limitations with two-level VSI arise due to the limited voltage withstand capacity of power semiconductor switching devices. Therefore, multilevel (ML) VSI was adopted, which has many advantages such as low total harmonic distortion (THD), low electromagnetic interference (EMI), reduced filter size, and low dv/dt [2] due to its staircase output waveform quality. The neutral point clamped (NPC) [3], flying capacitor (FC) [4], and cascaded H-bridge (CHB) [5] are the basic structures of ML converters. The other popular structures such as active neutral point clamped (ANPC) [6] and DC link converter [7] are deduced from basic structures to overcome their limitations.In the ML inverter, the probabilities of failure of power semiconductor switching devices are higher due to interaction between the numbers of other switching devices. It reduces the reliability of the ML inverter system. In a broad, the causes of fault in a power semiconductor device can be categorized as exterior and interior. The exterior possibilities for switch failure may be swelled or dipped from the external supply connected to the terminals of the ML inverter, and high dynamic changes at the load side and short circuit of the load. On the other side, the interior possibilities for switch failures may be thermomechanical fatigue, gate misfiring, and saturation of semiconductor materials [8]. Due to the abovementioned causes, the power switches may be either permanently opened or closed. Depending upon the cause of failure, if the switching device is permanently open then it is called an open circuit fault (OCF) and if the switch is permanently closed then it is called a short circuit fault (SCF). The SCF in any switching device must be detected within 10 µsec (depending on the semiconductor chip). After the fault detection of SCF, the faulty switch must be isolated, and a complete shutdown is mandatory [9]. On the other side, during the OCF the ML inverter peruses to operate in faulty condition with reduced output quality. However, this may lead to increased voltage stresses across the other healthy switches. Hence, the faulty switch location must be identified.The different fault diagnosis techniques are reported in the literature such as time voltage criterion [10], switching time-domain OCF detection [11], asymmetric zero voltage switching [12], neural network and artificial intelligence (AI) [13, 14], histogram [15], harmonic frequency analysis [16], and output voltage or current analysis [17, 18]. In general, the fault diagnosis process is to perform different signal systems or mathematical operations on the sensed output quantity and to extract the unusual features of the sensed output quantity like voltage, current, and power. The fault diagnosis techniques are classified into three basic categories: waveform analysis, AI-based techniques, and harmonic frequency analysis as shown in Figure 1.Figure 1
Classification of fault diagnosis methods for CHB ML inverter.The abovementioned techniques require extra sensors, very fast controllers, and more computational efforts for fault diagnosis. Therefore, this study proposes a cost-effective OCF diagnosis technique for a switch of five-level CHB ML inverter using fuzzy logic control merged with waveform analysis. Also, the fault diagnosis time taken by the proposed technique is very less is ensured. The different fuzzy logic control literature studies are available for the following: switching of CHB ML inverter [19], nine-phase IM drive fault-tolerant operation [20], and ML inverter with photovoltaic cell [21]. In this study, fuzzy control theory is used to fuzz the fault symptom variables and related fuzzy output levels generated to identify the faulty switch. For implementing this technique, we require only one voltage sensor per phase, which is already available with main control of any closed-loop operation and no requirement of any extra hardware circuitry. It can be implemented in any existing system without making major changes in the control scheme.In Section2, the overview of CHB ML inverter for healthy and faulty conditions and the principle of fault diagnosis technique are presented. In Section 3, the fuzzy logic control is highlighted for OCF diagnosis. The THD and normalized average output phase voltage threshold estimation is discussed in Section 4. The simulation results are discussed in Section 5. The postfault control strategy is suggested in Section 6. The hardware prototype of the five-level CHB ML inverter and its results are presented in Section 7.


## 2. CHB ML Inverter and OCF

The generalized structure of the single-phase five-level CHB ML inverter and healthy condition output phase voltageEOX is shown in Figure 2. The output voltage of any phase X depends on the individual cell output (Ecell). The output voltage of a cell can be expressed as follows:(1)Ecell=Sf1or5−Sf2or6,where Ecell is the output voltage of any one cell of the Xth phase, Sf1 or 5 and Sf2 or 6 are the switching functions (0 or 1) of switch SX1 or SX5 and SX2 or SX6 of a cell, and EDC is the DC source of a cell. The total output phase voltage EOX is the summation of the individual cell output and can be given as follows:(2)EOX=Ecell1+Ecell2.Figure 2
Structure of five-level CHB ML inverter and output phase voltage.The output voltage depends on its occupied switching states, i.e.,2p, p, o, n, and 2n. For an illustration, as shown in the waveform of Figure 2, during the healthy condition, if the output voltage levels of any leg are +2EDC–+EDC–0–−EDC–−2EDC then all switching states are occupied and none of the switching state is empty. Figures 3(a) and 3(b) show the output phase voltage, empty and occupied switching states, and current flow during healthy and faulty conditions for switches SX1 and SX6, respectively, during their switching operations.Figure 3
Operation of five-level CHB ML inverter under OCF condition for (a) SX1 and (b) SX2.
(a)(b)As shown in Figure3, if we apply Kirchhoff’s voltage law (KVL) in the circuit, then the green line will be the actual path of current before the fault at the respective switching state of the switch. When there is the condition of OCF occurs, then according to KVL the current path will change and flow as per the red dotted line at respective switching states. For an illustration, during the healthy condition of SX1 the current path is EDC-SX1-a-d-SX7-EDC-SX5-b-SX3-EDC, which is the cause for generating +2EDC voltage level. While during the faulty condition of SX1, if we apply KVL then the direction of current will be as follows: a-d-SX7-EDC-SX5-b-SX3-DX4-a, which will be the cause for missing of +2EDC voltage level. Therefore, the switching states p, o, n, and 2n are occupied and 2p is considered as empty as mentioned in Table 1. In this manner, we can find the current path and output voltage during healthy and faulty conditions for all switches. The expected current path, actual current path, expected output voltage level, and the missing output voltage level at the time of OCF are summarized in Table 2.Table 1
Occupied states, empty states, and membership functions for OCF in switch.
Condition of switch in leg xOccupied statesEmpty statePossible output voltage levelAntecedent MFsConsequent MFsSX1SX2SX3SX4SX5SX6SX7SX8TXEsavNSXiOkOkOkOkOkOkOkOk2p, p, o, n, 2nnull+2EDC, +EDC, 0, −EDC, −2EDCt0 = Se0 = ZR0fOkOkOkOkOkOkOkp, o, n, 2n2p+EDC, 0, −EDC, −2EDCt1 = Me2 = NSIOkfOkOkOkOkOkOk2p, p, o, 2nn+2EDC, 0, −EDC, −2EDCt1 = Me3 = PMIIOkOkfOkOkOkOkOk2p, n, 2np, o+2EDC, −EDC, −2EDCt2 = Le6 = NLIIIOkOkOkfOkOkOkOk2p, p, 2nn, o+2EDC, +EDC, −2EDCt2 = Le5 = PLIVOkOkOkOkfOkOkOk2p, o, n, 2np+2EDC, 0, −EDC, −2EDCt1 = Me4 = NMVOkOkOkOkOkfOkOk2p, p, o, n2n+2EDC, +EDC, 0, −EDCt1 = Me1 = PSVIOkOkOkOkOkOkfOk2p, n, 2np, o+2EDC, −EDC, −2EDCt2 = Le6 = NLVIIOkOkOkOkOkOkOkf2p, p, 2nn, o+2EDC, +EDC, −2EDCt2 = Le5 = PLVIIITable 2
Current path for healthy and faulty condition for all switches.
OCF switchCurrent path for healthy conditionCurrent path for faulty conditionMissing output voltage levelSX1EDC-SX1-a-d-SX7-EDC-SX5-c-b-SX3-EDCa-d-SX7-EDC-SX5-c-b-SX3-DX4-EDC+2EDCSX2EDC-SX2-b-c-SX8-DX7-d-b-SX3-EDCb-c-SX8-DX7-d-b-SX3-DX4-a-EDCSX3EDC-SX1-a-d-SX7-DX8-c-b-SX3a-d-SX7-DX8-c-b-DX2-SX1+EDCSX4EDC-SX2-b-c-SX8-DX7-d-b-SX4b-c-SX8-DX7-d-a-DX1-SX2-EDCSX5EDC-SX5-c-b-SX3-DX4-a-d-SX7c-b-SX3-DX4-a-d-SX7-DX8+EDCSX6EDC-SX2-b-c-SX8-EDC-SX6-d-a-SX4-EDCEDC-SX2-b-c-SX8-DX7-d-a-SX4-EDC-2EDCSX7c-b-SX3-DX4-a-d-DX6-SX5EDC-SX5-c-b-SX3-DX4-a-d-SX7+EDCSX8EDC-SX6-d-a-SX4-DX3-b-c-SX8d-a-SX4-DX3-b-c-DX5-SX8-EDCThe other switching state’s occupancy, emptiness, and output voltage related to the faulty switch in legx where x ϵ {A, B, C} are shown in Table 1. From the analysis of Table 1, the output voltage THD of the xth phase depends on the empty states and related possible output voltage level. This is because the nonlinearity of the output voltage will increase as the empty output voltage state increases. The THD index (TX) for OCF in SX1 and SX6 is comparatively low but higher than the healthy condition TX. Similarly, the TX of SX2 and SX5 are almost the same as they have only one empty state been n and p, respectively. The lower switches in each bridge of all the three phases are utilized for zero output voltage switching. Hence, the OCF in the switches SX3, SX4, SX7, and SX8 gives the highest TX as they create the two empty states, namely, (o,  p), (o, n), (o, p), and (o, n), respectively. In this contrast, THD of the output phase voltage can be a fault symptom variable. The identification of the different range of TX is achieved by selecting appropriate threshold values. The TX of output phase voltage is given by equation (3). However, to get confidence in the correct fault diagnosis and exact fault location another threshold is required for two-stage verification. Therefore, the normalized average output phase voltage (ESavN) is computed and compared with their threshold values. To compute the value of ESavN, the average values of all the phase voltages (EA[k], EB[k], and EC[k]) are calculated as per equation (4), where n is the total number of samples and k is sampling index. For better resolution, at least 50 samples should be collected from each fundamental cycle. The fundamental output phase voltages are expressed as in equation (6), where Em is the maximum voltage and ω is the fundamental frequency. The average park’s transformation on voltage vector is applied and represented as per equation (5). During the normal operating conditions or healthy operation, the value of EXav is almost zero. When the fault occurs, then the value of EXav deviates and crosses the threshold limit.(3)%THDTX=∑h=2hmaxEOXh2EOX1×100,(4)EXavk=1n∑k=1nEXk,XεA,B,C,(5)Esavk=Edavk+j×Eqavk,Where(6)EAk=Em×sinω×Ts×k,EBk=Em×sinω×Ts×k−2π3,ECk=Em×sinω×Ts×k+2π3,Where(7)Edavk=23EAavk−13EBavk+ECavk,Eqavk=13EBavk−13ECavk.However, this deviation needs to be a normalized value calledEXN that is calculated and expressed as equation (8) and the average of normalized value ESavN is calculated as per equation (10). The normalized average output phase voltage varies depending upon the faulty switch. For illustration, during the normal operating conditions the ESavN is almost zero and floats between +0.1 and −0.1. When the fault occurs in any of the switches, which is the cause for 2p or p empty states, the ESavN goes to a different range in negative values. On the other side, when the fault occurs in any of the switches, which is cause for 2n or n empty states, the ESavN goes to a different range in positive values.(8)EXN=EXkEsk,XεA,B,C,(9)Esk=Esdk+jEsqk,(10)EsavNk=EsavkEsk.


## 3. OCF Diagnosis Using Fuzzy Logic Control

From the above discussion, theTX and ESavN are the fault symptom variables and combinedly used to accurately diagnose the faulty switch. The detailed algorithms of the proposed method are as follows.


### 3.1. Fuzzy Logic Fault Diagnosis Reasoning

The diagnosis architecture is created based on the analytical and heuristic knowledge of symptoms of the CHB ML inverter. Heuristic knowledge in the form of qualitative process models can be expressed as if-then rules. The nine input MFs and variablesTX and ESavN are fuzzified as equation (11).(11)TX=t0,0≤TX≤δ1,t1,δ1≤TX≤δ2,t2,δ2≤TX≤δ3,ESavN=e0,ESavN<λ2,λ1,e1,λ1<ESavN<λ3,e2,λ2<ESavN<λ4,e3,λ3<ESavN<λ5,e4,λ4<ESavN<λ6,e5,λ5<ESavN,e6,λ6<ESavN.The (δ1–δ3) and (λ1–λ6) are different thresholds for TX and ESavN for different empty states. The antecedent membership functions are designed based on the input variables. The distribution of TX is performed as t0, t1, and t2 present small TX (S), medium TX (M), and large TX (L), respectively. Similarly, the distribution of EsavN is performed as e0, e1, e2, e3, e4, e5, and e6 present different normalized output voltages, namely, zero (ZR), positive small (PS), positive medium (PM), positive large (PL), negative small (NS), negative medium (NM), and negative large (NL), respectively. The consequent MFs are designed in such a way to represent the faulty switch identification number from I (SX1) to VIII (SX8), and 0 represents the healthy condition. Figures 4(a) and 4(b) show the graphical representation of the antecedent MFs and consequent MFs, respectively. The output of fuzzy logic will be designated as 0 or 1 for healthy and faulty conditions, respectively, for each switch.Figure 4
(a) Antecedent MF distribution. (b) Consequent MF distribution.
(a)(b)


### 3.2. Extraction of Fuzzy Rules

Based on the relationships in Table1, the fuzzy rules are extracted. In general, the fuzzy control system consists of fuzzification, fuzzy inference, and defuzzification illustrated in Figure 5.(i)
Fuzzification: Fuzzification is the process of defining the fuzzy variables from input variables using MFs. As explained in Section3.1, the TX and ESavN are the input variables. The (S, M, and L) and (ZR, PS, PM, PL, NS, NM, and NL) are different MFs of TX and ESavN, respectively.(ii)
Fuzzy interface: It expresses the relation between input fuzzy variables and output using if-then rules. The various fuzzy rules can be expressed in Table1. There will be total of nine rules associated per phase (x) in the fuzzy interface. For illustration, if TX = M and ESavN = NS then output SXi = I represents SX1 OCF. If TX = M and ESavN =  PM then output SXi = II represents SX2 OCF. If TX = M and ESavN = PS, then output SXi = VI represents SX6 OCF. The fault features created by switches SX3–SX7 and SX4–SX8 are the same. Hence, identification of the faulty switch is achieved on a priority basis. If the OCF occurred at SX7, then SX3 will be initially appeared as a faulty switch as per priority. However, in the next fundamental cycle the correct faulty switch will be diagnosed, i.e., SX7. On the other side, if the OCF occurred at SX8, then SX4 will be initially appeared as a faulty switch as per priority and in the next fundamental cycle the correct faulty switch will be diagnosed, i.e., SX8. The time taken for fault diagnosis will be higher as much as one fundamental cycle for SX7 and SX8.(iii)
Defuzzification: The defuzzification can be defined as the procedure of converting the fuzzy output set into the crisp set. The max-min composition and centroid of area method are selected for defuzzification in the proposed method. The output of consequent MFs as shown in Figure4(b) will decide the output of the fuzzy logic controller and so faulty switch. The different levels of output are selected from 0 to VIII for switch faults SX1 to SX8, which can directly reflect the number of respective switch fault as shown in the simulation results section, where zero indicates the healthy condition.Figure 5
Fuzzy interfacing process.


## 3.1. Fuzzy Logic Fault Diagnosis Reasoning

The diagnosis architecture is created based on the analytical and heuristic knowledge of symptoms of the CHB ML inverter. Heuristic knowledge in the form of qualitative process models can be expressed as if-then rules. The nine input MFs and variablesTX and ESavN are fuzzified as equation (11).(11)TX=t0,0≤TX≤δ1,t1,δ1≤TX≤δ2,t2,δ2≤TX≤δ3,ESavN=e0,ESavN<λ2,λ1,e1,λ1<ESavN<λ3,e2,λ2<ESavN<λ4,e3,λ3<ESavN<λ5,e4,λ4<ESavN<λ6,e5,λ5<ESavN,e6,λ6<ESavN.The (δ1–δ3) and (λ1–λ6) are different thresholds for TX and ESavN for different empty states. The antecedent membership functions are designed based on the input variables. The distribution of TX is performed as t0, t1, and t2 present small TX (S), medium TX (M), and large TX (L), respectively. Similarly, the distribution of EsavN is performed as e0, e1, e2, e3, e4, e5, and e6 present different normalized output voltages, namely, zero (ZR), positive small (PS), positive medium (PM), positive large (PL), negative small (NS), negative medium (NM), and negative large (NL), respectively. The consequent MFs are designed in such a way to represent the faulty switch identification number from I (SX1) to VIII (SX8), and 0 represents the healthy condition. Figures 4(a) and 4(b) show the graphical representation of the antecedent MFs and consequent MFs, respectively. The output of fuzzy logic will be designated as 0 or 1 for healthy and faulty conditions, respectively, for each switch.Figure 4
(a) Antecedent MF distribution. (b) Consequent MF distribution.
(a)(b)


## 3.2. Extraction of Fuzzy Rules

Based on the relationships in Table1, the fuzzy rules are extracted. In general, the fuzzy control system consists of fuzzification, fuzzy inference, and defuzzification illustrated in Figure 5.(i)
Fuzzification: Fuzzification is the process of defining the fuzzy variables from input variables using MFs. As explained in Section3.1, the TX and ESavN are the input variables. The (S, M, and L) and (ZR, PS, PM, PL, NS, NM, and NL) are different MFs of TX and ESavN, respectively.(ii)
Fuzzy interface: It expresses the relation between input fuzzy variables and output using if-then rules. The various fuzzy rules can be expressed in Table1. There will be total of nine rules associated per phase (x) in the fuzzy interface. For illustration, if TX = M and ESavN = NS then output SXi = I represents SX1 OCF. If TX = M and ESavN =  PM then output SXi = II represents SX2 OCF. If TX = M and ESavN = PS, then output SXi = VI represents SX6 OCF. The fault features created by switches SX3–SX7 and SX4–SX8 are the same. Hence, identification of the faulty switch is achieved on a priority basis. If the OCF occurred at SX7, then SX3 will be initially appeared as a faulty switch as per priority. However, in the next fundamental cycle the correct faulty switch will be diagnosed, i.e., SX7. On the other side, if the OCF occurred at SX8, then SX4 will be initially appeared as a faulty switch as per priority and in the next fundamental cycle the correct faulty switch will be diagnosed, i.e., SX8. The time taken for fault diagnosis will be higher as much as one fundamental cycle for SX7 and SX8.(iii)
Defuzzification: The defuzzification can be defined as the procedure of converting the fuzzy output set into the crisp set. The max-min composition and centroid of area method are selected for defuzzification in the proposed method. The output of consequent MFs as shown in Figure4(b) will decide the output of the fuzzy logic controller and so faulty switch. The different levels of output are selected from 0 to VIII for switch faults SX1 to SX8, which can directly reflect the number of respective switch fault as shown in the simulation results section, where zero indicates the healthy condition.Figure 5
Fuzzy interfacing process.


## 4. Estimation of Thresholds

The threshold estimation process plays a key role in the selection of fuzzy rules. Hence, the acceptable threshold authentication is required to avoid false fault diagnosis. We know the fact that THD may change with the different loading conditions and modulation index. On the other side, the normalized average phase output voltage has different levels of value in positive and negative regions depending upon the faulty switch. Once the faulty phase is identified using TX, the ESavN will be calculated. The actual value is compared with the thresholds, and the faulty switch is declared.Figures6(a) and 6(b) show the TX and ESavN variation with respect to modulation index and their thresholds for various fault conditions. The (δ1, δ2, and δ3) are the thresholds selected for THD for no-fault condition, fault in SX1/SX6, and fault in SX2/SX5, respectively. The values beyond δ3 represent the fault in SX3/SX4/SX7/SX8. The selection of the THD threshold gives a fair fault signature up to a 0.4 modulation index. In practical conditions, it is not an advisable modulation index below 0.5 because the output voltage will be halved. The value of ESavN floats between +0.01 and −0.01 in healthy condition. When the fault occurs in the switch, which is cause for the 2p or p empty states, the value of ESavN goes to negative. While the OCF is in the switch, which causes 2n or n empty states, the value of ESavN goes to positive. The (λ1, λ2, λ5, and λ6) are the thresholds selected for ESavN for faults in SX1, SX6, SX5, and SX2 respectively. The thresholds beyond λ3 and λ4 represent the faults in SX3/SX7 and SX4/SX8, respectively.Figure 6
(a) THD threshold estimation. (b)ESavN threshold estimation.
(a)(b)


## 5. Simulation Results and Discussion

The proposed fault diagnosis method is tested using MATLAB/Simulink. For testing the robustness of the fault diagnosis technique, the simulation is performed with a 0.8 power factor with a three-phase IM drive. The level-shifted pulse width modulation technique (LS-PWM) is used for switching.Figure7 shows the THD plot for all three phases for healthy and SA1 faulty conditions. When there is a healthy condition, the THD of all three phases are the same and so TX will not cross the threshold limit. As soon as the OCF occurs in switch SA1, the TA will cross the threshold limit δ1 as discussed in Section 4. The THD of the remaining two phases will be the same. Therefore, the faulty phase is now identified and ESavN will be calculated. The value of TX for different switch faults will be different depending upon the absence of output voltage level as discussed in Section 2.Figure 7
THD plot for healthy andSA1 faulty conditions.By analyzing Figure8(a), it can be noted that the fault is created at 0.14 sec in switch SX1, yet the effect of fault in the output phase voltage waveform and output current cannot be seen. The fault diagnosis algorithm will only be active when the faulty switch’s switching state arrives.Figure 8
Simulated OCF diagnosis for (a) SX1 and (b) SX4.Hence, till the switching state of the respective faulty switch, the OCF remains undiagnosed. The value ofESavN at the time of fault is −0.035 as SX1 is cause for missing in 2p empty state. The fuzzy logic output is considered as a fault diagnosis signal, and its magnitude is 1 V as per the fuzzy algorithm. The OCF for switch SX1 is diagnosed within 0.025 sec. Figure 8(b) shows the simulation results for OCF in switch SX4. As per discussion in Table 1, the fault in SX4 and SX8 both will cause for n and o empty states. Therefore, both will have the same fault features. The value of ESavN is +0.05, and fuzzy output settles at 4 V. The fault diagnosis of SX4 is achieved by approximately 0.038 sec.Figure9(a) shows the OCF results for switch SX6. The value of ESavN is +0.035, and fuzzy output represents the 6 V. Figure 9(b) shows the results for OCF in switch SX7. It can be observed that the SX3 and SX7 provide the same empty states, i.e., o and p. As per priority, SX3 will be diagnosed as the faulty switch and SX7 remains undiagnosed but in the next fundamental cycle SX7 is detected as the faulty switch. The fault is detected in two and half fundamental cycles or 0.045 sec.Figure 9
Simulated OCF diagnosis for (a) SX6 and (b) SX7.


## 6. Postfault Control

In Section2, we have seen that the CHB ML inverter will pursue to operate with reduced output quality under the OCF in a switch, which prevents the complete shutdown of load. However, this will create unbalancing in the three-phase output voltage. The unbalanced three-phase output will create the undesired harmonics, torque pulsations, and vibrations in the load. Therefore, after the fault diagnosis the faulty switch must get isolated and a balanced three-phase supply must be ensured to the load. There are several fault reconfiguration techniques reported in literature such as zero or neutral shifting, redundant cascaded H-bridge cell, and redundant switching states [22].In this study, we have implemented a reduced modulation index (MI) strategy as postfault control. This will bypass the faulty switch cell, and one cell forms the remaining two phases and gives the balanced three-phase three-level output. The MI can be defined as equation (12), and Figure 10 shows the principle of reduced MI, where Am is the amplitude of the modulation wave, Ac is the modulation of the carrier wave, and n defines the number of levels for output.(12)MI=Amn−1×AC.Figure 10
Fault reconfiguration control.If we consider the OCF in switch SX1, then after fault diagnosis the switching cell of the faulty switch and switching cell from the other two phases will get bypassed by making SX3 and SX4 permanently turned on for the faulty cell. Therefore, the updated switching strategy will be as shown in Table 3.Table 3
Updated switching strategy after OCF in SX1.
SX1SX2SX3SX4SX5SX6SX7SX8+2EDC————————+EDC——OnOnOnOffOnOff0——OnOnOffOffOnOn−EDC——OnOnOffOnOffOn−2EDC————————Figure11 shows the simulated output phase voltage and current profile for postfault control, when the OCF occurs in switch SX1. The other switch OCF and its updated switching strategy can be defined in the same manner. It is now clear that we will get the balanced output voltage by reducing the MI. The time taken to reconfigure the OCF depends on the faulty switch, its switching state, sample time, and controller speed.Figure 11
Output voltage and current with fault reconfiguration for OCF in SX1.


## 7. Hardware Prototype Results and Discussion

The proposed fuzzy logic-based fault diagnosis technique is also validated through hardware prototype results. The single-phase 0.5 HP induction motor load is considered for analysis. The 20N10 IGBT is utilized as a switching device, and 1 kHz switching frequency pulses are given through the STM32F407VG controller and TLP 250 gate driver and isolator. The LV25P voltage sensor is used for the feedback of output phase voltage. The OCF is created by removing the respective gate signal from the controller. The complete hardware setup is shown in Figure12. The output of fuzzy logic control is also shown to validate the fault diagnosis technique. The fault diagnosis time in prototype results is also very similar to the simulation results.Figure 12
Complete hardware prototype setup.Figure13(a) shows the results for output voltage with SX1 fault. The x-axis is being set at 10 ms/div, and the y-axis is being set at 1,000 V/div and 5 V/div for channels 1 and 2, respectively. The fuzzy output is high after 26 ms of fault creation with 1V magnitude, which shows the fault diagnosis time for switch SX1. In the simulation result, the fault diagnosis time was 25 ms, which is very close. The TX is calculated from the output phase voltage fast Fourier transform (FFT). The mapping of TX is shown for the healthy condition in Figure 14. The 32% of THD is mapped as 320 mV. The deviation of TX more than the threshold will indicate the faulty condition. Figure 13(b) shows the output phase voltage for OCF in SX4, which is taking 30 ms for fault diagnosis. The reason behind it is the fault will be diagnosed only when its switching state will arrive. The fault remains undiagnosed till its switching state is not present, and it is very clear that it is the cause for missing in o and n empty states. Figures 13(c) and 13(d) show the fault diagnosis results for OCF in SX6 and SX7, respectively. The time taken for fault diagnosis for each OCF will vary from one fundamental cycle to two and half fundamental cycles depending upon the empty state.Figure 13
Hardware prototype results for OCF in (a) SX1 (b) SX4 (c) SX6 and (d) SX7.
(a)(b)(c)(d)Figure 14
Mapping of output voltage THD for healthy condition.Figure15 shows the output voltage waveform, switching pulse, and fault-diagnosed signal for OCF in switch SX1 with the postfault control technique. After the fault, the output voltage will get unbalanced for all three phases. If we reduce the MI and change the switching strategy as mentioned in Table 3 after fault diagnosis, then the five-level ML inverter will produce the balanced three-level output as shown in Figure 15.Figure 15
Fault reconfiguration for SX1 OCF.From the above results, the OCF of a switch can be diagnosed in one switching period to two fundamental cycles of 50 Hz (5 ms to 40 ms) depending upon the faulty switch and switching state at the time of fault. However, the fault diagnosis time may depend upon the controller, sensor, switching frequency, and the sample time chosen. In the literature mentioned in Section1, the fault diagnosis time claimed by different techniques mentioned in Section 1 are as follows: AI-based techniques take about six fundamental cycles of 60 Hz (up to 130 ms), for asymmetric zero voltage switching, the diagnostic time is about two fundamental cycles of 60 Hz (up to 32 ms), and for harmonic switching frequency analysis, the fault diagnostic time will vary from one switching frequency to one fundamental cycle.


## 8. Conclusions

This study proposed a fault diagnosis technique for the five-level ML inverter using fuzzy logic control. The proposed method is very easy to implement and cost-effective compared to other methods in terms of sensor use and other control requirements. Moreover, the computational efforts and conceptual complexity are also less compared to AI-based and frequency analysis-based fault diagnosis techniques. The fault diagnosis is achieved by output phase voltage fault symptom variables. These variables are fuzzed in the fuzzy logic controller, and the fault detection is achieved using fuzzy rules. The simulation and prototype results support the algorithm. It is also applicable with different modulation indices and power factors. The postfault control makes the system completely fault tolerant. As the number of levels increases, the probable faulty switches also increase; hence, the proposed fault diagnosis technique can only limit for five-level ML inverter OCF.



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