# Superior Antireflection Coating for a Silicon Cell with a Micronanohybrid Structure

Authors: Hsi-Chien Liu; Gou-Jen Wang
Journal: International Journal of Photoenergy
 (2014)

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## Abstract

The object of this paper is to develop a high antireflection silicon solar cell. A novel two-stage metal-assisted etching (MAE) method is proposed for the fabrication of an antireflective layer of a micronanohybrid structure array. The processing time for the etching on an N-type high-resistance (NH) silicon wafer can be controlled to around 5 min. The resulting micronanohybrid structure array can achieve an average reflectivity of 1.21% for a light spectrum of 200–1000 nm. A P-N junction on the fabricated micronanohybrid structure array is formed using a low-cost liquid diffusion source. A high antireflection silicon solar cell with an average efficiency of 13.1% can be achieved. Compared with a conventional pyramid structure solar cell, the shorted circuit current of the proposed solar cell is increased by 73%. The major advantage of the two-stage MAE process is that a high antireflective silicon substrate can be fabricated cost-effectively in a relatively short time. The proposed method is feasible for the mass production of low-cost solar cells.


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## Body

## 1. Introduction

Solar cells are powered by the photoelectric conversion of solar light. Thus, it is desirable that the light reflectance of the cell surface be as low as possible to enable complete absorption of the solar energy. Current antireflection approaches can be categorized into two categories. The first approach is to coat an antireflection layer on the cell surface to reduce light reflection. Plasma enhanced chemical vapor deposition (PECVD) of a thin layer of hydrogenated silicon nitride (SiNx:H) on the cell surface is a commonly adopted method [1]. Solar light within a specific wave range can thus be effectively absorbed. Wider spectrum absorption requires multiple antireflection coatings. Hence, the antireflection coating approach is relatively costly, complicated, and difficult to mass produce. The other approach is to texturize the cell surface so that different wavelengths of light can be efficiently absorbed through multiple reflections. This approach enables a wider spectrum of solar light to reach the P-N junction of the solar cell, thus enhancing its short circuit current and photoelectric conversion efficiency.In recent years, physical and chemical etching methods have been adopted for roughening the surface of the wafer substrate. Physical etching can be accomplished by reactive ion etching and creates a rough structure that possesses less than 20% reflectivity in the visible light spectrum [2]. The chemical approach uses potassium hydroxide (KOH) for alkaline etching or hydrogen fluoride acid (HF) for acid etching, and it can result in a rough surface with a reflectivity of around 17% under irradiation of visible light [3]. Wet chemical etching, using KOH to fabricate the pyramid structure, is a commonly used approach in the industry. Compared to physical etching, KOH-based wet etching is more cost effective, faster, and more feasible for mass production of large-area cells. However, the pyramid structure can reach a minimum reflectivity of 12% and can only absorb the solar energy of visible light. Moreover, a thin layer of silicon nitride (SiN) over the pyramid structure is required to assure the antireflective property. Therefore, silicon nanostructures have been adopted to enhance the antireflectivity [4–9]. Besides chemical wet etching, electrochemical etching, plasma etching, oxidation, and nanogold-catalyzed chemical etching can also be used to fabricate a rough structure with 5% less reflectivity.Recent investigations observed that semiconductor silicon exhibits an electrochemical reaction in an HF solution. Accordingly, electroless metal deposition and electroless etching have been adopted for fabricating silicon nanowires for micronanoelectrical devices [10–18]. Further studies indicated that silicon nanowire structures possess the antireflective property in the ultraviolet (UV), visible light, and infrared (IR) spectra. Thus, silicon nanowiring is fast substituting chemical vapor deposition (CVD) as a way to reduce the reflectivity in the SiN layer [1]. Garnett and Yang [19] used silver nitrate (AgNO3) as the etchant for electroless etching of silicon nanowire arrays, followed by the fabrication of the P-N junction through PECVD using boron trichloride (BCl3) gas. The fabricated solar cell exhibited a short circuit current density (J
sc) of 4.28 mA/cm2 and an open circuit voltage (V
oc) of 0.29 V. A photoelectric conversion efficiency (η) of 0.46% was achieved. Tang et al. [20] made use of the CVD approach to fabricate the P-N junction and then grew silicon nanowires using gold nanoparticles as the catalyst. Uncharged polymethyl methacrylate (PMMA) was employed to reduce the leakage current effect. A solar cell having a J
sc of 7.6 mA/cm2 and an η of 2.73% was produced. In 2009, the National Renewable Energy Laboratory (NREL), USA [21], used chloroauric acid (HAuCl4) as the etchant for electroless etching of nanoporous Si. The thermal oxidation process was then applied to deposit a silicon dioxide (SiO2) passivation layer on the P-N junction surface to reduce the leakage current and indirectly enhance the short circuit current. The resulting solar cell had a high J
sc of 34.067 mA/cm2, a V
oc of 0.6123 V, and an η of 16.8%. In 2011, the NREL etched nanostructures on the pyramid microstructure using HAuCl4 to obtain an average reflectivity of 2.7% in the light spectrum of 350–1000 nm. The J
sc, V
oc, and η of the fabricated solar cell were 35.6 mA/cm2, 0.615 V, and 17.1%, respectively [22]. Thereafter, tetramethylammonium hydroxide (TMAH) was employed to smoothen the surface structure of the nanoporous silicon, so that the recombination of electron-hole pairs could be reduced. A solar cell having a J
sc of 36.45 mA/cm2, a V
oc of 0.628 V, and an η of 18.2% was produced [23].The above-mentioned studies indicate the development trends of solar cells, namely, the use of inexpensive processes to produce high photoelectric conversion efficiency devices. In this study, we propose a cost-effective solar cell production method comprising fabrications of a high antireflection micronanohybrid silicon substrate and the P-N junction using a liquid diffuser. The high antireflection micronanohybrid silicon substrate is fabricated by a two-stage metal-assisted (MAE) etching method using an AgNO3 and HF mixing solution as the etchant to grow nanowires on a KOH wet-etched microstructure pyramid array.


## 2. Materials and Methods

### 2.1. Materials

The materials used in this study are listed in Table1.Table 1
Materials, specifications, and vendors.
Material
Specification
Vendor
N-type silicon (100) wafers (monocrystalline)
1~3 Ω-cm
Wafer Works, Taiwan
AgNO3
99.8%
Union Chemical Works, Taiwan
HF
55%
Choneye, Taiwan
HNO3
69%
Union Chemical Works, Taiwan
Acetone
99.5%
Sigma-Aldrich
Polyethylene glycol
MW: 1000
Echo Chemical, Taiwan
Borosilicafilm
C
o
=
1
×
10
20
Emulsitone, USA
Phosphorosilicafilm
C
o
=
5
×
10
20
Emulsitone, USA


### 2.2. Methods

#### 2.2.1. Fabrication of a High Antireflection Micronanohybrid Structure Array

An AgNO3 and HF mixing solution is adopted as the etchant for the MAE. The silver ions in the etchant acquire electrons from the silicon substrate and are reduced to silver atoms, which are then deposited on the surface of the silicon substrate. Simultaneously, the silicon atoms donate electrons and are oxidized to SiO2. The SiO2 is then etched by the HF solution with zero applied potential. Silicon nanowire arrays can be fabricated through consecutive reduction and oxidation (redox) reactions [24–26]. In this study, the MAE method is used for fabricating a high antireflection micronanohybrid structure array. In the first stage, short-time etching using highly concentrated AgNO3 is executed to deposit a coniferous-like silver layer on the wafer surface of the KOH-etched micropyramid array. Then, relatively long-time etching using a lower concentration of AgNO3 is implemented for producing a bolt upright and uniform silicon nanowire array on each micropyramid. The fabrication procedures are described as follows.(1)
Wafer cleaning: clean the wafer sequentially and ultrasonically in acetone, ethanol (EtOH), and distilled water for 30 min. Immerse the washed silicon wafer in diluted HF acid for 2-3 min to remove the oxide layer from the wafer surface. Then, rinse the wafer with distilled water.
(2)
Micropyramid array fabrication: prepare the wet-etching etchant with a weight ratio of DI: KOH (40 wt%): IPA = 70 : 2 : 5. Use it to wet-etch the micropyramid array on the cleaned wafer substrate. Then, remove the oxide layer from the wafer surface by immersing the wet-etched wafer into dilute HF acid for 2-3 min.
(3)
Two-stage MAE: conduct the first stage of the MAE using AgNO3 (0.34 M) and HF (4.6 M) mixing etchant under various processing times. Then, process the second stage of the MAE using AgNO3 (0.03 M) and HF (5.6 M) mixing etchant under various processing times. Both stages are conducted at 40°C. The optimal processing times for stages 1 and 2 were arrived at by exploring 30 designed processing time combinations between the stages, as tabulated in Table 2.
(4)
Removal of silver conifers: during the MAE process, the reduced silver nanoparticles dispersedly distribute on the wafer surface. After MAE, the reduced silver nanoparticles are removed by immersing the wafer into a solution of nitric acid (HNO3) for 5 min.
(5)
SiO2 layer removal: remove the bottom SiO2 layer using an HF and distilled water mixing solution (ratio = 1 : 3).Table 2
Processing time combinations between stage 1 and stage 2.
Stage
Processing times
1
20 s  25 s  30 s  35 s  40 s  45 s
2
2 min  5 min  7 min  10 min  15 min


#### 2.2.2. Property Characterization of the Synthesized Micronanohybrid Silicon Substrate

The morphology of the micronanohybrid silicon substrates was characterized using a field emission scanning electron microscope (FESEM) (JSM-6700F, JEOL). The reflectivity for the light spectrum of 200–1000 nm was measured by a variable-angle UV, visible (VIS), and near IR (UV/VIS/NIR) spectrophotometer (Hitachi U-4100).


#### 2.2.3. Growth of the P-N Junction

Instead of the commonly used CVD process, the less expensive silica film was adopted as the diffuser for the growth of the P-N junction. The growth procedures are described below.(1)
Silica film spin coating: spin coat a 0.5 mm thick silica film on the micronanohybrid silicon substrate. Then, volatilize the contained organic solvent at 100°C for 60 min.
(2)
Thermal diffusion: place the silica-film-coated silicon substrates in a high temperature furnace to process the thermal diffusion. The processing time should be set to 60 min, and several diffusion temperatures (950, 1000, 1050, 1100, and 1150°C) should be selected to obtain optimal diffusion. Then, remove the glass oxide layer on the wafer surface by immersing the wet-etched wafer into diluted HF acid for 2-3 min. Wash the remaining HF solution using distilled water.
(3)
Sheet resistance measurement: use a four-point probe for the sheet resistance measurement.


#### 2.2.4. Cell Fabrication and Photoelectric Conversion Efficiency Measurement

E-gun sputtering using metal masks was adopted for the fabrication of the front fishbone positive titanium electrode and the back negative silver electrode. The thicknesses of the front and back electrodes were 50 and 200 nm, respectively. The electrode sputtered silicon substrate was placed in a nitrogen-filled high temperature furnace at 400°C for 30 min to grow the ohmic contact. The photoelectric conversion efficiency was measured.


## 2.1. Materials

The materials used in this study are listed in Table1.Table 1
Materials, specifications, and vendors.
Material
Specification
Vendor
N-type silicon (100) wafers (monocrystalline)
1~3 Ω-cm
Wafer Works, Taiwan
AgNO3
99.8%
Union Chemical Works, Taiwan
HF
55%
Choneye, Taiwan
HNO3
69%
Union Chemical Works, Taiwan
Acetone
99.5%
Sigma-Aldrich
Polyethylene glycol
MW: 1000
Echo Chemical, Taiwan
Borosilicafilm
C
o
=
1
×
10
20
Emulsitone, USA
Phosphorosilicafilm
C
o
=
5
×
10
20
Emulsitone, USA


## 2.2. Methods

### 2.2.1. Fabrication of a High Antireflection Micronanohybrid Structure Array

An AgNO3 and HF mixing solution is adopted as the etchant for the MAE. The silver ions in the etchant acquire electrons from the silicon substrate and are reduced to silver atoms, which are then deposited on the surface of the silicon substrate. Simultaneously, the silicon atoms donate electrons and are oxidized to SiO2. The SiO2 is then etched by the HF solution with zero applied potential. Silicon nanowire arrays can be fabricated through consecutive reduction and oxidation (redox) reactions [24–26]. In this study, the MAE method is used for fabricating a high antireflection micronanohybrid structure array. In the first stage, short-time etching using highly concentrated AgNO3 is executed to deposit a coniferous-like silver layer on the wafer surface of the KOH-etched micropyramid array. Then, relatively long-time etching using a lower concentration of AgNO3 is implemented for producing a bolt upright and uniform silicon nanowire array on each micropyramid. The fabrication procedures are described as follows.(1)
Wafer cleaning: clean the wafer sequentially and ultrasonically in acetone, ethanol (EtOH), and distilled water for 30 min. Immerse the washed silicon wafer in diluted HF acid for 2-3 min to remove the oxide layer from the wafer surface. Then, rinse the wafer with distilled water.
(2)
Micropyramid array fabrication: prepare the wet-etching etchant with a weight ratio of DI: KOH (40 wt%): IPA = 70 : 2 : 5. Use it to wet-etch the micropyramid array on the cleaned wafer substrate. Then, remove the oxide layer from the wafer surface by immersing the wet-etched wafer into dilute HF acid for 2-3 min.
(3)
Two-stage MAE: conduct the first stage of the MAE using AgNO3 (0.34 M) and HF (4.6 M) mixing etchant under various processing times. Then, process the second stage of the MAE using AgNO3 (0.03 M) and HF (5.6 M) mixing etchant under various processing times. Both stages are conducted at 40°C. The optimal processing times for stages 1 and 2 were arrived at by exploring 30 designed processing time combinations between the stages, as tabulated in Table 2.
(4)
Removal of silver conifers: during the MAE process, the reduced silver nanoparticles dispersedly distribute on the wafer surface. After MAE, the reduced silver nanoparticles are removed by immersing the wafer into a solution of nitric acid (HNO3) for 5 min.
(5)
SiO2 layer removal: remove the bottom SiO2 layer using an HF and distilled water mixing solution (ratio = 1 : 3).Table 2
Processing time combinations between stage 1 and stage 2.
Stage
Processing times
1
20 s  25 s  30 s  35 s  40 s  45 s
2
2 min  5 min  7 min  10 min  15 min


### 2.2.2. Property Characterization of the Synthesized Micronanohybrid Silicon Substrate

The morphology of the micronanohybrid silicon substrates was characterized using a field emission scanning electron microscope (FESEM) (JSM-6700F, JEOL). The reflectivity for the light spectrum of 200–1000 nm was measured by a variable-angle UV, visible (VIS), and near IR (UV/VIS/NIR) spectrophotometer (Hitachi U-4100).


### 2.2.3. Growth of the P-N Junction

Instead of the commonly used CVD process, the less expensive silica film was adopted as the diffuser for the growth of the P-N junction. The growth procedures are described below.(1)
Silica film spin coating: spin coat a 0.5 mm thick silica film on the micronanohybrid silicon substrate. Then, volatilize the contained organic solvent at 100°C for 60 min.
(2)
Thermal diffusion: place the silica-film-coated silicon substrates in a high temperature furnace to process the thermal diffusion. The processing time should be set to 60 min, and several diffusion temperatures (950, 1000, 1050, 1100, and 1150°C) should be selected to obtain optimal diffusion. Then, remove the glass oxide layer on the wafer surface by immersing the wet-etched wafer into diluted HF acid for 2-3 min. Wash the remaining HF solution using distilled water.
(3)
Sheet resistance measurement: use a four-point probe for the sheet resistance measurement.


### 2.2.4. Cell Fabrication and Photoelectric Conversion Efficiency Measurement

E-gun sputtering using metal masks was adopted for the fabrication of the front fishbone positive titanium electrode and the back negative silver electrode. The thicknesses of the front and back electrodes were 50 and 200 nm, respectively. The electrode sputtered silicon substrate was placed in a nitrogen-filled high temperature furnace at 400°C for 30 min to grow the ohmic contact. The photoelectric conversion efficiency was measured.


## 2.2.1. Fabrication of a High Antireflection Micronanohybrid Structure Array

An AgNO3 and HF mixing solution is adopted as the etchant for the MAE. The silver ions in the etchant acquire electrons from the silicon substrate and are reduced to silver atoms, which are then deposited on the surface of the silicon substrate. Simultaneously, the silicon atoms donate electrons and are oxidized to SiO2. The SiO2 is then etched by the HF solution with zero applied potential. Silicon nanowire arrays can be fabricated through consecutive reduction and oxidation (redox) reactions [24–26]. In this study, the MAE method is used for fabricating a high antireflection micronanohybrid structure array. In the first stage, short-time etching using highly concentrated AgNO3 is executed to deposit a coniferous-like silver layer on the wafer surface of the KOH-etched micropyramid array. Then, relatively long-time etching using a lower concentration of AgNO3 is implemented for producing a bolt upright and uniform silicon nanowire array on each micropyramid. The fabrication procedures are described as follows.(1)
Wafer cleaning: clean the wafer sequentially and ultrasonically in acetone, ethanol (EtOH), and distilled water for 30 min. Immerse the washed silicon wafer in diluted HF acid for 2-3 min to remove the oxide layer from the wafer surface. Then, rinse the wafer with distilled water.
(2)
Micropyramid array fabrication: prepare the wet-etching etchant with a weight ratio of DI: KOH (40 wt%): IPA = 70 : 2 : 5. Use it to wet-etch the micropyramid array on the cleaned wafer substrate. Then, remove the oxide layer from the wafer surface by immersing the wet-etched wafer into dilute HF acid for 2-3 min.
(3)
Two-stage MAE: conduct the first stage of the MAE using AgNO3 (0.34 M) and HF (4.6 M) mixing etchant under various processing times. Then, process the second stage of the MAE using AgNO3 (0.03 M) and HF (5.6 M) mixing etchant under various processing times. Both stages are conducted at 40°C. The optimal processing times for stages 1 and 2 were arrived at by exploring 30 designed processing time combinations between the stages, as tabulated in Table 2.
(4)
Removal of silver conifers: during the MAE process, the reduced silver nanoparticles dispersedly distribute on the wafer surface. After MAE, the reduced silver nanoparticles are removed by immersing the wafer into a solution of nitric acid (HNO3) for 5 min.
(5)
SiO2 layer removal: remove the bottom SiO2 layer using an HF and distilled water mixing solution (ratio = 1 : 3).Table 2
Processing time combinations between stage 1 and stage 2.
Stage
Processing times
1
20 s  25 s  30 s  35 s  40 s  45 s
2
2 min  5 min  7 min  10 min  15 min


## 2.2.2. Property Characterization of the Synthesized Micronanohybrid Silicon Substrate

The morphology of the micronanohybrid silicon substrates was characterized using a field emission scanning electron microscope (FESEM) (JSM-6700F, JEOL). The reflectivity for the light spectrum of 200–1000 nm was measured by a variable-angle UV, visible (VIS), and near IR (UV/VIS/NIR) spectrophotometer (Hitachi U-4100).


## 2.2.3. Growth of the P-N Junction

Instead of the commonly used CVD process, the less expensive silica film was adopted as the diffuser for the growth of the P-N junction. The growth procedures are described below.(1)
Silica film spin coating: spin coat a 0.5 mm thick silica film on the micronanohybrid silicon substrate. Then, volatilize the contained organic solvent at 100°C for 60 min.
(2)
Thermal diffusion: place the silica-film-coated silicon substrates in a high temperature furnace to process the thermal diffusion. The processing time should be set to 60 min, and several diffusion temperatures (950, 1000, 1050, 1100, and 1150°C) should be selected to obtain optimal diffusion. Then, remove the glass oxide layer on the wafer surface by immersing the wet-etched wafer into diluted HF acid for 2-3 min. Wash the remaining HF solution using distilled water.
(3)
Sheet resistance measurement: use a four-point probe for the sheet resistance measurement.


## 2.2.4. Cell Fabrication and Photoelectric Conversion Efficiency Measurement

E-gun sputtering using metal masks was adopted for the fabrication of the front fishbone positive titanium electrode and the back negative silver electrode. The thicknesses of the front and back electrodes were 50 and 200 nm, respectively. The electrode sputtered silicon substrate was placed in a nitrogen-filled high temperature furnace at 400°C for 30 min to grow the ohmic contact. The photoelectric conversion efficiency was measured.


## 3. Results and Discussion

### 3.1. Fabrication Results of the Micronanohybrid Structure Array

The highly concentrated AgNO3 (0.34 M) used in the first MAE stage helped in quickly obtaining the required amounts of reduced silver atoms needed to uniformly cover the entire surface of the pyramid array. However, the height of a wet-etched pyramid is about 3–5 μm. A relatively higher concentration of AgNO3 results in a rapid redox reaction between the silver ions and the silicon substrate. As a result, the pyramid could be completely etched away in a long etching process. Therefore, the etching duration for the first etching stage was set to range from 20 to 45 sec. The second etching stage was employed to uniformly etch the silicon substrate downward under the silver-atom-covered area. Hence, a relatively low AgNO3 concentration (0.03 M) was selected, and a longer etching time (1–5 min) was designed.Figure1 illustrates the SEM images of the fabricated micronanohybrid structures subjected to a 30 sec first-stage etching and various second-stage etching processing times. The straight etched nanowires cover the entire surface of the pyramid array, including the pyramid structure and the recesses between the pyramids. The length of the etched nanowires increases with increased etching time. The top view, illustrated by the inset in each image, indicates the hybrid structure of the pyramids and the nanopores.SEM images of micronanohybrid silicon substrates fabricated by combinations of a fixed first-stage processing time (30 sec) and various second-stage processing times: (a) 1 min, (b) 2 min, (c) 3 min, and (d) 4 min.
(a)
(b)
(c)
(d)It has been reported [27] that the antireflectivity of a nanosilicon substrate is closely proportional to nanowire length. Therefore, the second-stage processing time was set at 5 min to further investigate the antireflectivity of the micronanohybrid structure. Figure 2 shows the morphologies of various micronanohybrid structures fabricated by combinations of a fixed second-stage etching time (5 min) and various first-stage etching times. For these micronanohybrid structures subjected to the first-stage processing time of 20 and 25 sec (Figures 2(a) and 2(b)), the nanowires are more intensive, but shorter, when compared with the other samples. The possible reason is that the relatively shorter first-stage etching time may be insufficient to reduce silver nanoparticles to a suitable size for effective downward etching during the second-stage process. When the first-stage processing time was extended to 30, 35, and 40 sec (Figures 2(c), 2(d), and 2(e)), the fabricated nanowires possessed good uniformity and had microscale lengths. However, further increases in the processing time (45 sec) resulted in a looser nanowire array with a bent shape (Figure 2(f)). An excessively long first-stage processing time might result in overdense coverage of silver nanoparticles on the pyramid array, thus resulting in inhomogeneous second-stage etching.SEM images of micronanohybrid silicon substrates fabricated by combinations of a fixed second-stage processing time (5 min) and various first-stage processing times: (a) 20 sec, (b) 25 sec, (c) 30 sec, (d) 35 sec, (e) 40 sec, and (f) 45 sec.
(a)
(b)
(c)
(d)
(e)
(f)


### 3.2. Antireflectivity Property of the Micronanohybrid Structure Array

As discussed in Section3.1, nanowire arrays with various heights could be fabricated by adjusting the processing time combinations of the first and second stages. The antireflectivity properties of the silicon substrates subjected to different processing time combinations were investigated. Figure 3 demonstrates the relationship between the average reflectivity of a silicon micronanohybrid structure fabricated by a certain two-stage MAE process and the corresponding etching time combination in the light spectrum of 200–1000 nm. For processes with a first-stage etching time of 20, 25, and 45 sec, the fabricated micronanohybrid structure arrays exhibited relatively higher reflectivity. For processes with a first-stage etching time of 30, 35, and 40 sec, the fabricated micronanohybrid structure arrays processed relatively lower reflectivity. Average reflectivity decreased with increasing second-stage processing times. When the second-stage processing time was 5 min, average reflectivity of less than 2% could be achieved. Up to a certain degree, the reflectivity measurement results agree with the morphologies of the fabricated hybrid structures shown in Figure 2, wherein processes with a first-stage etching time of 20, 25, and 45 sec could fabricate uniform and long hybrid microscale structures. The 3D graph shown in the inset represents average reflectivity as a function of processing time combination. The red area indicates the processing time combinations that resulted in average reflectivity of less than 2%, demonstrating that our two-stage fabrication method is capable of producing high antireflection micronanohybrid structures.Figure 3
Relationship between the average reflectivity of a micronanohybrid structure fabricated by a certain two-stage MAE process and the corresponding etching time combination in the light spectrum of 200–1000 nm.The above discussion reveals that the hybrid structure fabricated by the combinations of a first-stage processing time between 30 and 45 sec and a second-stage processing time of 5 min exhibits less than 2% reflectivity. Figure4 further depicts the overall reflectivity for the light spectrum of 200–1000 nm for hybrid structures subjected to a 5 min second-stage processing time. It is evident that the reflectivity of hybrid structures subjected to a first-stage processing time of 30 and 45 sec for the light spectrum of 200–1000 nm is less than 2%. The first-stage etching time of 30 sec could fabricate hybrid structures with relatively lower overall reflectivity. Table 3 tabulates the average reflectivity of the hybrid structures fabricated by combinations of a 30 sec first-stage processing time and various second-stage processing times. The 5 min second-stage processing time enabled the hybrid structures to have a low overall reflectivity of 1.21%, including 0.74% in UV, 1.12% in visible light, and 1.97% in IR.Table 3
Average reflectivity of the two-stage MAE fabricated micronanohybrid structures subjected to a first-stage processing time of 30 sec for the light spectrum of 200–1000 nm.
Second-stage etching time (min)
Average reflectance (%)
200–400 nm
401–800 nm
801–1000 nm
200–1000 nm
1
4.26
5.49
8.16
5.85
2
5.26
3.45
4.41
4.16
3
3.16
3.34
3.51
3.54
4
1.96
2.19
2.57
2.32
5
0.74
1.12
1.97
1.21Figure 4
Reflectivity of the fabricated micronanohybrid structures subjected to the proposed two-stage MAE for the light spectrum of 200–1000 nm.


### 3.3. Sheet Resistance Measurements

The hybrid structures with the best antireflectivity (first-stage processing time = 30 sec and second-stage processing time = 5 min) were then employed for the P-N junction synthesis using silica film.Figure5 shows the sheet resistance measurement results. The measured ranges of the resistance and sheet resistance are 100–450 Ω and 60–220 Ω/□, respectively. A diffusion temperature of 1000–1150°C could grow a P-N junction with sheet resistance within the scope of the ideal P-N junction surface sheet resistance 60–200 Ω/□ [28–30]. Samples with P-N junction growth enabled by diffusion temperatures of 1000–1150°C were used for further cell fabrication.Figure 5
Sheet resistance measurements.


### 3.4. Photoelectric Conversion Efficiency Measurements

The cell with the micronanohybrid structure having the best antireflectivity (first-stage processing time = 30 sec and second-stage processing time = 5 min) and a P-N junction grown using the silica film (diffusion time = 60 min) was employed for further photoelectric conversion efficiency measurements. Figure6 displays the current versus voltage (I-V) curves for the pure pyramid cells and the hybrid structured cells under various diffusion times for P-N junction growth. The major variations among the hybrid structured cells grown under different diffusion times are the open circuit voltage (V
oc) and the fill factor (FF). It can also be observed that the hybrid structured cells exhibited much higher short circuit current density (J
sc). The detailed data appear in Table 4. Although the average V
oc and J
sc of the pure pyramid cells were measured as 0.52 V and 21.57 mA/cm2, respectively, a conversion efficiency (η) of 6.729% was achieved due to a relatively higher FF (60%). The most efficient hybrid structured cells (diffusion temperature = 1100°C) exhibited an efficiency of 12.319% (V
oc = 0.60 V, J
sc = 37 mA/cm2, and FF = 56%). Compared with the pure pyramid cells, the large enhancement in J
sc can be attributed to the high antireflection property, while the relatively lower FF is due to the leakage current effects caused by the structural defects in the nanowires. Therefore, cells subjected to a diffusion temperature of 1100°C were then immersed in an HNO3 solution to reduce leakage current effects by growing passivation layers on their surfaces.Table 4
Photoelectric properties of the fabricated solar cells subjected to various diffusion temperatures.
Thermal diffusion (°C)
J
sc (mA/cm2)
V
oc (V)
FF (%)
η (%)
R
sh (Ω)
1050°C
37.31
0.60
45
10.10
35.1
1100°C
37.54
0.586
56
12.319
41.7
1150°C
36.12
0.595
53
11.31
50.5
Pyramid structure
21.57
0.52
60
6.729
115Figure 6
Photoelectric conversion efficiency of the fabricated solar cells subjected to various diffusion temperatures (diffusion time = 60 min).A 1-2 nm thick passivation layer of SiO2 was grown by immersing the cells into a 55% HNO3 solution for 15 min. Figure 7 displays the I-V curve and the photoelectric properties of the cell with the added passivation layer. It can be seen that the I-V curve for a cell with the added passivation layer begins to climb at 0.35 V, while that for a cell without this layer begins to climb at 0.1 V (Figure 6). Also, the FF increased from 56 to 63%, while the V
oc decreased from 0.586 to 0.51 V. These results imply that the passivation layer could effectively improve leakage current effects. The degradation in the V
oc can be attributed to the concentration variation of the diffusion source due to the redox reactions between HNO3 and the substrate.Figure 7
Photoelectric conversion efficiency measurement of the fabricated solar cells with a passivation layer.To further compensate for the concentration variation of the diffusion source, a longer diffusion time of 120 min was implemented to increase the diffusion depth. The photoelectric properties of the fabricated solar cells (i.e., those subjected to the diffusion process using a silica film for 120 min followed by passivation layer growth using HNO3 solution for 15 min) are listed in Table 5. The J
sc and FF of the cells were about the same as those of the cells subjected to the 60 min diffusion process. However, the V
oc increased further to 0.56 V. Hence, the efficiency was enhanced to 13.01%.Table 5
Photoelectric properties of the fabricated solar cells subjected to a diffusion time of 120 min.
J
sc (mA/cm2)
V
oc (V)
FF (%)
η (%)
R
sh (Ω)
37.401
0.56
63
13.01
58.9


## 3.1. Fabrication Results of the Micronanohybrid Structure Array

The highly concentrated AgNO3 (0.34 M) used in the first MAE stage helped in quickly obtaining the required amounts of reduced silver atoms needed to uniformly cover the entire surface of the pyramid array. However, the height of a wet-etched pyramid is about 3–5 μm. A relatively higher concentration of AgNO3 results in a rapid redox reaction between the silver ions and the silicon substrate. As a result, the pyramid could be completely etched away in a long etching process. Therefore, the etching duration for the first etching stage was set to range from 20 to 45 sec. The second etching stage was employed to uniformly etch the silicon substrate downward under the silver-atom-covered area. Hence, a relatively low AgNO3 concentration (0.03 M) was selected, and a longer etching time (1–5 min) was designed.Figure1 illustrates the SEM images of the fabricated micronanohybrid structures subjected to a 30 sec first-stage etching and various second-stage etching processing times. The straight etched nanowires cover the entire surface of the pyramid array, including the pyramid structure and the recesses between the pyramids. The length of the etched nanowires increases with increased etching time. The top view, illustrated by the inset in each image, indicates the hybrid structure of the pyramids and the nanopores.SEM images of micronanohybrid silicon substrates fabricated by combinations of a fixed first-stage processing time (30 sec) and various second-stage processing times: (a) 1 min, (b) 2 min, (c) 3 min, and (d) 4 min.
(a)
(b)
(c)
(d)It has been reported [27] that the antireflectivity of a nanosilicon substrate is closely proportional to nanowire length. Therefore, the second-stage processing time was set at 5 min to further investigate the antireflectivity of the micronanohybrid structure. Figure 2 shows the morphologies of various micronanohybrid structures fabricated by combinations of a fixed second-stage etching time (5 min) and various first-stage etching times. For these micronanohybrid structures subjected to the first-stage processing time of 20 and 25 sec (Figures 2(a) and 2(b)), the nanowires are more intensive, but shorter, when compared with the other samples. The possible reason is that the relatively shorter first-stage etching time may be insufficient to reduce silver nanoparticles to a suitable size for effective downward etching during the second-stage process. When the first-stage processing time was extended to 30, 35, and 40 sec (Figures 2(c), 2(d), and 2(e)), the fabricated nanowires possessed good uniformity and had microscale lengths. However, further increases in the processing time (45 sec) resulted in a looser nanowire array with a bent shape (Figure 2(f)). An excessively long first-stage processing time might result in overdense coverage of silver nanoparticles on the pyramid array, thus resulting in inhomogeneous second-stage etching.SEM images of micronanohybrid silicon substrates fabricated by combinations of a fixed second-stage processing time (5 min) and various first-stage processing times: (a) 20 sec, (b) 25 sec, (c) 30 sec, (d) 35 sec, (e) 40 sec, and (f) 45 sec.
(a)
(b)
(c)
(d)
(e)
(f)


## 3.2. Antireflectivity Property of the Micronanohybrid Structure Array

As discussed in Section3.1, nanowire arrays with various heights could be fabricated by adjusting the processing time combinations of the first and second stages. The antireflectivity properties of the silicon substrates subjected to different processing time combinations were investigated. Figure 3 demonstrates the relationship between the average reflectivity of a silicon micronanohybrid structure fabricated by a certain two-stage MAE process and the corresponding etching time combination in the light spectrum of 200–1000 nm. For processes with a first-stage etching time of 20, 25, and 45 sec, the fabricated micronanohybrid structure arrays exhibited relatively higher reflectivity. For processes with a first-stage etching time of 30, 35, and 40 sec, the fabricated micronanohybrid structure arrays processed relatively lower reflectivity. Average reflectivity decreased with increasing second-stage processing times. When the second-stage processing time was 5 min, average reflectivity of less than 2% could be achieved. Up to a certain degree, the reflectivity measurement results agree with the morphologies of the fabricated hybrid structures shown in Figure 2, wherein processes with a first-stage etching time of 20, 25, and 45 sec could fabricate uniform and long hybrid microscale structures. The 3D graph shown in the inset represents average reflectivity as a function of processing time combination. The red area indicates the processing time combinations that resulted in average reflectivity of less than 2%, demonstrating that our two-stage fabrication method is capable of producing high antireflection micronanohybrid structures.Figure 3
Relationship between the average reflectivity of a micronanohybrid structure fabricated by a certain two-stage MAE process and the corresponding etching time combination in the light spectrum of 200–1000 nm.The above discussion reveals that the hybrid structure fabricated by the combinations of a first-stage processing time between 30 and 45 sec and a second-stage processing time of 5 min exhibits less than 2% reflectivity. Figure4 further depicts the overall reflectivity for the light spectrum of 200–1000 nm for hybrid structures subjected to a 5 min second-stage processing time. It is evident that the reflectivity of hybrid structures subjected to a first-stage processing time of 30 and 45 sec for the light spectrum of 200–1000 nm is less than 2%. The first-stage etching time of 30 sec could fabricate hybrid structures with relatively lower overall reflectivity. Table 3 tabulates the average reflectivity of the hybrid structures fabricated by combinations of a 30 sec first-stage processing time and various second-stage processing times. The 5 min second-stage processing time enabled the hybrid structures to have a low overall reflectivity of 1.21%, including 0.74% in UV, 1.12% in visible light, and 1.97% in IR.Table 3
Average reflectivity of the two-stage MAE fabricated micronanohybrid structures subjected to a first-stage processing time of 30 sec for the light spectrum of 200–1000 nm.
Second-stage etching time (min)
Average reflectance (%)
200–400 nm
401–800 nm
801–1000 nm
200–1000 nm
1
4.26
5.49
8.16
5.85
2
5.26
3.45
4.41
4.16
3
3.16
3.34
3.51
3.54
4
1.96
2.19
2.57
2.32
5
0.74
1.12
1.97
1.21Figure 4
Reflectivity of the fabricated micronanohybrid structures subjected to the proposed two-stage MAE for the light spectrum of 200–1000 nm.


## 3.3. Sheet Resistance Measurements

The hybrid structures with the best antireflectivity (first-stage processing time = 30 sec and second-stage processing time = 5 min) were then employed for the P-N junction synthesis using silica film.Figure5 shows the sheet resistance measurement results. The measured ranges of the resistance and sheet resistance are 100–450 Ω and 60–220 Ω/□, respectively. A diffusion temperature of 1000–1150°C could grow a P-N junction with sheet resistance within the scope of the ideal P-N junction surface sheet resistance 60–200 Ω/□ [28–30]. Samples with P-N junction growth enabled by diffusion temperatures of 1000–1150°C were used for further cell fabrication.Figure 5
Sheet resistance measurements.


## 3.4. Photoelectric Conversion Efficiency Measurements

The cell with the micronanohybrid structure having the best antireflectivity (first-stage processing time = 30 sec and second-stage processing time = 5 min) and a P-N junction grown using the silica film (diffusion time = 60 min) was employed for further photoelectric conversion efficiency measurements. Figure6 displays the current versus voltage (I-V) curves for the pure pyramid cells and the hybrid structured cells under various diffusion times for P-N junction growth. The major variations among the hybrid structured cells grown under different diffusion times are the open circuit voltage (V
oc) and the fill factor (FF). It can also be observed that the hybrid structured cells exhibited much higher short circuit current density (J
sc). The detailed data appear in Table 4. Although the average V
oc and J
sc of the pure pyramid cells were measured as 0.52 V and 21.57 mA/cm2, respectively, a conversion efficiency (η) of 6.729% was achieved due to a relatively higher FF (60%). The most efficient hybrid structured cells (diffusion temperature = 1100°C) exhibited an efficiency of 12.319% (V
oc = 0.60 V, J
sc = 37 mA/cm2, and FF = 56%). Compared with the pure pyramid cells, the large enhancement in J
sc can be attributed to the high antireflection property, while the relatively lower FF is due to the leakage current effects caused by the structural defects in the nanowires. Therefore, cells subjected to a diffusion temperature of 1100°C were then immersed in an HNO3 solution to reduce leakage current effects by growing passivation layers on their surfaces.Table 4
Photoelectric properties of the fabricated solar cells subjected to various diffusion temperatures.
Thermal diffusion (°C)
J
sc (mA/cm2)
V
oc (V)
FF (%)
η (%)
R
sh (Ω)
1050°C
37.31
0.60
45
10.10
35.1
1100°C
37.54
0.586
56
12.319
41.7
1150°C
36.12
0.595
53
11.31
50.5
Pyramid structure
21.57
0.52
60
6.729
115Figure 6
Photoelectric conversion efficiency of the fabricated solar cells subjected to various diffusion temperatures (diffusion time = 60 min).A 1-2 nm thick passivation layer of SiO2 was grown by immersing the cells into a 55% HNO3 solution for 15 min. Figure 7 displays the I-V curve and the photoelectric properties of the cell with the added passivation layer. It can be seen that the I-V curve for a cell with the added passivation layer begins to climb at 0.35 V, while that for a cell without this layer begins to climb at 0.1 V (Figure 6). Also, the FF increased from 56 to 63%, while the V
oc decreased from 0.586 to 0.51 V. These results imply that the passivation layer could effectively improve leakage current effects. The degradation in the V
oc can be attributed to the concentration variation of the diffusion source due to the redox reactions between HNO3 and the substrate.Figure 7
Photoelectric conversion efficiency measurement of the fabricated solar cells with a passivation layer.To further compensate for the concentration variation of the diffusion source, a longer diffusion time of 120 min was implemented to increase the diffusion depth. The photoelectric properties of the fabricated solar cells (i.e., those subjected to the diffusion process using a silica film for 120 min followed by passivation layer growth using HNO3 solution for 15 min) are listed in Table 5. The J
sc and FF of the cells were about the same as those of the cells subjected to the 60 min diffusion process. However, the V
oc increased further to 0.56 V. Hence, the efficiency was enhanced to 13.01%.Table 5
Photoelectric properties of the fabricated solar cells subjected to a diffusion time of 120 min.
J
sc (mA/cm2)
V
oc (V)
FF (%)
η (%)
R
sh (Ω)
37.401
0.56
63
13.01
58.9


## 4. Conclusion

This study developed a cost-effective method for the fabrication of high antireflection solar cells. A two-stage MAE process using an AgNO3 and HF mixing solution as the etchant was adopted for the fabrication of a micronanohybrid silicon substrate. The process requires short-time etching using highly concentrated AgNO3 in the first stage, followed by relatively long-time etching using less concentrated AgNO3. The processing time for etching on an N-type high-resistance (NH) silicon wafer can be reduced to around 5 min. An inexpensive diffusion process using a liquid diffusion source was then employed to grow the P-N junction. To reduce leakage current effects, the HNO3 solution was also used to generate a passivation layer on the cell surface. The fabricated hybrid structures exhibited a low average reflectivity of 1.21% in a wide light spectrum (200–1000 nm), including 0.74% in UV, 1.12% in visible light, and 1.97% in the IR spectra. A solar cell with the following photoelectric properties was obtained: J
sc = 37.4 mA/cm2, V
oc = 0.56 V, FF = 63, and η
=
13.01%.



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*Source: 807812-2014-04-10.xml*