# Single-Fiber Bidirectional Optical Data Links with Monolithic Transceiver Chips

Authors: Alexander Kern; Sujoy Paul; Dietmar Wahl; Ahmed Al-Samaneh; Rainer Michalzik
Journal: Advances in Optical Technologies
 (2012)

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## Abstract

We report the monolithic integration, fabrication, and electrooptical properties of AlGaAs-GaAs-based transceiver
(TRx) chips for 850 nm wavelength optical links with data rates of multiple Gbit/s. Using a single butt-coupled multimode
fiber (MMF), low-cost bidirectional communication in half- and even full-duplex mode is demonstrated. Two design concepts are presented, based on a vertical-cavity surface-emitting laser (VCSEL) and a monolithically integrated p-doped-intrinsic-n-doped (PIN) or metal-semiconductor-metal (MSM) photodetector. Whereas the VCSEL-PIN photodiode (PD) chips are used for high-speed bidirectional data transmission over 62.5 and 50μm core diameter MMFs, MSM TRx chips are employed for 100 or 200 μm large-area fibers. Such a monolithic transceiver design based on a well-established material system and avoiding the use of external fiber coupling optics is well suited for inexpensive and compact optical interconnects over distances of a few hundred meters. Standard MMF networks can thus be upgraded using high-speed VCSEL-PIN transceiver chips which are capable to handle data rates of up to 10 Gbit/s.


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## Body

## 1. Introduction

Over the last decades, the well-known AlGaAs-GaAs mixed compound semiconductor material system paved the way for the tremendous development of vertical-cavity surface-emitting lasers (VCSELs) as excellent light sources. Their inherent property of light emission perpendicular to the wafer surface and therefore the ability of fabrication in densely packed two-dimensional arrays make VCSELs distinguished inexpensive candidates for many applications [1]. Further advances in VCSEL technology have enabled higher chip functionalities such as monolithic integration with photodiodes. Such a device combination can be used for monitoring the laser output power [2], for realizing an ultracompact laser self-mixing interference sensor [3], or for biomedical fluorescence sensing [4]. Favorable properties like low threshold currents and operating voltages, circular beam profiles and high modulation bandwidths are ideal for VCSEL use in optical communications [1]. In contrast to conventional interconnections with one MMF per transmission direction, one could potentially lower the link cost, weight, and size by employing a single optical fiber, as presented in [5]. Here, the VCSEL is used as a dual-purpose device, namely, an efficient laser source and a resonant-cavity-enhanced avalanche photodetector. Since it is switched between two operation modes, only half-duplex operation at 1.25 Gbit/s data rate over a 50 μm core diameter MMF with 500 m length could be demonstrated. Hence, data transmission in full-duplex mode is only possible for single-purpose, that is, spatially separated devices. Similar to [5], monolithic integration can be achieved by using only one epitaxial layer structure for VCSEL and resonant photodetector [6]. However, both attempts need temperature control at each fiber end in order to tune the very narrow spectral range of the photodetector in case of temperature differences. The use of separate epitaxial layers for nonresonant detection, as reported in [7, 8], can avoid higher costs for the temperature stabilization of such an optical link. In [7], the small-signal 3 dB bandwidth of the presented PIN PD array is 2.3 GHz and only static operation is reported in [8].The main feature of our approach is the combination of monolithic integration of a laser source and a nonresonant photodetector while retaining the capability of half- and full-duplex data transmission over a single butt-coupled multimode fiber. Modules based on those chips can enable compact, efficient, and low-cost optical interconnection for short-reach local area, premises, and even mobile networks. Such true bidirectional optical links are presented in this paper, based on an 850 nm wavelength VCSEL and MSM-type as well as PIN-type photodetectors.


## 2. Previous Work

In our first approach, several designs of monolithically integrated VCSELs and MSM photodiodes for 200 and 100μm core diameter MMFs were presented in [9–18]. Figure 1 shows a transceiver chip based on an 850 nm VCSEL centered in the MSM PD for efficient coupling to a 100 μm MMF. MSM PDs are preferred for short-reach applications with large-core MMFs for larger fiber alignment tolerances. Here, PIN photodiodes with the same size of MSM PDs would lead to larger parasitic capacitances and thus lower bandwidths [19]. For this reason, MSM photodetectors with 210 μm diameter were employed for 1 Gbit/s half-duplex and 0.5 Gbit/s full-duplex data transmission over a 50 m long butt-coupled 200μm core diameter semi-graded-index polymer-clad silica (semi-GI PCS) fiber [17]. Since those transceiver chips were capable to transmit 3 Gbit/s in back-to-back (BTB) mode [12, 13], the maximum data rate was limited by the low bandwidth-distance product (B×L) of 40GHz×m of the semi-GI PCS fiber. With an improved chip design, even 4 Gbit/s BTB data transmission was possible [18]. In a further miniaturization step, 1 Gbit/s half-duplex operation was demonstrated with 110 μm TRx MSM PDs over a 100 m long multimode fiber with 100 μm core diameter [15, 16], thus exploiting the most from its bandwidth-distance product of 100 GHz × m.Figure 1
Photograph of a transceiver chip consisting of a VCSEL and an MSM photodiode with indicated ground-signal (GS) microwave probe contacts. The VCSEL is positioned in the center of the photodetector in order to achieve best fiber coupling. The dashed line indicates the optimum alignment of a MMF with 100μm core diameter (from [9]).Fibers with even higher bandwidths are required for longer and faster interconnects. Pursuing this goal, a 50μm core diameter MMF of 500 m length and a B×L of about 2 GHz × km was used with similar 110 μm MSM TRx chips for data transmission of 1 Gbit/s in both, half- and full-duplex mode [9], where the size mismatch required very careful lateral and longitudinal alignment. Also here, with an improved chip design, even data rates of 5 Gbit/s were possible in BTB mode [18]. The results are summarized in [21].In order to push the data rate further, our approach aims at a miniaturization of transceiver chips, thus ensuring the compatibility with standard MMFs with core diameters of 50 and 62.5μm. Since MSM photodiodes suffer from relatively low responsivities of around 0.4 A/W [18] and a higher optical crosstalk owing to their metal contact fingers that partially shadow the detector area, the further downscaling of VCSEL-MSM TRx chips would strongly decrease the effectively detected signal power. Therefore, the fraction of optical crosstalk in bidirectional full-duplex operation would further increase. Thus, for the next miniaturization step, better performance is expected by moving to PIN-type photodetectors. Both, their responsivity is sufficiently higher and the amount of light reflected at metal contacts is minimized, which decreases the relative optical crosstalk within the system. Additionally, the inherent PIN PD capacitance decreases with the smaller fiber core diameter, boosting the maximum possible data rate of the transceiver.Figure2 shows a TRx chip with 60 μm diameter PIN PD and a miniaturized laterally offset VCSEL, maximizing the effective photodetecting area of such a transceiver configuration.Figure 2
Photograph of a transceiver chip consisting of a VCSEL and a PIN photodiode, each with indicated ground-signal-ground (GSG) microwave probe contacts. The VCSEL is positioned off-center with respect to the photodetector in order to maximize the effective photodetecting area of the transceiver. The dashed circle indicates the alignment of a MMF with 50μm core diameter (from [20]).


## 3. Chip Design and Processing

For the full-monolithic integration, the transceiver chip comprises all epitaxial layers necessary for signal generation and detection. Figure3 illustrates schematically such a layer structure grown by molecular beam epitaxy on an n-doped GaAs substrate.Figure 3
Schematic layer structure design for the monolithically integrated transceiver chip. The layers for the PIN PD on top of the VCSEL layers are separated by an etch stop layer (from [22]).


### 3.1. VCSEL

The VCSEL layer structure consists of a distributed Bragg reflector (DBR) with 38.5 n-dopedAl0.2Ga0.8As/Al0.9Ga0.1As mirror periods with graded aluminum content. The three 8 nm thick GaAs quantum wells are designed for 850 nm wavelength emission at room temperature. They are separated by 10 nm Al0.27Ga0.73As barrier layers forming the active region in the center of a one-wavelength optical thickness inner cavity. A 32 nm thick highly p-doped AlAs layer in the first top-mirror period above the active region is designated for current confinement after an oxidation step. The upper p-doped DBR with 23.5 periods completes the VCSEL cavity and is equivalent to the bottom n-DBR. The VCSEL growth is terminated with a 30 nm highly p-doped GaAs layer, which provides a low resistance p-contact and at the same time prevents oxidation of the subjacent aluminum-containing Bragg layers.


### 3.2. PIN Photodiode

A monolithic integration of PIN photodiodes with VCSELs was realized by growing the PD layers on top of the VCSEL structure in the same growth run. This guarantees an improved crystal quality compared to an overgrowth process [23]. Hence, the PIN PD layer stack is grown on top of the intrinsic Al0.9Ga0.1As etch stop layer, which also partially acts as an insulator, reducing the capacitive coupling between the two devices. Additionally, the reverse-biased PD has its grounded p-doped side facing the VCSEL layers, which minimizes possible capacitive effects. The main part of the PIN-type photodiode is the 2 to 3 μm thick undoped GaAs absorption layer sandwiched by p- and n-doped Al0.3Ga0.7As of 250 nm thickness, which enables sufficient current spreading for large diameter PDs [24]. The higher band gap energy of these two contact layers provides a spectral window for the wavelengths of interest at around 850 nm. Linearly graded n- and p-AlxGa1-xAs (x=0→0.3) in Figure 3 is employed between the absorption and contact layers in order to minimize the energy band discontinuities, thus ensuring an easier escape of the light-induced carriers from the undoped GaAs. To prevent the top n-Al0.3Ga0.7As from oxidation, a 10 nm thick n-doped GaAs cap layer terminates the complete VCSEL-PD stack.


### 3.3. Fabrication

The fabrication of transceiver chips is based on lithographic structuring with photosensitive resists and subsequent etching or material deposition steps. At least eight lithographic steps are necessary for the full processing of the transceiver chip shown in Figure4. In the first step, the detector layers on top of the VCSEL structure are removed to uncover the future laser device. In order to ensure that the uppermost VCSEL layer is not affected by the etching, it is protected by an etch stop layer with a high aluminum content, as mentioned above. Combining nonselective with selective dry-etching processes such as reactive-ion etching (RIE) with SiCl4 alone and with an appropriate SF6/SiCl4 ratio afterwards [25], the p-Al0.3Ga0.7As can be exposed. It is subsequently removed by a citric acid/hydrogen peroxide solution, since it provides the best achievable etching selectivity with a possibility of visual control between Al0.3Ga0.7As and Al0.9Ga0.1As layers [26]. Followed by an Al0.9Ga0.1As/GaAs highly selective wet-etching with hydrofluoric acid [26], also the etch stop layer covering the p-doped cap layer of the VCSEL can now be removed. Despite the fact that the last 300 to 400 nm above the p-Bragg mirror are wet-etched, thus providing rather flat mesa side walls in this region, more than 90% of the total etch depth was reached by the dry-etching process resulting in nearly vertical mesa edges. Unlike MSM PDs with planar contact structure, PIN PDs have vertically displaced contacts and thus require an additional etch step to expose the p-doped Al0.3Ga0.7As layer as can be seen in the left part of Figure 4. This step can be accomplished in analogy to the previous dry-etching processes, where the AlGaAs p-contact layer with just 30% aluminum content acts also as an etch stop layer. By means of the described selective etching techniques, a uniform layer topography all over the wafer can be guaranteed in spite of the layer thickness inhomogeneity due to the epitaxial growth process. The third etching process spatially separates the VCSEL and the photodetector by a 2 to 4 μm narrow trench and thus provides access to the current confinement layer, as seen in the right part of Figure 4. It is performed by reactive-ion etching with SiCl4 and thus without selectivity. Also this process step requires dry-etching, since steep mesa side walls are crucial for the miniaturization and dense integration of VCSEL and PIN PD for 50μm core diameter fibers.Figure 4
Schematic cross-sectional view of the fully processed transceiver chip consisting of a monolithically integrated PIN photodetector separated by a 2 to 4μm wide trench from the top-emitting, oxide-confined VCSEL. Both devices feature top-accessible contacts (from [24], © 2011 IEEE).In the next processing step, selective oxidation in a hot water vapor atmosphere forms a current aperture in the AlAs layer. Its diameter is chosen to obtain transverse multimode operation of the laser. An aluminum content of 90% in the 150 nm thick etch stop layer ensures a much decreased oxidation rate compared to the current confinement layer [27]. A deep oxidation of the etch stop layer associated with a volume change would induce strain in the surrounding layers, which could cause cracks and damage of the edges of the PD after the subsequent annealing process for the n-contacts [22]. On the other hand, a low aluminum content could result in a lower etching selectivity of the hydrofluoric acid [26]. The fourth and fifth lithography step provides passivation and planarization with polyimide. Afterwards, both p- and n-contacts of the PD and VCSEL are evaporated and annealed, in order to form low-resistance contacts. In the last lithography step, an Al2O3 quarter-wave antireflection layer is sputtered on the area of the transceiver chip which is exposed to the incident light. The reflectivity of the semiconductor surface is thus reduced from approximately 30% to 1.3% over a spectral width of nearly 50 nm [21].


## 3.1. VCSEL

The VCSEL layer structure consists of a distributed Bragg reflector (DBR) with 38.5 n-dopedAl0.2Ga0.8As/Al0.9Ga0.1As mirror periods with graded aluminum content. The three 8 nm thick GaAs quantum wells are designed for 850 nm wavelength emission at room temperature. They are separated by 10 nm Al0.27Ga0.73As barrier layers forming the active region in the center of a one-wavelength optical thickness inner cavity. A 32 nm thick highly p-doped AlAs layer in the first top-mirror period above the active region is designated for current confinement after an oxidation step. The upper p-doped DBR with 23.5 periods completes the VCSEL cavity and is equivalent to the bottom n-DBR. The VCSEL growth is terminated with a 30 nm highly p-doped GaAs layer, which provides a low resistance p-contact and at the same time prevents oxidation of the subjacent aluminum-containing Bragg layers.


## 3.2. PIN Photodiode

A monolithic integration of PIN photodiodes with VCSELs was realized by growing the PD layers on top of the VCSEL structure in the same growth run. This guarantees an improved crystal quality compared to an overgrowth process [23]. Hence, the PIN PD layer stack is grown on top of the intrinsic Al0.9Ga0.1As etch stop layer, which also partially acts as an insulator, reducing the capacitive coupling between the two devices. Additionally, the reverse-biased PD has its grounded p-doped side facing the VCSEL layers, which minimizes possible capacitive effects. The main part of the PIN-type photodiode is the 2 to 3 μm thick undoped GaAs absorption layer sandwiched by p- and n-doped Al0.3Ga0.7As of 250 nm thickness, which enables sufficient current spreading for large diameter PDs [24]. The higher band gap energy of these two contact layers provides a spectral window for the wavelengths of interest at around 850 nm. Linearly graded n- and p-AlxGa1-xAs (x=0→0.3) in Figure 3 is employed between the absorption and contact layers in order to minimize the energy band discontinuities, thus ensuring an easier escape of the light-induced carriers from the undoped GaAs. To prevent the top n-Al0.3Ga0.7As from oxidation, a 10 nm thick n-doped GaAs cap layer terminates the complete VCSEL-PD stack.


## 3.3. Fabrication

The fabrication of transceiver chips is based on lithographic structuring with photosensitive resists and subsequent etching or material deposition steps. At least eight lithographic steps are necessary for the full processing of the transceiver chip shown in Figure4. In the first step, the detector layers on top of the VCSEL structure are removed to uncover the future laser device. In order to ensure that the uppermost VCSEL layer is not affected by the etching, it is protected by an etch stop layer with a high aluminum content, as mentioned above. Combining nonselective with selective dry-etching processes such as reactive-ion etching (RIE) with SiCl4 alone and with an appropriate SF6/SiCl4 ratio afterwards [25], the p-Al0.3Ga0.7As can be exposed. It is subsequently removed by a citric acid/hydrogen peroxide solution, since it provides the best achievable etching selectivity with a possibility of visual control between Al0.3Ga0.7As and Al0.9Ga0.1As layers [26]. Followed by an Al0.9Ga0.1As/GaAs highly selective wet-etching with hydrofluoric acid [26], also the etch stop layer covering the p-doped cap layer of the VCSEL can now be removed. Despite the fact that the last 300 to 400 nm above the p-Bragg mirror are wet-etched, thus providing rather flat mesa side walls in this region, more than 90% of the total etch depth was reached by the dry-etching process resulting in nearly vertical mesa edges. Unlike MSM PDs with planar contact structure, PIN PDs have vertically displaced contacts and thus require an additional etch step to expose the p-doped Al0.3Ga0.7As layer as can be seen in the left part of Figure 4. This step can be accomplished in analogy to the previous dry-etching processes, where the AlGaAs p-contact layer with just 30% aluminum content acts also as an etch stop layer. By means of the described selective etching techniques, a uniform layer topography all over the wafer can be guaranteed in spite of the layer thickness inhomogeneity due to the epitaxial growth process. The third etching process spatially separates the VCSEL and the photodetector by a 2 to 4 μm narrow trench and thus provides access to the current confinement layer, as seen in the right part of Figure 4. It is performed by reactive-ion etching with SiCl4 and thus without selectivity. Also this process step requires dry-etching, since steep mesa side walls are crucial for the miniaturization and dense integration of VCSEL and PIN PD for 50μm core diameter fibers.Figure 4
Schematic cross-sectional view of the fully processed transceiver chip consisting of a monolithically integrated PIN photodetector separated by a 2 to 4μm wide trench from the top-emitting, oxide-confined VCSEL. Both devices feature top-accessible contacts (from [24], © 2011 IEEE).In the next processing step, selective oxidation in a hot water vapor atmosphere forms a current aperture in the AlAs layer. Its diameter is chosen to obtain transverse multimode operation of the laser. An aluminum content of 90% in the 150 nm thick etch stop layer ensures a much decreased oxidation rate compared to the current confinement layer [27]. A deep oxidation of the etch stop layer associated with a volume change would induce strain in the surrounding layers, which could cause cracks and damage of the edges of the PD after the subsequent annealing process for the n-contacts [22]. On the other hand, a low aluminum content could result in a lower etching selectivity of the hydrofluoric acid [26]. The fourth and fifth lithography step provides passivation and planarization with polyimide. Afterwards, both p- and n-contacts of the PD and VCSEL are evaporated and annealed, in order to form low-resistance contacts. In the last lithography step, an Al2O3 quarter-wave antireflection layer is sputtered on the area of the transceiver chip which is exposed to the incident light. The reflectivity of the semiconductor surface is thus reduced from approximately 30% to 1.3% over a spectral width of nearly 50 nm [21].


## 4. Device Characteristics

As can be seen in Figures2 and 4, all PD and VCSEL contacts are accessible from the top, thus allowing on-wafer testing with two coplanar microwave probes with ground-signal-ground (GSG) configuration.


### 4.1. VCSEL

Small-signal modulation transfer functions of an integrated VCSEL with about 8μm oxide aperture and 25 μm mesa diameter are shown in Figure 5. Their typical second-order low-pass behavior is clearly visible with the shift of the resonance peak for bias currents above threshold. The increase of the damping coefficient flattens the shape of the frequency response without limiting its bandwidth for currents up to 9 mA. A maximum 3 dB bandwidth of around 11.5 GHz is observed, providing a suitable frequency characteristic for large-signal experiments. For the given device generation, unintentional cavity detuning has led to optical emission at around 810 nm, a rather high threshold current of 3.5 mA, and a relatively low maximum output power of 3.5 mW [24].Figure 5
Small-signal frequency response curves of a typical transceiver multimode VCSEL for different bias currents (from [24]).


### 4.2. PIN Photodiode

The VCSEL structure underneath the photodetector leads to backreflection of the incident nonabsorbed light and thus to double-pass absorption. The responsivity of the transceiver PIN photodiode with3μm thick GaAs absorption layer increases to 0.61 A/W at 850 nm, which corresponds to a quantum efficiency of nearly 88% [29]. It is almost independent of the bias voltage. The small-signal frequency response of the 3μm thick and 60μm diameter photodetector can be sufficiently improved by increasing its reverse bias voltage, as shown in Figure 6. It saturates at –8 V enabling a 3 dB-bandwidth in the range of 4.5 to 6 GHz [28]. Despite the fact that the 3 dB bandwidth of the PIN PD is about a factor of two smaller than that of the VCSEL, the rather slow roll-off of the response curve still provides sufficient signals for frequencies somewhat beyond the 3 dB limit. From simple estimations, the resistor-capacitor (RC) low-pass and drift time bandwidths of the PD are expected to be 14 GHz (for R=50Ω and neglecting the bond pad capacitances) and 15 GHz, respectively. We attribute the much smaller experimental values and the corrugations of the frequency responses predominantly to parasitic coupling with the highly doped VCSEL layers underneath the PD layers as well as to the parasitic contributions of the PD bondpads.Figure 6
Small-signal frequency response curves of an integrated 3μm thick transceiver PIN photodetector for reverse bias voltages from –3 to –8 V (from [28]).


## 4.1. VCSEL

Small-signal modulation transfer functions of an integrated VCSEL with about 8μm oxide aperture and 25 μm mesa diameter are shown in Figure 5. Their typical second-order low-pass behavior is clearly visible with the shift of the resonance peak for bias currents above threshold. The increase of the damping coefficient flattens the shape of the frequency response without limiting its bandwidth for currents up to 9 mA. A maximum 3 dB bandwidth of around 11.5 GHz is observed, providing a suitable frequency characteristic for large-signal experiments. For the given device generation, unintentional cavity detuning has led to optical emission at around 810 nm, a rather high threshold current of 3.5 mA, and a relatively low maximum output power of 3.5 mW [24].Figure 5
Small-signal frequency response curves of a typical transceiver multimode VCSEL for different bias currents (from [24]).


## 4.2. PIN Photodiode

The VCSEL structure underneath the photodetector leads to backreflection of the incident nonabsorbed light and thus to double-pass absorption. The responsivity of the transceiver PIN photodiode with3μm thick GaAs absorption layer increases to 0.61 A/W at 850 nm, which corresponds to a quantum efficiency of nearly 88% [29]. It is almost independent of the bias voltage. The small-signal frequency response of the 3μm thick and 60μm diameter photodetector can be sufficiently improved by increasing its reverse bias voltage, as shown in Figure 6. It saturates at –8 V enabling a 3 dB-bandwidth in the range of 4.5 to 6 GHz [28]. Despite the fact that the 3 dB bandwidth of the PIN PD is about a factor of two smaller than that of the VCSEL, the rather slow roll-off of the response curve still provides sufficient signals for frequencies somewhat beyond the 3 dB limit. From simple estimations, the resistor-capacitor (RC) low-pass and drift time bandwidths of the PD are expected to be 14 GHz (for R=50Ω and neglecting the bond pad capacitances) and 15 GHz, respectively. We attribute the much smaller experimental values and the corrugations of the frequency responses predominantly to parasitic coupling with the highly doped VCSEL layers underneath the PD layers as well as to the parasitic contributions of the PD bondpads.Figure 6
Small-signal frequency response curves of an integrated 3μm thick transceiver PIN photodetector for reverse bias voltages from –3 to –8 V (from [28]).


## 5. Data Transmission

According to the results presented in the previous subsection, the lower small-signal bandwidths of the PIN PDs compared to those of the VCSELs are expected to limit the maximum achievable data rate of the transceivers. For half-duplex operation, the VCSEL is biased by a constant current superimposed with a high-speed modulating signal, which is generated by a bit pattern generator (Anritsu MP1763B) that itself is driven by a signal generator (Rohde & Schwarz SMR40). An attenuator between bias tee and bit pattern generator is used to weaken the backward microwave reflections due to impedance mismatch between the VCSEL and the 50 Ω signal driver. For back-to-back (BTB) data transmission, the laser beam is focused via free-space optics on the transceiver PIN photodetector, as shown in Figure8 (top). In case of fiber-based data transmission in Figure 7 (top), a MMF is butt-coupled (about 30μm distance) to each TRx chip. The PIN photodiode is reverse biased with a constant voltage of –8 V using a bias tee. It separates the modulated and direct current signals on the receiver side. The high-speed signal is subsequently amplified by a wideband amplifier (Anritsu A3HB3102) with 10 GHz bandwidth, 28 dB gain, and 4.5 dB noise figure before its analysis with a wide-bandwidth oscilloscope (Agilent 86100B) or bit error detector (Anritsu MP1764A). For full-duplex operation, in order to build an equivalent transmission link in the opposite direction, the inverted output of the bit pattern generator is used for the second channel.Figure 7
Optical eye diagrams (from [28]) for error-free half-duplex 215-1 word length non-return-to-zero (NRZ) pseudorandom bit sequence (PRBS) data transmission at 7 Gbit/s (bottom left and center), as well as 6 Gbit/s error-free full-duplex operation (bottom right), all over 500 m graded-index (GI) MMF, as indicated in the schematic setup (top).Figure 8
Optical eye diagrams (bottom) for back-to-back (top) error-free half-duplex215-1 word length NRZ PRBS data transmission at 8 Gbit/s (bottom left and center), as well as 7 Gbit/s error-free full-duplex operation (bottom right).


### 5.1. Standard MMF

Investigations into digital data transmission were made using a 500 m long50μm core diameter OM3-type MMF with a bandwidth-distance product of about 2 GHz × km. For evaluation purposes, two different transceiver chips with 2 and 3μm thick PIN PDs were used in this experiment [28]. The thinner photodiode has a larger capacitance and a smaller 3 dB-bandwidth of approximately 4.2 GHz. First, data transmission in half-duplex mode was performed in order to avoid the influence of optical and electrical crosstalk in the system. The optical eye diagrams in Figure 7 (bottom) show error-free operation with the 2μm (left) and 3μm (center) thick PIN PDs at 7 Gbit/s, thus fully utilizing the B×L of the MMF. For the 2μm PD, the maximum data rate is additionally limited by the rising and falling edges caused by RC parasitics. In contrast, for the opposite channel with a 3μm thick PIN PD, the error-free eye with smaller amplitude (caused by the smaller on-off ratio of the VCSEL on TRx chip 2) shows the RC limit to a much smaller extent. The signals detected by the PDs on the transmitter side (i.e., on the same chip) correspond to optical crosstalk, predominantly due to the reflections at both fiber endfaces as well as at the opposite TRx chip. Their contributions are still sufficiently smaller than the trace widths of the operating channel. Thus, quasi error-free data transmission in full-duplex mode could be achieved at 6 Gbit/s, as shown in Figure 7 (bottom right). The slightly smaller data rate can be clearly attributed to the higher noise level inherently present in the setup for full-duplex mode operation.In the present experiment, disturbances of the VCSELs owing to injected light from the opposite laser could not be observed since the emission wavelengths were slightly different. In a previous experiment with VCSEL-MSM chips, we tried to enforce such a potentially critical operation condition by matching the VCSELs through thermal tuning. Nevertheless, no adverse effects have been found [21]. With the result from Figure 7, the full-duplex data rate has been increased by a factor of six compared to [9] and is to our knowledge the highest reported full-duplex throughput for single-fiber optical links with monolithic transceivers so far.


### 5.2. Back-to-Back

Additional data transmission experiments were performed in back-to-back mode in order to avoid dispersion and optical crosstalk effects of the glass fiber and thus to demonstrate the maximum achievable data rate of the transceivers. Here, 3μm thick PIN PDs were used in both TRx chips. As can be seen in Figure 8 (bottom left and center), quasi error-free data transmission in half-duplex mode is well possible up to 8 Gbit/s. Owing to lower optical crosstalk contributions in BTB mode, error-free full-duplex operation is even possible up to 7 Gbit/s. In such free-space communication, there is no limit of the maximum data rate by the bandwidth-distance product of the fiber as was the case in the previous subsection.The back-to-back operation mode also allows the insertion of optical elements into the transmission channel. In order to perform bit error measurements, a variable optical attenuator was used to adjust the optical output power of the VCSELs. In Figure9, bit error ratios (BERs) are shown for different data rates in both, half- and full-duplex mode. For simplicity, only one transmission direction (here from chip 2 to 1) is presented. On average, there is 0.5 dB power penalty for full-duplex compared to half-duplex transmission at the same data rate. At a relatively high optical power of approximately –4.5 dBm, even 8 Gbit/s could be transmitted quasi error-free simultaneously in both directions.Figure 9
BER characteristics for back-to-back half- and full-duplex215-1 word length NRZ PRBS data transmission.


## 5.1. Standard MMF

Investigations into digital data transmission were made using a 500 m long50μm core diameter OM3-type MMF with a bandwidth-distance product of about 2 GHz × km. For evaluation purposes, two different transceiver chips with 2 and 3μm thick PIN PDs were used in this experiment [28]. The thinner photodiode has a larger capacitance and a smaller 3 dB-bandwidth of approximately 4.2 GHz. First, data transmission in half-duplex mode was performed in order to avoid the influence of optical and electrical crosstalk in the system. The optical eye diagrams in Figure 7 (bottom) show error-free operation with the 2μm (left) and 3μm (center) thick PIN PDs at 7 Gbit/s, thus fully utilizing the B×L of the MMF. For the 2μm PD, the maximum data rate is additionally limited by the rising and falling edges caused by RC parasitics. In contrast, for the opposite channel with a 3μm thick PIN PD, the error-free eye with smaller amplitude (caused by the smaller on-off ratio of the VCSEL on TRx chip 2) shows the RC limit to a much smaller extent. The signals detected by the PDs on the transmitter side (i.e., on the same chip) correspond to optical crosstalk, predominantly due to the reflections at both fiber endfaces as well as at the opposite TRx chip. Their contributions are still sufficiently smaller than the trace widths of the operating channel. Thus, quasi error-free data transmission in full-duplex mode could be achieved at 6 Gbit/s, as shown in Figure 7 (bottom right). The slightly smaller data rate can be clearly attributed to the higher noise level inherently present in the setup for full-duplex mode operation.In the present experiment, disturbances of the VCSELs owing to injected light from the opposite laser could not be observed since the emission wavelengths were slightly different. In a previous experiment with VCSEL-MSM chips, we tried to enforce such a potentially critical operation condition by matching the VCSELs through thermal tuning. Nevertheless, no adverse effects have been found [21]. With the result from Figure 7, the full-duplex data rate has been increased by a factor of six compared to [9] and is to our knowledge the highest reported full-duplex throughput for single-fiber optical links with monolithic transceivers so far.


## 5.2. Back-to-Back

Additional data transmission experiments were performed in back-to-back mode in order to avoid dispersion and optical crosstalk effects of the glass fiber and thus to demonstrate the maximum achievable data rate of the transceivers. Here, 3μm thick PIN PDs were used in both TRx chips. As can be seen in Figure 8 (bottom left and center), quasi error-free data transmission in half-duplex mode is well possible up to 8 Gbit/s. Owing to lower optical crosstalk contributions in BTB mode, error-free full-duplex operation is even possible up to 7 Gbit/s. In such free-space communication, there is no limit of the maximum data rate by the bandwidth-distance product of the fiber as was the case in the previous subsection.The back-to-back operation mode also allows the insertion of optical elements into the transmission channel. In order to perform bit error measurements, a variable optical attenuator was used to adjust the optical output power of the VCSELs. In Figure9, bit error ratios (BERs) are shown for different data rates in both, half- and full-duplex mode. For simplicity, only one transmission direction (here from chip 2 to 1) is presented. On average, there is 0.5 dB power penalty for full-duplex compared to half-duplex transmission at the same data rate. At a relatively high optical power of approximately –4.5 dBm, even 8 Gbit/s could be transmitted quasi error-free simultaneously in both directions.Figure 9
BER characteristics for back-to-back half- and full-duplex215-1 word length NRZ PRBS data transmission.


## 6. Conclusion

In summary, we have presented the past and current achievements on the fabrication and properties of monolithically integrated 850 nm wavelength transceiver chips for bidirectional data transmission over a single butt-coupled multimode fiber. The two kinds of chips consist of a VCSEL and either an MSM- or a PIN-type photodetector. Using MSM photodiodes for signal detection with 100μm diameter large-core MMFs, data transmission of 1 Gbit/s in half- and full-duplex mode was possible. Maximum values of up 5 Gbit/s were shown in back-to-back mode.The VCSEL-PIN transceiver chips were miniaturized in order to match with standard MMFs of 50μm core diameter. The main challenge in chip processing was the sophisticated combination of selective dry- and wet-etching techniques for mesa formation. PIN PDs with maximum bandwidths of 4.5 to 6 GHz and VCSELs with 11.5 GHz can handle data rates of up to 8 Gbit/s in BTB half- and full-duplex data transmission. Over a 500 m long butt-coupled standard MMF, 7 Gbit/s in half-duplex and 6 Gbit/s in full-duplex mode could be demonstrated. With optimized TRx chips, even further improvements reaching to around 10 Gbit/s are realistic.



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*Source: 729731-2012-02-27.xml*