# Control Algorithm for Equal Current Sharing between Parallel-Connected Boost Converters in a DC Microgrid

Authors: Muamer M. Shebani; M. Tariq Iqbal; John E. Quaicoe
Journal: Journal of Electrical and Computer Engineering
 (2020)

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## Abstract

DC microgrids are gaining more attention compared to AC microgrids due to their high efficiency and uncomplicated interconnection of renewable sources. In standalone DC microgrid, parallel-connected converters connect the storage system to the load. To achieve equal current sharing among parallel converters, several methods have been presented, but they vary in their current sharing performance, complexity, cost, and reliability. In DC microgrid, the conventional droop control method is preferred because it is more competitive in terms of cost, suitability, and reliability compared to the master-slave control method. However, the conventional droop method cannot ensure equal current sharing due to the mismatches in parameters of parallel-connected converters. To address this limitation, a control algorithm that supervises a modified droop method to achieve precise current sharing between parallel modules is proposed in this paper. The control algorithm is based on the percentage of current sharing for each module to the total load current. The output current measurement of each converter is compared to the total load current and is used to modify the nominal voltage for each converter. The effectiveness of the proposed algorithm is verified by MATLAB simulation model and experimental results.


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## Body

## 1. Introduction

The DC microgrid has attracted attention in recent years because it provides a more efficient integration of distributed renewable energy and storage systems, partly due to the elimination of the rectification and inversion stages [1, 2]. In a standalone DC microgrid, the renewable energy sources and storage systems provide uninterrupted power to the load. The schematic diagram of a conventional PV system with a storage battery system is shown in Figure 1, which includes two categories of converters, namely, the renewable side converter and the storage side converter. The renewable side converter interconnects the renewable energy source to the storage system, and its objective is to extract the maximum power from the renewable energy source through the maximum power point tracking (MPPT) unit, whereas the purpose of the storage side converter is to regulate the voltage of the common DC bus to the nominal value through a voltage regulator unit [3]. To increase the reliability of the storage side converters in distributed energy resources at high-power levels, parallel-connected converters are employed. This arrangement offers several advantages compared to a single unit structure. Some of these advantages are related to the system structure such as output power expandability and ease of maintenance, as well as the system performance such as better dynamic response, higher efficiency, and reduced stress on each unit by sharing the load current [4–6].Figure 1
Schematic diagram of a standalone PV system with storage in the middle.One of the challenges in employing parallel operation of DC-DC converters is to ensure that the load is shared equally between the parallel converters while maintaining acceptable voltage regulation. An improper current sharing between parallel converters could result from the mismatch in the parameters of parallel-connected converters. Consequently, one of the parallel modules experiences a higher current through the power electronic switches, causing the losses and rating of these switches to increase and lead to converter overloading issues [7, 8]. Several attempts to improve load current sharing between parallel-connected converters have been reported in the literature [2–13]. The proposed methods can be classified into two categories: active current sharing methods, which predominantly employ master-slave controller; and passive droop methods that are based on the droop characteristics of the converters [9].The master-slave controller can provide precise load current sharing. However, it is more expensive to implement and less reliable compared to the droop method due to the use of an analog wireless or intercommunication link between modules. Various implementations of the analog wireless communication for the master-slave current control are presented in [10–12]. One of the converters, which is used as the master controller operates in voltage-controlled mode and provides the current reference value based on the total load current to the other converters through a high-speed communication link. The reference current signal may also be sent through a high-speed digital communication link to the slave converters, which operate in current-controlled mode only. The high-speed communication between converters improves system performance and minimizes the time delay. The total cost for the master-slave current control is increased due to the use of the high-speed digital communication link. In the case of medium and high-power application, increasing the total cost would not be appropriate. However, in low-power applications where the converters are located close to each other, an analog controller would suffice.The simplest and the commonly used approach for controlling parallel-connected converters is the conventional droop method. However, one of the main drawbacks of the method is that a precise load current sharing cannot be achieved without an adaptive droop controller as reported in [13]. The adaptive droop controller method, which is based on a variable droop coefficient, uses a first-order tracker to determine the droop coefficients for parallel converters at the same instant of time and for all load conditions. However, to ensure equal current sharing for parallel modules, the method requires a data connection between modules to determine the instant droop coefficient at various load conditions. A communication link between the parallel modules is, therefore, required to provide the synchronous information. Another adaptively modified droop controller, which uses the circulation current between parallel-connected converters to modify the output voltage for the converters, is presented in [14]. The adaptive droop controller improves the current sharing between parallel modules. However, the measurements of the output currents for each module are used locally and sent to the other parallel-connected converters to modify their output voltage. An analog communication link with high bandwidth will be needed between parallel modules to improve their load sharing.However, the droop method is modified and utilized in DC microgrids with battery energy storage systems (BESSs) to deal with the unpredictable nature of renewable resources. Balancing the state of charge can help extend the lifetime of the BESSs. Therefore, several droop control methods have been presented in the literature to overcome the issue of different state of charge and capacity of BESSs. Besides utilizing the droop methods for equal current sharing in parallel-connected DC-DC converters, the droop method is manipulated by changing the droop coefficient to balance the state of charge of battery energy storage systems as reported in [15, 16]. When more than one BESSs with different capacities are used in a DC microgrid, the possibility of different state of charge should be taken into consideration to keep the state of charge balanced.In general, the droop coefficient can be adjusted to improve the load current sharing and voltage regulation in DC microgrids under different requirements such as variations in system parameters and large variation in the load. Two improved approaches are presented in [17] to enhance the current sharing of parallel-connected converters in DC microgrids. The first approach is based on updating the droop resistances for each unit, and in this technique, the load current is needed to be communicated for the current sharing loops between parallel units. The second technique basically employs an optimum droop resistance to completely remove the current sharing loop and their communication links. However, for a large variation in the system parameters or loading conditions, an adaptive droop scheme is proposed in [18] to overcome the nonlinearity of the system. The adaptive droop gain is adjusted by an adaptive PI controller to ensure equal sharing, and the secondary loop, which uses another adaptive PI controller, is used to regulate the DC bus voltage. However, a low bandwidth communication scheme would be needed to transmit the voltage and current information at the DC bus to each converter.In DC microgrids, because the renewable distributed resources and the loads are connected to the point of common coupling, the droop controller method for parallel-connected converters is more competitive compared to the active current sharing such as master-slave [19]. On the other hand, the conventional droop method does not guarantee an accurate current sharing between parallel modules due to mismatches of the parameters of parallel converters. This paper presents a control algorithm to adjust and modify the nominal voltage of the parallel-connected converters. The precise current sharing between the parallel modules is achieved without communication link between the converters. Rather, it is based on the measurements of current and voltage at the point of common coupling. The proposed algorithm is implemented with the modified droop method. The effectiveness of the proposed algorithm is confirmed through a simulation module implemented in MATLAB. An experimental prototype of two parallel boost converter modules is developed and used to validate the proposed algorithm with the modified droop method.


## 2. Analysis of the Modified Droop Method

The concept of current sharing in the conventional droop method relies on the droop gain of the load regulation characteristics of the parallel-connected boost converters. However, due to manufacturing tolerances, it is impossible to have the parallel-connected converters with exact parameters [20]. To take into account this limitation, two different boost converters are implemented in MATLAB/Simulink and the experimental prototype. The converters operate in continuous current conduction mode and their parameters are shown in Table 1 [21].Table 1
Parameters for the simulated and experimental modules of the two parallel-connected boost converters.
Parameters
Converter I
Converter II
Inductance
12.49 mH
12.75 mH
Capacitance
570μF
620μF
Switching frequency
25 kHz
25 kHz
Nominal voltage
6–12 V
6–12 VAs can be seen in Table1, the mismatches in the inductor and the capacitance parameters are approximately 9% and 2.5%, respectively. Figures 2(a) and 2(b), respectively, show the two parallel-connected boost converters directly connected to a resistive load and connected through cable resistances (Rc1, Rc2) to the resistive load. The current sharing of the two parallel-connected boost converters in Figures 2(a) and 2(b), based on the load regulation characteristics of the boost converters, are shown in Figures 3(a) and 3(b), respectively.Figure 2
Circuit diagram of two parallel-connected boost converters to a resistive load. (a) Converters connected directly to a resistive load. (b) Converters connected to a resistive load through cable resistances.
(a)
(b)Figure 3
Load regulation characteristics of two parallel-connected boost converters. (a) Converters connected directly to a resistive load. (b) Converters connected to a resistive load through cable resistances.
(a)
(b)The parameters in Table1 are used to determine the gain droops for converters I and II [22, 23]. The slope of the load regulation characteristics is the droop gain for the conventional droop. Using the approach described in [22], the gain droop for converters I and II are determined as K1=0.6027, K2=0.6124, respectively. In general, the output voltage of converter i drops as the output current increases as follows:(1)Vi=ViNL−Ki∗Ii,where i is the number of parallel-connected converters, ViNL is the no-load voltage of converter i, Ki is the droop gain of converter i, Ii is the output current of converter i, and Vi is the output voltage of converter i.Owing to the mismatch in the parameters of the two parallel-connected boost converters, the differences in current sharing at 12 V can be observed in Figure3(a). In Figure 3(b), the load regulation characteristic is modified by including the cable resistance (Rc1=Rc2=0.4Ω) [24]. It is observed that the current sharing is still unequal. The cable resistances modify the droop characteristics at the point of common coupling. Thus, the voltage at the load can be expressed in terms of the output current of converter I or converter II as follows:(2)Vload=V1NL−K1+Rc1∗I1,(3)Vload=V2NL−K2+Rc2∗I2.Furthermore, the output voltage as a function of the load resistance and the total load current is given by(4)Vload=I1+I2∗R.In equation (4), R is the load resistance. Equations (2) and (3) can be rewritten as a function of the sharing currents for both converters and the load resistance by substituting (4) into (2) and (3) to obtain the no-load voltage of each converter as follows:(5)V1NL=K1+Rc1+R∗I1+R∗I2,(6)V2NL=R∗I1+K2+Rc2+R∗I2.By solving equations (5) and (6), the estimated current sharing for the two parallel-connected boost converters are obtained as(7)I1=V2NL/R−V1NL/R2∗K2+Rc2+R1−1/R2∗K1+Rc1+R∗K2+Rc2+R,I2=V1NL/RL−V2NL/RL2∗K1+Rc1+RL1−1/RL2∗K1+Rc1+RL∗K2+Rc2+RL.Based on the estimated current sharing and the load voltage given in equation (4), the estimated output voltage for converter i (Voutput−i) can be determined based on the common DC bus (Vload) as(8)Voutput−i=Vload+Rci∗Ii.The block diagram of the modified droop method for the parallel-connected converters with their control loops is shown in Figure4.Figure 4
Block diagram of the modified droop method with both converters and their control loops.The block diagram of Figure4 shows the outer and inner control loops for each converter. The PI controllers for the inner and the outer loop are designed using the small state-space averaging technique model and using SISOTOOL in MATLAB [25–28]. The parameters of the PI controller for the outer and inner loops are given in Table 2. The outer voltage control loop is adjusted by the modified droop method with the cable resistance implementation. ΔV is determined by subtracting the estimated output voltage (Voutput−i) of converter i from the nominal DC bus voltage, which is 12 V in this paper. Therefore, the adjusted reference voltage forces each converter to share the load current based on the load regulation characteristics of Figure 3(a).Table 2
Parameters of the PI controller for the outer and inner loop controllers.
Parameters
Voltage loop controller
Current loop controller
Proportional gainkp
0.0546
0.315
Integral gainkI
7.8
45


## 3. Proposed Algorithm

The flow chart of the proposed algorithm is shown in Figure5. The input voltage measurements to the outer loop voltage controller is modified by the current sharing percentage of each converter. Since each converter shares half of the total load current, the percentage of current sharing of each converter must be 50% of the total load current. Thus, if the percentage of current sharing of converter I is less than 50%, the nominal voltage set point for converter I is increased by ΔVCA. However, if the current sharing percentage for converter I is higher than 50%, the nominal voltage reference of converter I is decreased by ΔVCA. The percentage of current sharing (PCS) for converter i is calculated based on the measurements of the total load current and the output current of converter i as(9)PCSi=IiIload.Figure 5
Flow chart of the proposed algorithm.The proposed algorithm can achieve precise current sharing between parallel-connected converters. However, due to the predetermined range of variation in the converter currents, small oscillations can be observed around the desired operating point for equal current sharing as shown in Figure6. In order to minimize the oscillations around the desired operating point, ΔVCA must be chosen to be a small value. Furthermore, if the droop gain of the load regulation characteristics of the converter is high (i.e., K>K′), the oscillations around the desired operating point can be minimized as can be seen in Figure 6.Figure 6
Oscillatory current around the desired operating point for two droop gains withK>K′.In this paper,ΔVCA is chosen to be small and the droop gains for both converters are selected to produce negligible oscillations in the output current waveforms around the desired operating points. Figure 7 shows a block diagram of two parallel-connected boost converters along with the proposed algorithm.Figure 7
Block diagram of two parallel-connected boost converters with the proposed algorithm.


## 4. Results and Discussion

### 4.1. Simulation Study

Simulation results based on Matlab/Simulink is performed to determine the validity and improved performance of the proposed algorithm. Simulation results are obtained for the two cases, namely, the modified droop method (Figure4) and the modified droop method with the proposed algorithm (Figure 7). The parameters of the two boost converters are given in Table 1. The cable resistances are selected to be equal because, in this study, the intent is to test the performance of the proposed algorithm under different parameters of the two parallel-connected boost converters. The cable resistances are chosen as Rc1=Rc2=0.4Ω. Two different values of load are used to test the performance of the proposed algorithm. The two simulated cases are simulated under the same condition of increasing the load at 2.5 s. Figures 8 and 9 show the results of the output current and the output voltage for the modified droop method, respectively.Figure 8
Simulation results for an increase in the load. (a) Output current of converter I. (b) Output current of converter II. (c) Total load current.
(a)
(b)
(c)Figure 9
Simulation results for an increase in the load. (a) The output voltage of converter I. (b) The output voltage of converter II. (c) The voltage at the common DC bus.
(a)
(b)
(c)As shown in Figure8, although the cable resistances are equal, the load current sharing is affected by the differences between the parameters of the parallel-connected boost converters. The output current from converter I is higher than the output current of converter II. Before the load is increased at 2.5 s, the output currents of converters I and II are 0.335 A and 0.281 A, respectively. Furthermore, after a step increase of the load at 2.5 s, the output currents of converters I and II become 0.4715 A and 0.416 A, respectively.The load current sharing and the voltage regulation follow the load regulation characteristics of the two parallel-connected boost converters. The steady-state values for the output voltages and currents, as well as the percentage deviation in current sharing for the modified droop method, are given in Table3.Table 3
Simulation results for the modified droop method.
Time (sec)
(Vout1,Vout2), Vload (V)
(I1,I2), Iload (A)
Δ
I
% current sharing differences
0–2.5
(12.06, 12.042), 11.93
(0.335, 0.281), 0.616
8.778
2.5–5
(11.98, 11.96), 11.79
(0.4715, 0.416), 0.8875
6.254From the results in Table3, it can be observed that the load current sharing is not precisely equal and the percentage deviation in current sharing is higher than 6%. However, to compare the performance of the proposed algorithm under a step increase of the load, the proposed algorithm is also simulated, and the results are shown in Figure 10.Figure 10
Simulation results for the proposed algorithm with an increase in the load. (a) Output current of converter I. (b) Output current of converter II. (c) Total load current.
(a)
(b)
(c)The load current sharing of the proposed algorithm for both converters is improved as shown in Figure(10). Thus, converter I and converter II share the load current equally for two different values of load. The proposed algorithm increases or decreases the voltage set point of each converter to ensure an equal current sharing between the parallel-connected converters. In the proposed algorithm, the voltage set point for the outer voltage loop of converters I and II are modified as shown in the block diagram of Figure 7. Before a step increase in the load at 2.5 s, the output currents of converters I and II have the same value of 0.3085 A. Furthermore, after a step increase in the load at 2.5 s, converters I and II share the load current with equal value of 0.443 A. Figure 11 shows the output voltage for each converter and the common DC bus voltage.Figure 11
Simulation results for the proposed algorithm with an increase in the load. (a) The output voltage of converter I. (b) The output voltage of converter II. (c) The voltage at the common DC bus.
(a)
(b)
(c)The steady-state values of output currents and voltages shown in Figures10 and 11, respectively, as well as the percentage deviation in current sharing for the proposed algorithm, are summarized in Table 4.Table 4
Simulation results with the proposed algorithm.
Time (sec)
(Vout1,Vout2), Vload (V)
(I1,I2), Iload (A)
Δ
I
% current sharing differences
0–2.5
(12.054, 12.052), 11.93
(0.3085, 0.3085), 0.616
0
2.5–5
(11.97, 11.968), 11.792
(0.443, 0.443), 0.886
0The results in Table4 indicate that the precise load current sharing between the two parallel-connected boost converters is achieved by the proposed algorithm. Furthermore, by comparing the simulated results in Tables 3 and 4, the current sharing is improved by the proposed algorithm. Thus, the percentage deviation in current sharing of the proposed algorithm becomes zero in comparison to the modified droop method.


### 4.2. Experimental Validation

In order to validate the proposed algorithm in real-time, the simulated model is implemented by using dSPACE 1104. Figure12 shows the laboratory prototype of the developed model represented by the block diagram of Figure 7. The two boost converters are constructed using the parameters given in Table 1. A cable with a resistance of 0.4 Ω is used to connect both parallel converters to the resistive load.Figure 12
Photographs of the experimental setups. (a) Laboratory prototype. (b) Boost converters and load.Two parallel resistances of 19.33 Ω and 42.5 Ω are used as a load. For driving MOSFET, gate drive circuits are used in each converter as shown in Figure12(b) because the gate drive isolates the dSPACE 1104 from the actual circuit and provides a pulse width modulation of 15 V, which is required to switch the MOSFET on. The voltage and current sensors used have a conversion ratio between the input and the output of 3 and 1, respectively. Furthermore, since the absolute values of the input signals to the ADCs of the dSPACE are limited to ± 10 V, software protection is implemented in Maltable/Simulink to prevent signals greater than ± 10 V.Figure13 shows the output current waveforms for converter I and converter II and the total load current waveforms, which are recorded for the validation of the proposed algorithm. The step change is preformed to test the proposed algorithm experimentally during different loading conditions.Figure 13
Output current waveforms for each converter and the total load current of the proposed algorithm.From Figure13, it can be observed that converters I and II share the current equally. Before the load is increased, the load current sharing for converters I and II are 0.305 A and 0.305 A, respectively. Furthermore, when the load is increased, the proposed algorithm successfully modifies the voltage set point to achieve equal load current sharing between the two converters. After the step change in the load, the load current sharing between converter I and converter II becomes 0.437 A and 0.437 A, respectively. Therefore, the percentage deviation in current sharing for the proposed algorithm from the experimental results is zero, which matches the simulation results in Table 4. The DC bus voltage profile is shown in Figure 14. Initially, the voltage at the common DC bus is 11.897 V. However, after a step increase in the load, the voltage of the common DC becomes 11.838 V.Figure 14
Output voltage waveforms at each converter and the common DC bus of the proposed algorithm.Considering the conversion ratios of the voltage sensors and the scope scaling measurements, the experimental results are in agreement with the simulated results. However, when the load is increased, a small change in the output voltage for converters I and II and the common bus voltage can be noticed as shown in Figure14.


## 4.1. Simulation Study

Simulation results based on Matlab/Simulink is performed to determine the validity and improved performance of the proposed algorithm. Simulation results are obtained for the two cases, namely, the modified droop method (Figure4) and the modified droop method with the proposed algorithm (Figure 7). The parameters of the two boost converters are given in Table 1. The cable resistances are selected to be equal because, in this study, the intent is to test the performance of the proposed algorithm under different parameters of the two parallel-connected boost converters. The cable resistances are chosen as Rc1=Rc2=0.4Ω. Two different values of load are used to test the performance of the proposed algorithm. The two simulated cases are simulated under the same condition of increasing the load at 2.5 s. Figures 8 and 9 show the results of the output current and the output voltage for the modified droop method, respectively.Figure 8
Simulation results for an increase in the load. (a) Output current of converter I. (b) Output current of converter II. (c) Total load current.
(a)
(b)
(c)Figure 9
Simulation results for an increase in the load. (a) The output voltage of converter I. (b) The output voltage of converter II. (c) The voltage at the common DC bus.
(a)
(b)
(c)As shown in Figure8, although the cable resistances are equal, the load current sharing is affected by the differences between the parameters of the parallel-connected boost converters. The output current from converter I is higher than the output current of converter II. Before the load is increased at 2.5 s, the output currents of converters I and II are 0.335 A and 0.281 A, respectively. Furthermore, after a step increase of the load at 2.5 s, the output currents of converters I and II become 0.4715 A and 0.416 A, respectively.The load current sharing and the voltage regulation follow the load regulation characteristics of the two parallel-connected boost converters. The steady-state values for the output voltages and currents, as well as the percentage deviation in current sharing for the modified droop method, are given in Table3.Table 3
Simulation results for the modified droop method.
Time (sec)
(Vout1,Vout2), Vload (V)
(I1,I2), Iload (A)
Δ
I
% current sharing differences
0–2.5
(12.06, 12.042), 11.93
(0.335, 0.281), 0.616
8.778
2.5–5
(11.98, 11.96), 11.79
(0.4715, 0.416), 0.8875
6.254From the results in Table3, it can be observed that the load current sharing is not precisely equal and the percentage deviation in current sharing is higher than 6%. However, to compare the performance of the proposed algorithm under a step increase of the load, the proposed algorithm is also simulated, and the results are shown in Figure 10.Figure 10
Simulation results for the proposed algorithm with an increase in the load. (a) Output current of converter I. (b) Output current of converter II. (c) Total load current.
(a)
(b)
(c)The load current sharing of the proposed algorithm for both converters is improved as shown in Figure(10). Thus, converter I and converter II share the load current equally for two different values of load. The proposed algorithm increases or decreases the voltage set point of each converter to ensure an equal current sharing between the parallel-connected converters. In the proposed algorithm, the voltage set point for the outer voltage loop of converters I and II are modified as shown in the block diagram of Figure 7. Before a step increase in the load at 2.5 s, the output currents of converters I and II have the same value of 0.3085 A. Furthermore, after a step increase in the load at 2.5 s, converters I and II share the load current with equal value of 0.443 A. Figure 11 shows the output voltage for each converter and the common DC bus voltage.Figure 11
Simulation results for the proposed algorithm with an increase in the load. (a) The output voltage of converter I. (b) The output voltage of converter II. (c) The voltage at the common DC bus.
(a)
(b)
(c)The steady-state values of output currents and voltages shown in Figures10 and 11, respectively, as well as the percentage deviation in current sharing for the proposed algorithm, are summarized in Table 4.Table 4
Simulation results with the proposed algorithm.
Time (sec)
(Vout1,Vout2), Vload (V)
(I1,I2), Iload (A)
Δ
I
% current sharing differences
0–2.5
(12.054, 12.052), 11.93
(0.3085, 0.3085), 0.616
0
2.5–5
(11.97, 11.968), 11.792
(0.443, 0.443), 0.886
0The results in Table4 indicate that the precise load current sharing between the two parallel-connected boost converters is achieved by the proposed algorithm. Furthermore, by comparing the simulated results in Tables 3 and 4, the current sharing is improved by the proposed algorithm. Thus, the percentage deviation in current sharing of the proposed algorithm becomes zero in comparison to the modified droop method.


## 4.2. Experimental Validation

In order to validate the proposed algorithm in real-time, the simulated model is implemented by using dSPACE 1104. Figure12 shows the laboratory prototype of the developed model represented by the block diagram of Figure 7. The two boost converters are constructed using the parameters given in Table 1. A cable with a resistance of 0.4 Ω is used to connect both parallel converters to the resistive load.Figure 12
Photographs of the experimental setups. (a) Laboratory prototype. (b) Boost converters and load.Two parallel resistances of 19.33 Ω and 42.5 Ω are used as a load. For driving MOSFET, gate drive circuits are used in each converter as shown in Figure12(b) because the gate drive isolates the dSPACE 1104 from the actual circuit and provides a pulse width modulation of 15 V, which is required to switch the MOSFET on. The voltage and current sensors used have a conversion ratio between the input and the output of 3 and 1, respectively. Furthermore, since the absolute values of the input signals to the ADCs of the dSPACE are limited to ± 10 V, software protection is implemented in Maltable/Simulink to prevent signals greater than ± 10 V.Figure13 shows the output current waveforms for converter I and converter II and the total load current waveforms, which are recorded for the validation of the proposed algorithm. The step change is preformed to test the proposed algorithm experimentally during different loading conditions.Figure 13
Output current waveforms for each converter and the total load current of the proposed algorithm.From Figure13, it can be observed that converters I and II share the current equally. Before the load is increased, the load current sharing for converters I and II are 0.305 A and 0.305 A, respectively. Furthermore, when the load is increased, the proposed algorithm successfully modifies the voltage set point to achieve equal load current sharing between the two converters. After the step change in the load, the load current sharing between converter I and converter II becomes 0.437 A and 0.437 A, respectively. Therefore, the percentage deviation in current sharing for the proposed algorithm from the experimental results is zero, which matches the simulation results in Table 4. The DC bus voltage profile is shown in Figure 14. Initially, the voltage at the common DC bus is 11.897 V. However, after a step increase in the load, the voltage of the common DC becomes 11.838 V.Figure 14
Output voltage waveforms at each converter and the common DC bus of the proposed algorithm.Considering the conversion ratios of the voltage sensors and the scope scaling measurements, the experimental results are in agreement with the simulated results. However, when the load is increased, a small change in the output voltage for converters I and II and the common bus voltage can be noticed as shown in Figure14.


## 5. Conclusion

A control algorithm for improving the load current sharing of two parallel-connected boost converters is presented. The proposed algorithm modifies the voltage set point for each converter without communication link between the two nonidentical converters. The proposed algorithm includes an observation loop, which depends on the current sharing percentage of the total load current for each converter. The control algorithm operates with the modified droop method to ensure precise load current sharing. The performance of the proposed control algorithm is validated through Matlab/Simulink and experimental results.



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