# Delayed Spiking NeuralP Systems with Scheduled Rules

Authors: Qianqian Ren; Xiyu Liu
Journal: Complexity
 (2021)

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## Abstract

Due to the inevitable delay phenomenon in the process of signal conversion and transmission, time delay is bound to occur between neurons. Therefore, it is necessary to introduce the concept of time delay into the membrane computing models. Spiking neuralP systems (SN P systems), as an attractive type of neural-like P systems in membrane computing, are widely followed. Inspired by the phenomenon of time delay, in our work, a new variant of spiking neural P systems called delayed spiking neural P systems (DSN P systems) is proposed. Compared with normal spiking neural P systems, the proposed systems achieve time control by setting the schedule on spiking rules and forgetting rules, and the schedule is also used to realize the system delay. A schedule indicates the time difference between receiving and outputting spikes, and it also makes the system work in a certain time, which means that a rule can only be used within a specified time range. We specify that each rule is performed only in the continuous schedule, during which the neuron is locked and cannot send or receive spikes. If the neuron is not available at a given time, it will not receive or send spikes due to the lack of a schedule for this period of time. Moreover, the universality of DSN P systems in both generating and accepting modes is proved. And a universal DSN P system having 81 neurons for computing functions is also proved.


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## Body

## 1. Introduction

As an important branch of natural computing, membrane computing enriches the theoretical framework of biomolecular computing. It is inspired by the biological structures and functions of cells and tissues and has good distributed and parallel computing capabilities. At present, there are four main types of membrane systems, including cell-likeP systems [1, 2], tissue P systems [3, 4], numerical P systems [5, 6], and neural P systems [7]. Among them, spiking neural P systems that belong to neural P systems, known as the third-generation neural network model in membrane computing, are inspired by the biological phenomenon that neurons communicate with each other through spikes. In recent years, SN P systems have received great attention, and many variants of SN P systems have been discussed.SNP systems were first proposed in 2006 [8]. An SN P system can be regarded as a directed graph in which nodes represent neurons and arcs represent synapses. It is considered that each neuron mainly contains two components: spikes and rules, where rules include spiking rules E/aα⟶a;d and forgetting rules as⟶λ. They have the different operation. Assuming that the spiking rule is used at time t, it will consume αα≥1 spikes and produce one spike in the neuron at time t+d, and then the produced spike will be transmitted to the adjacent neurons through the synapses. The function of the forgetting rule is to eliminate s spikes. Over the years, many variations of the SN P systems have been proposed considering different biological characteristics and phenomena, such as SN P systems with astrocytes [9], SN P systems with neuron division and dissolution [10], cell-like SN P systems [11], numerical SN P systems [12], and SN P systems with polarizations [13].Because of SNP systems with strong expansibility, in recent years, the research on SN P system mainly focuses on the theoretical aspect, especially the establishment of various computing models. Many new variants of SN P systems are proposed by changing rules, synapses, and structures. Some studies have changed in forms of rules, for instance, SN P systems with white hole neurons [14], SN P systems with request rules [15], SN P systems with inhibitory rules [16], SN P systems with communication on request [17, 18], nonlinear SN P systems [19], and SN P systems with target indications [20]. According to the inhibitory way of communication between neurons, many researches about the SN P systems with antispikes are proposed [21, 22]. There are some changes in synapses between neurons, for example, SN P systems with multiple channels [23], SN P systems with inhibitory synapses [24], SN P systems with rules on synapses [25, 26], and SN P systems with thresholds [27], as well as SN P systems with scheduled synapses [28, 29]. According to the self-organizing and adaptive characteristics of artificial neural network, SN P systems with plasticity structure were established [30, 31]. Abstracted from neural network models, some new neural P systems were proposed [32, 33]. Moreover, motivated by the characteristics of dendrites of nerve cells, dendrite P systems were investigated [34].At present, application research on SNP systems is weak. However, in order to solve practical problems, many scholars have done researches on the application of membrane computing and obtained some research results in some aspects, for example, optimization problems [35, 36], fault diagnosis [37, 38], and image recognition [39, 40]. Most of the research on the application is to combine the optimization algorithm with the P system model and design an approximate optimization algorithm by using the P system, which is mainly used to solve the clustering problem [41, 42]. At present, there are some studies on the combination of P system and neural network, and some achievements have been made in the realization of image processing. The development of the application of membrane computing has been paid much attention. It is a new expansion and breakthrough in the field of membrane computing and develops the research on theory and application.In the theoretical study of theP systems, their computing power and efficiency are analysed and discussed. The main purpose of computing efficiency is to analyse whether the proposed system can solve the difficult computing problems, such as the traveling salesman problem [43] and the 0-1 knapsack problem [44], within a feasible time. To prove the computing power, the P systems are compared with the Turing machine to analyse its universality [45, 46]. The theoretical research of spiking neural P systems is mainly focused on the research of computing power which can work in generating and accepting modes, and the proposed SN P system can also simulate the register machine.Five tuples exist in a register machineM that has the form of M=m,H,l0,lh,I, where m is the number of registers, H is the set of instruction labels, l0 is the initial label, lh is the final label, and I is the set of three types of instructions with the following forms:(i)
li:ADDr,lj,lk is the ADD instruction. When the value stored in the register r is increased 1, it will be moved to one of the instructions with labels lj and lk nondeterministically.(ii)
li:SUBr,lj,lk is the SUB instruction. The register r is not empty and subtracts 1 to move the instruction with label lj. If the register r is empty, the value 1 subtracted from register r will be moved to the instruction with label lk.(iii)
lh:HALT is the halt instruction. When the process of computation reaches the halt instruction, the computation will stop.Generally, delays in current SNP systems indicate that the neuron will be closed before a certain time and then reopen after that to accept spikes. But in this paper, the schedule is added on the spiking and forgetting rules to explain the delay, and it is more reasonable to achieve the fact that there is a delay between the input and output. Therefore, delayed SN P systems (DSN P systems) are proposed. The rules are only allowed to run for a specific period of time, which represents the time delay between input and output of spikes. The activation of a reference neuron, that is, the application of a rule, indicates when a rule in a connected neuron takes effect or becomes available. For example, the schedule d,d+1 means that the rule in the neuron is only available beginning at time d and before time d+1. In other words, this rule is activated after time d, producing and sending spikes before time d+1.This work mainly proposes DSNP systems that are a new variant of SN P systems and presents the fact that there is a time difference between input and output in the form of a time interval, called schedule. The schedule is set on spiking rules and forgetting rules to determine the performance of spikes in the neuron. The performance of the system is continuous in total time, and once the rule satisfies the activation condition of the neuron, the neuron will be locked by this rule; that is to say, the rule must be used and can only be used in the specified period of time. It is notable that the classic SN P systems that apply rules are based on the principle of maximal parallelism, but DSN P systems have changed it so that the rules are executed in order according to the schedules. In addition, the computing power of DSN P systems under the mode of generating and accepting is proved. In this way, DSN P systems are Turing universal as the number generating devices and accepting devices.The structure of the rest of this paper is as follows:Section 2 proposes the definition of DSN P systems and gives an example to illustrate the operation mode of the DSN P system. And Section 3 proves the Turing universality of DSN P systems by proving the computing power of the system in the generating mode and the accepting mode, respectively. Then, a small universal DSN P system for computing functions is proved in Section 4. Finally, Section 5 summarizes the work we have done and explains the following research directions.


## 2. Delayed Spiking NeuralP Systems

In this section, a new variant of spiking neuralP system is proposed, called delayed spiking neural P systems (DSN P systems). Firstly, the definition of the system is given, and detailed explanations of the system are also given. And then, an example is given to show how the system works.


### 2.1. Definition

Definition 1.
A DSNP system of degree m≥1 is defined as(1)Π=O,σ1,σ2,…,σm,ref,syn,in,out,where(1)
O=a is the alphabet and a indicated the spike.(2)
σ1,σ2,…,σm are neurons with the form ni,Ri, ni∈N+, and Ri is the set of rules as the following two forms:(i)
Spiking rules are all in neurons with the formE/aα⟶a;t1,τ,t2, where E is a regular expression, α≥1, and 0≤t1<τ≤t2.(ii)
Forgetting rules are all in neurons with the formE/aβ⟶λ;t1,τ,t2, where E is a regular expression, β≥1, and 0≤t1<τ≤t2.(3)
ref⊆1,2,…,m is the set of reference neurons.(4)
syn∈1,…,h×1,…,h represents the synapses, for any i,j∈syn, 1≤i,j≤h, and i≠j.(5)
in and out are the input neuron and output neuron, respectively.
How the rules work is explained here. Spiking rulesE/aα⟶a;t1,τ,t2 can be executed on the condition that the neuron contains at least α spikes and the running time must conform to the schedule. E is a regular expression over a. Each time the rule is applied, α spikes are consumed to produce one spike, which is transmitted to the connected neurons. Assume that σi contains b spikes and a a spiking rule. The rule can be applied if and only if b≥α and the performing time conforms to the schedule of this rule. When the number of spikes in the neuron is less than α, the rule will not be used.
The schedulet1,τ,t2 represents the neuron output spikes from association neurons before time t2. t1 is the time when the neuron receives spikes, and τ indicates the performing time of the rule. If t1≠τ, the neuron will receive spikes at time t1, and the specific rule in neuron will be performed at time τ. If t1=τ, the spiking rules can be used shorthand E/aα⟶a;t1,t2 and it means the neuron receives spikes while the rule is executed, no longer stagnant. In other words, there is no delay during receiving spikes and the executing of the rule. The schedule makes the rules run in a certain order. And if there is no delay between receiving and transmitting spikes, when spikes are transmitted out of the neuron during the synchronization of the rule execution, spiking rules are written as E/aα⟶a and forgetting rules can be written as aβ⟶λ.
Note that the performing time of this system is continuous. Continuity refers to the continuous schedule of each time of the system, and the rule can only be used if it is continuous with the schedule of the superior connected neuron. For instance, the system has three neurons with three rules, each rule has a schedule; that is,t1,t2∪t2,t3∪t3,t4=t1,t4. Therefore, we consider that the system is continuous in t1,t4, and if the neuron fires in t1,t2; then, its connected neurons fire only when their rules have the schedule t2,t3. In our figures, we indicate a reference neuron with the symbol “•”, denoted as σi⋅. The reference neuron σi⋅ is activated at time t1 and outputs the spike before time t2 which indicates its rule with schedule t1,t2, the connected neuron is only available beginning at time t2. If the neuron σi⋅ applies a rule and produces a spike but no rule in the adjacent neuron is available at the time of outputting, then no neuron can receive this spike.
Forgetting rulesaβ⟶λ;t1,τ,t2 represent that the rules can be used only if when there are β spikes in neuron σi and the rules also be allowed to use at time t1. The function of forgetting rules is to consume β spikes in neurons. The schedule for forgetting rules has the same meaning as spiking rules. Each neuron may contain more than one forgetting rule or none. The neuron contains at least one spiking rule or forgetting rule, and spiking rules and forgetting rules can both exist in the neuron. And only one rule can be used in each neuron at each time. All neurons in the spiking neural P system work in parallel, but the rules in each neuron are applied sequentially. In other words, if there are at least two rules in the neuron, then according to the time control over the rule, only one rule can be selected which meets the schedule.
The configuration of systemΠ at a given moment is composed of the number of spikes contained in each neuron. At the initial moment, every neuron in system Π is in an open state without any rules, denoted as the initial configuration C0. When each neuron in system Π has no rules which can be used and keep open, the system reaches the halt configuration. System Π evolves from one configuration C1 to another configuration C2 by executing the rules in each neuron. Such a process is called the transfer from C1 to C2, denoted as C1⇒C2. A calculation of system Π consists of a series of transitions from the initial configuration and the computation will stop if and only if it can reach the halt configuration.
In the generating mode, the spiking neuralP system contains at least one output neuron of which the function is to send the generated spikes to the environment. There are several definitions of the calculation result of spiking neural P systems [47, 48]. In this paper, the calculation result is the difference between the first two times that neuron σout fires and sends spikes to the environment. For instance, t1 is the time of firing the neuron σout for the first time, and t2 is the time of firing the neuron σout for the second time, so the calculation result is t2−t1. Because the system in generating mode is deterministic, it produces a collection of numbers, denoted as N2Π, where the subscript 2 represents the schedule of the first two spikes. When the spiking neural P system is in the accepting mode, there are input neurons in the system, whose function is to receive spikes from the environment. When the number n is identified by this system, it is encoded into a spike train such as 100⋯0110n1 (the spike train is a binary language defined on 0,1, where 1 represents one spike and 0 represents no spike). And then, the system reads the spike train through the input neurons. The set of all numbers accepted by the system is denoted as NaccΠ.
The set of all the numbers generated or accepted by the DSNP system in generating and accepting modes is denoted asNαΠ, where α∈2,acc. The family of all sets NαΠ denotes NαDSNPnm, and it means the DSN P system having no more than m rules and no more than n neurons under the generating or accepting mode. If the values of m and n cannot be calculated, it is denoted by ∗.


### 2.2. Illustrative Example

An example which is a DSNP system with five neurons is given in Figure 1. And the number of spikes in the neuron at each time is given in Table 1. In this illustrative example, five neurons are used to explain the way of performance by using spiking rules and forgetting rules. Assume that neuron σg1 has one spike at time t; it will produce one a and send it to neurons σg2 and σg3, respectively. The neuron σg3 has the form of rule as a⟶a;1,2,3, and it means that this rule allows neuron σg3 to receive one spike that came from neuron σg1 at time t+1. In this way, at time t+1, σg2 and σg3 both have one spike.Figure 1
An example of the DSNP system working.Table 1
The results of the example.
σg1σg2σg3σg4σg5t10000t+101100t+2001 + 110t+300002t+400000Before timet+2, σg2 sends a spike to neurons σg3 and σg4, respectively. And then neurons σg3 and σg4 each receive one spike at time t+2. At the same time, the neuron σg3 performs the rule a⟶a;1,2,3 and σg3 receives one spike from σg2 which means that the rule a⟶λ;2,3 will be used. Meanwhile, the rule a⟶a;2,3 in neuron αg4 can be applied. Therefore, two spikes in neuron σg5 can activate the rule a2⟶a;3,4 at time t+3, one from neuron σg3 and another one from neuron σg4. And then one spike will be sent to other connected neurons before time t+4.


## 2.1. Definition

Definition 1.
A DSNP system of degree m≥1 is defined as(1)Π=O,σ1,σ2,…,σm,ref,syn,in,out,where(1)
O=a is the alphabet and a indicated the spike.(2)
σ1,σ2,…,σm are neurons with the form ni,Ri, ni∈N+, and Ri is the set of rules as the following two forms:(i)
Spiking rules are all in neurons with the formE/aα⟶a;t1,τ,t2, where E is a regular expression, α≥1, and 0≤t1<τ≤t2.(ii)
Forgetting rules are all in neurons with the formE/aβ⟶λ;t1,τ,t2, where E is a regular expression, β≥1, and 0≤t1<τ≤t2.(3)
ref⊆1,2,…,m is the set of reference neurons.(4)
syn∈1,…,h×1,…,h represents the synapses, for any i,j∈syn, 1≤i,j≤h, and i≠j.(5)
in and out are the input neuron and output neuron, respectively.
How the rules work is explained here. Spiking rulesE/aα⟶a;t1,τ,t2 can be executed on the condition that the neuron contains at least α spikes and the running time must conform to the schedule. E is a regular expression over a. Each time the rule is applied, α spikes are consumed to produce one spike, which is transmitted to the connected neurons. Assume that σi contains b spikes and a a spiking rule. The rule can be applied if and only if b≥α and the performing time conforms to the schedule of this rule. When the number of spikes in the neuron is less than α, the rule will not be used.
The schedulet1,τ,t2 represents the neuron output spikes from association neurons before time t2. t1 is the time when the neuron receives spikes, and τ indicates the performing time of the rule. If t1≠τ, the neuron will receive spikes at time t1, and the specific rule in neuron will be performed at time τ. If t1=τ, the spiking rules can be used shorthand E/aα⟶a;t1,t2 and it means the neuron receives spikes while the rule is executed, no longer stagnant. In other words, there is no delay during receiving spikes and the executing of the rule. The schedule makes the rules run in a certain order. And if there is no delay between receiving and transmitting spikes, when spikes are transmitted out of the neuron during the synchronization of the rule execution, spiking rules are written as E/aα⟶a and forgetting rules can be written as aβ⟶λ.
Note that the performing time of this system is continuous. Continuity refers to the continuous schedule of each time of the system, and the rule can only be used if it is continuous with the schedule of the superior connected neuron. For instance, the system has three neurons with three rules, each rule has a schedule; that is,t1,t2∪t2,t3∪t3,t4=t1,t4. Therefore, we consider that the system is continuous in t1,t4, and if the neuron fires in t1,t2; then, its connected neurons fire only when their rules have the schedule t2,t3. In our figures, we indicate a reference neuron with the symbol “•”, denoted as σi⋅. The reference neuron σi⋅ is activated at time t1 and outputs the spike before time t2 which indicates its rule with schedule t1,t2, the connected neuron is only available beginning at time t2. If the neuron σi⋅ applies a rule and produces a spike but no rule in the adjacent neuron is available at the time of outputting, then no neuron can receive this spike.
Forgetting rulesaβ⟶λ;t1,τ,t2 represent that the rules can be used only if when there are β spikes in neuron σi and the rules also be allowed to use at time t1. The function of forgetting rules is to consume β spikes in neurons. The schedule for forgetting rules has the same meaning as spiking rules. Each neuron may contain more than one forgetting rule or none. The neuron contains at least one spiking rule or forgetting rule, and spiking rules and forgetting rules can both exist in the neuron. And only one rule can be used in each neuron at each time. All neurons in the spiking neural P system work in parallel, but the rules in each neuron are applied sequentially. In other words, if there are at least two rules in the neuron, then according to the time control over the rule, only one rule can be selected which meets the schedule.
The configuration of systemΠ at a given moment is composed of the number of spikes contained in each neuron. At the initial moment, every neuron in system Π is in an open state without any rules, denoted as the initial configuration C0. When each neuron in system Π has no rules which can be used and keep open, the system reaches the halt configuration. System Π evolves from one configuration C1 to another configuration C2 by executing the rules in each neuron. Such a process is called the transfer from C1 to C2, denoted as C1⇒C2. A calculation of system Π consists of a series of transitions from the initial configuration and the computation will stop if and only if it can reach the halt configuration.
In the generating mode, the spiking neuralP system contains at least one output neuron of which the function is to send the generated spikes to the environment. There are several definitions of the calculation result of spiking neural P systems [47, 48]. In this paper, the calculation result is the difference between the first two times that neuron σout fires and sends spikes to the environment. For instance, t1 is the time of firing the neuron σout for the first time, and t2 is the time of firing the neuron σout for the second time, so the calculation result is t2−t1. Because the system in generating mode is deterministic, it produces a collection of numbers, denoted as N2Π, where the subscript 2 represents the schedule of the first two spikes. When the spiking neural P system is in the accepting mode, there are input neurons in the system, whose function is to receive spikes from the environment. When the number n is identified by this system, it is encoded into a spike train such as 100⋯0110n1 (the spike train is a binary language defined on 0,1, where 1 represents one spike and 0 represents no spike). And then, the system reads the spike train through the input neurons. The set of all numbers accepted by the system is denoted as NaccΠ.
The set of all the numbers generated or accepted by the DSNP system in generating and accepting modes is denoted asNαΠ, where α∈2,acc. The family of all sets NαΠ denotes NαDSNPnm, and it means the DSN P system having no more than m rules and no more than n neurons under the generating or accepting mode. If the values of m and n cannot be calculated, it is denoted by ∗.


## 2.2. Illustrative Example

An example which is a DSNP system with five neurons is given in Figure 1. And the number of spikes in the neuron at each time is given in Table 1. In this illustrative example, five neurons are used to explain the way of performance by using spiking rules and forgetting rules. Assume that neuron σg1 has one spike at time t; it will produce one a and send it to neurons σg2 and σg3, respectively. The neuron σg3 has the form of rule as a⟶a;1,2,3, and it means that this rule allows neuron σg3 to receive one spike that came from neuron σg1 at time t+1. In this way, at time t+1, σg2 and σg3 both have one spike.Figure 1
An example of the DSNP system working.Table 1
The results of the example.
σg1σg2σg3σg4σg5t10000t+101100t+2001 + 110t+300002t+400000Before timet+2, σg2 sends a spike to neurons σg3 and σg4, respectively. And then neurons σg3 and σg4 each receive one spike at time t+2. At the same time, the neuron σg3 performs the rule a⟶a;1,2,3 and σg3 receives one spike from σg2 which means that the rule a⟶λ;2,3 will be used. Meanwhile, the rule a⟶a;2,3 in neuron αg4 can be applied. Therefore, two spikes in neuron σg5 can activate the rule a2⟶a;3,4 at time t+3, one from neuron σg3 and another one from neuron σg4. And then one spike will be sent to other connected neurons before time t+4.


## 3. Computing Power as the Number Generator and Acceptor

This section proves the computing power of systems as generating devices and accepting devices and shows that DSNP systems are Turing universal. In order to prove the computing power of a DSN P system, a register machine M=m,H,l0,lh,I is considered. Register r in M corresponds to neuron σr in system Π. All of the instructions also correspond to neurons in Π, such that an ADD instruction li corresponds to neuron σli. And if register r stores number n, 2n spikes will be stored in neuron σr.There are two working modes in register machine, the generating mode, and the accepting mode. The systemΠ in generating mode has three modules: module ADD, module SUB, and module OUTPUT. And in accepting mode, the system has three types of modules: module ADD, module SUB, and module INPUT. The set of numbers generated by the register machine M is denoted as NM. In both modes, a Turing computable set of natural numbers can be generated; that is, NM=NRE. Here, NRE refers to the set of numbers calculated by the Turing machine.


### 3.1. The DSNP System as Generator

Theorem 1.
NgenDSNP∗2=NRE.Proof.
In generating mode, all registers are empty in the initial state, starting with instructionl0. The number stored in register 1 at the end of the calculation is the number generated by the register. Assume all neurons are empty, except neuron σl0• which has one spike. The module ADD is used to simulate ADD instruction li:ADDr,lj,lk, shown in Figure 2. The reference neuron in this module is neuron σli, denoted as σli•. Assume the rule in neuron σli• is activated at time t, and it will send one spike to neurons σb1 and σb2, respectively. At time t+1, neurons σb1 and σb2 receive this spike. Meanwhile, the rule in σb2 is nondeterministic chosen one to perform, so there are two cases:(1)
At timet+1, if the rule a⟶a;1,2 is used, the neuron σb1 will accept one spike from neuron σb1 at time t+2, so that the rule a⟶a;2,3 in neuron σb1 can be activated. At the same time, neuron σlk receives one a from neuron σb2 at time t+2, and the rule a⟶a;1,2,3 in neuron σb1 is applied. At time t+3, both σb3 and σr receive two spikes from neuron σb1, so the rule a2⟶λ;3,4 can be used. Therefore, the neuron σlj is empty, and neuron σr has two spikes.(2)
At timet+1, if the rule a⟶λ;1,2 is applied, then the neuron σlk is empty at time t+2, and the rule a⟶a;1,2,3 in neuron σb1 is enabled. Each of neurons σb3 and σr receives one spike from neuron σb1 at time t+3. So the rule a⟶a;3,4 in neuron σb3 can perform, and then, at time t+4, neurons σlj and σr receive one spike, respectively. In this way, there are two spikes in the neuron σr corresponding to increasing the register r by 1.
So far, the module ADD has been proved to be able to simulate correctly. The following ist the simulating proof of module SUB. The structure and rules of module SUB are shown in Figure 3, which is used to simulate SUB instruction li:SUBr,lj,lk. The simulation of module SUB also starts at reference neuron σli•. The neuron σli• activates At time t and sends one spike to neurons σr and σc1, respectively, before time t+1. It means that neurons σr and σc1 receive this spike at time t+1. Depending on whether the neuron σr has spikes at the initial time, there are two cases as follows:(1)
If the neuronσr is not empty, it has 2n spikes. So, neuron σr has 2n+1 spikes (odd number) at time t+1, and the rule aaa+/a3⟶a;1,2 can be used. At time t+2, both neurons σc3 and σc2 receive one spike from the neuron σr, and the rules a⟶λ;2,3 in neurons σc2 and σc3 can be used. At the same time, σc1 also receives one spike from σr; that is, the rule a⟶a;2,3,4 in neuron σc1 can be used. At time t+3, neurons σc2 and σc3 get one spike from neuron σc1, such that rules a⟶λ;3,4 in σc2 and σc3 are performed. At the next time, each of neurons σc2 and σc3 receives one spike from σc1, and rule a⟶a;4,5 in σc2 and rule a⟶λ;4,5 in σc3 are applied. In this way, neuron σlk is empty without receiving any spikes and σlj gains one spike.(2)
There is no spike in neuronσr. At time t+1, rules a⟶a;1,2,3 allow neurons σr and σc1to obtain one spike from neuron σli•, and this rule is activated at time t+2. And then, each of neurons σc2 and σc3 obtains two spikes which come from σc1 and σr, so the rule a2⟶λ;3,4 in σc2and the rule a2⟶a;3,4 in σc3 can fire. Therefore, σlk receives one spike from σc3, and neuron σlj is empty after time t+4.
In particular, there is no interference between SUB modules, even if there are multiple SUB instructions with a common register. An illustrative example is given in Figure4. Assume two SUB instructions li:SUBr,lj,lk, and lv:SUBr,lj′,lk′ are simulated. When neuron σr fires, neurons σc3′ and σc2′ get one spike at time t+2 or time t+3. But only rules a⟶λ;2,3 and a⟶λ;3,4 in neurons σc3′ and σc2′ are enabled. Neurons σlj′ and σlk′ are empty. Therefore, the SUB instruction can be simulated correctly by module SUB.
The structure of module OUTPUT, shown in Figure5, is used to halt the computation. At the initial state, neuron σout has one spike. Assume that the neuron σ1 has 2n spikes according to the number n storing in register 1 of M and neuron σlh• receives one spike at time t. So the neuron σ1 gets one spike at time t+1. Thus, the neuron σ1 has 2n+1 spikes, which is odd number, and at time t+2, the rule aaa+⟶a is activated and sends a spike to neurons σd1 and σout, respectively. In this way, σout has two spikes, which is even number. The rule in σout can be applied the next time and sends one spike to environment. At the same time, neuron σd1 sends one spike to neuron σout and neuron σ1 fires again. At present, there are three spikes in neuron σout. No rules in σout can be enabled since the number of spikes is odd.
Aftern−1 times, that is, at time t+n+1, neuron σ1 has only one spike left, so that the rule in σ1 can no longer be used. At this moment, neuron σd1 has one spike. Therefore, at time t+n+2, σd1 is activated and sends a spike to σout. The number of spikes in σout is 2n which is an even number, so the rule can be applied and sends a spike to environment a second time. The number computed by the DSN P system is the difference between the first two times which send spikes to environment; that is, t+n+2−t+2=n. The results of each time are shown in Table 2.
These three types of modules simulate the corresponding instructions correctly; that is, systemΠ correctly simulates the register machine M. Therefore, the conclusion of Theorem 1 is proved.Figure 2
Module ADD: simulating the ADD instructionli:ADDr,lj,lk.Figure 3
Module SUB: simulating the SUB instructionli:SUBr,lj,lk.Figure 4
Module SUB-SUB: simulating the SUB instructionsli:SUBr,lj,lk and lv:SUBr,lj′,lk′.Figure 5
Module OUTPUT.Table 2
The results of module OUTPUT.
σlhσ1σd1σoutt12n01t+102n + 101t+202 (n − 1) + 112 (fire)t+302 (n − 2) + 113t+402 (n − 3) + 115⋯⋯⋯⋯⋯t+n+10112n − 1t+n+20102n (fire)


### 3.2. The DSN P System as Acceptor

Theorem 2.
NaccDSNP∗2=NRE.Proof.
In accepting mode, all registers except register 1 are empty in the initial state. As the proof of Theorem1, the proof of Theorem 2 also needs to simulate register machine M′, which is deterministic register machine. Similarly, register r corresponds to neuron σr, and if the number n is stored in register r, then there are 2n spikes in neuron σr. If the register machine reaches the halting instruction lh, when the calculation stops, the number stored in register 1 is accepted by the register machine. And the proof of module SUB is already proved in Theorem 1. Therefore, in the proof of Theorem 2, we only need to prove whether the modules ADD′ and INPUT can be simulated correctly.
At the initial configuration ofΠ, all neurons are empty, except for reference neuron σl0• which contains one spike. Module ADD’ shown in Figure 6 differs from model ADD shown in Figure 2. Module ADD′ simulates the ADD′ instruction li:ADDr,lj. Assume that neuron σli• has one spike and activates at time t. Thus, each of neurons σr and σm1 receives one spike from σli at time t+1. And the rule in neuron σm1 can be applied. At time t+2, both neurons σr and σlj receive a spike, and at this time, neuron σr has two spikes. The simulation of module ADD’ is complete, since there are two spikes in σr and the content of register r increases one.
Module INPUT, shown in Figure7, is used to compute number n introduced by neuron σin into σ1. The module INPUT computes number n between the time of receiving two spikes and the function of this module is to read the spike train 10n−11, where 1≤n∈N+. Assume the neuron σin receives a spike at time t. Each of neurons σf2 , σf3, and σf1 receives one spike at time t+1. At the next time, rules in neurons σf2 and σf3 are enabled; thus, one spike is received by both neurons σf3 and σ1 which comes from the neuron σf2. And at the same time, each of neurons σf2 and σ1 receives a spike from neuron σf3. Therefore, neuron σ1 has two spikes at that moment. Notably, rules in neurons σf3 and σf2 do not stop until σin received the second spike. After n+1 times, the neuron σ1 gets 2n spikes, that is, the number n is stored in register 1. And neuron σf1 has two spikes at this moment. Thus, the rule a2⟶a in σf1 can be used to produce one spike and send it to neuron σl0•. The results of this model of how to work at each time are presented in Table 3.
From the above proof, module ADD’, module SUB, and module INPUT can be correctly simulated. In this way, the proof of Theorem2 is complete.Figure 6
Module ADD’: simulating the ADD′ instructionli:ADDr,lj.Figure 7
Module INPUT: reading the spike train into the DSNP system.Table 3
The results of module INPUT.
σinσf2σf3σ1σf1σl0t100000t+1011010t+2011210t+3011410⋯⋯⋯⋯⋯⋯⋯t+n1112 (n − 1)10t+n+10222n20t+n+20222n01


## 3.1. The DSNP System as Generator

Theorem 1.
NgenDSNP∗2=NRE.Proof.
In generating mode, all registers are empty in the initial state, starting with instructionl0. The number stored in register 1 at the end of the calculation is the number generated by the register. Assume all neurons are empty, except neuron σl0• which has one spike. The module ADD is used to simulate ADD instruction li:ADDr,lj,lk, shown in Figure 2. The reference neuron in this module is neuron σli, denoted as σli•. Assume the rule in neuron σli• is activated at time t, and it will send one spike to neurons σb1 and σb2, respectively. At time t+1, neurons σb1 and σb2 receive this spike. Meanwhile, the rule in σb2 is nondeterministic chosen one to perform, so there are two cases:(1)
At timet+1, if the rule a⟶a;1,2 is used, the neuron σb1 will accept one spike from neuron σb1 at time t+2, so that the rule a⟶a;2,3 in neuron σb1 can be activated. At the same time, neuron σlk receives one a from neuron σb2 at time t+2, and the rule a⟶a;1,2,3 in neuron σb1 is applied. At time t+3, both σb3 and σr receive two spikes from neuron σb1, so the rule a2⟶λ;3,4 can be used. Therefore, the neuron σlj is empty, and neuron σr has two spikes.(2)
At timet+1, if the rule a⟶λ;1,2 is applied, then the neuron σlk is empty at time t+2, and the rule a⟶a;1,2,3 in neuron σb1 is enabled. Each of neurons σb3 and σr receives one spike from neuron σb1 at time t+3. So the rule a⟶a;3,4 in neuron σb3 can perform, and then, at time t+4, neurons σlj and σr receive one spike, respectively. In this way, there are two spikes in the neuron σr corresponding to increasing the register r by 1.
So far, the module ADD has been proved to be able to simulate correctly. The following ist the simulating proof of module SUB. The structure and rules of module SUB are shown in Figure 3, which is used to simulate SUB instruction li:SUBr,lj,lk. The simulation of module SUB also starts at reference neuron σli•. The neuron σli• activates At time t and sends one spike to neurons σr and σc1, respectively, before time t+1. It means that neurons σr and σc1 receive this spike at time t+1. Depending on whether the neuron σr has spikes at the initial time, there are two cases as follows:(1)
If the neuronσr is not empty, it has 2n spikes. So, neuron σr has 2n+1 spikes (odd number) at time t+1, and the rule aaa+/a3⟶a;1,2 can be used. At time t+2, both neurons σc3 and σc2 receive one spike from the neuron σr, and the rules a⟶λ;2,3 in neurons σc2 and σc3 can be used. At the same time, σc1 also receives one spike from σr; that is, the rule a⟶a;2,3,4 in neuron σc1 can be used. At time t+3, neurons σc2 and σc3 get one spike from neuron σc1, such that rules a⟶λ;3,4 in σc2 and σc3 are performed. At the next time, each of neurons σc2 and σc3 receives one spike from σc1, and rule a⟶a;4,5 in σc2 and rule a⟶λ;4,5 in σc3 are applied. In this way, neuron σlk is empty without receiving any spikes and σlj gains one spike.(2)
There is no spike in neuronσr. At time t+1, rules a⟶a;1,2,3 allow neurons σr and σc1to obtain one spike from neuron σli•, and this rule is activated at time t+2. And then, each of neurons σc2 and σc3 obtains two spikes which come from σc1 and σr, so the rule a2⟶λ;3,4 in σc2and the rule a2⟶a;3,4 in σc3 can fire. Therefore, σlk receives one spike from σc3, and neuron σlj is empty after time t+4.
In particular, there is no interference between SUB modules, even if there are multiple SUB instructions with a common register. An illustrative example is given in Figure4. Assume two SUB instructions li:SUBr,lj,lk, and lv:SUBr,lj′,lk′ are simulated. When neuron σr fires, neurons σc3′ and σc2′ get one spike at time t+2 or time t+3. But only rules a⟶λ;2,3 and a⟶λ;3,4 in neurons σc3′ and σc2′ are enabled. Neurons σlj′ and σlk′ are empty. Therefore, the SUB instruction can be simulated correctly by module SUB.
The structure of module OUTPUT, shown in Figure5, is used to halt the computation. At the initial state, neuron σout has one spike. Assume that the neuron σ1 has 2n spikes according to the number n storing in register 1 of M and neuron σlh• receives one spike at time t. So the neuron σ1 gets one spike at time t+1. Thus, the neuron σ1 has 2n+1 spikes, which is odd number, and at time t+2, the rule aaa+⟶a is activated and sends a spike to neurons σd1 and σout, respectively. In this way, σout has two spikes, which is even number. The rule in σout can be applied the next time and sends one spike to environment. At the same time, neuron σd1 sends one spike to neuron σout and neuron σ1 fires again. At present, there are three spikes in neuron σout. No rules in σout can be enabled since the number of spikes is odd.
Aftern−1 times, that is, at time t+n+1, neuron σ1 has only one spike left, so that the rule in σ1 can no longer be used. At this moment, neuron σd1 has one spike. Therefore, at time t+n+2, σd1 is activated and sends a spike to σout. The number of spikes in σout is 2n which is an even number, so the rule can be applied and sends a spike to environment a second time. The number computed by the DSN P system is the difference between the first two times which send spikes to environment; that is, t+n+2−t+2=n. The results of each time are shown in Table 2.
These three types of modules simulate the corresponding instructions correctly; that is, systemΠ correctly simulates the register machine M. Therefore, the conclusion of Theorem 1 is proved.Figure 2
Module ADD: simulating the ADD instructionli:ADDr,lj,lk.Figure 3
Module SUB: simulating the SUB instructionli:SUBr,lj,lk.Figure 4
Module SUB-SUB: simulating the SUB instructionsli:SUBr,lj,lk and lv:SUBr,lj′,lk′.Figure 5
Module OUTPUT.Table 2
The results of module OUTPUT.
σlhσ1σd1σoutt12n01t+102n + 101t+202 (n − 1) + 112 (fire)t+302 (n − 2) + 113t+402 (n − 3) + 115⋯⋯⋯⋯⋯t+n+10112n − 1t+n+20102n (fire)


## 3.2. The DSN P System as Acceptor

Theorem 2.
NaccDSNP∗2=NRE.Proof.
In accepting mode, all registers except register 1 are empty in the initial state. As the proof of Theorem1, the proof of Theorem 2 also needs to simulate register machine M′, which is deterministic register machine. Similarly, register r corresponds to neuron σr, and if the number n is stored in register r, then there are 2n spikes in neuron σr. If the register machine reaches the halting instruction lh, when the calculation stops, the number stored in register 1 is accepted by the register machine. And the proof of module SUB is already proved in Theorem 1. Therefore, in the proof of Theorem 2, we only need to prove whether the modules ADD′ and INPUT can be simulated correctly.
At the initial configuration ofΠ, all neurons are empty, except for reference neuron σl0• which contains one spike. Module ADD’ shown in Figure 6 differs from model ADD shown in Figure 2. Module ADD′ simulates the ADD′ instruction li:ADDr,lj. Assume that neuron σli• has one spike and activates at time t. Thus, each of neurons σr and σm1 receives one spike from σli at time t+1. And the rule in neuron σm1 can be applied. At time t+2, both neurons σr and σlj receive a spike, and at this time, neuron σr has two spikes. The simulation of module ADD’ is complete, since there are two spikes in σr and the content of register r increases one.
Module INPUT, shown in Figure7, is used to compute number n introduced by neuron σin into σ1. The module INPUT computes number n between the time of receiving two spikes and the function of this module is to read the spike train 10n−11, where 1≤n∈N+. Assume the neuron σin receives a spike at time t. Each of neurons σf2 , σf3, and σf1 receives one spike at time t+1. At the next time, rules in neurons σf2 and σf3 are enabled; thus, one spike is received by both neurons σf3 and σ1 which comes from the neuron σf2. And at the same time, each of neurons σf2 and σ1 receives a spike from neuron σf3. Therefore, neuron σ1 has two spikes at that moment. Notably, rules in neurons σf3 and σf2 do not stop until σin received the second spike. After n+1 times, the neuron σ1 gets 2n spikes, that is, the number n is stored in register 1. And neuron σf1 has two spikes at this moment. Thus, the rule a2⟶a in σf1 can be used to produce one spike and send it to neuron σl0•. The results of this model of how to work at each time are presented in Table 3.
From the above proof, module ADD’, module SUB, and module INPUT can be correctly simulated. In this way, the proof of Theorem2 is complete.Figure 6
Module ADD’: simulating the ADD′ instructionli:ADDr,lj.Figure 7
Module INPUT: reading the spike train into the DSNP system.Table 3
The results of module INPUT.
σinσf2σf3σ1σf1σl0t100000t+1011010t+2011210t+3011410⋯⋯⋯⋯⋯⋯⋯t+n1112 (n − 1)10t+n+10222n20t+n+20222n01


## 4. A Small Universal DSNP System as Computing Functions

This section mainly proves the small universality of the DSNP system for computing functions. First, we need some simple theoretical explanations. Turing computable functions can be computed by register machine M. Here, the way of how a register machine M calculates a function f:NK⟶N is described. Register machine M stores K parameters n1,n2,…,nk in the first K registers, and the other registers are empty. We start the calculation with instruction l0 and end with instruction lh. When the computation stops, the result is stored in one of the specified registers, with the rest of the registers empty. It is notable that the register machine M is deterministic when in computing mode. In this paper, we prove the universality of the system as computing functions by simulating a universal register machine Mu.When proving the small universality of the DSNP system as a computing function device, it is usually considered to use a small universal register machine Mu:8,H,l0,lh,I, more details explained in [49]. Mu contains 8 registers and 23 instructions, as shown in Figure 8. And the key to proving the universality of the system is to find a specific number of neurons that can simulate the register machine Mu and minimize the number through the combination of some ADD and SUB instructions. However, since the SUB instruction l19 is related to register 0 which is used to store the calculated results, it is not reasonable to simulate Mu. To solve this problem, a new register 8 is added as the output register, whose function is to save the calculated results. Therefore, register machine Mu:8,H,l0,lh,I is extended to Mu′:9,H,l0,lh′,I and replaces halting instruction lh with the following three new instructions:(2)l22:SUB0,l23,lh′,l23:ADD8,l22lh′:HALT.Figure 8
A universal register machineMu: containing 8 registers and 23 instructions.In this way, register machineMu′ contains 9 registers 0,…,8 and 25 instructions (14 SUB instructions, 10 ADD instructions, and 1 halting instruction).Theorem 3.
There is a universal DSNP system with 81 neurons for computing functions.The specific working process of the DSNP system is shown in Figure 9, including five types of modules: INPUT module, ADD modules, SUB modules, OUTPUT module, and combination modules whose function is to simulate the combination of SUB instructions and ADD instructions. First, the module INPUT reads the encoded parameters of function f into the system. And then, the process enters the register machine simulator. In addition, It is important to note that ADD instructions li:ADDr,lj are used in module ADD′ as shown in Figure 6 when simulating register machine Mu′, and module SUB is shown in Figure 3. The final process is the module OUTPUT, which is structured as shown in Figure 5. But the output register is register 8 instead of register 1.In addition, the construction of module INPUT used in the proof of this theorem is different from the previous in accepting devices. Assume thatθ0,θ1,… is the fixed parameters of a function, and for any θxy, register machine Mu′ satisfies θxy=Mu′gx,y. In register machine Mu′, register 1 stores parameter gx, and register 2 stores parameter y. Therefore, the module INPUT is constructed which is shown in Figure 10. In the beginning, the two parameters gx and y are encoded into the form of a spike train 10gx−110y−11. Then, through the computing of module INPUT, the two parameters gx and y are stored in neurons σ1 and σ2 replaced by 2gx spikes and 2y spikes, respectively.Module INPUT shown in Figure10 is used to compute the function 10gx−110y−11 that is introduced by neuron σin into σ1 with 2gx spikes and σ2 with 2y spikes. Assume that the neuron σin activates at time t. Each of neurons σm1, σm2, σm3, σm4, and σm5 receives one a at time t+1. Thus, neurons σm3 and σm2 activate, and then neuron σm2 sends one spike to σ1 and σm3, respectively. Meanwhile, neuron σm3 sends one spike to σ1 and σm2, so that neuron σ1 receives two spikes at time t+2, and each of neurons σm3 and σm2 has one spike. Until the neuron σin receives the second spike, that is, after gx−1 times, rules in σm3 and σm2 cannot fire. In this way, neuron σ1 gets 2gx spikes corresponding to the number gx stored in register 1.Simultaneously, each of neuronsσm1, σm4, and σm5 has two spikes when neuron σ1 gets 2gx spikes. Thus, the rules in σm4 and σm5 are enabled, both consuming one spike. And at the next time, neuron σ2 receives two spikes, one from σm4 and the other from σm5. At the same time, neurons σm4 and σm5 each receive a spike from the other, so the number of spikes they contain returns to an even number. In this way, neurons σm4 and σm5 remain active for the next y−1 times. Therefore, neuron σ2 accepts 2y spikes altogether until neuron σin receives the third spike. And then, neuron σm1 has three spike, and the rule a3⟶a can perform and sends one spike to σl0•.Therefore, the system needs 94 neurons to simulate the universal register machineMu′ including(i)
6 neurons for module INPUT(ii)
1×10 neurons for 10 ADD instructions(iii)
3×14 neurons for 14 SUB instructions(iv)
25 neurons for 25 labels of instructions(v)
9 neurons for 9 register(vi)
2 neurons for module OUTPUTThe module SUB-ADD-1 is simulating the sequence of SUB instructionsli:SUBr1,lj,lk and ADD instructions lj:ADDr2,lg, as shown in Figure 11, where r1≠r2. The simulation of module SUB-ADD-1 also starts at reference neuron σli•. When neuron σlj has one spike, ADD instruction is triggered and performed immediately. Thus, the final results should be that neuron σlg gains one spike, the register r2 increases by one, and σlk is empty. If neuron σlk has one spike, the ADD instruction will not activate. The register r2 and neuron σlg are certainly empty. The computation process is divided into two cases depending on the number of spikes in neuron σr1. The process is similar to module SUB (shown in Figure 3). Assume that the reference neuron σli• fires at time t.(1)
If the registerr1 is nonempty, neuron σr1 has 2n spikes. At time t+1, neuron σr has 2n+1 spikes, and the rule aaa+/a3⟶a;1,2 fires. At the same time, neuron σc1 also gains one spike. Thus, at the next time, each of neurons σr, σc3, and σc2 gains one spike, and the rule a⟶λ;2,3 in neuron σc2 and a⟶λ;2,3 in σc3 can be used. At time t+3, neurons σc3 and σc2 gain one spike form σc1, and rule a⟶λ;3,4 can be applied. And at the next time, neurons σc3 and σc2 get one spike form σc1 at again, thus, the rule a⟶a;4,5 in σc2 and a⟶λ;4,5 in σc3 fire. At time t+5, σc4 applies its rule a⟶a;5,6 and sends one spike to σr2 before time t+6. In this way, σr2 has two spikes, and neuron σlk is empty.(2)
If the registerr1 is empty, it means that neuron σr1 is empty at the initial time. At time t+1, neurons σr and σc1 have one spike, and the rule a⟶a;1,2,3 in σr can be applied which means neuron σr accepts the spike at this moment. At time t+2, the rule a⟶a;1,2,3 in σc1 fires and sends one spike to σc3 and σc2 before t+3, respectively. At time t+3, σc3 and σc2 receive two spikes, and neuron σc2 chooses to perform a2⟶λ;3,4 and neuron σc3 performs rule a2⟶a;3,4. Therefore, σlk gains the spike at time t+4, and σlg and σr2 are empty.In this way, consecutive SUB-ADD instructions can be simulated correctly, and neuronσlj can be saved. Then, there are 6 pairs of instructions corresponding to module SUB-ADD-1, which can save 6 neurons associated with labels l1, l5, l7, l9, l16, and l22.(3)l0:SUB1,l1,l2,l1:ADD7,l0,l4:SUB6,l5,l3,l5:ADD5,l6,l6:SUB7,l7,l8,l7:ADD1,l4,l8:SUB6,l9,l0,l9:ADD6,l10,l14:SUB5,l16,l17,l16:ADD4,l11,l22:SUB1,l23,lh′,l23:ADD8,l22.Module SUB-ADD-2 is used to simulate the combination of SUB instructionl15:SUB3,l18,l20 and ADD instruction l20:ADD0,l0. As shown in Figure 12, the computational process of SUB-ADD-2 is similar to that of module SUB-ADD-1. Thus, one neuron associated with l20 can be saved.Module ADD-SUB is shown in Figure13. And the function of this module is to simulate consecutive ADD-SUB instructions li:ADDr1,lg and lg:SUBr2,lj,lk, where r1≠r2. Assume that reference neuron σli• has one spike at time t, and the produced spike is received by σr1 and σr2at the next time. Then, the working process of next time is the same as module SUB, divided into two cases. σr1 receives one spike from σr2 at time t+2 or time t+3, so that σr1 has two spikes. Thus, both the ADD and SUB instructions can be implemented correctly by this module. So, neuron σlg can be saved, and neuron σm1 also is saved as compared to module ADD’ shown in Figure 6. There are two pairs of instructions that adapt to the module ADD-SUB. Thus, four neurons are saved.(4)l5:ADD5,l6,l6:SUB7,l7,l8,l9:ADD6,l10,l10:SUB4,l0,l11.ADD-ADD instructionsl17:ADD2,l21 and l21:ADD3,l18 can also be combined by module ADD-ADD (shown in Figure 14). Assume that, at time t, neuron σl17 activates. Each of neurons σm1, σ3, and σ2 receives one spike at time t+1. Then, neurons σ3 and σ2 get their second spike from σm1, at time t+2. Thus, the consecutive ADD-ADD instructions can be simulated correctly by module ADD-ADD. Two module ADD can share the common neuron σm1, and the neuron associated with label l21 is also saved. Therefore, two neurons can be saved by module ADD-ADD.From the above proof, six neurons are saved by module SUB-ADD-1. One neuron is saved by module SUB-ADD-2. Four neurons are saved by module ADD-SUB. Two neurons are saved by module ADD-ADD. A total of 13 neurons were saved. Therefore, the system can only use 81 neurons to simulate the register machineMu′.Figure 9
A framework of a DSNP system as computing functions.Figure 10
Module INPUT.Figure 11
Module SUB-ADD-1: simulating the consecutive SUB instructionli:SUBr1,lj,lk and ADD instruction lj:ADDr2,lg.Figure 12
Module SUB-ADD-2: simulating the consecutive SUB instructionl15:SUB3,l18,l20 and ADD instruction l20:ADD0,l0.Figure 13
Module ADD-SUB: simulating the sequence of ADD instructionli:ADDr1,lg and SUB instruction lg:SUBr2,lj,lk.Figure 14
Module ADD-ADD: simulating ADD-ADD instructionsl17:ADD2,l21 and l21:ADD3,l18.


## 5. Conclusion

In this paper, a new variant of SNP systems, called DSN P systems, is proposed, which are inspired by the biological reality that there is a certain time delay between the input and output of neurons. Compared with the classic SN P systems, we made corresponding improvements in the spiking rules and forgetting rules by adding schedules to limit the performing time of rules. It achieves a time delay between input and output by scheduled rules and makes the performance of the system continuous in total working time. The rules can only be used within a specified time range, and during this time, the neuron is locked and cannot send or receive spikes. This also allows a neuron with multiple rules to selectively apply the rules according to the schedule when it is activated. In addition, DSN P systems have changed the principle (maximal parallelism) of applying rules, and rules are executed in order according to the schedules. And in Theorems 1 and 2, the computational power of DSN P systems are proved by simulating the register machine under the generating mode and the accepting mode. In Theorem 3, a universal DSN P system having 81 neurons for computing functions is also proved.In this paper, we only involve the theoretical proof of DSNP systems. In the future work, in both theory and application, there are still many problems that can be improved based on DSN P systems. In theory, we can further improve DSN P systems. We can demonstrate the computational power of systems that work on other modes, such as sequential mode and parallel mode. We can also investigate whether the computational power remains if the types of rules are reduced. And DSN P systems with other features are to be studied, such as multiple channels and polarizations. In terms of application, on the one hand, we can consider whether the DSN P system can be combined with a neural network and applied to image or text processing, as the work in [50]. On the other hand, DSN P systems can also be combined with intelligent algorithm, and the performance of such intelligent optimization systems may be greatly improved. In addition, there are many other directions of application, such as diagnose fault and hardware. Although the application of SN P systems has not been fully studied, as a third-generation neural network, the development of SN P systems has infinite possibilities, which need our continuous exploration.



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*Source: 6817636-2021-04-10.xml*