# On Analyzing LDPC Codes over Multiantenna MC-CDMA System

Authors: S. Suresh Kumar; M. Rajaram
Journal: Mathematical Problems in Engineering
 (2014)

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## Abstract

Multiantenna multicarrier code-division multiple access (MC-CDMA) technique has been attracting much attention for designing future broadband wireless systems. In addition, low-density parity-check (LDPC) code, a promising near-optimal error correction code, is also being widely considered in next generation communication systems. In this paper, we propose a simple method to construct a regular quasicyclic low-density parity-check (QC-LDPC) code to improve the transmission performance over the precoded MC-CDMA system with limited feedback. Simulation results show that the coding gain of the proposed QC-LDPC codes is larger than that of the Reed-Solomon codes, and the performance of the multiantenna MC-CDMA system can be greatly improved by these QC-LDPC codes when the data rate is high.


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## Body

## 1. Introduction

Multicarrier code-division multiple access (MC-CDMA) systems are being considered as potential candidates for next generation wireless communication system. MC-CDMA is a mixture of two well-organized techniques, namely, orthogonal frequency division multiplexing (OFDM) and code division multiple access (CDMA) [1]. OFDM solves the intersymbol interference (ISI) problem encountered with high data rates across multipath channels. By dividing the bandwidth into many small orthogonal frequencies, the data can be transmitted across multiple narrow band channels, which suffer only from flat fading. CDMA exploits the diversity in the radio channel to improve performance and allows better spectral efficiency and easier base station placement. Multicarrier CDMA systems combine many aspects of these two technologies to provide a communication system that has the advantages of both and supports high data rate which suits for fifth generation mobile system.High spectral efficiency, robustness to intersymbol interference (ISI) and fading caused by multipath propagation, and easy adaptation to severe channel condition without complex detection are the advantages of MC-CDMA [2]. The types of MC-CDMA include multicarrier direct-sequence CDMA (MC-DS-CDMA) proposed by Dasilva and Soura [3] and multitone CDMA proposed by Vandendorpe [4]. Using the fast Fourier transform (FFT), these signals can easily be transmitted and received without increasing the transmitter and receiver complexities. In MC-CDMA, transmit processing techniques have received wide attention. Transmit processing techniques are implemented at the base station (BS) with multiple antennas which makes the receiver design at the mobile station (MS) be a simpler one.The essential premise of using transmit processing techniques is the knowledge of the channel-state information (CSI) at the transmitter. The reciprocity between the forward and reverse links at the BS can be used to obtain the CSI in time-division duplexing (TDD) systems. In frequency-division duplexing (FDD) systems, the BS can obtain knowledge of the downlink user channels by allowing the users to send a small number of feedback bits on the uplink. In many existing systems, some functions of downlink CSI are quantized and transmitted to the BS [5, 6]. When the channel is quantized, the user signals cannot perfectly be orthogonalized due to inherent quantization errors, and it also requires a significant number of bits for satisfactory performance. Thus, novel scheme that require a low rate of feedback bits, which can give better performance, is needed.In this paper, switched-interleaving based transmit processing techniques are presented for both downlink and uplink MC-CDMA multiple-antenna systems. Accordingly, a set of chip interleavers are constructed and prestored at both the BS and MSs. During the transmission, the optimum interleaver is chosen at the BS by the selection function. In the downlink systems, the multiuser interference (MUI) is suppressed by a precoding technique that requires the feedback quantized CSI of all users. In the uplink system, instead of sending the quantized CSI, the users will send data by using the interleaver that corresponds to the selector function that was sent from the BS for the particular channel situation.In multi antenna MC-CDMA systems, several forward error correction (FEC) schemes were proposed to meet the high-speed transmission in recent years, such as Reed-Solomon (RS) codes, turbo codes, and low-density parity check (LDPC) codes. In this paper, we focus our attention on improving the performance of the multiantenna MC-CDMA system through the LDPC codes when the data rate is high that suits for 4G systems.Low-density parity-check (LDPC) codes are a class of capacity approaching linear block codes. They were invented by Gallager in 1962 [7] but forgotten for over 30 years, mainly due to practical issues regarding their implementation. Since their revival in 1996 by MacKay and Neal [8], a very lively research community has been engaged with the study of LDPC codes. As their name implies, they have a parity-check matrix with a low density of nonzero entries, that is, a sparse matrix. The definition of “low density” is a bit loose but, generally, matrices with less than 10% nonzero entries are considered to be sparse. The number of nonzero entries in a sparse matrix increases linearly with respect to matrix dimensions and not quadratically as in regular (dense) matrices. Low computational complexity, parallel processing capability and good error correcting performance are some of the reasons why LDPC codes have received much attention and are being suggested for many communications systems.Based on methods of construction, LDPC codes can be categorized into two: random codes [8, 9] and structured codes. The cyclic or quasicyclic (QC) LDPC codes [10–12] are structured codes, which have advantages in encoding over structured codes. The hardware implementation of their encoding process can be done efficiently by using shift registers. In addition, the near capacity performance can be achieved by iterative message-passing decoding and long LDPC codes. This iterative algorithm uses information exchange and updates between information points and check points to improve decoding performance and reduce the bit error rate [13].When transmitting over high rate MC-CDMA system, the signal suffers serious noise and the bit error rate (BER) performance is degraded. Therefore, one new class of QC-LDPC coding scheme is adapted to overcome such noise effects, as examined in Section3. This family of QC-LDPC coding has a girth greater than or equal to 6. Simulation results show that the coding gain of the proposed LDPC codes is larger than that of the RS codes. Moreover, the performance of MC-CDMA system when the data rate is high can be greatly improved by these QC-LDPC codes.


## 2. Precoded MC-CDMA Multiple-Antenna System

In practice, most systems have control and feedback channels that can be used to acquire the required information. We consider that BS is equipped with multiple antennas and MS with single antenna. All the MSs and the BS are equipped with the codebook of quantized CSI and chip interleavers. Based on the downlink channel estimation, each user selects an index from the codebook of the quantized CSI and relays it to the BS by a limited-feedback channel. The feedback quantized CSI is used to compute the chipwise transmit precoder and the selection function. The selection function is used to calculate and choose the index of the optimum interleaver. The downlink data is operated by the optimum interleaver, and the BS broadcasts the index of the optimum interleaver to all the MS prior to data transmission.


### 2.1. System Model and Chipwise Precoder

The structure of transceiver of the limited-feedback-based MC-CDMA multiantenna system is presented in Figure1. We consider a binary phase-shift keying (BPSK) MC-CDMA system with Nt transmit antennas. The system supports K users and has N chips per symbol. The spreading codes are denoted by s1,s2,…sK with size N×1. The user data are sent as a block that contains M symbols and we assume that bk(i)=[b1(k)(i),…,bM(k)(i)]T denotes the ith block data for user k.Figure 1
LDPC coded multiple-antenna MC-CDMA system transceiver structure.The chip interleaver permutes one block of chips per time for each user. Before the precoding procedure, the permuted chips of userK are given by
(1)Xk(l)=AkPlSkbk,
where Ak is the amplitude that is associated with user k. The matrix Pl denotes the lth interleaving matrix with size MN×MN presented in the codebook. The parameter Sk=sk⊗IM is the spreading code matrix of size MN×M, IM represents an M×M identity matrix, and ⊗ is the Kronecker product.The permuted user data from chip interleaver are precoded in chipwise precoder. In this paper, the zero forcing precoding is employed [14], which is a strong impact to background noise and unknown user interference. The N×K precoding matrix Gβ of the βth chip for zero-forcing precoding is given by
(2)Gβ=PTr(Gβ′GβH′)Gβ′,
where Gβ′=Dβ† and P denotes the transmit power. Here, Dβ† is the Moore-Penrose pseudoinverse of equivalent OFDM channel matrix Dβ of the βth chip.The output of the chipwise precoder enters the OFDM transmitter where precoded data symbols are first spread using Walsh Hadamard (WH) codes. The spread data symbols are then transmitted over many carriers. This is accomplished using an inverse fast Fourier transform (IFFT) followed by digital-to-analog converter. As a result of this spreading, each data symbol resides on all carriers, enabling the system to better exploit the available frequency diversity.For both uplink and downlink, preamble transmission and limited feedback are prior to payload transmission within each fading block. At the receiver, the CSI is estimated from the preamble. Each MS quantizes its own CSI and the index of the quantized CSI is fed back to the BS, which selects the optimum interleaver to preprocess the data. The payload transmission starts after the limited feedback. The channel state information (CSI) is the known channel property which describes how a signal propagates from transmitter to receiver and represents the combined effect of fading, scattering, power decay with distance, and channel induced noise. The LDPC code is integrated with the system to reduce the effect of channel induced errors.


## 2.1. System Model and Chipwise Precoder

The structure of transceiver of the limited-feedback-based MC-CDMA multiantenna system is presented in Figure1. We consider a binary phase-shift keying (BPSK) MC-CDMA system with Nt transmit antennas. The system supports K users and has N chips per symbol. The spreading codes are denoted by s1,s2,…sK with size N×1. The user data are sent as a block that contains M symbols and we assume that bk(i)=[b1(k)(i),…,bM(k)(i)]T denotes the ith block data for user k.Figure 1
LDPC coded multiple-antenna MC-CDMA system transceiver structure.The chip interleaver permutes one block of chips per time for each user. Before the precoding procedure, the permuted chips of userK are given by
(1)Xk(l)=AkPlSkbk,
where Ak is the amplitude that is associated with user k. The matrix Pl denotes the lth interleaving matrix with size MN×MN presented in the codebook. The parameter Sk=sk⊗IM is the spreading code matrix of size MN×M, IM represents an M×M identity matrix, and ⊗ is the Kronecker product.The permuted user data from chip interleaver are precoded in chipwise precoder. In this paper, the zero forcing precoding is employed [14], which is a strong impact to background noise and unknown user interference. The N×K precoding matrix Gβ of the βth chip for zero-forcing precoding is given by
(2)Gβ=PTr(Gβ′GβH′)Gβ′,
where Gβ′=Dβ† and P denotes the transmit power. Here, Dβ† is the Moore-Penrose pseudoinverse of equivalent OFDM channel matrix Dβ of the βth chip.The output of the chipwise precoder enters the OFDM transmitter where precoded data symbols are first spread using Walsh Hadamard (WH) codes. The spread data symbols are then transmitted over many carriers. This is accomplished using an inverse fast Fourier transform (IFFT) followed by digital-to-analog converter. As a result of this spreading, each data symbol resides on all carriers, enabling the system to better exploit the available frequency diversity.For both uplink and downlink, preamble transmission and limited feedback are prior to payload transmission within each fading block. At the receiver, the CSI is estimated from the preamble. Each MS quantizes its own CSI and the index of the quantized CSI is fed back to the BS, which selects the optimum interleaver to preprocess the data. The payload transmission starts after the limited feedback. The channel state information (CSI) is the known channel property which describes how a signal propagates from transmitter to receiver and represents the combined effect of fading, scattering, power decay with distance, and channel induced noise. The LDPC code is integrated with the system to reduce the effect of channel induced errors.


## 3. Low Density Parity Check Code

A binary(s,t)-regular LDPC code is defined as the null space of a sparse parity-check matrix H over finite field with 2 elements denoted by GF(2), which has s ones in each column and t ones in each row. The finite field is also called the Galois field, in honor of the founder of finite field theory, Evariste Galois. In almost all of the proposed constructions of LDPC codes (quasicyclic or not), the following constraint on the rows and columns of the parity-check matrix H is imposed: no two rows (or two columns) can have more than one place where they both have nonzero components. This constraint on the rows and columns of H is referred to as the row-column- (RC-) constraint. This RC-constraint ensures that the Tanner graph of the LDPC code given by the null space of H has a girth of at least 6 and that the minimum distance of the code is at least s+1 [15–17]. This distance bound is tight for regular LDPC codes whose parity-check matrices have large column weights and row redundancies. In this section, we consider an uncomplicated method to construct a (s,t)-regular QC-LDPC code.Consider two random sequences{p0,p1,…,ps-1} and {q0,q1,…,qt-1}, where 0≤pi≤m-1 for i=0,1,…,s-1 and 1≤qi≤m for i=0,1,…,t-1, and m is an odd prime number. Then we can form an s×t preliminary matrix L with elements from GF(m) as follows:
(3)L=[l0,0l0,1⋯l0,t-1l1,0l1,1⋯l1,t-1⋮⋮⋮⋮ls-1,0ls-1,1⋯ls-1,t-1].For fixed parametersα, β, and φ, the (u,v)th element of L can be calculated as
(4)lu,v={(αβ(pu+qv)+φ)mod⁡m,if0≤pu≤m-2,1≤qv≤m-1φ,if0≤pu≤m-2,qv=mφ,ifpu=m-1,1≤qv≤m,
where α∈{1,2,…,m-1}, φ∈{0,1,…,m-1}, and β is the primitive element of GF(m).Thus, the constructed parity-check matrixH can be represented by an s×t array of circulant permutation matrices as follows:
(5)H=[I(l0,0)I(l0,1)⋯I(l0,t-1)I(l1,0)I(l1,1)⋯I(l1,t-1)⋮⋮⋮⋮I(ls-1,0)I(ls-1,1)⋯I(ls-1,t-1)].HereI(0) is one m×m identity matrix and I(lu,v) represents the circulant permutation matrix with one at column (i+lu,v) mod m for row i, 0≤i≤m-1, and zero elsewhere.Hence, the resultingH represents (s,t)-regular LDPC code with s ones in each column and t ones in each row. This LDPC code is also called an (n,k) regular LDPC code, where n=mt is the block length of the code and k is the number of message bits. The size of the parity-check matrix H is sm×tm and it has code rate r=k/n≥1-(s/t).


### 3.1. Example: A [248, 127] QC-LDPC Code

Lets=4, t=8, and m=31. The primitive elements of GF(m) are 3, 11, 12, 13, 17, 21, 22, and 24. First, let us randomly select two sequences {p0,p1,p2,p3}={5,24,7,19} and {q0,q1,q2,q3,q4,q5,q6,q7}={29,7,23,10,6,26,4,9}. By using (4) with fixed parameters α=1, φ=0, and β=3, we can form the following parity-check matrix:
(6)H=[I(19)I(8)I(7)I(30)I(13)I(3)I(29)I(10)I(11)I(3)I(22)I(19)I(1)I(5)I(7)I(27)I(16)I(10)I(1)I(22)I(24)I(27)I(13)I(28)I(4)I(18)I(8)I(21)I(6)I(30)I(11)I(7)].HereI(x) is a 31×31 identity matrix with rows shifted cyclically to the right by x position. H is a 124×248 matrix and describes a (4,8)-regular LDPC code with code rate r=1-121/248≈0.512.A generator matrix for a code with parity-check matrixH can be found by performing Gauss-Jordan elimination on H to obtain it in the form
(7)H=[A,In-k],
where A is an (n-k)×k binary matrix and In-k is the size n-k identity matrix. The generator matrix is then
(8)G=[Ik,AT].Finally, the codewordc corresponding to the binary message u can be found using the matrix equation
(9)c=uG.


### 3.2. Decoder

The long block length LDPC codes can achieve near Shannon limit performance under belief-propagation based decoding algorithms such as sum-product algorithm [18], which are collectively called message passing iterative algorithms. The algorithm employed by us to decode LDPC is the log-domain sum-product algorithm. It is an iterative decoding algorithm where there is a passage of communication between check codes and variable codes. In every such passage the log likelihood ratio (LLR) is registered for getting the probability of its likely sign. It makes use of Tanner pictorial symbolization of a LDPC code, where ci, i=1,…,n-k are the check nodes from every row of the thin parity check matrix H and vj, j=1,…,n-k are the variable nodes with respect to every column of H. Here n represents the extent of a codeword and k signifies that of communication fragments. A standard iteration passes through the following stages (initialization is carried out only for the initial iteration).Step 1.
The log-domain sum-product algorithm starts with an initialization process. The LLR value of the established signYi is initialized to the respective variable nodes L(ci) by making use of (10) and relating these L(ci) values with entries other than zero of the parity check matrix H using (11). Consider
(10)L(ci)=LLR(Yi),(11)L(qij)=H*L(ci),(12)L(rji)=0,
where L(ci)=LLR value of input bit Yi=log⁡[Pr(ci=0∣Y)/Pr(ci=1∣Y)], L(qij)=log⁡[qij(0)/qij(1)], and L(rji)=log⁡[rji(0)/rji(1)].Step 2.
After initialization, horizontal scan operation is performed by updating the check node value. The check node values are updated using(13)L(rji)=[∏i′∈Vj∖iαi′j·ϕ(∑i′∈Vj∖iϕ(βi′j))],
where ϕ(x)=-log⁡[tanh(x/2)], αij=Sign⌊L(qij)⌋, and βij=|L(qij)|. Here tanh is the hyperbolic tangent function and sign⁡ is a mathematical function that extracts the sign of a real number.Step 3.
The variable node values are updated using (14) which forms the vertical scan operation
(14)L(qij)=L(ci)+∑j′∈ci∖jL(rji).Step 4.
The decision rule applied to decide the decoded symbol is given by (16). Consider
(15)L(Qi)=L(ci)+∑j∈ciL(rji),(16)ci={1,ifL(Qi)>00,elsewhere.
Decoding activity comes to an end when the parity checkH*CT=0 is realized; if not we have to redo Step 2. If it is equal to 0, it indicates the identification of a codeword and results in the cessation of the iterations. If not, the decoder will begin the next iteration from check node update and the steps are done again and again till the formation of the codeword or the achievement of utmost number of iterations, whichever occurs earlier.


## 3.1. Example: A [248, 127] QC-LDPC Code

Lets=4, t=8, and m=31. The primitive elements of GF(m) are 3, 11, 12, 13, 17, 21, 22, and 24. First, let us randomly select two sequences {p0,p1,p2,p3}={5,24,7,19} and {q0,q1,q2,q3,q4,q5,q6,q7}={29,7,23,10,6,26,4,9}. By using (4) with fixed parameters α=1, φ=0, and β=3, we can form the following parity-check matrix:
(6)H=[I(19)I(8)I(7)I(30)I(13)I(3)I(29)I(10)I(11)I(3)I(22)I(19)I(1)I(5)I(7)I(27)I(16)I(10)I(1)I(22)I(24)I(27)I(13)I(28)I(4)I(18)I(8)I(21)I(6)I(30)I(11)I(7)].HereI(x) is a 31×31 identity matrix with rows shifted cyclically to the right by x position. H is a 124×248 matrix and describes a (4,8)-regular LDPC code with code rate r=1-121/248≈0.512.A generator matrix for a code with parity-check matrixH can be found by performing Gauss-Jordan elimination on H to obtain it in the form
(7)H=[A,In-k],
where A is an (n-k)×k binary matrix and In-k is the size n-k identity matrix. The generator matrix is then
(8)G=[Ik,AT].Finally, the codewordc corresponding to the binary message u can be found using the matrix equation
(9)c=uG.


## 3.2. Decoder

The long block length LDPC codes can achieve near Shannon limit performance under belief-propagation based decoding algorithms such as sum-product algorithm [18], which are collectively called message passing iterative algorithms. The algorithm employed by us to decode LDPC is the log-domain sum-product algorithm. It is an iterative decoding algorithm where there is a passage of communication between check codes and variable codes. In every such passage the log likelihood ratio (LLR) is registered for getting the probability of its likely sign. It makes use of Tanner pictorial symbolization of a LDPC code, where ci, i=1,…,n-k are the check nodes from every row of the thin parity check matrix H and vj, j=1,…,n-k are the variable nodes with respect to every column of H. Here n represents the extent of a codeword and k signifies that of communication fragments. A standard iteration passes through the following stages (initialization is carried out only for the initial iteration).Step 1.
The log-domain sum-product algorithm starts with an initialization process. The LLR value of the established signYi is initialized to the respective variable nodes L(ci) by making use of (10) and relating these L(ci) values with entries other than zero of the parity check matrix H using (11). Consider
(10)L(ci)=LLR(Yi),(11)L(qij)=H*L(ci),(12)L(rji)=0,
where L(ci)=LLR value of input bit Yi=log⁡[Pr(ci=0∣Y)/Pr(ci=1∣Y)], L(qij)=log⁡[qij(0)/qij(1)], and L(rji)=log⁡[rji(0)/rji(1)].Step 2.
After initialization, horizontal scan operation is performed by updating the check node value. The check node values are updated using(13)L(rji)=[∏i′∈Vj∖iαi′j·ϕ(∑i′∈Vj∖iϕ(βi′j))],
where ϕ(x)=-log⁡[tanh(x/2)], αij=Sign⌊L(qij)⌋, and βij=|L(qij)|. Here tanh is the hyperbolic tangent function and sign⁡ is a mathematical function that extracts the sign of a real number.Step 3.
The variable node values are updated using (14) which forms the vertical scan operation
(14)L(qij)=L(ci)+∑j′∈ci∖jL(rji).Step 4.
The decision rule applied to decide the decoded symbol is given by (16). Consider
(15)L(Qi)=L(ci)+∑j∈ciL(rji),(16)ci={1,ifL(Qi)>00,elsewhere.
Decoding activity comes to an end when the parity checkH*CT=0 is realized; if not we have to redo Step 2. If it is equal to 0, it indicates the identification of a codeword and results in the cessation of the iterations. If not, the decoder will begin the next iteration from check node update and the steps are done again and again till the formation of the codeword or the achievement of utmost number of iterations, whichever occurs earlier.


## 4. Simulation Results

In this section, we evaluate the performance of multiantenna MC-CDMA system with and without LDPC coding. Initially the bit error rate (BER) performance of precoded multiantenna MC-CDMA scheme is compared with the conventional MC-CDMA system. We carried out simulations to assess the BER for different loads, signal-to-noise ratios (SNR), and the number of antennas. The channel considered in the simulation is Rayleigh with 4 taps. The power percentages for each tap are 21.7, 39.2, 30.4, and 8.7, respectively. The sum-product algorithm with 50 iterations is used for decoding the LDPC codes.Figure2 shows the average BER performance versus SNR in decibel (dB) for the 4-antenna precoded MC-CDMA and the conventional MC-CDMA scheme without precoders. BER is used to quantify a channel carrying data by counting the rate of errors in a data string. This measured ratio is affected by many factors including signal-to-noise ratio (SNR) and distortion. SNR is defined as the ratio of signal power to the noise power, often expressed in decibels. In Figure 2, the conventional MC-CDMA scheme is compared with feedback MC-CDMA system where the CSI is known perfectly at the transmitter. The system is also compared with MC-CDMA with limited feedback where the CSI is quantized to 3 bits.Figure 2
BER performance of the precoded and conventional MC-CDMA.From Figure2, it is seen that the precoded MC-CDMA with perfect channel state information and with limited feedback outperforms the conventional MC-CDMA scheme for all SNR value. In particular, the precoded MC-CDMA with perfect CSI can save up to more than 6 dB compared with precoded MC-CDMA with limited feedback and save up to more than 10 dB compared with conventional MC-CDMA scheme without precoder at an average BER level of 10-2.Next the performance of the LDPC codes in precoded MC-CDMA system is demonstrated by BER versus SNR. Figure3 shows the average BER performance of precoded MC-CDMA with and without QC-LDPC and RS codes. The RS code is a systematic cyclic block code belonging to nonbinary code category. The RS code considered for comparison is RS (255, 239) and QC-LDPC is with block length N=488 and code rate r=0.5.Figure 3
BER performance of the MC-CDMA system with and without RS codes and the LDPC codes.From Figure3, it is seen that, for BER 3×10-3, the coding gain of QC-LDPC code with block length N=488 and code rate r=0.5 is about 1.4 dB higher than that of RS (255, 239) codes and about 13 dB larger than that of the uncoded precoded MC-CDMA system. The simulation results show that the performance of the multiantenna MC-CDMA system can be greatly improved by these QC-LDPC codes when the data rate is high.


## 5. Conclusion

In this paper, switched-interleaving based transmit processing techniques are presented for MC-CDMA multiple-antenna systems. This system has better performance than the conventional MC-CDMA system, and the related coding structure is compact for practical implementation. In particular, the precoded MC-CDMA can save up to more than 5 dB compared with conventional MC-CDMA scheme without precoder at an average BER level of10-2. The performance of the system is not agreeable when the data rate is high and thus a new class of QC-LDPC codes based on primitive element is proposed to improve the performance of transmit processed MC-CDMA multiple-antenna system. Simulation results show that these QC-LDPC codes outperform RS codes when employed with MC-CDMA system. It has been shown that these QC-LDPC codes can be used to realize multiple-antenna MC-CDMA system with superior performance.



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*Source: 652527-2014-07-22.xml*