# Space Vector Modulation Technique for 3-Level NPC Converter with Constant Switching Frequency

Authors: Imen Ouerdani; Hafedh Ben Abdelghani; Afef Bennani Ben Abdelghani; Daniel Montesinos-Miracle; Ilhem Slama-Belkhodja
Journal: Advances in Power Electronics
 (2016)

---

## Abstract

This paper presents a simple Space Vector Modulation (SVM) methodology for a three-level NPC converter. Nearest three vectors (NTV) and corresponding duty cycles are deduced through simple generic mathematical expressions. Extra degrees of freedom of NPC converter are used to fully benefit from SVM advantages and to control the switching frequency. Simulation and experimental results are presented and discussed to validate the proposed methodology.


---

## Body

## 1. Introduction

Power conversion investigation attracted attention particularly in Medium Voltage/High Power ranges [1, 2]. During the three last decades, advancements in power electronics fields have led to innovative converter topologies, called multilevel converters [3, 4]. In fact, compared to classical two-level converters, multilevel converters are an attractive solution since they support higher operation voltages, reduce common mode voltages, minimize output current and voltage distortions, and optimize output filter size and cost. One of the most widely used and investigated multilevel topologies is the neutral point clamped converter. This topology was firstly introduced by Richard Baker in the early eighties [5]. Later on, several converters based on the NPC were proposed such as the Active NPC [6–9] and the Optimized NPC [10–12]. These converters are classified as the Diode Clamped Converters [13]. The three-phase N-level NPC converter uses (N
-
1) series-connected capacitors to divide the DC bus into a set of intermediary voltage levels as presented in Figure 1.Figure 1
N-level neutral point clamped inverter leg.Simultaneously, classical modulation algorithms proposed for two-level converters such as Pulse Width Modulation (PWM) [14], hysteresis current control [15], and selective harmonic elimination [16] have been extended to multilevel topologies. Among the proposed algorithms, the Space Vector Modulation (SVM) is the most widely used due to its better utilization of the DC bus [9] and higher harmonic performances in linear and nonlinear operating zones [17, 18] compared to conventional PWM strategies. Detecting the nearest three vectors (NTV) among the numerous available ones, selecting and fully defining the corresponding switches duty cycles with respect to possible additional criteria are the main issues of SVM technique in multilevel converter context.In this paper, a simple approach for a 3-level Space Vector Modulation technique available for the NPC converter is presented. In the proposed method, the nearest three vectors and their corresponding on-times application are simply expressed using generic mathematical expressions. The choice of the Phase Level Sequence (PLS) is used as an extra degree of freedom in order to control the switching frequency. Simulation and experimental results are presented to verify the effectiveness of the proposed SVM strategy.


## 2. NPC Converter and Space Vector Modulation (SVM)

### 2.1. Neutral Point Clamped Converter

One phase of ann-level neutral point clamped inverter consists of (
n
-
1
) capacitors, 6
×
n
-
1 power switches, and 6
×
n
-
2 clamping diodes and is able to generate (n
-
2
) capacitive midpoints. The output voltage V
s is equal to the voltage of the capacitive midpoint connected to it. Hence, V
s can take (n
-
2
) values as(1)
V
d
c
n
-
1
,
2
V
d
c
n
-
1
⋯
j
·
V
d
c
n
-
1
⋯
n
-
2
V
d
c
n
-
1
.In order to generate the output voltage V
s, the IGBTs T
1 to T
k and T
k
+
1
- to T
n
-
1
- must be ON. The current is then flowing from the diodes D
k through the switches T
1 to T
k to the output V
s. It is to note that any other configuration is not permitted and each voltage level is realized by an only one configuration [19, 20]. In this paper, the triplet (X
,
Y
,
Z), called Phase Level Sequence (PLS), is introduced for a three-phase multilevel neutral point clamped inverters, where X (Y and Z, resp.) is the phase level of phase a (phase b and phase c, resp.). Three-phase n-level NPC converters are able to generate n
3 PLS and 3
n
n
-
1
+
1 space vectors.Hence, 3-phase 3-level NPC converter presented in Figure2 is able to generate 27 PLS and 19 space vectors.Figure 2
Three-phase 3-level NPC converter.For a single phase, phase level is equal to 0 when both commutation cells are OFF-switched and is equal to 2 when both commutation cells are ON-switched. The corresponding output voltage for phase level 0 is-
V
d
c
/
2 whereas the corresponding output voltage for phase level 2 is equal to V
d
c
/
2. Intermediate level is equal to 1 and is obtained when only one commutation cell is ON-switched, in which case the output voltage is equal to 0.Figure3 shows the (α, β) frame of a 3-phase NPC 3-level converter.Figure 3
Three-level inverter space vector diagram.


### 2.2. Space Vector Modulation (SVM)

For a three-phase two-level converter, the aim of the Space Vector Modulation is to select the appropriate space vectors to apply and their respective application times [21, 22]. Given a voltage reference vector V
s
∗, the SVM strategy selects the two nearest active vectors (V
k and V
k
+
1) and the zero vectors (0,0
,
0) and (1,1
,
1) as shown in Figure 4(a). The application times for these 4 vectors are calculated using the volt-second balance as(2)
T
k
+
1
V
k
+
1
+
T
k
V
k
+
T
S
V
M
-
T
k
+
1
+
T
k
·
V
0
=
T
S
V
M
·
V
s
∗
,where V
k
,
V
k
+
1, and V
0 are space vectors, T
k and T
k
+
1 are the application times corresponding to V
k and V
k
+
1, respectively, and T
S
V
M is the SVM period. T
S
V
M
-
(
T
k
+
1
+
T
k
) is the application time of zero voltages: during the first half of this time slot (
0,0
,
0
) is applied and during the second half (
1,1
,
1
) is applied if symmetrical SVPWM technique is used.Figure 4
(a) Two-level inverter space vector diagram; (b) SVM for a two-level inverter.
(a)
(b)Compared to conventional PWM strategies, the Space Vector Modulation leads to better dynamic performances and a higher modulation index even if the calculation complexity is comparatively increased.For ann-level converter, the increased number of space vectors and switching states further enhances the dynamic performances but needs additional calculation capabilities and introduces considerable implementation complexity.In this paper, a simple approach to implement a three-level SVM algorithm using mathematical analysis of the obtained(
α
,
β
) frame is proposed. Active vectors to be applied, switching states, and IGBT on-times calculation are easily deduced using the proposed method.


## 2.1. Neutral Point Clamped Converter

One phase of ann-level neutral point clamped inverter consists of (
n
-
1
) capacitors, 6
×
n
-
1 power switches, and 6
×
n
-
2 clamping diodes and is able to generate (n
-
2
) capacitive midpoints. The output voltage V
s is equal to the voltage of the capacitive midpoint connected to it. Hence, V
s can take (n
-
2
) values as(1)
V
d
c
n
-
1
,
2
V
d
c
n
-
1
⋯
j
·
V
d
c
n
-
1
⋯
n
-
2
V
d
c
n
-
1
.In order to generate the output voltage V
s, the IGBTs T
1 to T
k and T
k
+
1
- to T
n
-
1
- must be ON. The current is then flowing from the diodes D
k through the switches T
1 to T
k to the output V
s. It is to note that any other configuration is not permitted and each voltage level is realized by an only one configuration [19, 20]. In this paper, the triplet (X
,
Y
,
Z), called Phase Level Sequence (PLS), is introduced for a three-phase multilevel neutral point clamped inverters, where X (Y and Z, resp.) is the phase level of phase a (phase b and phase c, resp.). Three-phase n-level NPC converters are able to generate n
3 PLS and 3
n
n
-
1
+
1 space vectors.Hence, 3-phase 3-level NPC converter presented in Figure2 is able to generate 27 PLS and 19 space vectors.Figure 2
Three-phase 3-level NPC converter.For a single phase, phase level is equal to 0 when both commutation cells are OFF-switched and is equal to 2 when both commutation cells are ON-switched. The corresponding output voltage for phase level 0 is-
V
d
c
/
2 whereas the corresponding output voltage for phase level 2 is equal to V
d
c
/
2. Intermediate level is equal to 1 and is obtained when only one commutation cell is ON-switched, in which case the output voltage is equal to 0.Figure3 shows the (α, β) frame of a 3-phase NPC 3-level converter.Figure 3
Three-level inverter space vector diagram.


## 2.2. Space Vector Modulation (SVM)

For a three-phase two-level converter, the aim of the Space Vector Modulation is to select the appropriate space vectors to apply and their respective application times [21, 22]. Given a voltage reference vector V
s
∗, the SVM strategy selects the two nearest active vectors (V
k and V
k
+
1) and the zero vectors (0,0
,
0) and (1,1
,
1) as shown in Figure 4(a). The application times for these 4 vectors are calculated using the volt-second balance as(2)
T
k
+
1
V
k
+
1
+
T
k
V
k
+
T
S
V
M
-
T
k
+
1
+
T
k
·
V
0
=
T
S
V
M
·
V
s
∗
,where V
k
,
V
k
+
1, and V
0 are space vectors, T
k and T
k
+
1 are the application times corresponding to V
k and V
k
+
1, respectively, and T
S
V
M is the SVM period. T
S
V
M
-
(
T
k
+
1
+
T
k
) is the application time of zero voltages: during the first half of this time slot (
0,0
,
0
) is applied and during the second half (
1,1
,
1
) is applied if symmetrical SVPWM technique is used.Figure 4
(a) Two-level inverter space vector diagram; (b) SVM for a two-level inverter.
(a)
(b)Compared to conventional PWM strategies, the Space Vector Modulation leads to better dynamic performances and a higher modulation index even if the calculation complexity is comparatively increased.For ann-level converter, the increased number of space vectors and switching states further enhances the dynamic performances but needs additional calculation capabilities and introduces considerable implementation complexity.In this paper, a simple approach to implement a three-level SVM algorithm using mathematical analysis of the obtained(
α
,
β
) frame is proposed. Active vectors to be applied, switching states, and IGBT on-times calculation are easily deduced using the proposed method.


## 3. Proposed Algorithm

Figure5 shows the block diagram of the proposed method, where the main task of each step is written in bold and criterion for each task is written in italic in the neighboring box.Figure 5
Block diagram of the proposed scheme.


### 3.1. Step  1: Localization ofV
s
∗

The aim ofV
s
∗ Localization block is to identify the appropriate three vectors V
i
,
i
=
1,2
,
3, to apply and consequently their corresponding PLS in order to generate an output voltage with a mean value on the switching period equal to the reference voltage. The space vectors needed for the SVM are the nearest three vectors to V
s
∗.In order to localize the reference voltage vector, its module and phase, noted, respectively, asV
s
∗ and θ
s, are used. They are calculated using basic (abc-αβ) transformation.The(
α
,
β
) frame is divided into 6 sectors and 4 quadrants according to Figure 6. This sectorization represents the first step to deduce to which triangle (among the available 24 ones) the reference voltage vector belongs. Once this triangle selected, a lookup table gives the three nearest voltage vectors the inverter must generate.Figure 6
(
α
,
β
) frame sectorization: (a) 4 quadrants; (b) 6 sectors; (c) 24 triangles.
(a)
(b)
(c)Depending on the modulation depthm, specific triangles are used: if 0
<
m
<
0.75, space vector V
s crosses triangles T1, T5, T9, T13, T17, and T21 and if 0.75
<
m
<
1.15, the remaining triangles (T2, T3, T4, T6, T7, T8, T10, T11, T12, T14, T15, T16, T18, T19, T20, T22, T23, and T24) are used. It is to be noted that the modulation index m
=
V
s
∗
/
V
d
c and the maximum modulation index m
=
1.15 is obtained when V
s
∗
=
V
d
c
/
3.


### 3.2. Step  2: Primary ON-Times Calculation

The “Primary ON-Times Calculation” block aims to determine the on-time for each of the three vectorsV
i
,
i
=
1,2
,
3, that is, the activation time over switching period T
S
V
M. Step  2 outputs are as follows:(i)
The corresponding on-timeT
i
,
i
=
1
,
…
,
3, for the three needed vectors the converter has to perform on the next T
S
V
M.
These vectorsV
i
,
i
=
1
,
…
,
3, correspond to the localized triangle’s vertices.
(ii)
The PLS leading to the specified space vectors. The PLS choice affects the converter switching frequency.To perform a rigorous on-times calculation, fine modeling of the three-level converter voltage vectors is needed. The proposed algorithm divides the 24 triangles among 4 families given by Figure7. In fact, the 3 vectors of all the triangles belonging to the same family can be expressed using a unique generic form. Thus, on times are deduced as generic forms depending on the selected family.Figure 7
Triangles division into 4 families.


#### 3.2.1.V
i Generic Expressions

Family 1 is formed by triangles 1, 5, 9, 13, 17, and 21 as shown in Figure8. V
1, V
2, and V
3 are represented for each triangle belonging to this family and their expressions are(3)
V
1
=
V
d
c
3
e
j
k
-
1
π
/
3
=
V
d
c
3
cos
⁡
k
-
1
π
3
sin
⁡
k
-
1
π
3
,
V
2
=
V
d
c
3
e
j
k
π
/
3
=
V
d
c
3
cos
⁡
k
π
3
sin
⁡
k
π
3
⁡
,
V
3
=
0
,where k is the sector’s index corresponding to each triangle.Figure 8
Family 1: (a) triangles; (b) zoom on family 1 space vectors.
(a)
(b)Family 2 is formed by triangles 2, 6, 10, 14, 18, and 22, as shown in Figure9.Figure 9
Family 2 space vectors.V
1, V
2, and V
3 corresponding to this family are given by(4)
V
1
=
V
d
c
3
e
j
k
-
1
π
/
3
=
V
d
c
3
cos
⁡
k
-
1
π
3
⁡
sin
⁡
k
-
1
π
3
⁡
,
V
2
=
2
V
d
c
3
e
j
k
-
1
π
/
3
=
2
V
d
c
3
cos
⁡
k
-
1
π
3
⁡
sin
⁡
k
-
1
π
3
⁡
,
V
3
=
V
d
c
√
3
e
j
k
-
0.5
π
/
3
=
V
d
c
√
3
cos
⁡
k
-
0.5
π
3
sin
⁡
k
-
0.5
π
3
⁡
.Family 3 is formed by triangles 3, 7, 11, 15, 19, and 23 as shown in Figure 10, and associated space vectors are given by(5)
V
1
=
V
d
c
3
e
j
k
-
1
π
/
3
=
V
d
c
3
cos
⁡
k
-
1
π
3
sin
⁡
k
-
1
π
3
,
V
2
=
V
d
c
3
e
j
k
π
/
3
=
V
d
c
3
cos
⁡
k
π
3
sin
⁡
k
π
3
⁡
,
V
3
=
V
d
c
√
3
e
j
k
-
0.5
π
/
3
=
V
d
c
√
3
cos
⁡
k
-
0.5
π
3
sin
⁡
k
-
0.5
π
3
.The remaining triangles labeled 4, 8, 12, 16, 20, and 24 form family 4, as shown in Figure 11.Figure 10
Family 3 space vectors.Figure 11
Family 4 space vectors.Family 4V
i expressions are(6)
V
1
=
V
d
c
3
e
j
k
π
/
3
=
V
d
c
3
cos
⁡
k
π
3
sin
⁡
k
π
3
,
V
2
=
2
V
d
c
3
e
j
k
π
/
3
=
2
V
d
c
3
cos
⁡
k
π
3
sin
⁡
k
π
3
,
V
3
=
V
d
c
√
3
e
j
k
-
0.5
π
/
3
=
V
d
c
√
3
cos
⁡
k
-
0.5
π
3
sin
⁡
k
-
0.5
π
3
.


#### 3.2.2.T
i Calculation

T
i correspond to the application time of V
i
,
i
=
1,2
,
3. They are the solutions of the three-level volt-second balance given by(7)
T
1
·
V
1
+
T
2
·
V
2
+
T
3
·
V
3
=
T
S
V
M
·
V
s
∗and verifying(8)
T
1
+
T
2
+
T
3
=
T
S
V
M
.The resolution of (7) and (8) for given V
1, V
2, and V
3 can lead to a potentially complex calculation. But, thanks to the proposed families repartition described above, T
i calculation can be easily performed. As an example, we detail this step for family 2.The substitution of (4) in (7) leads to(9)
T
S
V
M
·
V
s
m
cos
⁡
θ
s
sin
⁡
θ
s
=
V
d
c
3
cos
⁡
k
-
1
π
3
sin
⁡
k
-
1
π
3
·
T
1
+
2
V
d
c
3
cos
⁡
k
-
1
π
3
sin
⁡
k
-
1
π
3
·
T
2
+
V
d
c
3
cos
⁡
k
-
0.5
π
3
sin
⁡
k
-
0.5
π
3
·
T
3
.Consequently,(10)
cos
⁡
θ
s
sin
⁡
θ
s
=
V
d
c
3
T
S
V
M
·
V
s
m
·
B
·
T
1
+
2
T
2
3
·
T
3
,where (11)
B
=
c
o
s
⁡
k
-
1
π
3
c
o
s
⁡
k
-
0.5
π
3
s
i
n
⁡
k
-
1
π
3
s
i
n
⁡
k
-
0.5
π
3
,
B
-
1
=
2
·
sin
⁡
k
-
0.5
π
3
-
cos
⁡
k
-
0.5
π
3
-
sin
⁡
k
-
1
π
3
cos
⁡
k
-
1
π
3
.From (10) and (11) it can be deduced that(12)
T
1
+
2
T
2
=
6
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
k
-
0.5
π
3
cos
⁡
θ
s
-
cos
⁡
k
-
0.5
π
3
sin
⁡
θ
s
,
(13)
T
3
=
2
√
3
T
S
V
M
·
V
s
m
V
d
c
cos
⁡
k
-
1
π
3
sin
⁡
θ
s
-
sin
⁡
k
-
1
π
3
cos
⁡
θ
s
.Equation (13) gives(14)
T
3
=
2
√
3
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
θ
s
-
⁡
k
-
1
π
3
.To simplify T
i expressions, we introduce θ
i defined as(15)
θ
i
=
θ
s
-
k
-
1
π
3
.Considering (15), T
3 final expression is(16)
T
3
=
2
√
3
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
θ
i
.After substituting (15) in (12) one can write(17)
T
1
+
2
T
2
=
6
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
π
6
-
θ
i
.Comparing (7) and (17) gives(18)
T
1
=
6
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
π
6
-
θ
i
-
2
T
2
=
T
S
V
M
-
T
3
-
T
2
.Consequently(19)
T
2
=
6
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
π
6
-
θ
i
-
T
S
V
M
+
T
3
.The final T
i expressions for family 2 are as follows:(20)
T
1
=
T
S
V
M
-
T
3
-
T
2
,
T
2
=
6
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
π
6
-
θ
i
-
T
S
V
M
+
T
3
,
T
3
=
2
√
3
·
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
θ
i
.The same computation method is applied for the remaining 3 families. Consequently, the obtained on-times vectors applications for the 4 families are summarized in Table 1, where(21)
A
=
2
·
3
·
V
s
m
·
T
S
V
M
V
d
c
,
T
k
1
=
A
sin
⁡
π
3
-
θ
i
,
T
k
2
=
A
sin
⁡
θ
i
.Table 1
On-times calculation.
Family
1
2
3
4
T
1
T
k
1
T
S
V
M
-
T
3
-
T
2
T
S
V
M
-
T
k
2
T
S
V
M
-
T
2
-
T
3
T
2
T
k
2
-
T
S
V
M
+
T
k
1
T
S
V
M
-
T
k
1
-
T
S
V
M
+
T
k
2
T
3
T
S
V
M
-
T
1
-
T
2
T
k
2
T
S
V
M
-
T
1
-
T
2
T
k
1


### 3.3. Step  3: Secondary ON-Times Calculation

As explained in Section1, each vector can be reached by multiple PLS. The aim of Step  3 is to choose which PLS has to be activated over its corresponding on-time. Obviously, the inverter performance significantly depends on this PLS management.The aim of the PLS management is to operate with fixed switching frequency: this is easily reachable when each IGBT switches once during a switching period. In fact, for a selected triangle, the available PLS are applied, so they are all used during a switching period and the transition from one PLS to the other requires only one commutation. For example, ifV
s
∗ is localized in triangle 4, the order of application of PLS is(22)
1,1
,
0
⟶
2,1
,
0
⟶
2,2
,
0
⟶
2,2
,
1
⟶
2,2
,
0
⟶
2,1
,
0
⟶
1,1
,
0
.


### 3.4. Step  4: Dispatching withinT
S
V
M

According to the described PLS management strategy, each PLS is realized first by defining the appropriate space vector (V
1, V
2, or V
3). Since the previously calculated on-times T
i are the total application time for the space vector V
i within T
S
V
M, they are evenly spread over the switching period. For example, if V
s
∗ is localized in triangle 4, V
1 (of family 4) is applied 3 times during T
S
V
M, and V
2 and V
3 must be applied twice. Therefore, T
1 is equally divided into 3 time slots: each PLS that generates V
1 is applied during T
1
/
3. T
2 and T
3 are also divided into 2 time slots equal to T
2
/
2 and T
3
/
2, respectively. The resulting control signals of triangle 3 are shown in Figure 12.Figure 12
Switching signals for triangle 3.


## 3.1. Step  1: Localization ofV
s
∗

The aim ofV
s
∗ Localization block is to identify the appropriate three vectors V
i
,
i
=
1,2
,
3, to apply and consequently their corresponding PLS in order to generate an output voltage with a mean value on the switching period equal to the reference voltage. The space vectors needed for the SVM are the nearest three vectors to V
s
∗.In order to localize the reference voltage vector, its module and phase, noted, respectively, asV
s
∗ and θ
s, are used. They are calculated using basic (abc-αβ) transformation.The(
α
,
β
) frame is divided into 6 sectors and 4 quadrants according to Figure 6. This sectorization represents the first step to deduce to which triangle (among the available 24 ones) the reference voltage vector belongs. Once this triangle selected, a lookup table gives the three nearest voltage vectors the inverter must generate.Figure 6
(
α
,
β
) frame sectorization: (a) 4 quadrants; (b) 6 sectors; (c) 24 triangles.
(a)
(b)
(c)Depending on the modulation depthm, specific triangles are used: if 0
<
m
<
0.75, space vector V
s crosses triangles T1, T5, T9, T13, T17, and T21 and if 0.75
<
m
<
1.15, the remaining triangles (T2, T3, T4, T6, T7, T8, T10, T11, T12, T14, T15, T16, T18, T19, T20, T22, T23, and T24) are used. It is to be noted that the modulation index m
=
V
s
∗
/
V
d
c and the maximum modulation index m
=
1.15 is obtained when V
s
∗
=
V
d
c
/
3.


## 3.2. Step  2: Primary ON-Times Calculation

The “Primary ON-Times Calculation” block aims to determine the on-time for each of the three vectorsV
i
,
i
=
1,2
,
3, that is, the activation time over switching period T
S
V
M. Step  2 outputs are as follows:(i)
The corresponding on-timeT
i
,
i
=
1
,
…
,
3, for the three needed vectors the converter has to perform on the next T
S
V
M.
These vectorsV
i
,
i
=
1
,
…
,
3, correspond to the localized triangle’s vertices.
(ii)
The PLS leading to the specified space vectors. The PLS choice affects the converter switching frequency.To perform a rigorous on-times calculation, fine modeling of the three-level converter voltage vectors is needed. The proposed algorithm divides the 24 triangles among 4 families given by Figure7. In fact, the 3 vectors of all the triangles belonging to the same family can be expressed using a unique generic form. Thus, on times are deduced as generic forms depending on the selected family.Figure 7
Triangles division into 4 families.


### 3.2.1.V
i Generic Expressions

Family 1 is formed by triangles 1, 5, 9, 13, 17, and 21 as shown in Figure8. V
1, V
2, and V
3 are represented for each triangle belonging to this family and their expressions are(3)
V
1
=
V
d
c
3
e
j
k
-
1
π
/
3
=
V
d
c
3
cos
⁡
k
-
1
π
3
sin
⁡
k
-
1
π
3
,
V
2
=
V
d
c
3
e
j
k
π
/
3
=
V
d
c
3
cos
⁡
k
π
3
sin
⁡
k
π
3
⁡
,
V
3
=
0
,where k is the sector’s index corresponding to each triangle.Figure 8
Family 1: (a) triangles; (b) zoom on family 1 space vectors.
(a)
(b)Family 2 is formed by triangles 2, 6, 10, 14, 18, and 22, as shown in Figure9.Figure 9
Family 2 space vectors.V
1, V
2, and V
3 corresponding to this family are given by(4)
V
1
=
V
d
c
3
e
j
k
-
1
π
/
3
=
V
d
c
3
cos
⁡
k
-
1
π
3
⁡
sin
⁡
k
-
1
π
3
⁡
,
V
2
=
2
V
d
c
3
e
j
k
-
1
π
/
3
=
2
V
d
c
3
cos
⁡
k
-
1
π
3
⁡
sin
⁡
k
-
1
π
3
⁡
,
V
3
=
V
d
c
√
3
e
j
k
-
0.5
π
/
3
=
V
d
c
√
3
cos
⁡
k
-
0.5
π
3
sin
⁡
k
-
0.5
π
3
⁡
.Family 3 is formed by triangles 3, 7, 11, 15, 19, and 23 as shown in Figure 10, and associated space vectors are given by(5)
V
1
=
V
d
c
3
e
j
k
-
1
π
/
3
=
V
d
c
3
cos
⁡
k
-
1
π
3
sin
⁡
k
-
1
π
3
,
V
2
=
V
d
c
3
e
j
k
π
/
3
=
V
d
c
3
cos
⁡
k
π
3
sin
⁡
k
π
3
⁡
,
V
3
=
V
d
c
√
3
e
j
k
-
0.5
π
/
3
=
V
d
c
√
3
cos
⁡
k
-
0.5
π
3
sin
⁡
k
-
0.5
π
3
.The remaining triangles labeled 4, 8, 12, 16, 20, and 24 form family 4, as shown in Figure 11.Figure 10
Family 3 space vectors.Figure 11
Family 4 space vectors.Family 4V
i expressions are(6)
V
1
=
V
d
c
3
e
j
k
π
/
3
=
V
d
c
3
cos
⁡
k
π
3
sin
⁡
k
π
3
,
V
2
=
2
V
d
c
3
e
j
k
π
/
3
=
2
V
d
c
3
cos
⁡
k
π
3
sin
⁡
k
π
3
,
V
3
=
V
d
c
√
3
e
j
k
-
0.5
π
/
3
=
V
d
c
√
3
cos
⁡
k
-
0.5
π
3
sin
⁡
k
-
0.5
π
3
.


### 3.2.2.T
i Calculation

T
i correspond to the application time of V
i
,
i
=
1,2
,
3. They are the solutions of the three-level volt-second balance given by(7)
T
1
·
V
1
+
T
2
·
V
2
+
T
3
·
V
3
=
T
S
V
M
·
V
s
∗and verifying(8)
T
1
+
T
2
+
T
3
=
T
S
V
M
.The resolution of (7) and (8) for given V
1, V
2, and V
3 can lead to a potentially complex calculation. But, thanks to the proposed families repartition described above, T
i calculation can be easily performed. As an example, we detail this step for family 2.The substitution of (4) in (7) leads to(9)
T
S
V
M
·
V
s
m
cos
⁡
θ
s
sin
⁡
θ
s
=
V
d
c
3
cos
⁡
k
-
1
π
3
sin
⁡
k
-
1
π
3
·
T
1
+
2
V
d
c
3
cos
⁡
k
-
1
π
3
sin
⁡
k
-
1
π
3
·
T
2
+
V
d
c
3
cos
⁡
k
-
0.5
π
3
sin
⁡
k
-
0.5
π
3
·
T
3
.Consequently,(10)
cos
⁡
θ
s
sin
⁡
θ
s
=
V
d
c
3
T
S
V
M
·
V
s
m
·
B
·
T
1
+
2
T
2
3
·
T
3
,where (11)
B
=
c
o
s
⁡
k
-
1
π
3
c
o
s
⁡
k
-
0.5
π
3
s
i
n
⁡
k
-
1
π
3
s
i
n
⁡
k
-
0.5
π
3
,
B
-
1
=
2
·
sin
⁡
k
-
0.5
π
3
-
cos
⁡
k
-
0.5
π
3
-
sin
⁡
k
-
1
π
3
cos
⁡
k
-
1
π
3
.From (10) and (11) it can be deduced that(12)
T
1
+
2
T
2
=
6
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
k
-
0.5
π
3
cos
⁡
θ
s
-
cos
⁡
k
-
0.5
π
3
sin
⁡
θ
s
,
(13)
T
3
=
2
√
3
T
S
V
M
·
V
s
m
V
d
c
cos
⁡
k
-
1
π
3
sin
⁡
θ
s
-
sin
⁡
k
-
1
π
3
cos
⁡
θ
s
.Equation (13) gives(14)
T
3
=
2
√
3
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
θ
s
-
⁡
k
-
1
π
3
.To simplify T
i expressions, we introduce θ
i defined as(15)
θ
i
=
θ
s
-
k
-
1
π
3
.Considering (15), T
3 final expression is(16)
T
3
=
2
√
3
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
θ
i
.After substituting (15) in (12) one can write(17)
T
1
+
2
T
2
=
6
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
π
6
-
θ
i
.Comparing (7) and (17) gives(18)
T
1
=
6
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
π
6
-
θ
i
-
2
T
2
=
T
S
V
M
-
T
3
-
T
2
.Consequently(19)
T
2
=
6
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
π
6
-
θ
i
-
T
S
V
M
+
T
3
.The final T
i expressions for family 2 are as follows:(20)
T
1
=
T
S
V
M
-
T
3
-
T
2
,
T
2
=
6
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
π
6
-
θ
i
-
T
S
V
M
+
T
3
,
T
3
=
2
√
3
·
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
θ
i
.The same computation method is applied for the remaining 3 families. Consequently, the obtained on-times vectors applications for the 4 families are summarized in Table 1, where(21)
A
=
2
·
3
·
V
s
m
·
T
S
V
M
V
d
c
,
T
k
1
=
A
sin
⁡
π
3
-
θ
i
,
T
k
2
=
A
sin
⁡
θ
i
.Table 1
On-times calculation.
Family
1
2
3
4
T
1
T
k
1
T
S
V
M
-
T
3
-
T
2
T
S
V
M
-
T
k
2
T
S
V
M
-
T
2
-
T
3
T
2
T
k
2
-
T
S
V
M
+
T
k
1
T
S
V
M
-
T
k
1
-
T
S
V
M
+
T
k
2
T
3
T
S
V
M
-
T
1
-
T
2
T
k
2
T
S
V
M
-
T
1
-
T
2
T
k
1


## 3.2.1.V
i Generic Expressions

Family 1 is formed by triangles 1, 5, 9, 13, 17, and 21 as shown in Figure8. V
1, V
2, and V
3 are represented for each triangle belonging to this family and their expressions are(3)
V
1
=
V
d
c
3
e
j
k
-
1
π
/
3
=
V
d
c
3
cos
⁡
k
-
1
π
3
sin
⁡
k
-
1
π
3
,
V
2
=
V
d
c
3
e
j
k
π
/
3
=
V
d
c
3
cos
⁡
k
π
3
sin
⁡
k
π
3
⁡
,
V
3
=
0
,where k is the sector’s index corresponding to each triangle.Figure 8
Family 1: (a) triangles; (b) zoom on family 1 space vectors.
(a)
(b)Family 2 is formed by triangles 2, 6, 10, 14, 18, and 22, as shown in Figure9.Figure 9
Family 2 space vectors.V
1, V
2, and V
3 corresponding to this family are given by(4)
V
1
=
V
d
c
3
e
j
k
-
1
π
/
3
=
V
d
c
3
cos
⁡
k
-
1
π
3
⁡
sin
⁡
k
-
1
π
3
⁡
,
V
2
=
2
V
d
c
3
e
j
k
-
1
π
/
3
=
2
V
d
c
3
cos
⁡
k
-
1
π
3
⁡
sin
⁡
k
-
1
π
3
⁡
,
V
3
=
V
d
c
√
3
e
j
k
-
0.5
π
/
3
=
V
d
c
√
3
cos
⁡
k
-
0.5
π
3
sin
⁡
k
-
0.5
π
3
⁡
.Family 3 is formed by triangles 3, 7, 11, 15, 19, and 23 as shown in Figure 10, and associated space vectors are given by(5)
V
1
=
V
d
c
3
e
j
k
-
1
π
/
3
=
V
d
c
3
cos
⁡
k
-
1
π
3
sin
⁡
k
-
1
π
3
,
V
2
=
V
d
c
3
e
j
k
π
/
3
=
V
d
c
3
cos
⁡
k
π
3
sin
⁡
k
π
3
⁡
,
V
3
=
V
d
c
√
3
e
j
k
-
0.5
π
/
3
=
V
d
c
√
3
cos
⁡
k
-
0.5
π
3
sin
⁡
k
-
0.5
π
3
.The remaining triangles labeled 4, 8, 12, 16, 20, and 24 form family 4, as shown in Figure 11.Figure 10
Family 3 space vectors.Figure 11
Family 4 space vectors.Family 4V
i expressions are(6)
V
1
=
V
d
c
3
e
j
k
π
/
3
=
V
d
c
3
cos
⁡
k
π
3
sin
⁡
k
π
3
,
V
2
=
2
V
d
c
3
e
j
k
π
/
3
=
2
V
d
c
3
cos
⁡
k
π
3
sin
⁡
k
π
3
,
V
3
=
V
d
c
√
3
e
j
k
-
0.5
π
/
3
=
V
d
c
√
3
cos
⁡
k
-
0.5
π
3
sin
⁡
k
-
0.5
π
3
.


## 3.2.2.T
i Calculation

T
i correspond to the application time of V
i
,
i
=
1,2
,
3. They are the solutions of the three-level volt-second balance given by(7)
T
1
·
V
1
+
T
2
·
V
2
+
T
3
·
V
3
=
T
S
V
M
·
V
s
∗and verifying(8)
T
1
+
T
2
+
T
3
=
T
S
V
M
.The resolution of (7) and (8) for given V
1, V
2, and V
3 can lead to a potentially complex calculation. But, thanks to the proposed families repartition described above, T
i calculation can be easily performed. As an example, we detail this step for family 2.The substitution of (4) in (7) leads to(9)
T
S
V
M
·
V
s
m
cos
⁡
θ
s
sin
⁡
θ
s
=
V
d
c
3
cos
⁡
k
-
1
π
3
sin
⁡
k
-
1
π
3
·
T
1
+
2
V
d
c
3
cos
⁡
k
-
1
π
3
sin
⁡
k
-
1
π
3
·
T
2
+
V
d
c
3
cos
⁡
k
-
0.5
π
3
sin
⁡
k
-
0.5
π
3
·
T
3
.Consequently,(10)
cos
⁡
θ
s
sin
⁡
θ
s
=
V
d
c
3
T
S
V
M
·
V
s
m
·
B
·
T
1
+
2
T
2
3
·
T
3
,where (11)
B
=
c
o
s
⁡
k
-
1
π
3
c
o
s
⁡
k
-
0.5
π
3
s
i
n
⁡
k
-
1
π
3
s
i
n
⁡
k
-
0.5
π
3
,
B
-
1
=
2
·
sin
⁡
k
-
0.5
π
3
-
cos
⁡
k
-
0.5
π
3
-
sin
⁡
k
-
1
π
3
cos
⁡
k
-
1
π
3
.From (10) and (11) it can be deduced that(12)
T
1
+
2
T
2
=
6
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
k
-
0.5
π
3
cos
⁡
θ
s
-
cos
⁡
k
-
0.5
π
3
sin
⁡
θ
s
,
(13)
T
3
=
2
√
3
T
S
V
M
·
V
s
m
V
d
c
cos
⁡
k
-
1
π
3
sin
⁡
θ
s
-
sin
⁡
k
-
1
π
3
cos
⁡
θ
s
.Equation (13) gives(14)
T
3
=
2
√
3
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
θ
s
-
⁡
k
-
1
π
3
.To simplify T
i expressions, we introduce θ
i defined as(15)
θ
i
=
θ
s
-
k
-
1
π
3
.Considering (15), T
3 final expression is(16)
T
3
=
2
√
3
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
θ
i
.After substituting (15) in (12) one can write(17)
T
1
+
2
T
2
=
6
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
π
6
-
θ
i
.Comparing (7) and (17) gives(18)
T
1
=
6
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
π
6
-
θ
i
-
2
T
2
=
T
S
V
M
-
T
3
-
T
2
.Consequently(19)
T
2
=
6
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
π
6
-
θ
i
-
T
S
V
M
+
T
3
.The final T
i expressions for family 2 are as follows:(20)
T
1
=
T
S
V
M
-
T
3
-
T
2
,
T
2
=
6
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
π
6
-
θ
i
-
T
S
V
M
+
T
3
,
T
3
=
2
√
3
·
T
S
V
M
·
V
s
m
V
d
c
sin
⁡
θ
i
.The same computation method is applied for the remaining 3 families. Consequently, the obtained on-times vectors applications for the 4 families are summarized in Table 1, where(21)
A
=
2
·
3
·
V
s
m
·
T
S
V
M
V
d
c
,
T
k
1
=
A
sin
⁡
π
3
-
θ
i
,
T
k
2
=
A
sin
⁡
θ
i
.Table 1
On-times calculation.
Family
1
2
3
4
T
1
T
k
1
T
S
V
M
-
T
3
-
T
2
T
S
V
M
-
T
k
2
T
S
V
M
-
T
2
-
T
3
T
2
T
k
2
-
T
S
V
M
+
T
k
1
T
S
V
M
-
T
k
1
-
T
S
V
M
+
T
k
2
T
3
T
S
V
M
-
T
1
-
T
2
T
k
2
T
S
V
M
-
T
1
-
T
2
T
k
1


## 3.3. Step  3: Secondary ON-Times Calculation

As explained in Section1, each vector can be reached by multiple PLS. The aim of Step  3 is to choose which PLS has to be activated over its corresponding on-time. Obviously, the inverter performance significantly depends on this PLS management.The aim of the PLS management is to operate with fixed switching frequency: this is easily reachable when each IGBT switches once during a switching period. In fact, for a selected triangle, the available PLS are applied, so they are all used during a switching period and the transition from one PLS to the other requires only one commutation. For example, ifV
s
∗ is localized in triangle 4, the order of application of PLS is(22)
1,1
,
0
⟶
2,1
,
0
⟶
2,2
,
0
⟶
2,2
,
1
⟶
2,2
,
0
⟶
2,1
,
0
⟶
1,1
,
0
.


## 3.4. Step  4: Dispatching withinT
S
V
M

According to the described PLS management strategy, each PLS is realized first by defining the appropriate space vector (V
1, V
2, or V
3). Since the previously calculated on-times T
i are the total application time for the space vector V
i within T
S
V
M, they are evenly spread over the switching period. For example, if V
s
∗ is localized in triangle 4, V
1 (of family 4) is applied 3 times during T
S
V
M, and V
2 and V
3 must be applied twice. Therefore, T
1 is equally divided into 3 time slots: each PLS that generates V
1 is applied during T
1
/
3. T
2 and T
3 are also divided into 2 time slots equal to T
2
/
2 and T
3
/
2, respectively. The resulting control signals of triangle 3 are shown in Figure 12.Figure 12
Switching signals for triangle 3.


## 4. Simulation Results

The three-level NPC converter is simulated using PSIM software, where the converter is connected to an RL load, as shown in Figure13. Simulation parameters are presented in Table 2.Table 2
Simulation parameters.
Item
Value
Switching frequencyT
S
V
M
50µs
DC link voltage
540 V
Line frequency
50 Hz
Load resistorR
10 Ω
Load inductorL
2 mHFigure 13
Space vector’s sector and triangle form
=
0.37.As mentioned in Section3.1, the triangles covered by the space vector reference depend on the modulation depth m. Figure 13 shows the sectors and triangles covered by the space vector for a reference magnitude equal to 100 V. Thus, modulation depth m is equal to m
=
100
/
270
=
0.37.Form
=
0.37, when the space vector is circulating in sector 1 (2, 3, 4, 5, and 6, resp.), the triangle containing the space vector is T1 (T5, T9, T13, T17, and T21, resp.). It is to be noted that all of the 6 triangles are covered during 20 ms, corresponding to the reference voltage’s frequency of 50 Hz.Similarly, Figure14 presents the sectors and triangles covered by the space vector when the reference magnitude is equal to 250; that is, m
=
0.92.Figure 14
Space vector’s sector and triangle form
=
0.92.The lookup table implemented on PSIM generates the appropriate control signals depending on the selected sector and triangle. Figure15 presents the converter’s control signals when the reference space vector is in triangle 3 and the resulting phase voltage. It is seen in Figure 15(b) that the proposed sequencing of the PLS ensures that the phase level (consequently voltage level) changes only once per commutation cell.Figure 15
Triangle 3 simulation results: (a) control signals; (b) 3 phases output voltages.In order to validate the converter performances of the proposed scheme, the output line currents are presented in Figure16. Maximum magnitude is equal to 28 A. Line-to-line and phase leg voltages are shown in Figure 17. The expected multilevel waveforms insure the power quality improvement. This is illustrated by line a current spectrum given in Figure 18. THD value is estimated to be 0.69%. On this spectrum, the main harmonic is equal to 20 kHz which corresponds to the switching frequency f
s
w.Figure 16
Output line currents.Figure 17
NPC voltages: (a) simple phase voltage; (b) line-to-line voltage.
(a)
(b)Figure 18
(a) Line a current spectral analysis; (b) zoom around 20 kHz; (c) zoom around 40 kHz.It is to be noted that, thanks to the proposed SVM strategy, the converter’s switching frequencyf
c is constant. Moreover, when the modulation depth m is greater than 0.575, f
c is almost equal to 50% of f
s
w. Thus, the analysis of the whole switching signals proves that each IGBT switches once per T
s
w, during almost half of the reference period. For example, for switching signal SC1, it switches once per T
s
w, if the vector V
s belongs to triangles T2, T3, T4, T6, T7, T19, T20, T22, T23, and T24. When V
s belongs to T8, T10, T11, T12, T14, T15, T16, and T18, SC1 does not switch.This leads to a mean switching frequency ofT
s
w
/
2. Figure 19 gives the simulated switching frequency of the three converter legs. A 20 ms window is used to perform the switching frequency calculation.Figure 19
NPC legs switching frequencies: (a) leg a; (b) leg b; (c) leg c.
(a)
(b)
(c)Switching frequencyf
s
w of one leg is presented as the average of f
s
w of the IGBTs in the same leg. They are calculated as(23)
f
s
w
-
a
=
f
s
w
1
+
f
s
w
2
2
,
f
s
w
-
b
=
f
s
w
3
+
f
s
w
4
2
,
f
s
w
-
c
=
f
s
w
5
+
f
s
w
6
2
,where f
s
w
i is the switching frequency of IGBTi.f
s
w
-
a
(
f
s
w
-
b and f
s
w
-
c, resp.) is leg a (leg b and leg c, resp.) switching frequency.It is shown in Figure18 that f
s
w for each leg is a constant equal to 10.4 kHz. The additional 400 Hz compared to the SVM design (one commutation per IGBT within one T
S
V
M) is due to the V
s transition from one triangle to another.


## 5. Experimental Results

The proposed algorithm is experimentally tested. A 4 kW three-phase three-level NPC converter laboratory prototype was conceived as shown in Figure20. The setup parameters are listed in Table 3. The power devices are the F3L150R07W2E3_B11 from Infineon. The proposed modulation method is implemented with a TI TMS320F2809 DSP.Table 3
Parameters of the 3-phase 3-level NPC converter.
Item
Value
Rated active power
4 kW
Switching frequency
20 kHz
Line frequency
50 Hz
DC link voltage
400 V
Line current amplitude
10 AFigure 20
The experimental setup.Figure21 shows the triangles crossed by V
s for different modulation depths. When m
<
0.5, V
s crosses 6 triangles which are T1, T5, T9, T13, T17, and T21 (Figure 21(a)). When m
>
0.5, V
s crosses the remaining triangles (Figure 21(b)).Figure 21
SVM triangles when (a)m
<
0.5 and (b) m
>
0.5.
(a)
(b)Figure22 shows the steady state waveforms of the line-to-line voltages and line a current.Figure 22
Line-to-line voltages and line a current.The spectral analysis of the line current given in Figure23 shows that first carrier harmonics appear at 20 kHz and then 40 kHz according to theoretical and simulation investigations.Figure 23
Spectral analysis of line a current.Figure24 shows the control signals of one commutation cell of leg a during two switching periods. The control signals are complementary, and the IGBTs switch once per period.Figure 24
Leg a commutation cell control signals.


## 6. Conclusion

This paper proposes a Space Vector Modulation (SVM) technique for a three-level NPC converter. The proposed method consists in dividing the space vector diagram into four categories leading to a simple nearest three-vector detection and on-times calculation. Moreover, the choice of the converter Phase Level Sequence is used as an extra degree of freedom in order to control the converter’s switching frequency. In fact, once the vectors to apply are detected, their corresponding Phase Level Sequences are dispatched among the SVM period such that they are all applied and the transition from one PLS to the following requires only one commutation. This SVM can be extended to higher levels if the space vector diagram available triangles are appropriately defined.The proposed methodology is verified by simulation and through a 4 kW experimental test bed: the resulting output currents show a constant switching frequency and a reduced current THD. For applications such as renewable energies, this is a valuable improvement since it reduces the commutation power losses and lowers the output and grid connection filters size.



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*Source: 6478751-2016-07-14.xml*