# Novel Modulation Method for Multidirectional Matrix Converter

Authors: Saman Toosi; Norhisam Misron; Tsuyoshi Hanamoto; Ishak Bin Aris; Mohd Amran Mohd Radzi; Hiroaki Yamada
Journal: The Scientific World Journal
 (2014)

---

## Abstract

This study presents a new modulation method for multidirectional matrix converter (MDMC), based on the direct duty ratio pulse width modulation (DDPWM). In this study, a new structure of MDMC has been proposed to control the power flow direction through the stand-alone battery based system and hybrid vehicle. The modulation method acts based on the average voltage over one switching period concept. Therefore, in order to determine the duty ratio for each switch, the instantaneous input voltages are captured and compared with triangular waveform continuously. By selecting the proper switching pattern and changing the slope of the carriers, the sinusoidal input current can be synthesized with high power factor and desired output voltage. The proposed system increases the discharging time of the battery by injecting the power to the system from the generator and battery at the same time. Thus, it makes the battery life longer and saves more energy. This paper also derived necessary equation for proposed modulation method as well as detail of analysis and modulation algorithm. The theoretical and modulation concepts presented have been verified in MATLAB simulation.


---

## Body

## 1. Introduction

More than 1.3 billion people in the world are not connected to a national grid. Although extension of the conventional electricity grid remains preferable mode of electrification, it is not economical for areas where the grid extension is difficult. Currently the stand-alone power system (SAPS) supplies local villages or individual users with lack access to electricity. Typical SAPS may be powered by one or more methods such as microhydroturbine, wind turbine, solar panel geothermal source, and diesel or biofuel generator to generate the electricity [1].A major requirement for stand-alone power system is to ensure continuous power flow by storing excess energy from the energy sources. For example, hybrid systems with battery storage are employed as an efficient and reliable stand-alone system for remote areas [2]. Battery based systems (BBS) are amongst the SAPS models which a battery may employ in series or parallel with renewable energy source. In battery based systems, the input power of the system converts to desirable voltage and frequency through power electronic converters in order to supply the system loads and charge the battery [3, 4].In recent years, the matrix converter becomes popular in the category of AC to AC converters due to the desirable features such as sinusoidal input and output current, generation of load voltage with arbitrary amplitude and frequency, and ability to control input power factor for any load [5]. In the early 1980s Venturini and Alesina proposed the principle of MC control [6]. They derived duty ratio functions that can be modulated by carrier signal. In this method, the voltage transfer ratio was limited to 0.5. Alesina and Venturini (1981) theoretically proved that the maximum voltage ratio, q
max
⁡, is equal to 0.866 for the three-phase MC when using balanced input voltage [7]. In 1989, Alesina and Venturini extended the voltage ratio from 0.5 to 0.866 by taking advantage of third harmonic injection methods [8].The “indirect transfer function” was derived by Rodriguez in 1983 [9]. In this method, the matrix converter was described as virtual configuration of pulse with modulation (PWM) rectifier and inverter with “fictitious dc link.” The operational and technological research on MC were continued in different areas such as new topology of MC [10–13], input filter design [14, 15], unbalance operational conditions [16–18], safe and practical commutation strategies [10, 19], new control methods [20, 21], new modulation methods [22, 23], and new application such as hybrid vehicles [24].Yoon and Sul (2006) [23] proposed new carrier based modulation methods for conventional matrix converter. This method is the same as conventional space vector pulse modulation (SVPWM) which is used in voltage source inverter. Yoon and Sul synthesized the sinusoidal input current with unity power factor by changing the slope of carrier and the proper offset voltage. The reference output voltages are calculated and compared with a discontinuous carrier to generate the gating signals. However, it is difficult to intuitively understand the modulation principle since it employs the offset for references and discontinues carrier signal. Furthermore, this method cannot be used for the MC typologies with a neutral connection.The preliminary concepts of a new carrier based PWM strategy, named direct duty ratio PWM (DDPWM), are presented by Li et al. (2008). This method can be implemented without complex calculations and lookup tables and does not require the reference offset voltage. Based on the average value of each output phase in one switching period, the duty ratio values may be updated at each switching cycle by employing input phase voltages. Thus, the PWM signals are generated by comparison of these duty ratio values with a continuous triangular carrier waveform. Theq
max
⁡ of 0.866 also can be easily obtained in the three-phase system by applying the third harmonic injection method to the output voltage references. Furthermore, the input power factor can be controlled by changing the slope of the carrier while maintaining the sinusoidal input currents [22]. Li and Choi (2009) extended the DDPWM to various topologies of matrix converter and derived the control schemes for alternative structures such as single-phase and three-phase four-leg matrix converters [25].Multidirectional converter has recently been proposed as an alternative power conversion concept which has both rectifier and inverter capability [26, 27]. Most desired features of multidirectional converter can be fulfilled by using Matrix Converter structures. In the MDMC, a bidirectional switch is used, coupled between the power source and load, to provide both AC and DC properties, which cannot be achieved with conventional converters. This converter has ability to control the power flow and synthesise the desired output voltage by developing the space vector pulse width modulation (SVPWM) methods. In the SVPWM method, the modulation task of the multidirectional matrix converter can be resolved into the different imaginary stages of transformation including inverter and rectifier stage which are linked together by an imaginary DC link. However, the MDMC is not being able to inject power from generator and battery at the same time, since several vectors are utilized in one switching period [28]. Previous studies [29–31] show that, in conventional battery based system, generator should be disconnected from system when it is not being able to supply the demand power.Based on the literature highlighted above, this study aims to inject power from battery and generator at the same time by changing the MDMC structure and increasing the number of time intervals of direct duty pulse width modulation method. In this study, the proposed modulation method determines the switching state of each output phase by employing the input DC phase voltages and input AC phase voltages based on per-output-phase average concept over one switching period. At the first step of each switching period, in order to generate the corresponding PWM signals, the duty ratio values for each output phase were calculated and the results compared the continuous triangular waveform. This new topology and new modulation method can increase the discharging time of battery in the battery based systems when the discharging time is directly proportional to the generator output voltage. Therefore, the multidirectional matrix converter with a new modulation method is expected to breakthrough towards new technological advancements in the area of sustainable energy and power electronics.


## 2. Proposed MDMC Structure for Battery Based System

Batteries are not efficient as a whole. Some energy is lost as heat and chemical reactions when charging and discharging. In common, the lead acid battery’s efficiency is around 85%  when state of charge (SOC) is varied from 0 to 100% [32]. In battery based stand-alone power system (BBSAPS), when the battery is connected in series, total electricity generation from system will be stored in battery before transmitting to the loads, while in system with parallel battery connection only the excess electricity will be saved in battery. Hence, a system with parallel battery connection is more efficient compared to a system with series battery connection. In addition, the parallel battery based system can be modified by combining all converters as a single converter which is indicated as multidirectional matrix converter. Figure 1 shows the comparison of block diagram of BBSs with matrix converter and the proposed MDMC system.Block diagram of system with parallel battery connection.
(a)
BBS with matrix converter
(b)
BBS with multidirectional matrix converterThe multidirectional matrix converter is a single-stage converter which has am
×
n matrix (or array) of bidirectional power switches to connect an m-phase voltage source to an n-phase load directly. In general, the proposed MDMC needs 15 bidirectional switches that is one switch between each input and output phases. Figure 2 shows the circuit configuration of proposed MDMC including the positive DC input voltage (battery), negative DC input voltage (battery), three-phase input voltages (AC generator), multidirectional matrix converter and resistor-inductor (R-L) load, and second-order L-C filter which is used at the input terminals to filter out the high frequency harmonics of the input currents. In this study the R
L
-dc and L
L
-dc and the R
L
-ac and L
L
-ac are considered as DC and AC load, respectively.Figure 2
Multidirectional matrix converter circuit.In the MDMC, the switching method should have sinusoidal waveforms at the arbitrary magnitude, frequency in AC side, and clean DC voltage at the DC side. The input currents also should be sinusoidal at the desired power factor. In order to achieve this target, a proper switching pattern should be applied to the switches of the MDMC in each switching period. The general switching function for the switches of the MDMC can be described as follows:(1)
S
i
j
(
t
)
=
{
1
,
S
i
j
closed
,
0
,
S
i
j
open
,
i
=
a
,
b
,
c
,
P
,
N
j
=
R
,
S
,
T
,
where the S
i
j refers to the switch on input line “i” and output line “j.”Moreover, input phases should not be short circuited and output phases should never be opened due to the inductive nature of typical loads. In this study, these two constraints can be expressed as below:(2)
S
a
j
+
S
b
j
+
S
c
j
+
S
P
j
+
S
N
j
=
1
,
j
=
{
R
,
S
,
T
}
.
By considering two states for each switch in (1) and by applying the limitation of (2) to the switching algorithms of the proposed MDMC, allowable combinations will be derived based on the DDPWM technique. Voltages and currents of sources and voltages and currents of load in Figure 2 can be expressed as vectors that are defined by (3) where the X can be input and output phase-to-neutral voltage vectors or the MDMC input and output current vectors:
(3)
X
-
R
S
T
=
[
X
R
(
t
)
X
S
(
t
)
X
T
(
t
)
]
,
X
-
a
b
c
P
N
=
[
X
a
(
t
)
X
b
(
t
)
X
c
(
t
)
X
P
(
t
)
X
N
(
t
)
]
.
The MDMC instantaneous switching function matrix can be expressed as follows:
(4)
S
=
[
s
a
R
s
b
R
s
c
R
s
P
R
s
N
R
s
a
S
s
b
S
s
c
S
s
P
S
s
N
S
s
a
T
s
b
T
s
c
T
s
P
T
s
N
T
]
.
Equation (5) shows the relation between load, input voltages, and currents, where S
T is the transpose matrix of S matrix:
(5)
V
-
R
S
T
=
S
·
v
-
a
b
c
P
N
,
i
-
a
b
c
P
N
=
S
T
·
i
-
R
S
T
.
Modulation rules can be derived by applying the different switching pattern to the power switches (see Figure 3).Figure 3
The switching pattern in a sequence period.As indicated in Figure3, the output phase “R” is connected to the input phase “a” during t
a
R and when T
s is the sequence period of switching for MDMC system. It is also connected to phase “b,” “c,” “P,” and “N” during time periods t
b
R, t
c
R, t
P
R, t
N
R, respectively. Arbitrary amplitude and frequency can be generated by modulating the duty cycle of the switches using their respective switching functions.Ifd
i
j
(
t
)
=
t
i
j
/
T
seq, the restrictions of the duty cycle (based on (2)) can be represented as below:
(6)
0
≤
d
i
j
≤
1
,
d
a
j
+
d
b
j
+
d
c
j
+
d
P
j
+
d
N
j
=
1
,
i
∈
(
a
,
b
,
c
,
P
,
N
)
,
j
∈
(
R
,
S
,
T
)
.
The matrix S can be replaced by matrix D
(
3
×
5
) and finally the low frequency transfer matrix is defined as below:
(7)
v
R
S
T
-
=
D
·
v
a
b
c
P
N
-
,
i
a
b
c
P
N
-
=
D
T
·
i
R
S
T
-
,
where i
R
S
T and v
R
S
T are a set of sinusoidal currents and arbitrary amplitude, frequency output voltages, and v
a
b
c
P
N and i
a
b
c
P
N are sinusoidal input voltages and input currents at the MDMC terminals.


## 3. Modulation Method

In this modulation method, reference output phase voltage can be synthesized by utilizing all five input phase voltages over one switching period in the average sense. Therefore, the switching periodT
s is divided into two time periods, T
c and T
3. During T
c, the input phases of AC generator are connected to a corresponding output terminal, and during T
3 the input phases of DC battery are connected to a corresponding output terminal. In addition, the time interval T
c is divided into two periods T
1 and T
2. Also, the MX, MD, and MN denote the instantaneous values of maximum, medium, and minimum input voltages of AC generator. Furthermore, POS and NEG denote the instantaneous values of positive and negative input voltages of DC battery, respectively. During T
1, the line-to-line voltage between MX and MN is used, which is the maximum line-to-line voltage among three line-to-line input voltages of generator at the sampling instant. During T
2, the second maximum line-to-line voltage is used which is MX to MD for switching pattern-I and MD to MN for switching pattern-II. Finally, during T
3 the line-to-line voltage between POS and NEG is employed.In this method, the three line-to-line input voltages of the generator and the input voltages of batteries are read continuously at the sampling instant. Then, duty ratio values (range between 0 and 1) are predetermined for each output phase at the beginning of each switching period. Also, the duty ratio of each phase is compared with a common continuous triangular carrier waveform, in order to generate the corresponding six time subintervals (see Figure4). These six time subintervals determine the connection time of the corresponding output terminal to the input phases during one switching cycle. Therefore, the desired output voltage can be synthesized by updating the duty ratio value during each switching period. In addition, the input power factor can be controlled by manipulating the slopes of the triangular carriers. Due to the time subintervals extension, this method is called extended direct duty pulse width modulation (EDDPWM).Figure 4
OutputR-phase switching state in switching pattern-I.


### 3.1. Switching Pattern-I

Figure4 shows the switching pattern-I, where the R-phase duty ratio value (
d
R
1
) is compared with triangular carrier waveform to generate the R-phase output voltage. The output phase is changed during the switching pattern-I from MN → MX → MX → MD → NEG → POS, consequently. The actual output voltage merge of R-phase is illustrated in Figure 6 when applying switching pattern-I. As illustrated in Figures 4 and 6, the output phase “R” is connected to the input phase “MN” during T
R
1 and when T
s is the sequence switching period. And it is connected to phases “MX,” “MX,” “MD,” “NEG,” and “POS” during time periods T
R
2, T
R
3, T
R
4, T
R
5, and T
R
6, respectively. These six time subintervals can be represented as (8), where d
R
1 is the R-phase duty ratio value and carrier slops are defined as m
=
T
1
/
T
c and n
=
T
c
/
T
s:
(8)
T
R
1
=
d
R
1
m
n
T
s
,
T
R
2
=
(
1
-
d
R
1
)
m
n
T
s
,
T
R
3
=
(
1
-
d
R
1
)
(
1
-
m
)
n
T
s
,
T
R
4
=
d
R
1
(
1
-
m
)
n
T
s
,
T
R
5
=
d
R
1
(
1
-
n
)
T
s
,
T
R
6
=
(
1
-
d
R
1
)
(
1
-
n
)
T
s
.
The fluctuation of the input voltage is negligible during the switching periods. Thus, the integration of the output voltage v
o
R over T
s can be expressed in
(9)
∫
0
T
s
v
o
R
d
t
≅
T
R
1
·
MN
+
(
T
R
2
+
T
R
3
)
·
MX
+
T
R
4
MD
+
T
R
5
·
NEG
+
T
R
6
·
POS.
Based on (8) and (9), the average output voltage can be expressed in terms of m and n as follows:
(10)
v
-
O
R
=
1
T
s
∫
0
T
s
v
o
R
d
t
≅
d
R
1
·
(
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
)
+
n
·
MX
-
(
1
-
n
)
·
POS.
For the present switching cycle, the duty ratio value, d
R
1, can be written as follows:
(11)
d
R
1
=
(
v
o
R
*
-
n
·
MX
-
(
1
-
n
)
·
POS
)
×
(
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
)
-
1
,
where the v
o
R
* is the R-phase output voltage command which is equal to the v
-
O
R.


### 3.2. Switching Pattern-II

The procedure to drive the equation for switching pattern II is the same as the previous switching pattern. Figure5 illustrates the case of switching pattern II where the R-phase duty ratio value (
d
R
2
) is compared with triangular carrier waveform to generate the R-phase output voltage. The output phase is changed during the switching pattern-II from MN → MX → MD → MN → NEG → POS, consequently. The actual output voltage merge of R-phase is illustrated in Figure 7 when the output phase “R” is connected to the input phases during the time subintervals sequentially. Similarly, the integration of the output voltage v
o
R and the average output voltage v
-
O
R is presented as below:
(12)
∫
0
T
s
v
o
R
d
t
≅
(
T
R
1
+
T
R
4
)
·
MN
+
T
R
2
·
MX
+
T
R
3
MD
+
T
R
5
·
NEG
+
T
R
6
·
POS,
v
-
O
R
=
1
T
s
∫
0
T
s
v
o
R
d
t
≅
d
R
2
·
(
-
(
1
-
n
)
POS
-
m
n
·
MX
-
(
1
-
m
)
·
n
·
MD
+
n
·
MN
+
(
1
-
n
)
·
NEG
)
+
(
1
-
n
)
·
POS
-
m
·
n
·
MX
+
(
1
-
m
)
·
n
·
MD.
By letting the v
-
O
R be equal to v
o
R
* the duty ratio value d
R
2 can be written as follows:
(13)
d
R
2
=
(
v
o
R
*
-
n
·
MX
-
(
1
-
n
)
·
POS
)
×
(
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
)
-
1
.Figure 5
OutputR-phase switching state in switching pattern-II.Figure 6
OutputR-phase voltage synthesis in switching pattern-I.Figure 7
OutputR-phase voltage synthesis in switching pattern-II.


### 3.3. Outputs Voltage Merged for MDMC

Five bidirectional switches are used for each output phase to apply the switching pattern-I and II. The POS and NEG input phase are always constant while the MX, MD, and MN are selected by instantaneous comparison of the AC input phases. When the switching state for output phase “R” is POS, NEG, MX, MD, or MN, the output phase “R” is connected to the input phase which the voltage is POS, NEG, MX, MD, or MN, respectively. This modulation control method can be applied to the MDMC as a modular structure for each phase where each output phase has the independent reference control signal. This reference control signal can be different in terms of frequency, waveform shape, and amplitude.The duty ratio of phasesS and T is indicated as d
S and d
T and can be derived in the same way of phase R by letting the v
-
O
S and v
-
O
T be equal to the S and T phase voltage command v
o
S
* and v
o
T
*, respectively. Duty ratio of phases can be expressed as follows:(14)
d
R
=
{
v
o
R
*
-
n
·
MX
-
(
1
-
n
)
·
POS
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
,
for
Pattern-I
,
v
o
R
*
-
n
·
MX
-
(
1
-
n
)
·
POS
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
,
for
pattern-II
,
d
S
=
{
v
o
S
*
-
n
·
MX
-
(
1
-
n
)
·
POS
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
,
for
Pattern-I
,
v
o
S
*
-
n
·
MX
-
(
1
-
n
)
·
POS
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
,
for
pattern-II
,
d
T
=
{
v
o
T
*
-
n
·
MX
-
(
1
-
n
)
·
POS
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
,
for
Pattern-I
,
v
o
T
*
-
n
·
MX
-
(
1
-
n
)
·
POS
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
,
for
pattern-II
.In the proposed method, the output voltages have been well synthesised by using two out of five line-to-line input voltages during each switching period, while the input currents are distorted. In order to improve the input current quality and reduce the input currents distortion, five input phases conducted the current during each switching period.


### 3.4. Inputs Current Merged for MDMC

Then and m can properly be adjusted to reduce the input current distortion in (14). This current distortion can be reduced by controlling the input power factor which is directly depending on the slope of the triangular carrier. By maintaining the T
s at a constant value and adjusting the value of n and m to the desired value, the input current is synthesized. The output voltage waveform will not be disturbed since n and m are considered in the derivation of (14).The output currents are almost constant during the switching cycles; thus the input current can be merged based on the PWM switching pattern. These six time subintervals for each phase can be expressed as follows:(15)
T
X
1
=
d
X
m
n
T
s
=
d
X
T
1
,
T
X
2
=
(
1
-
d
X
)
m
n
T
s
=
(
1
-
d
X
)
T
1
,
T
X
3
=
(
1
-
d
X
)
(
1
-
m
)
n
T
s
=
(
1
-
d
X
)
T
2
,
T
X
4
=
d
X
(
1
-
m
)
n
T
s
=
d
X
T
2
,
T
X
5
=
d
X
(
1
-
n
)
T
s
=
d
X
T
3
,
T
X
6
=
(
1
-
d
X
)
(
1
-
n
)
T
s
=
(
1
-
d
X
)
T
3
,
X
=
R
,
S
,
T
.


#### 3.4.1. Switching Pattern-I

Five inputs are connected to the output terminal through the bidirectional switches. According to the switching state as shown in Figures4 and 6, the output phases R, S, and T during T
R
1, T
S
1, and T
T
1, are connected to the input phase whose voltage is MN. In the same way, the input phase MX is connected to the output phases R, S, and T during (
T
R
2
+
T
R
3
), (
T
S
2
+
T
S
3
), and (
T
T
2
+
T
T
3
), respectively, and the input phase MD is connected to the output terminals R, S, and T during T
R
4, T
S
4, and T
T
4, respectively. In addition, the input phase NEG is connected to the output terminals R, S, and T during T
R
5, T
S
5, and T
T
5, respectively, and input phase POS is connected to the output terminals R, S, and T during T
R
6, T
S
6, and T
T
6, respectively. By applying the average concept to each input phase, the input current can be presented as follows:
(16)
i
s
MX
T
s
=
(
T
R
2
+
T
R
3
)
i
o
R
+
(
T
S
2
+
T
S
3
)
i
o
S
+
(
T
T
2
+
T
T
3
)
i
o
T
,
i
s
MD
T
s
=
T
R
4
i
o
R
+
T
S
4
i
o
S
+
T
T
4
i
o
T
,
i
s
MN
T
s
=
T
R
1
i
o
R
+
T
S
1
i
o
S
+
T
T
1
i
o
T
,
i
s
NEG
T
s
=
T
R
5
i
o
R
+
T
S
5
i
o
S
+
T
T
5
i
o
T
,
i
s
POS
T
s
=
T
R
6
i
o
R
+
T
S
6
i
o
S
+
T
T
6
i
o
T
.
By substituting (15) into (16), the instants value of the input phase current during one switching cycle can be obtained as follows:
(17)
i
s
MX
T
s
=
-
T
c
·
(
d
R
i
o
R
+
d
S
i
o
S
+
d
T
i
o
T
)
,
(18)
i
s
MD
T
s
=
T
2
·
(
d
R
i
o
R
+
d
S
i
o
S
+
d
T
i
o
T
)
,
(19)
i
s
MN
T
s
=
T
1
·
(
d
R
i
o
R
+
d
S
i
o
S
+
d
T
i
o
T
)
,
(20)
i
s
NEG
T
s
=
T
3
·
(
d
R
i
o
R
+
d
S
i
o
S
+
d
T
i
o
T
)
,
(21)
i
s
POS
T
s
=
-
T
3
·
(
d
R
i
o
R
+
d
S
i
o
S
+
d
T
i
o
T
)
.
By substituting (19) into (17), the m can be obtained as follows:
(22)
m
≡
T
1
T
c
=
-
i
s
MN
i
s
MX
.
Also, by calculating the i
s
MX
·
T
s based on (
i
s
MX
+
i
s
POS
)
·
T
C, the n can be obtained as below:
(23)
n
≡
T
c
T
s
=
i
s
MX
(
i
s
MX
+
i
s
POS
)
.


#### 3.4.2. Switching Pattern-II

Like switching pattern-I, by applying the switching pattern-II which is indicated in Figures5 and 7, input phase MX is connected to the output phases R, S, T during time subinterval T
R
2, T
S
2, and T
T
2, respectively. Similarly, the input phase MD is connected to the output phases R, S, and T during T
R
3, T
S
3, and T
T
3, respectively and the input phase MN is connected to the output phases R, S, and T during (
T
R
1
+
T
R
4
), (
T
S
1
+
T
S
4
), and (
T
T
1
+
T
T
4
), respectively. Finally, the input phase NEG is connected to the output terminals R, S, and T during T
R
5, T
S
5, and T
T
5, respectively, and input phase POS is connected to the output terminals R, S, and T during T
R
6, T
S
6, and T
T
6, respectively. The input currents can be presented as follows:
(24)
i
s
MX
T
s
=
T
R
2
i
o
R
+
T
S
2
i
o
S
+
T
T
2
i
o
T
,
(25)
i
s
MD
T
s
=
T
R
3
i
o
R
+
T
S
3
i
o
S
+
T
T
3
i
o
T
,
(26)
i
s
MN
T
s
=
(
T
R
1
+
T
R
4
)
i
o
R
+
(
T
S
1
+
T
S
4
)
i
o
S
+
(
T
T
1
+
T
T
4
)
i
o
T
,
(27)
i
s
NEG
T
s
=
T
R
5
i
o
R
+
T
S
5
i
o
S
+
T
T
5
i
o
T
,
(28)
i
s
POS
T
s
=
T
R
6
i
o
R
+
T
S
6
i
o
S
+
T
T
6
i
o
T
.
By considering the time intervals for T
s and substituting (26) into (24), the m can be represented as follows:
(29)
m
≡
T
1
T
c
=
-
i
s
MX
i
s
MN
.
In addition, by calculating the i
s
MX
·
T
s based on (
i
s
MX
+
i
s
POS
)
·
T
C, the n can be obtained as below:
(30)
n
≡
T
c
T
s
=
i
s
MN
(
i
s
MN
-
i
s
POS
)
.
Furthermore, when the power factor is one in balance system, the currents i
s
MN, i
s
MX, and i
s
POS can be replaced by voltages v
s
MN, v
s
MX, and v
s
POS (see (22), (23), (29), and (30)). As the input voltage is directly sensed from the power circuit, the modulation calculation becomes easier.To achieve unity power factor, load can be assumed as current source in one switching cycle; accordingly, input current can be synthesized based on the switching state of the output phase current. The magnitude of each input current varied based on the ratio betweenT
1 and T
2 and ratio between T
c and T
3 while T
s is constant. On the other hand, due to the missing of the energy storage component in MDMC, the input and output powers should be kept balanced all the time at any load. The practical selection of n and m for switching pattern-I and II can be determined by the input voltage angle α
i, to synthesize sinusoidal input current.The three-phase input voltages signal shown in Figure8 is divided into the 6 segments and each segment is divided into two sectors which correspond to either switching pattern-I or II. By letting the power factor of system equal to φ, the input current angle can be obtained as follows:
(31)
β
i
=
α
i
+
φ
.
In the proposed modulation, input power factor is controlled by adjusting the value of n and m (Table 1). Based on the available maximum line-to-line voltage, the range of duty ratio is changed during time intervals T
1 and T
2. The range of available voltage ratio during the T
1 is higher than T
2. Therefore, the desired value of m is varied from 0.5 to 1 in each sector to reach the maximum power of input source. In Table 1, the D
=
v
s
MX
/
(
v
s
MX
+
v
s
POS
) indicates the magnitude variation of n, where v
s
MX is nominal value of generator input voltage.Table 1
Determination ofn and m based on the input voltage sector.
Sector
n
Uniformity
M
Uniformity
I-2
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
)
/
sin
⁡
(
β
i
-
2
π
/
3
)
1–0.5 down
II-2
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
)
)
/
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
0.5–1 up
II-1
sin
⁡
⁡
(
β
i
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
)
1–0.5 down
III-1
sin
⁡
⁡
(
β
i
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
)
0.5–1 up
III-2
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
)
)
/
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
1–0.5 down
IV-2
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
0.5–1 up
IV-1
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
1–0.5 down
V-1
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
)
)
/
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
0.5–1 up
V-2
sin
⁡
⁡
(
β
i
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
)
1–0.5 down
VI-2
sin
⁡
⁡
(
β
i
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
)
0.5–1 up
VI-1
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
)
)
/
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
1–0.5 down
I-1
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
0.5–1 upFigure 8
Interval voltage sector based on the input voltage (α
i).


## 3.1. Switching Pattern-I

Figure4 shows the switching pattern-I, where the R-phase duty ratio value (
d
R
1
) is compared with triangular carrier waveform to generate the R-phase output voltage. The output phase is changed during the switching pattern-I from MN → MX → MX → MD → NEG → POS, consequently. The actual output voltage merge of R-phase is illustrated in Figure 6 when applying switching pattern-I. As illustrated in Figures 4 and 6, the output phase “R” is connected to the input phase “MN” during T
R
1 and when T
s is the sequence switching period. And it is connected to phases “MX,” “MX,” “MD,” “NEG,” and “POS” during time periods T
R
2, T
R
3, T
R
4, T
R
5, and T
R
6, respectively. These six time subintervals can be represented as (8), where d
R
1 is the R-phase duty ratio value and carrier slops are defined as m
=
T
1
/
T
c and n
=
T
c
/
T
s:
(8)
T
R
1
=
d
R
1
m
n
T
s
,
T
R
2
=
(
1
-
d
R
1
)
m
n
T
s
,
T
R
3
=
(
1
-
d
R
1
)
(
1
-
m
)
n
T
s
,
T
R
4
=
d
R
1
(
1
-
m
)
n
T
s
,
T
R
5
=
d
R
1
(
1
-
n
)
T
s
,
T
R
6
=
(
1
-
d
R
1
)
(
1
-
n
)
T
s
.
The fluctuation of the input voltage is negligible during the switching periods. Thus, the integration of the output voltage v
o
R over T
s can be expressed in
(9)
∫
0
T
s
v
o
R
d
t
≅
T
R
1
·
MN
+
(
T
R
2
+
T
R
3
)
·
MX
+
T
R
4
MD
+
T
R
5
·
NEG
+
T
R
6
·
POS.
Based on (8) and (9), the average output voltage can be expressed in terms of m and n as follows:
(10)
v
-
O
R
=
1
T
s
∫
0
T
s
v
o
R
d
t
≅
d
R
1
·
(
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
)
+
n
·
MX
-
(
1
-
n
)
·
POS.
For the present switching cycle, the duty ratio value, d
R
1, can be written as follows:
(11)
d
R
1
=
(
v
o
R
*
-
n
·
MX
-
(
1
-
n
)
·
POS
)
×
(
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
)
-
1
,
where the v
o
R
* is the R-phase output voltage command which is equal to the v
-
O
R.


## 3.2. Switching Pattern-II

The procedure to drive the equation for switching pattern II is the same as the previous switching pattern. Figure5 illustrates the case of switching pattern II where the R-phase duty ratio value (
d
R
2
) is compared with triangular carrier waveform to generate the R-phase output voltage. The output phase is changed during the switching pattern-II from MN → MX → MD → MN → NEG → POS, consequently. The actual output voltage merge of R-phase is illustrated in Figure 7 when the output phase “R” is connected to the input phases during the time subintervals sequentially. Similarly, the integration of the output voltage v
o
R and the average output voltage v
-
O
R is presented as below:
(12)
∫
0
T
s
v
o
R
d
t
≅
(
T
R
1
+
T
R
4
)
·
MN
+
T
R
2
·
MX
+
T
R
3
MD
+
T
R
5
·
NEG
+
T
R
6
·
POS,
v
-
O
R
=
1
T
s
∫
0
T
s
v
o
R
d
t
≅
d
R
2
·
(
-
(
1
-
n
)
POS
-
m
n
·
MX
-
(
1
-
m
)
·
n
·
MD
+
n
·
MN
+
(
1
-
n
)
·
NEG
)
+
(
1
-
n
)
·
POS
-
m
·
n
·
MX
+
(
1
-
m
)
·
n
·
MD.
By letting the v
-
O
R be equal to v
o
R
* the duty ratio value d
R
2 can be written as follows:
(13)
d
R
2
=
(
v
o
R
*
-
n
·
MX
-
(
1
-
n
)
·
POS
)
×
(
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
)
-
1
.Figure 5
OutputR-phase switching state in switching pattern-II.Figure 6
OutputR-phase voltage synthesis in switching pattern-I.Figure 7
OutputR-phase voltage synthesis in switching pattern-II.


## 3.3. Outputs Voltage Merged for MDMC

Five bidirectional switches are used for each output phase to apply the switching pattern-I and II. The POS and NEG input phase are always constant while the MX, MD, and MN are selected by instantaneous comparison of the AC input phases. When the switching state for output phase “R” is POS, NEG, MX, MD, or MN, the output phase “R” is connected to the input phase which the voltage is POS, NEG, MX, MD, or MN, respectively. This modulation control method can be applied to the MDMC as a modular structure for each phase where each output phase has the independent reference control signal. This reference control signal can be different in terms of frequency, waveform shape, and amplitude.The duty ratio of phasesS and T is indicated as d
S and d
T and can be derived in the same way of phase R by letting the v
-
O
S and v
-
O
T be equal to the S and T phase voltage command v
o
S
* and v
o
T
*, respectively. Duty ratio of phases can be expressed as follows:(14)
d
R
=
{
v
o
R
*
-
n
·
MX
-
(
1
-
n
)
·
POS
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
,
for
Pattern-I
,
v
o
R
*
-
n
·
MX
-
(
1
-
n
)
·
POS
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
,
for
pattern-II
,
d
S
=
{
v
o
S
*
-
n
·
MX
-
(
1
-
n
)
·
POS
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
,
for
Pattern-I
,
v
o
S
*
-
n
·
MX
-
(
1
-
n
)
·
POS
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
,
for
pattern-II
,
d
T
=
{
v
o
T
*
-
n
·
MX
-
(
1
-
n
)
·
POS
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
,
for
Pattern-I
,
v
o
T
*
-
n
·
MX
-
(
1
-
n
)
·
POS
-
(
1
-
n
)
POS
-
n
·
MX
+
(
1
-
m
)
·
n
·
MD
+
m
·
n
·
MN
+
(
1
-
n
)
·
NEG
,
for
pattern-II
.In the proposed method, the output voltages have been well synthesised by using two out of five line-to-line input voltages during each switching period, while the input currents are distorted. In order to improve the input current quality and reduce the input currents distortion, five input phases conducted the current during each switching period.


## 3.4. Inputs Current Merged for MDMC

Then and m can properly be adjusted to reduce the input current distortion in (14). This current distortion can be reduced by controlling the input power factor which is directly depending on the slope of the triangular carrier. By maintaining the T
s at a constant value and adjusting the value of n and m to the desired value, the input current is synthesized. The output voltage waveform will not be disturbed since n and m are considered in the derivation of (14).The output currents are almost constant during the switching cycles; thus the input current can be merged based on the PWM switching pattern. These six time subintervals for each phase can be expressed as follows:(15)
T
X
1
=
d
X
m
n
T
s
=
d
X
T
1
,
T
X
2
=
(
1
-
d
X
)
m
n
T
s
=
(
1
-
d
X
)
T
1
,
T
X
3
=
(
1
-
d
X
)
(
1
-
m
)
n
T
s
=
(
1
-
d
X
)
T
2
,
T
X
4
=
d
X
(
1
-
m
)
n
T
s
=
d
X
T
2
,
T
X
5
=
d
X
(
1
-
n
)
T
s
=
d
X
T
3
,
T
X
6
=
(
1
-
d
X
)
(
1
-
n
)
T
s
=
(
1
-
d
X
)
T
3
,
X
=
R
,
S
,
T
.


### 3.4.1. Switching Pattern-I

Five inputs are connected to the output terminal through the bidirectional switches. According to the switching state as shown in Figures4 and 6, the output phases R, S, and T during T
R
1, T
S
1, and T
T
1, are connected to the input phase whose voltage is MN. In the same way, the input phase MX is connected to the output phases R, S, and T during (
T
R
2
+
T
R
3
), (
T
S
2
+
T
S
3
), and (
T
T
2
+
T
T
3
), respectively, and the input phase MD is connected to the output terminals R, S, and T during T
R
4, T
S
4, and T
T
4, respectively. In addition, the input phase NEG is connected to the output terminals R, S, and T during T
R
5, T
S
5, and T
T
5, respectively, and input phase POS is connected to the output terminals R, S, and T during T
R
6, T
S
6, and T
T
6, respectively. By applying the average concept to each input phase, the input current can be presented as follows:
(16)
i
s
MX
T
s
=
(
T
R
2
+
T
R
3
)
i
o
R
+
(
T
S
2
+
T
S
3
)
i
o
S
+
(
T
T
2
+
T
T
3
)
i
o
T
,
i
s
MD
T
s
=
T
R
4
i
o
R
+
T
S
4
i
o
S
+
T
T
4
i
o
T
,
i
s
MN
T
s
=
T
R
1
i
o
R
+
T
S
1
i
o
S
+
T
T
1
i
o
T
,
i
s
NEG
T
s
=
T
R
5
i
o
R
+
T
S
5
i
o
S
+
T
T
5
i
o
T
,
i
s
POS
T
s
=
T
R
6
i
o
R
+
T
S
6
i
o
S
+
T
T
6
i
o
T
.
By substituting (15) into (16), the instants value of the input phase current during one switching cycle can be obtained as follows:
(17)
i
s
MX
T
s
=
-
T
c
·
(
d
R
i
o
R
+
d
S
i
o
S
+
d
T
i
o
T
)
,
(18)
i
s
MD
T
s
=
T
2
·
(
d
R
i
o
R
+
d
S
i
o
S
+
d
T
i
o
T
)
,
(19)
i
s
MN
T
s
=
T
1
·
(
d
R
i
o
R
+
d
S
i
o
S
+
d
T
i
o
T
)
,
(20)
i
s
NEG
T
s
=
T
3
·
(
d
R
i
o
R
+
d
S
i
o
S
+
d
T
i
o
T
)
,
(21)
i
s
POS
T
s
=
-
T
3
·
(
d
R
i
o
R
+
d
S
i
o
S
+
d
T
i
o
T
)
.
By substituting (19) into (17), the m can be obtained as follows:
(22)
m
≡
T
1
T
c
=
-
i
s
MN
i
s
MX
.
Also, by calculating the i
s
MX
·
T
s based on (
i
s
MX
+
i
s
POS
)
·
T
C, the n can be obtained as below:
(23)
n
≡
T
c
T
s
=
i
s
MX
(
i
s
MX
+
i
s
POS
)
.


### 3.4.2. Switching Pattern-II

Like switching pattern-I, by applying the switching pattern-II which is indicated in Figures5 and 7, input phase MX is connected to the output phases R, S, T during time subinterval T
R
2, T
S
2, and T
T
2, respectively. Similarly, the input phase MD is connected to the output phases R, S, and T during T
R
3, T
S
3, and T
T
3, respectively and the input phase MN is connected to the output phases R, S, and T during (
T
R
1
+
T
R
4
), (
T
S
1
+
T
S
4
), and (
T
T
1
+
T
T
4
), respectively. Finally, the input phase NEG is connected to the output terminals R, S, and T during T
R
5, T
S
5, and T
T
5, respectively, and input phase POS is connected to the output terminals R, S, and T during T
R
6, T
S
6, and T
T
6, respectively. The input currents can be presented as follows:
(24)
i
s
MX
T
s
=
T
R
2
i
o
R
+
T
S
2
i
o
S
+
T
T
2
i
o
T
,
(25)
i
s
MD
T
s
=
T
R
3
i
o
R
+
T
S
3
i
o
S
+
T
T
3
i
o
T
,
(26)
i
s
MN
T
s
=
(
T
R
1
+
T
R
4
)
i
o
R
+
(
T
S
1
+
T
S
4
)
i
o
S
+
(
T
T
1
+
T
T
4
)
i
o
T
,
(27)
i
s
NEG
T
s
=
T
R
5
i
o
R
+
T
S
5
i
o
S
+
T
T
5
i
o
T
,
(28)
i
s
POS
T
s
=
T
R
6
i
o
R
+
T
S
6
i
o
S
+
T
T
6
i
o
T
.
By considering the time intervals for T
s and substituting (26) into (24), the m can be represented as follows:
(29)
m
≡
T
1
T
c
=
-
i
s
MX
i
s
MN
.
In addition, by calculating the i
s
MX
·
T
s based on (
i
s
MX
+
i
s
POS
)
·
T
C, the n can be obtained as below:
(30)
n
≡
T
c
T
s
=
i
s
MN
(
i
s
MN
-
i
s
POS
)
.
Furthermore, when the power factor is one in balance system, the currents i
s
MN, i
s
MX, and i
s
POS can be replaced by voltages v
s
MN, v
s
MX, and v
s
POS (see (22), (23), (29), and (30)). As the input voltage is directly sensed from the power circuit, the modulation calculation becomes easier.To achieve unity power factor, load can be assumed as current source in one switching cycle; accordingly, input current can be synthesized based on the switching state of the output phase current. The magnitude of each input current varied based on the ratio betweenT
1 and T
2 and ratio between T
c and T
3 while T
s is constant. On the other hand, due to the missing of the energy storage component in MDMC, the input and output powers should be kept balanced all the time at any load. The practical selection of n and m for switching pattern-I and II can be determined by the input voltage angle α
i, to synthesize sinusoidal input current.The three-phase input voltages signal shown in Figure8 is divided into the 6 segments and each segment is divided into two sectors which correspond to either switching pattern-I or II. By letting the power factor of system equal to φ, the input current angle can be obtained as follows:
(31)
β
i
=
α
i
+
φ
.
In the proposed modulation, input power factor is controlled by adjusting the value of n and m (Table 1). Based on the available maximum line-to-line voltage, the range of duty ratio is changed during time intervals T
1 and T
2. The range of available voltage ratio during the T
1 is higher than T
2. Therefore, the desired value of m is varied from 0.5 to 1 in each sector to reach the maximum power of input source. In Table 1, the D
=
v
s
MX
/
(
v
s
MX
+
v
s
POS
) indicates the magnitude variation of n, where v
s
MX is nominal value of generator input voltage.Table 1
Determination ofn and m based on the input voltage sector.
Sector
n
Uniformity
M
Uniformity
I-2
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
)
/
sin
⁡
(
β
i
-
2
π
/
3
)
1–0.5 down
II-2
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
)
)
/
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
0.5–1 up
II-1
sin
⁡
⁡
(
β
i
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
)
1–0.5 down
III-1
sin
⁡
⁡
(
β
i
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
)
0.5–1 up
III-2
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
)
)
/
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
1–0.5 down
IV-2
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
0.5–1 up
IV-1
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
1–0.5 down
V-1
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
)
)
/
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
0.5–1 up
V-2
sin
⁡
⁡
(
β
i
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
)
1–0.5 down
VI-2
sin
⁡
⁡
(
β
i
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
)
0.5–1 up
VI-1
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
)
)
/
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
1–0.5 down
I-1
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
0.5–1 upFigure 8
Interval voltage sector based on the input voltage (α
i).


## 3.4.1. Switching Pattern-I

Five inputs are connected to the output terminal through the bidirectional switches. According to the switching state as shown in Figures4 and 6, the output phases R, S, and T during T
R
1, T
S
1, and T
T
1, are connected to the input phase whose voltage is MN. In the same way, the input phase MX is connected to the output phases R, S, and T during (
T
R
2
+
T
R
3
), (
T
S
2
+
T
S
3
), and (
T
T
2
+
T
T
3
), respectively, and the input phase MD is connected to the output terminals R, S, and T during T
R
4, T
S
4, and T
T
4, respectively. In addition, the input phase NEG is connected to the output terminals R, S, and T during T
R
5, T
S
5, and T
T
5, respectively, and input phase POS is connected to the output terminals R, S, and T during T
R
6, T
S
6, and T
T
6, respectively. By applying the average concept to each input phase, the input current can be presented as follows:
(16)
i
s
MX
T
s
=
(
T
R
2
+
T
R
3
)
i
o
R
+
(
T
S
2
+
T
S
3
)
i
o
S
+
(
T
T
2
+
T
T
3
)
i
o
T
,
i
s
MD
T
s
=
T
R
4
i
o
R
+
T
S
4
i
o
S
+
T
T
4
i
o
T
,
i
s
MN
T
s
=
T
R
1
i
o
R
+
T
S
1
i
o
S
+
T
T
1
i
o
T
,
i
s
NEG
T
s
=
T
R
5
i
o
R
+
T
S
5
i
o
S
+
T
T
5
i
o
T
,
i
s
POS
T
s
=
T
R
6
i
o
R
+
T
S
6
i
o
S
+
T
T
6
i
o
T
.
By substituting (15) into (16), the instants value of the input phase current during one switching cycle can be obtained as follows:
(17)
i
s
MX
T
s
=
-
T
c
·
(
d
R
i
o
R
+
d
S
i
o
S
+
d
T
i
o
T
)
,
(18)
i
s
MD
T
s
=
T
2
·
(
d
R
i
o
R
+
d
S
i
o
S
+
d
T
i
o
T
)
,
(19)
i
s
MN
T
s
=
T
1
·
(
d
R
i
o
R
+
d
S
i
o
S
+
d
T
i
o
T
)
,
(20)
i
s
NEG
T
s
=
T
3
·
(
d
R
i
o
R
+
d
S
i
o
S
+
d
T
i
o
T
)
,
(21)
i
s
POS
T
s
=
-
T
3
·
(
d
R
i
o
R
+
d
S
i
o
S
+
d
T
i
o
T
)
.
By substituting (19) into (17), the m can be obtained as follows:
(22)
m
≡
T
1
T
c
=
-
i
s
MN
i
s
MX
.
Also, by calculating the i
s
MX
·
T
s based on (
i
s
MX
+
i
s
POS
)
·
T
C, the n can be obtained as below:
(23)
n
≡
T
c
T
s
=
i
s
MX
(
i
s
MX
+
i
s
POS
)
.


## 3.4.2. Switching Pattern-II

Like switching pattern-I, by applying the switching pattern-II which is indicated in Figures5 and 7, input phase MX is connected to the output phases R, S, T during time subinterval T
R
2, T
S
2, and T
T
2, respectively. Similarly, the input phase MD is connected to the output phases R, S, and T during T
R
3, T
S
3, and T
T
3, respectively and the input phase MN is connected to the output phases R, S, and T during (
T
R
1
+
T
R
4
), (
T
S
1
+
T
S
4
), and (
T
T
1
+
T
T
4
), respectively. Finally, the input phase NEG is connected to the output terminals R, S, and T during T
R
5, T
S
5, and T
T
5, respectively, and input phase POS is connected to the output terminals R, S, and T during T
R
6, T
S
6, and T
T
6, respectively. The input currents can be presented as follows:
(24)
i
s
MX
T
s
=
T
R
2
i
o
R
+
T
S
2
i
o
S
+
T
T
2
i
o
T
,
(25)
i
s
MD
T
s
=
T
R
3
i
o
R
+
T
S
3
i
o
S
+
T
T
3
i
o
T
,
(26)
i
s
MN
T
s
=
(
T
R
1
+
T
R
4
)
i
o
R
+
(
T
S
1
+
T
S
4
)
i
o
S
+
(
T
T
1
+
T
T
4
)
i
o
T
,
(27)
i
s
NEG
T
s
=
T
R
5
i
o
R
+
T
S
5
i
o
S
+
T
T
5
i
o
T
,
(28)
i
s
POS
T
s
=
T
R
6
i
o
R
+
T
S
6
i
o
S
+
T
T
6
i
o
T
.
By considering the time intervals for T
s and substituting (26) into (24), the m can be represented as follows:
(29)
m
≡
T
1
T
c
=
-
i
s
MX
i
s
MN
.
In addition, by calculating the i
s
MX
·
T
s based on (
i
s
MX
+
i
s
POS
)
·
T
C, the n can be obtained as below:
(30)
n
≡
T
c
T
s
=
i
s
MN
(
i
s
MN
-
i
s
POS
)
.
Furthermore, when the power factor is one in balance system, the currents i
s
MN, i
s
MX, and i
s
POS can be replaced by voltages v
s
MN, v
s
MX, and v
s
POS (see (22), (23), (29), and (30)). As the input voltage is directly sensed from the power circuit, the modulation calculation becomes easier.To achieve unity power factor, load can be assumed as current source in one switching cycle; accordingly, input current can be synthesized based on the switching state of the output phase current. The magnitude of each input current varied based on the ratio betweenT
1 and T
2 and ratio between T
c and T
3 while T
s is constant. On the other hand, due to the missing of the energy storage component in MDMC, the input and output powers should be kept balanced all the time at any load. The practical selection of n and m for switching pattern-I and II can be determined by the input voltage angle α
i, to synthesize sinusoidal input current.The three-phase input voltages signal shown in Figure8 is divided into the 6 segments and each segment is divided into two sectors which correspond to either switching pattern-I or II. By letting the power factor of system equal to φ, the input current angle can be obtained as follows:
(31)
β
i
=
α
i
+
φ
.
In the proposed modulation, input power factor is controlled by adjusting the value of n and m (Table 1). Based on the available maximum line-to-line voltage, the range of duty ratio is changed during time intervals T
1 and T
2. The range of available voltage ratio during the T
1 is higher than T
2. Therefore, the desired value of m is varied from 0.5 to 1 in each sector to reach the maximum power of input source. In Table 1, the D
=
v
s
MX
/
(
v
s
MX
+
v
s
POS
) indicates the magnitude variation of n, where v
s
MX is nominal value of generator input voltage.Table 1
Determination ofn and m based on the input voltage sector.
Sector
n
Uniformity
M
Uniformity
I-2
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
)
/
sin
⁡
(
β
i
-
2
π
/
3
)
1–0.5 down
II-2
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
)
)
/
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
0.5–1 up
II-1
sin
⁡
⁡
(
β
i
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
)
1–0.5 down
III-1
sin
⁡
⁡
(
β
i
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
)
0.5–1 up
III-2
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
)
)
/
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
1–0.5 down
IV-2
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
0.5–1 up
IV-1
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
1–0.5 down
V-1
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
)
)
/
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
0.5–1 up
V-2
sin
⁡
⁡
(
β
i
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
)
1–0.5 down
VI-2
sin
⁡
⁡
(
β
i
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
)
0.5–1 up
VI-1
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
)
)
/
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
1–0.5 down
I-1
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
3
2
D to D
(
-
sin
⁡
⁡
(
β
i
-
2
π
/
3
)
)
/
sin
⁡
⁡
(
β
i
+
2
π
/
3
)
0.5–1 upFigure 8
Interval voltage sector based on the input voltage (α
i).


## 4. Simulation Result

Simulation of the proposed modulation method for MDMC is performed by using MATLAB software. The system has been investigated to synthesize the voltage and current in two conditions, when the input voltage of generatorV
s
-RMS is bigger than the battery voltage V
s
-dc and vice versa. The switching period T
s is assumed to be 200 μs in all conditions.


### 4.1. Condition I

In this condition the line-to-neutral voltage of generatorV
s
-RMS is bigger than the battery voltage V
s
-dc and battery’s charging (
SOC
) is equal to 50%. Thus, the power is injected from generator to the AC and DC loads. Simulation parameters for condition (I) are shown in Table 2.Table 2
Simulation parameter.
R
-
L load
R
=
5 Ω, L
=
10 mH
Input voltage(line-to-neutral) V
s
-RMS
56 V
Battery voltage(line-to-neutral) V
s
-dc
±48 V
Output voltage(line-to-neutral) V
o
-RMS
28 V
Voltage ratioq
0.5
Input frequencyf
s
60 Hz
Output frequencyf
o
50 HzIn point of view of power transferring, when the battery voltageV
s
-dc is less than the line to-neutral voltage of generator V
s
-RMS whole load’s power demand is supplied by the generator. Thus, the time interval T
3 is equal to zero and voltage ratio is varied based on the value of generator’s voltage.


#### 4.1.1. Voltage Synthesizing

In voltage synthesizing situation, the slopes of triangular waveforms are constant. Therefore, the time intervals are considered to be 100μs for T
1 and T
2. Figure 9 illustrates the output line-to-neutral voltage v
o
R which is connected to the AC load and AC output current i
o
R. Figure 10 represents the output line-to-line voltage v
o
S
T which is connected to the DC loads and DC output current i
o
R. The red line in the expand graph indicated the switching pulse waveform.Figure 9
AC voltage and current output waveform by voltage synthesizing.Figure 10
DC voltage and current output waveform by voltage synthesizing.Figure11 shows the input phase voltage v
s
a and filtered input current i
s
a in steady state. The simulation results revealed that the proposed modulation method is capable of synthesizing the output voltages while the distortion on the input current is visible in Figure 11.Figure 11
Input voltage and current waveform by voltage synthesizing.


#### 4.1.2. Current Synthesizing

By changing the slope of the triangular carriers which is related to the value ofm, power factor has been controlled and the sinusoidal input currents have been synthesised. Figures 12 and 13 show the output AC output voltage/current waveform and DC output voltage/current waveform, respectively.Figure 12
AC voltage and current output waveform by current synthesizing.Figure 13
DC voltage and current output waveform by current synthesizing.Figure14 shows the input phase voltage v
s
a and filtered input current i
s
a in current synthesizing mode. The simulation result in Figure 14 shows that the current input is well merged when there is no additional distortion in output voltage. The simulation result for output waveform also shows that the power factor has been controlled and unity power factor almost achieved.Figure 14
Input voltage and current waveform by current synthesizing.


### 4.2. Condition II

In the second condition when theV
s
-RMS is less than battery voltage (
V
s
-dc
) and state of charge of battery’s is SOC = 95%, power will be injected from generator and battery to the AC load at the same time. The switching sequence is assumed to be T
s
=
200
μ
s. All simulation parameters are the same as parameters in Table 2, except the input voltage (line-to-neutral) V
s
-RMS, which is equal to 20
V
RMS in this condition. In condition II, the voltage ratio (
q
) is independent of the generator input voltage. The power of the generator which is transferred to the load will be determined by the differences between V
s
-RMS and V
s
-dc.


#### 4.2.1. Voltage Synthesizing

In this mode, the slopes of triangular waveforms are constant. Therefore, the time intervals are considered to beT
1
=
T
2
=
50
μ
s, T
3
=
100
μ
s. Figure 15 illustrated the average output line-to-neutral voltage v
o
R which is connected to the AC load, R-phase output current i
o
R, input phase voltage v
s
a, and filtered input current i
s
a. The simulation results showed that the proposed modulation method is able to well synthesize the output voltages, while the distortion on the input current is visible.Figure 15
Simulation result by voltage synthesizing.


#### 4.2.2. Current Synthesising

By changing the slope of the triangular carriers (n and m) based on Table 2, power factor has been controlled and the sinusoidal input currents have been synthesised. The simulation result in Figure 16 shows that the current input is well merged when there is no additional distortion in output voltage. The result indicated that the power factor has been controlled and unity power factor almost achieved.Figure 16
Simulation result by current synthesizing.


### 4.3. Current Control

In order to test the system stability, reference current is changed in AC and DC sides while the loads are constant. Figure17 shows the simulated responses of MDMC system when the current is changed in AC and DC side at t
=
0.05 and t
=
0.07
s, respectively.Figure 17
Output currents waveform during load variation.Figure17 shows that the current in i
o
S and i
o
T is constant at t
=
0.05 regardless of the changing in i
o
R which is increased by 0.2 pu. In addition, when the DC reference current reduced by 0.2
pu, the current in AC side remains constant at t
=
0.07
s.It can be clearly seen from Figure17 that the system is able to track the variation of reference current, and current output of each terminals is completely independent of other output current terminals. Moreover, the simulation results exhibited that the undershoot/overshoot and steady-state error for output currents is acceptable for low power battery based system.


## 4.1. Condition I

In this condition the line-to-neutral voltage of generatorV
s
-RMS is bigger than the battery voltage V
s
-dc and battery’s charging (
SOC
) is equal to 50%. Thus, the power is injected from generator to the AC and DC loads. Simulation parameters for condition (I) are shown in Table 2.Table 2
Simulation parameter.
R
-
L load
R
=
5 Ω, L
=
10 mH
Input voltage(line-to-neutral) V
s
-RMS
56 V
Battery voltage(line-to-neutral) V
s
-dc
±48 V
Output voltage(line-to-neutral) V
o
-RMS
28 V
Voltage ratioq
0.5
Input frequencyf
s
60 Hz
Output frequencyf
o
50 HzIn point of view of power transferring, when the battery voltageV
s
-dc is less than the line to-neutral voltage of generator V
s
-RMS whole load’s power demand is supplied by the generator. Thus, the time interval T
3 is equal to zero and voltage ratio is varied based on the value of generator’s voltage.


### 4.1.1. Voltage Synthesizing

In voltage synthesizing situation, the slopes of triangular waveforms are constant. Therefore, the time intervals are considered to be 100μs for T
1 and T
2. Figure 9 illustrates the output line-to-neutral voltage v
o
R which is connected to the AC load and AC output current i
o
R. Figure 10 represents the output line-to-line voltage v
o
S
T which is connected to the DC loads and DC output current i
o
R. The red line in the expand graph indicated the switching pulse waveform.Figure 9
AC voltage and current output waveform by voltage synthesizing.Figure 10
DC voltage and current output waveform by voltage synthesizing.Figure11 shows the input phase voltage v
s
a and filtered input current i
s
a in steady state. The simulation results revealed that the proposed modulation method is capable of synthesizing the output voltages while the distortion on the input current is visible in Figure 11.Figure 11
Input voltage and current waveform by voltage synthesizing.


### 4.1.2. Current Synthesizing

By changing the slope of the triangular carriers which is related to the value ofm, power factor has been controlled and the sinusoidal input currents have been synthesised. Figures 12 and 13 show the output AC output voltage/current waveform and DC output voltage/current waveform, respectively.Figure 12
AC voltage and current output waveform by current synthesizing.Figure 13
DC voltage and current output waveform by current synthesizing.Figure14 shows the input phase voltage v
s
a and filtered input current i
s
a in current synthesizing mode. The simulation result in Figure 14 shows that the current input is well merged when there is no additional distortion in output voltage. The simulation result for output waveform also shows that the power factor has been controlled and unity power factor almost achieved.Figure 14
Input voltage and current waveform by current synthesizing.


## 4.1.1. Voltage Synthesizing

In voltage synthesizing situation, the slopes of triangular waveforms are constant. Therefore, the time intervals are considered to be 100μs for T
1 and T
2. Figure 9 illustrates the output line-to-neutral voltage v
o
R which is connected to the AC load and AC output current i
o
R. Figure 10 represents the output line-to-line voltage v
o
S
T which is connected to the DC loads and DC output current i
o
R. The red line in the expand graph indicated the switching pulse waveform.Figure 9
AC voltage and current output waveform by voltage synthesizing.Figure 10
DC voltage and current output waveform by voltage synthesizing.Figure11 shows the input phase voltage v
s
a and filtered input current i
s
a in steady state. The simulation results revealed that the proposed modulation method is capable of synthesizing the output voltages while the distortion on the input current is visible in Figure 11.Figure 11
Input voltage and current waveform by voltage synthesizing.


## 4.1.2. Current Synthesizing

By changing the slope of the triangular carriers which is related to the value ofm, power factor has been controlled and the sinusoidal input currents have been synthesised. Figures 12 and 13 show the output AC output voltage/current waveform and DC output voltage/current waveform, respectively.Figure 12
AC voltage and current output waveform by current synthesizing.Figure 13
DC voltage and current output waveform by current synthesizing.Figure14 shows the input phase voltage v
s
a and filtered input current i
s
a in current synthesizing mode. The simulation result in Figure 14 shows that the current input is well merged when there is no additional distortion in output voltage. The simulation result for output waveform also shows that the power factor has been controlled and unity power factor almost achieved.Figure 14
Input voltage and current waveform by current synthesizing.


## 4.2. Condition II

In the second condition when theV
s
-RMS is less than battery voltage (
V
s
-dc
) and state of charge of battery’s is SOC = 95%, power will be injected from generator and battery to the AC load at the same time. The switching sequence is assumed to be T
s
=
200
μ
s. All simulation parameters are the same as parameters in Table 2, except the input voltage (line-to-neutral) V
s
-RMS, which is equal to 20
V
RMS in this condition. In condition II, the voltage ratio (
q
) is independent of the generator input voltage. The power of the generator which is transferred to the load will be determined by the differences between V
s
-RMS and V
s
-dc.


### 4.2.1. Voltage Synthesizing

In this mode, the slopes of triangular waveforms are constant. Therefore, the time intervals are considered to beT
1
=
T
2
=
50
μ
s, T
3
=
100
μ
s. Figure 15 illustrated the average output line-to-neutral voltage v
o
R which is connected to the AC load, R-phase output current i
o
R, input phase voltage v
s
a, and filtered input current i
s
a. The simulation results showed that the proposed modulation method is able to well synthesize the output voltages, while the distortion on the input current is visible.Figure 15
Simulation result by voltage synthesizing.


### 4.2.2. Current Synthesising

By changing the slope of the triangular carriers (n and m) based on Table 2, power factor has been controlled and the sinusoidal input currents have been synthesised. The simulation result in Figure 16 shows that the current input is well merged when there is no additional distortion in output voltage. The result indicated that the power factor has been controlled and unity power factor almost achieved.Figure 16
Simulation result by current synthesizing.


## 4.2.1. Voltage Synthesizing

In this mode, the slopes of triangular waveforms are constant. Therefore, the time intervals are considered to beT
1
=
T
2
=
50
μ
s, T
3
=
100
μ
s. Figure 15 illustrated the average output line-to-neutral voltage v
o
R which is connected to the AC load, R-phase output current i
o
R, input phase voltage v
s
a, and filtered input current i
s
a. The simulation results showed that the proposed modulation method is able to well synthesize the output voltages, while the distortion on the input current is visible.Figure 15
Simulation result by voltage synthesizing.


## 4.2.2. Current Synthesising

By changing the slope of the triangular carriers (n and m) based on Table 2, power factor has been controlled and the sinusoidal input currents have been synthesised. The simulation result in Figure 16 shows that the current input is well merged when there is no additional distortion in output voltage. The result indicated that the power factor has been controlled and unity power factor almost achieved.Figure 16
Simulation result by current synthesizing.


## 4.3. Current Control

In order to test the system stability, reference current is changed in AC and DC sides while the loads are constant. Figure17 shows the simulated responses of MDMC system when the current is changed in AC and DC side at t
=
0.05 and t
=
0.07
s, respectively.Figure 17
Output currents waveform during load variation.Figure17 shows that the current in i
o
S and i
o
T is constant at t
=
0.05 regardless of the changing in i
o
R which is increased by 0.2 pu. In addition, when the DC reference current reduced by 0.2
pu, the current in AC side remains constant at t
=
0.07
s.It can be clearly seen from Figure17 that the system is able to track the variation of reference current, and current output of each terminals is completely independent of other output current terminals. Moreover, the simulation results exhibited that the undershoot/overshoot and steady-state error for output currents is acceptable for low power battery based system.


## 5. Conclusions

This study represents a structure for multidirectional matrix converter which is suitable for battery based system. This new MDMC configuration reduces the cost and size of the system. This study also presents a novel DDPWM method to control the power flow from generator and battery to the load. This new modulation method used the concept of the average voltage per switching period and a continuous carrier for multidirectional matrix converters. By applying the proper switching pattern and determining the duty ratio for each switch, the voltage of each output terminal has been well synthesized. In addition, by changing the slope of the carriers which is related to the value ofn and m, power factor has been controlled and the sinusoidal input currents have been synthesised.The feasibility of the proposed MDMC structure and EDDPWM technique has been verified by MATLAB simulation. Results of this study revealed that the proposed carrier based modulation technique can be used for the application where battery is essential. This method can easily control the power factor and merged the output voltage and input current without any lookup tables. Since this new modulation has a good flexibility and applicability, it can be effectively applied in a system with a connection between the input and output neutrals with a desired output voltage and frequency. Furthermore, battery discharging time has been increased by letting power flow from both generator and battery to the load, simultaneously. The simulation results of this study also revealed that the current response in AC and DC of the MDMC system with proposed EDDPWM method is acceptable for low power battery based systems.



---

*Source: 645734-2014-09-14.xml*