# Analogue Behavioral Modeling of GTO

Authors: Y. Azzouz; H. Schneider; L.-A. Coyitangiye; B. Ravelo
Journal: Advances in Power Electronics
 (2011)

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## Abstract

An analog behavioral model of high power gate turn-off thyristor (GTO) is developed in this paper. The fundamental methodology for the modeling of this power electronic circuit is based on the use of the realistic diode consideration of non-linear junctions. This modeling technique enables to perform different simulations taking into account the turn-on and turn-off transient behaviors in real-time. The equivalent circuits were simulated with analog software developed in our laboratory. It was shown that the tested simple and compact model allows the generation of accurate physical characteristics of power thyristors under dynamic conditions. The model understudy was validated with analog simulations based on operational amplifier devices.


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## Body

## 1. Introduction

The commands of variable-speed high-power drives are currently main problems for electronic power equipment designers faced with the increase of system complexity [1–4]. Usually, the first step for implementing the basic model employed for system diagnosis [5–7] is to measure the difference between the signals from the physical process provided by the captors or actuators and the theoretical value calculated with the models. This technique is based on the theory of analytical redundancy illustrated in Figure 1 which is generally used in automatic area.Figure 1
Principle of diagnosis based on the comparison between the real process and its equivalent model [5–7].Therefore, this redundancy is expressed by analytical models described by mathematical equations (or other models) deduced from the fundamental physic laws, representing causal relationships between the signals in the system. The measurements obtained from different captors integrated in the system can then be connected by these models. The diagnosis is so explored by verifying a consistency control between the data collected by the observation system and those predicted by the model [6, 7].The difficulties encountered with the use of numerical mathematical models [8–13] to achieve real-time simulation of complex and fast systems (e.g., converter-machine gathered) lead us currently to develop the typical analog simulation. Moreover, the development of microelectronics notably the expansion of operating frequency band and accuracy of analogue operators enables to overcome the major handicaps of the analog simulation. The use of analog simulator, as real-time model (knowing the properties of the simulator as well as the performances), allows to consider new solutions for the parameter estimation and diagnosis problems: such as, the improvement of performances in terms of calculation of speed and real-time comparison between the physical process and its model. These two properties permit us to represent the state of an electrical or electronic system at any instant time, which brings new solutions to the diagnosis and estimation problems of variable-speed drives [5].It is interesting to note that before the emergence of numerical simulations, the electronic and electrical engineering researchers suffer due to the lack of the adequate computation tools suitable for the achievement of relevant analog simulations. Since the numerical simulation widened its sphere of activity, it becomes the tool mostly used than analog simulation [14, 15]. However, in general, the analog simulation is more suitable than the numerical simulation for the modeling of complex circuit notably for the power electronic application and fast systems as the converters and electrical machines. For example, real-time simulations can be achieved by using analog operators which offer the possibility of parallel calculations. These main advantages of analog approach enable us to represent, in real time, the state of electric and/or electronic power systems. Thus, new solutions for diagnosis which facilitate the maintenance of the electrotechnical equipments can be considered [16–20]. In this area, few studies are available in the literature especially for the modeling of command circuits [1–3]. In fact, the existing simulation tools as proposed in [8–15] are not sufficient for taking into account certain realistic effects as the current and voltage commutations and the physical phenomenon as the diffusion current appearing, for example, in the power diode.For this reason, we develop in this paper the principle of analog modeling dedicated to the most useful electronic components such as the capacitor, the inductor. These elements are simulated conventionally with an analog calculator from their characteristic equations based on the analysis of voltage variables. More importantly, for the usual case of reactive elements as the inductors and capacitors, one finds that that certain mathematical or analytical representations (as the differentiation and integration operations) are hardly to implement in numerical tools because they are too sensitive to the unrealistic variations of electrical signals. Facing to this finding, the cohabitation of analog and numerical simulations can become complementary.Then, we give more attention to the simulation of the diode because it plays the role of basic element constituting the GTO modeling. Meanwhile, the verification result regarding the diode model is a prerequisite condition before the approach to the GTO modeling. Finally, we treat the model of this latter prior to four phenomena: the switching power, the tail phenomenon responsible for the switching losses, the delay in the starting time, and the derivative operation effect.The aim of this paper is to develop an analog model of high-voltage GTO suitable to predict accurately the dynamic characteristics of command circuits. The GTO is widely used in high power, high voltage of about 8 kV, and high current of about 4 kA for switching applications such as traction system of electric vehicles. The model presented in this paper is based on the diode switching behavior and described by the equivalent circuit of passive components such as capacitor and inductance. These elements, characterized by the input and output voltages, are simulated by using a traditional analog solver. The model includes the high switching capacity, tail current, the delayed-time response, anddV/dt triggering. It also incorporates the reverse recovery effect in transient response.


## 2. Analog Simulation

As reported in [21, 22], the analog behavioral modeling requires a high-speed calculation and an easy implementation of electrical circuit network equations for describing the elements as the inductor and capacitor components, machine, switch, and so forth. In this section, we first consider an analog modeling of passive components such as inductances and capacitors.


### 2.1. Circuit Equivalent of an Inductance

By considering the schematic shown in Figure2(a), the voltage and current flowing through the inductance are linked by the following integral-differential equation:(1)I=1L∫(VRL-R⋅I)dt.
Meanwhile, the current I can be obtained through an integrator circuit. Figure 2(b) represents the equivalent analog model of the inductance depicted in Figure 2(a). As noted through the Laplace transform (which corresponds here with the variable s), it is well known that this expression can be rewritten as:(2)VRL(s)=(R+L⋅s)⋅I(s).
Via Kirchhoff’s and Ohm’s laws applied to the circuit presented in Figure 2(b), one can express(3)V(s)VRL(s)=R2R1(1+R2⋅C1⋅s)V(s)=R3⋅I(s)V(s)VRL(s)=R2R1(1+R2⋅C1⋅s)V(s)=R3⋅I(s)}⟹VRL(s)=R1⋅R3R2(1+R2⋅C1⋅s)⋅I(s).
So, the equivalence between the linear networks depicted in Figures 2(a) and 2(b) can be obtained by the identification of (2) and (3):(4){R1⋅R3R2=R,R1⋅R3⋅C1=L}.Equivalent circuit of a realistic inductance.
(a)(b)


### 2.2. Capacitor Equivalent Circuit

It is well known that the current flowing through a capacitorC is ideally defined by  (5)IC=CdVCdt.
However, it is noteworthy that the use of this ideal model of capacitor is extremely sensitive to the input voltage variation due to the derivative operator with respect to the time variable d/dt. In fact, certain unrealistic signal noises like numerical imperfections are considerably amplified. To reduce this unrealistic effect, we propose to insert an optimized inductive element having low value in order to avoid the change of the capacitor behaviour.  This allows us to realize a more practical analog model of the capacitor based on the integral operator. Therefore, the current flowing through the ideal capacitor can be written as follows:(6)Ldidt=V-VC⟹I=1L∫(V-VC)dt,I=CdVCdt⟹VC=1C∫Idt.
One can see that in practice a capacitor element should include two integrators which behave as inductive and capacitive integrators in cascade as shown in Figure 3.Figure 3
Equivalent circuit of a realistic capacitor.The Laplace transform of (6) gives(7){L⋅s⋅I(s)=V(s)-VC(s),I(s)=C⋅s⋅VC(s)}.
So, the equivalent functional model representing this last equation which governs the linear network introduced in Figure 3 is established in Figure 4.Figure 4
Equivalent circuit of a capacitor.


### 2.3. Scale Factor of Reactive Elements

Since certain power system parameters (supply voltage, load current, etc.) with high values cannot be implemented to the analog operators considered (e.g., maximum voltage of about 15 V), to pass this constraint, we propose in this article to use a scale factor constant. By denotingXreal the real parameter (which can be expressed in V, A, Hz, etc.) associated to the simulated parameter [X]sim which corresponds, for example, to a voltage quantity, the real maximum value Xm of scaling X-parameter must correspond to the maximum voltage that can be supported by analogue operators. This supposition can be written by using the following transformations, Xrealmax→[X]simmax and Xreal→[X]sim. In other word, we realise the real value Xreal=(Xrealmax/[X]simmax)[X]sim. For example, if the analogue operators support a maximum voltage of 10 V, the real value should be equal to Xreal=(Xrealmax/10)[X]sim. The ratio between maximum real value and maximum simulated value is called “scale factor”. It is denoted as KV for the case of voltage parameter:(8)KV=Vrealmax⁡[V]simmax⁡.
Similarly, for the other electrical parameters as current and frequency, it is, respectively, written as follows:(9)KI=Irealmax⁡[I]simmax⁡,(10)Kf=frealmax⁡[f]simmax⁡.
Therefore, the inductance and capacitor can be respectively described by (11)[L]sim=KiKVLreal,(12)[C]sim=KVKICreal.


## 2.1. Circuit Equivalent of an Inductance

By considering the schematic shown in Figure2(a), the voltage and current flowing through the inductance are linked by the following integral-differential equation:(1)I=1L∫(VRL-R⋅I)dt.
Meanwhile, the current I can be obtained through an integrator circuit. Figure 2(b) represents the equivalent analog model of the inductance depicted in Figure 2(a). As noted through the Laplace transform (which corresponds here with the variable s), it is well known that this expression can be rewritten as:(2)VRL(s)=(R+L⋅s)⋅I(s).
Via Kirchhoff’s and Ohm’s laws applied to the circuit presented in Figure 2(b), one can express(3)V(s)VRL(s)=R2R1(1+R2⋅C1⋅s)V(s)=R3⋅I(s)V(s)VRL(s)=R2R1(1+R2⋅C1⋅s)V(s)=R3⋅I(s)}⟹VRL(s)=R1⋅R3R2(1+R2⋅C1⋅s)⋅I(s).
So, the equivalence between the linear networks depicted in Figures 2(a) and 2(b) can be obtained by the identification of (2) and (3):(4){R1⋅R3R2=R,R1⋅R3⋅C1=L}.Equivalent circuit of a realistic inductance.
(a)(b)


## 2.2. Capacitor Equivalent Circuit

It is well known that the current flowing through a capacitorC is ideally defined by  (5)IC=CdVCdt.
However, it is noteworthy that the use of this ideal model of capacitor is extremely sensitive to the input voltage variation due to the derivative operator with respect to the time variable d/dt. In fact, certain unrealistic signal noises like numerical imperfections are considerably amplified. To reduce this unrealistic effect, we propose to insert an optimized inductive element having low value in order to avoid the change of the capacitor behaviour.  This allows us to realize a more practical analog model of the capacitor based on the integral operator. Therefore, the current flowing through the ideal capacitor can be written as follows:(6)Ldidt=V-VC⟹I=1L∫(V-VC)dt,I=CdVCdt⟹VC=1C∫Idt.
One can see that in practice a capacitor element should include two integrators which behave as inductive and capacitive integrators in cascade as shown in Figure 3.Figure 3
Equivalent circuit of a realistic capacitor.The Laplace transform of (6) gives(7){L⋅s⋅I(s)=V(s)-VC(s),I(s)=C⋅s⋅VC(s)}.
So, the equivalent functional model representing this last equation which governs the linear network introduced in Figure 3 is established in Figure 4.Figure 4
Equivalent circuit of a capacitor.


## 2.3. Scale Factor of Reactive Elements

Since certain power system parameters (supply voltage, load current, etc.) with high values cannot be implemented to the analog operators considered (e.g., maximum voltage of about 15 V), to pass this constraint, we propose in this article to use a scale factor constant. By denotingXreal the real parameter (which can be expressed in V, A, Hz, etc.) associated to the simulated parameter [X]sim which corresponds, for example, to a voltage quantity, the real maximum value Xm of scaling X-parameter must correspond to the maximum voltage that can be supported by analogue operators. This supposition can be written by using the following transformations, Xrealmax→[X]simmax and Xreal→[X]sim. In other word, we realise the real value Xreal=(Xrealmax/[X]simmax)[X]sim. For example, if the analogue operators support a maximum voltage of 10 V, the real value should be equal to Xreal=(Xrealmax/10)[X]sim. The ratio between maximum real value and maximum simulated value is called “scale factor”. It is denoted as KV for the case of voltage parameter:(8)KV=Vrealmax⁡[V]simmax⁡.
Similarly, for the other electrical parameters as current and frequency, it is, respectively, written as follows:(9)KI=Irealmax⁡[I]simmax⁡,(10)Kf=frealmax⁡[f]simmax⁡.
Therefore, the inductance and capacitor can be respectively described by (11)[L]sim=KiKVLreal,(12)[C]sim=KVKICreal.


## 3. Modeling of Power Diodes

For the sake of simplification, an ideal diode can be modeled by a classical switch. In order to simulate this type of switch element, an adequate function is needed. In addition, in order to respect the scale factors between the real and simulated quantities, it is necessary to have a negligible voltage drop when the diode is switched on. Hence, the diode model was chosen because it is characterized by spontaneous switching at low voltage drop usually around 0.7 V. However, when this simulated voltage drop is applied on the high-power circuit, it must be multiplied by a factor, for example,Kv=100. Thus, the real drop voltage can reach a high value of about 70 V. In order to remove this high voltage drop, one proposes a circuit displayed in Figure 5 which is based on diodes and current sources.Figure 5
Real diode model that minimize high voltage drop.


### 3.1. Simulation of an Ideal Diode

DiodeD1 is the effective diode that describes a considered switch element. The other diodes D2, D3, and D4 are used to activate the voltage compensation only when diode D1 is on. S1 and S2 are voltage-controlled current sources and will remove the high voltage drop due to D1. S1 is controlled by voltages at nodes 2 and 3. The corresponding current gain is equivalent to GS1=1/RS, and thus, the current in S1 is given by I1=V23/RS. S2 is controlled by the voltages at nodes 1 and 3. The gain and the current through S2 are, respectively, equivalent to GS2=1/RC and I2=V13/RC. The voltage across the RC resistor is given by(13)VRC=RC⋅IRC=RC⋅(I2+I1-ID)=RC(V13RS+V23RC-ID).
After simplification, one obtains V13=VRC. These controlled current sources will create a voltage drop equal and opposite to the voltage drop generated by the diode D1. Then, they should compensate the total drop voltage in the circuit. The diode model represented in Figure 5 has been simulated in half wave rectifier circuit, and time domain results are shown in Figure 6. We can see that during the period of the diode conduction, the voltage across the diode load is equal to the input voltage (no diode voltage drop).Simulated diode input—(a) and output—(b) voltages.
(a)(b)


### 3.2. Simulation of a Realistic Diode

The analog model is based on the model used in the Success software developed in our laboratory. In this software, the power diode dynamic behavior is compared to the capacitive phenomenon due to the stored charges during the conduction caused by the high-diffusion capacitor and the space charge region which appears when the diode is turned off (low-depletion capacitance). As can be seen in Figure7, the Success diode model is represented by a resistor with two states Ron/Roff that can accurately switch from the low voltage (on state) to the high voltage (off state). When the diode is forward-biased, the diode resistance value is Ron. The static model is characterized by Ron and voltage source E. Whereas for the dynamic behavior, the diffusion capacitor, represented by voltage-controlled current source, denoted that VL is added to the model. When the diode is reverse-biased, the diode resistance value becomes Roff. It is interesting to point out that the inductance L can detect the value of di/dt, and the resistance R, connected in parallel with L, controls the current source at the value of K·VL. This model can be extended to power diode models. It is worth underlining that for this purpose the following statements must be taken into account.(i)
The diode reverse recovery: it depends on diode physics (size) and components including the commutation circuit (resistor or inductance load).(ii)
The diode voltage rises: when the diode switches from conducting to nonconducting state; the space charge region increases and power loss are dissipated by commutation.(iii)
The overshoot voltage at switching on, this parameter is not taken into account in our model because the switching-off state is more important in power diode.Figure 7
Success diode circuit model.A complete power diode model is obtained by adding a diffusion capacitor model to the real diode model.As highlighted in Figure8, the simulated model is based on the load current which combines the diode and capacitance currents through S3. It is worth noting that when the diode D1 is off, the output current is equivalent to the diffusion capacitor current S3.Figure 8
Complete power diode model.


### 3.3. Diffusion Capacitor Scale Factor

By using the models proposed previously, the real value of the diffusion capacitorCd can be calculated. We assume that Icd is the real current in the diffusion capacitor. Icd corresponds to the simulated current, and Cdreal is the real value of Cd.(14)Icd=CdrealdVCdt⟹VC=1Cdreal∫Icddt.
As represented in Figure 8, the diffusion current is described by(15)[Icd]=GS3[I],
whereas the voltage diffusion should be(16)[VC]=1R1C1∫[I]dt.
Substituting (15) into the previous expression, we have(17)[VC]=1R1C1GS3∫[Icd]dt.With the considered analog diode model, the following mesh relations are obtained:(18)[VAK]=[VD1]-[VRC],(19)[VRC]=RC⋅[VD1]⋅GS2,
where RC is the resistance of compensation. By combining the two previous relations, the following expression is deduced: (20)[VAK]=[VRC]RCGS2-[VRC]⟹[VAK]=[VRC](1-RCGS2RCGS2).
Under condition RCGS2≤1, one proposes the following factor:(21)α=1-RCGS2RCGS2.
Knowing that the difference between the two voltages is relatively low, it is obvious that [VC]≈[VRC]. Then, the combination of formulae (17), (19), and (20) entails the following reduced equation:(22)[VAK]=αR1C1GS3∫[Icd]dt.
Knowing that the real value of VAK and that one of the current are, respectively, defined as [VAK]=VAK/KV and [ICD]=ICD/KI, it yields that(23)[VAK]=αKVKI1R1C1GS3∫[Icd]dt=VC.
From (14) and (20), we demonstrate that Cd real depends on R1 and C1:(24)Cdreal=K1KV⋅R1C1GS3α.
The value of R1 and C1 can be extracted from relation (23). By assuming that RC·GS2=0.999 or α=10-3 and GS3=10-4, therefore, one gets(25)R1⋅C1=Cdreal⋅αGS3⋅KVKI⟹R1⋅C1=10KVKI⋅Cdreal.
In order to confirm the relevance of the above theoretical approach, modeling of an half wave rectifier and a voltage chopper circuit is examined in the next section.


## 3.1. Simulation of an Ideal Diode

DiodeD1 is the effective diode that describes a considered switch element. The other diodes D2, D3, and D4 are used to activate the voltage compensation only when diode D1 is on. S1 and S2 are voltage-controlled current sources and will remove the high voltage drop due to D1. S1 is controlled by voltages at nodes 2 and 3. The corresponding current gain is equivalent to GS1=1/RS, and thus, the current in S1 is given by I1=V23/RS. S2 is controlled by the voltages at nodes 1 and 3. The gain and the current through S2 are, respectively, equivalent to GS2=1/RC and I2=V13/RC. The voltage across the RC resistor is given by(13)VRC=RC⋅IRC=RC⋅(I2+I1-ID)=RC(V13RS+V23RC-ID).
After simplification, one obtains V13=VRC. These controlled current sources will create a voltage drop equal and opposite to the voltage drop generated by the diode D1. Then, they should compensate the total drop voltage in the circuit. The diode model represented in Figure 5 has been simulated in half wave rectifier circuit, and time domain results are shown in Figure 6. We can see that during the period of the diode conduction, the voltage across the diode load is equal to the input voltage (no diode voltage drop).Simulated diode input—(a) and output—(b) voltages.
(a)(b)


## 3.2. Simulation of a Realistic Diode

The analog model is based on the model used in the Success software developed in our laboratory. In this software, the power diode dynamic behavior is compared to the capacitive phenomenon due to the stored charges during the conduction caused by the high-diffusion capacitor and the space charge region which appears when the diode is turned off (low-depletion capacitance). As can be seen in Figure7, the Success diode model is represented by a resistor with two states Ron/Roff that can accurately switch from the low voltage (on state) to the high voltage (off state). When the diode is forward-biased, the diode resistance value is Ron. The static model is characterized by Ron and voltage source E. Whereas for the dynamic behavior, the diffusion capacitor, represented by voltage-controlled current source, denoted that VL is added to the model. When the diode is reverse-biased, the diode resistance value becomes Roff. It is interesting to point out that the inductance L can detect the value of di/dt, and the resistance R, connected in parallel with L, controls the current source at the value of K·VL. This model can be extended to power diode models. It is worth underlining that for this purpose the following statements must be taken into account.(i)
The diode reverse recovery: it depends on diode physics (size) and components including the commutation circuit (resistor or inductance load).(ii)
The diode voltage rises: when the diode switches from conducting to nonconducting state; the space charge region increases and power loss are dissipated by commutation.(iii)
The overshoot voltage at switching on, this parameter is not taken into account in our model because the switching-off state is more important in power diode.Figure 7
Success diode circuit model.A complete power diode model is obtained by adding a diffusion capacitor model to the real diode model.As highlighted in Figure8, the simulated model is based on the load current which combines the diode and capacitance currents through S3. It is worth noting that when the diode D1 is off, the output current is equivalent to the diffusion capacitor current S3.Figure 8
Complete power diode model.


## 3.3. Diffusion Capacitor Scale Factor

By using the models proposed previously, the real value of the diffusion capacitorCd can be calculated. We assume that Icd is the real current in the diffusion capacitor. Icd corresponds to the simulated current, and Cdreal is the real value of Cd.(14)Icd=CdrealdVCdt⟹VC=1Cdreal∫Icddt.
As represented in Figure 8, the diffusion current is described by(15)[Icd]=GS3[I],
whereas the voltage diffusion should be(16)[VC]=1R1C1∫[I]dt.
Substituting (15) into the previous expression, we have(17)[VC]=1R1C1GS3∫[Icd]dt.With the considered analog diode model, the following mesh relations are obtained:(18)[VAK]=[VD1]-[VRC],(19)[VRC]=RC⋅[VD1]⋅GS2,
where RC is the resistance of compensation. By combining the two previous relations, the following expression is deduced: (20)[VAK]=[VRC]RCGS2-[VRC]⟹[VAK]=[VRC](1-RCGS2RCGS2).
Under condition RCGS2≤1, one proposes the following factor:(21)α=1-RCGS2RCGS2.
Knowing that the difference between the two voltages is relatively low, it is obvious that [VC]≈[VRC]. Then, the combination of formulae (17), (19), and (20) entails the following reduced equation:(22)[VAK]=αR1C1GS3∫[Icd]dt.
Knowing that the real value of VAK and that one of the current are, respectively, defined as [VAK]=VAK/KV and [ICD]=ICD/KI, it yields that(23)[VAK]=αKVKI1R1C1GS3∫[Icd]dt=VC.
From (14) and (20), we demonstrate that Cd real depends on R1 and C1:(24)Cdreal=K1KV⋅R1C1GS3α.
The value of R1 and C1 can be extracted from relation (23). By assuming that RC·GS2=0.999 or α=10-3 and GS3=10-4, therefore, one gets(25)R1⋅C1=Cdreal⋅αGS3⋅KVKI⟹R1⋅C1=10KVKI⋅Cdreal.
In order to confirm the relevance of the above theoretical approach, modeling of an half wave rectifier and a voltage chopper circuit is examined in the next section.


## 4. Validation of the Analog Diode Model

In this section, the validity of the analog model presented previously in Figure8 is investigated. For that two structures, we considered first a half wave rectifier circuit and second a voltage chopper circuit.


### 4.1. Half Wave Rectifier Circuit

The circuit introduced in Figure8 is used here to check the compensation of the voltage drop and the ability of the model to generate a reverse current. In this section, we are interested to the qualitative aspect of the electrical quantities. So, the model must simulate accurately physical phenomena during the blocking state. In this section, the diode model depicted in Figure 8 was implemented in circuit simulation shown in Figure 9.Figure 9
Half wave rectifier circuit simulation.The simulation results shown in Figure10 allow to validate the analog model. One finds that perfect voltage compensation is respected, because the input voltage E equals the output Vload during the conduction of the diode. Furthermore, a turnoff of the diode occurs only after the reverse recovery conduction. This important phenomenon confirms the efficiency of the analog model proposed in Figure 8.Figure 10
Transient simulation ofVload voltage.One underlines here that a diode element is ideally blocked when the current becomes zero. But, in reality, the typical power diode continues to conduct the current inversely due to the diffusion capacitor. This effect is known as the reverse recovery phenomenon. This corresponds to the negative alternation of the wave represented by Figure10. So, the model proposed enables to characterize this singular effect qualitatively.


### 4.2. Buck Converter

The buck circuit described in Figure11 was simulated with the diode element STF-75545 available in the software Success simulator which was developed in our laboratory. The diode parameters are defined as Ron=1 mΩ, Roff=1 mΩ, E=0.75 V, Cr=0.53 nF, R1=9.52 μΩ, and K=164461. The real diffusion capacitor can be calculated using these parameters, so that Cd real=K·L/Ron=5.76 mF is obtained. This diode model was tested in the buck converter circuit shown in Figure 11 where E=1 kV and Ich=1 kA.Figure 11
Buck converter circuit.This circuit allows the calculation of the scale factor for the current and voltage, respectively, given byKI=Imax/Isim=106 and KV=Vmax/Vsim=400. The simulated parameters are equal to [Ich]analog=1 mA and [E]analog=2.5 V. The di/dt rating is adjusted by using two values of inductances L1=10 μH and L2=3.33 μH. The corresponding analog values are defined as [L1]=Lreal·(KI/KV)=8.32 mH and [L2]=Lreal·(KI/KV)=25 mH. The main diode model parameters are given by RC·GS2=0.999. So, for RC=1 kΩ, we have obtained GS2=999.10-6. The other parameters are equal to GS1=10-3, GS3=10-4, and RS=1 kΩ. By substitution of these values in relation (12), R1·C1=23.10-6 s is calculated, and assuming that R1=10 kΩ, as result, we can write that C1=2.3 nF. Simulations have been performed using the circuit presented in Figure 11. Thus, we obtain the results displayed in Figure 12. It can be shown that the model allows the simulation of the reverse recovery phase; the maximum reverse current becomes dependent of the inductive load.Figure 12
Transient evolution of inductive load turnoff with two different inductance values obtained by using analog diode model.In order to validate the power diode analog model, the obtained model results are compared with the numerical model ones which are depicted in Figure13. In both cases, the maximum reverse current and the reverse recovery time seem to be in good agreement.Figure 13
Transient evolution of inductive load turnoff with two different inductance values obtained by using numerical diode model.


### 4.3. Model Limitations

As illustrated in Figures12 and 13, the snap-off period which occurs while the current is rising rapidly along the reverse peak is not the same for the numerical and analog models. For the analog model, this period cannot be adjusted because the reverse recovery state is represented by two dependent circuits, while the numerical model is flexible.


## 4.1. Half Wave Rectifier Circuit

The circuit introduced in Figure8 is used here to check the compensation of the voltage drop and the ability of the model to generate a reverse current. In this section, we are interested to the qualitative aspect of the electrical quantities. So, the model must simulate accurately physical phenomena during the blocking state. In this section, the diode model depicted in Figure 8 was implemented in circuit simulation shown in Figure 9.Figure 9
Half wave rectifier circuit simulation.The simulation results shown in Figure10 allow to validate the analog model. One finds that perfect voltage compensation is respected, because the input voltage E equals the output Vload during the conduction of the diode. Furthermore, a turnoff of the diode occurs only after the reverse recovery conduction. This important phenomenon confirms the efficiency of the analog model proposed in Figure 8.Figure 10
Transient simulation ofVload voltage.One underlines here that a diode element is ideally blocked when the current becomes zero. But, in reality, the typical power diode continues to conduct the current inversely due to the diffusion capacitor. This effect is known as the reverse recovery phenomenon. This corresponds to the negative alternation of the wave represented by Figure10. So, the model proposed enables to characterize this singular effect qualitatively.


## 4.2. Buck Converter

The buck circuit described in Figure11 was simulated with the diode element STF-75545 available in the software Success simulator which was developed in our laboratory. The diode parameters are defined as Ron=1 mΩ, Roff=1 mΩ, E=0.75 V, Cr=0.53 nF, R1=9.52 μΩ, and K=164461. The real diffusion capacitor can be calculated using these parameters, so that Cd real=K·L/Ron=5.76 mF is obtained. This diode model was tested in the buck converter circuit shown in Figure 11 where E=1 kV and Ich=1 kA.Figure 11
Buck converter circuit.This circuit allows the calculation of the scale factor for the current and voltage, respectively, given byKI=Imax/Isim=106 and KV=Vmax/Vsim=400. The simulated parameters are equal to [Ich]analog=1 mA and [E]analog=2.5 V. The di/dt rating is adjusted by using two values of inductances L1=10 μH and L2=3.33 μH. The corresponding analog values are defined as [L1]=Lreal·(KI/KV)=8.32 mH and [L2]=Lreal·(KI/KV)=25 mH. The main diode model parameters are given by RC·GS2=0.999. So, for RC=1 kΩ, we have obtained GS2=999.10-6. The other parameters are equal to GS1=10-3, GS3=10-4, and RS=1 kΩ. By substitution of these values in relation (12), R1·C1=23.10-6 s is calculated, and assuming that R1=10 kΩ, as result, we can write that C1=2.3 nF. Simulations have been performed using the circuit presented in Figure 11. Thus, we obtain the results displayed in Figure 12. It can be shown that the model allows the simulation of the reverse recovery phase; the maximum reverse current becomes dependent of the inductive load.Figure 12
Transient evolution of inductive load turnoff with two different inductance values obtained by using analog diode model.In order to validate the power diode analog model, the obtained model results are compared with the numerical model ones which are depicted in Figure13. In both cases, the maximum reverse current and the reverse recovery time seem to be in good agreement.Figure 13
Transient evolution of inductive load turnoff with two different inductance values obtained by using numerical diode model.


## 4.3. Model Limitations

As illustrated in Figures12 and 13, the snap-off period which occurs while the current is rising rapidly along the reverse peak is not the same for the numerical and analog models. For the analog model, this period cannot be adjusted because the reverse recovery state is represented by two dependent circuits, while the numerical model is flexible.


## 5. Simulation of GTO

### 5.1. Modeling of an Ideal GTO

Many research efforts are dedicated to the new models for GTO devices, particularly those intended for circuit simulation [23–25]. The proposed circuit model for the numerical simulator is schematized in Figure 14. For this model, three junctions J1, J2, and J3 are represented by three diodes and two current sources as indicated in Figure 14. The simulation approach of GTO is based on the replacing of each diode by the corresponding analog model shown in Figure 5.Figure 14
Equivalent circuit of GTO [17].


### 5.2. GTO Model Simulation

An analog simulation of GTO is proposed in order to evaluate, in real time, the behavior of this component in its environment. First of all, we studied the principal static characteristics and the dynamic behavior of the GTO. Then, we carried out an identification of the model parameters and modeling of principle features for the dynamic behavior of GTO: dynamic capability of blocking, reverse tail current, delayed turn-off time, anddV/dt rating. The complete GTO analog model introduced in Figure 15 is obtained from the model depicted in Figure 14 where each diode junction is replaced by the model described in Figure 8. The avalanche breakdown of the junction GK is modeled by a diode in series with voltage source BV0. Then, the resistances BV0 and Riato represent the maximum of current supported by the junction GK. Resistance Rsa is used to describe the asymmetrical behavior of GTO.Figure 15
Complete numerical model of GTO [17].Therefore, for the simplicity of simulation, the methodology uses an ideal model which does not include the effect of diffusion capacitor and avalanche breakdown.


## 5.1. Modeling of an Ideal GTO

Many research efforts are dedicated to the new models for GTO devices, particularly those intended for circuit simulation [23–25]. The proposed circuit model for the numerical simulator is schematized in Figure 14. For this model, three junctions J1, J2, and J3 are represented by three diodes and two current sources as indicated in Figure 14. The simulation approach of GTO is based on the replacing of each diode by the corresponding analog model shown in Figure 5.Figure 14
Equivalent circuit of GTO [17].


## 5.2. GTO Model Simulation

An analog simulation of GTO is proposed in order to evaluate, in real time, the behavior of this component in its environment. First of all, we studied the principal static characteristics and the dynamic behavior of the GTO. Then, we carried out an identification of the model parameters and modeling of principle features for the dynamic behavior of GTO: dynamic capability of blocking, reverse tail current, delayed turn-off time, anddV/dt rating. The complete GTO analog model introduced in Figure 15 is obtained from the model depicted in Figure 14 where each diode junction is replaced by the model described in Figure 8. The avalanche breakdown of the junction GK is modeled by a diode in series with voltage source BV0. Then, the resistances BV0 and Riato represent the maximum of current supported by the junction GK. Resistance Rsa is used to describe the asymmetrical behavior of GTO.Figure 15
Complete numerical model of GTO [17].Therefore, for the simplicity of simulation, the methodology uses an ideal model which does not include the effect of diffusion capacitor and avalanche breakdown.


## 6. Analog Model Validation

We recall that the main features of turnoff of GTO are: the dynamic turn-off performances, the reverse tail current, the delayed turn-off, time and the time derivative voltagedV/dt. In this section, the significance of each mechanism incorporated in GTO behavior is evaluated in order to highlight their importance. Comparisons are made between the analog response and the physical behavior by considering the circuit shown in Figure 16. One points out that this analog model seems relatively complex because it transposes the classical simple circuit model of Figure 15 by its analog equivalent model. We replace here the junctions by the analog model proposed prior to the real-time simulation model. We underline that despite the accuracy of the physical models [12, 13] thanks to its intrinsic characteristics, the analog model investigated here consumes less computation time and is less complex to implement, and it does not necessitate the knowledge of the internal GTO structure parameters. By cons, the numerical models introduced in [8–11] are much simpler than these physical models, but they are only valid for numerical computations. Also, compared with these numerical models, the analog one developed here presents advantages notably necessary for the achievement of more performing electrical system diagnosis as the real-time analysis.Figure 16
Complete schematic of the under-study analog model of GTO.


### 6.1. Controlled Switch

It is interesting to recall the following basic electronic functions during the switch control:(i)
Triggering. The GTO is switched on by a positive gate current and then turned on the NPN bipolar transistor.(ii)
Turned On. The thyristor remains in the on state with a holding current to allow the GTO conduction.(iii)
Turned Off. The turn-off thyristor occurs when the accumulated charges during the conduction have been removed by the gate terminal. For that, the current flowing through anode falls below threshold current, and the gate current must be high enough (blocking capability):(26)IG≥α12+α23-1α12⋅IA,
where α12 and α23 represent the current gain. Note that for α12=1, the switch performance depends only on the value of α23. As this gain is usually a small value, the switching gain will increase. To decrease this value, it is necessary to reduce the carrier lifetime which is suitable for switching of the period.It is obvious that when the controlled switch is not strong enough, the total blocking of the junctionP will not be achieved, and the GTO will fail. In that case, a pulse current on the gate terminal is more appropriate to enhance the switching performance. Simulations have been performed for the analog model. So, as depicted in Figure 17, the evidence of switching capability is observed. Moreover, Figure 17(a) indicates the absence of turn off. Indeed, if the gate current is less than the switching capability, the output voltage equals to the input voltage (GTO was not blocked). However, if the gate current is higher enough, the GTO is turned off as explained in Figure 17(b), and the above condition (26) is verified.Simulated GTO output voltage (a) when the control current is less than the switching capability and output current (b) when the control current is higher than the switching capability.
(a)(b)


### 6.2. Simulation of Tail Current

During its operation, the GTO is subjected to severe failures due to tail phenomenon. The presence of tail current causes losses in the GTO structure. The tail current is simulated by including in the model the diffusion capacitor of junctionJ1. Simulation results displayed in Figures 18(a) and 18(b) illustrates the effect of diffusion capacitor of J1 when tail current occurs. It is shown also that the tail current deals with the gain of the source that is biasing the diffusion capacitor. As the gain rises, the tail current increases due to more stored charges that must be removed in a longer time.Simulation of tail current for two loads and for diffusion capacitor with gain (a)Ga=1 and (b) Gb=2.
(a)(b)


### 6.3. The Delayed Turn-Off Time

The analog model of diffusion capacitor junctionJ2 is added to the complete model. Simulation results shown in Figure 19 represent the effect of diffusion capacitor on the delay time to turn off. One can see that the anode current influences considerably the time delay.Effects of load current (a) and diffusion capacitor (b) on the delayed turn-off time.
(a)(b)


### 6.4.dV/dt Simulation

During the turn-off state, the GTO does not exceed a maximum value ofdV/dt, this value is a function of the current conduction before the cut-off state. The simulation of dV/dt is achieved with capacitances added in parallel to the junction J2. As plotted in Figure 20, dV/dt increases with the capacitance.Figure 20
dV/dt simulation results.


## 6.1. Controlled Switch

It is interesting to recall the following basic electronic functions during the switch control:(i)
Triggering. The GTO is switched on by a positive gate current and then turned on the NPN bipolar transistor.(ii)
Turned On. The thyristor remains in the on state with a holding current to allow the GTO conduction.(iii)
Turned Off. The turn-off thyristor occurs when the accumulated charges during the conduction have been removed by the gate terminal. For that, the current flowing through anode falls below threshold current, and the gate current must be high enough (blocking capability):(26)IG≥α12+α23-1α12⋅IA,
where α12 and α23 represent the current gain. Note that for α12=1, the switch performance depends only on the value of α23. As this gain is usually a small value, the switching gain will increase. To decrease this value, it is necessary to reduce the carrier lifetime which is suitable for switching of the period.It is obvious that when the controlled switch is not strong enough, the total blocking of the junctionP will not be achieved, and the GTO will fail. In that case, a pulse current on the gate terminal is more appropriate to enhance the switching performance. Simulations have been performed for the analog model. So, as depicted in Figure 17, the evidence of switching capability is observed. Moreover, Figure 17(a) indicates the absence of turn off. Indeed, if the gate current is less than the switching capability, the output voltage equals to the input voltage (GTO was not blocked). However, if the gate current is higher enough, the GTO is turned off as explained in Figure 17(b), and the above condition (26) is verified.Simulated GTO output voltage (a) when the control current is less than the switching capability and output current (b) when the control current is higher than the switching capability.
(a)(b)


## 6.2. Simulation of Tail Current

During its operation, the GTO is subjected to severe failures due to tail phenomenon. The presence of tail current causes losses in the GTO structure. The tail current is simulated by including in the model the diffusion capacitor of junctionJ1. Simulation results displayed in Figures 18(a) and 18(b) illustrates the effect of diffusion capacitor of J1 when tail current occurs. It is shown also that the tail current deals with the gain of the source that is biasing the diffusion capacitor. As the gain rises, the tail current increases due to more stored charges that must be removed in a longer time.Simulation of tail current for two loads and for diffusion capacitor with gain (a)Ga=1 and (b) Gb=2.
(a)(b)


## 6.3. The Delayed Turn-Off Time

The analog model of diffusion capacitor junctionJ2 is added to the complete model. Simulation results shown in Figure 19 represent the effect of diffusion capacitor on the delay time to turn off. One can see that the anode current influences considerably the time delay.Effects of load current (a) and diffusion capacitor (b) on the delayed turn-off time.
(a)(b)


## 6.4.dV/dt Simulation

During the turn-off state, the GTO does not exceed a maximum value ofdV/dt, this value is a function of the current conduction before the cut-off state. The simulation of dV/dt is achieved with capacitances added in parallel to the junction J2. As plotted in Figure 20, dV/dt increases with the capacitance.Figure 20
dV/dt simulation results.


## 7. Conclusion

The behavioral modeling method developed in this paper is based on the analog modeling of diode and GTO with three junctions. Theoretical approach illustrating the methodology of this electronic power component modeling was presented. It was evidenced toward simulations that the model proposed provides interesting performances in the term of characterization of transient phenomena eventually appearing due to the switching modes. It is noteworthy that the analog behavior enables also to predict certain behaviors which cannot be expressed with classical numerical models [8–11] in real time. Most importantly, compared to these numerical models, it enables to explain also that the analog simulation which allows to understand more deeply the different aspects of switching mechanisms of GTO. Finally, the simulation of these mechanisms in real time permits to extract the state of the components in use.



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*Source: 623039-2011-07-26.xml*