# A New Translinear-Based Dual-Output Square-Rooting Circuit

Authors: Montree Kumngern; Kobchai Dejhan
Journal: Active and Passive Electronic Components
 (2008)

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## Abstract

A new wide input range square-rooting circuit is presented. The proposed circuit consists of a dual translinear loop, an absolute value circuit, and current mirrors. A current-mode technique is used to provide wide input range with simple circuitry. The output signal of the proposed circuit is the current which is proportional to the square root of input current. The proposed square-rooting circuit was confirmed by using PSpice simulator program. The simulation results demonstrate that the proposed circuit provides the excellent temperature stability with wide input current range.


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## Body

## 1. Introduction

A square-rooting circuit is
widely used in analog instrumentation and measurement systems. For example, it is used to linearize a
signal from a differential pressure flow meter, or to calculate the root mean square value of an arbitrary waveform [1]. Typically,
voltage-mode square-rooting circuits can be realized by using operational
amplifiers (op-amps) and can
be attached to passive and active elements such as an analog multiplier
to form squarer and resistors [2], the BJTs to form a log and antilog amplifier
[3], and MOS transistor operating in triode region [4]. However, op-amp-based
square-rooting circuit has the high-frequency limitation due to the finite gain
bandwidth product (GBW) of
the op-amps, and some of them are not suitable for IC implementation.
Second-generation current conveyors (CCIIs) are useful in analog signal
proposing circuits. Since the gain bandwidth product of an op-amp is finite,
the higher the gain it realizes, the less bandwidth it possesses. In the past, the
realization of square-rooting circuit using CCIIs has been proposed in the
technical literature [5, 6]. Lui [5] proposed square-rooting circuit based on
the use of the CCIIs connected with nonsaturated MOS transistors, op-amps, and
resistors. The high-frequency limitation of this circuit is due to the finite
GBW of the op-amp and the MOS transistor operated in nonsaturation. Moreover,
the use of op-amps and floating resistors makes this circuit not ideal for IC fabrication.
Differential difference current conveyors (DDCCs-) based square-rooting circuit
is proposed by Chiu et al. [6]. However, the disadvantage of this circuit is the
same as the proposed square-rooting circuits of Lui [5]. The square-rooting
circuit is realized by using bipolar junction transistors (BJTs), based on the
current-mode technique,
which have been reported as being a quite attractive feature of wide bandwidth and suitable
for implementing in monolithic form [7]; but only positive input current range can be
applied into the circuit. The current-mode square-rooting circuit based on
MOS transistors operating in class AB has also been reported [8].This paper, a new BJT wide
input range current-mode square-rooting circuit, is introduced. It consists of
a dual translinear loop, an absolute value circuit, and current mirrors. The proposed
square-rooting circuit is operated in current mode that has the following
advantages.The square-rooting circuits of Filanovsky and Baltes [4], Liu [5], and Chiu et al.
[6] are limited for high frequency due to the finite GBW of op-amps and MOS
transistor operated in nonsaturation. While the proposed circuit has no
restriction, therefore, the proposed square-rooting circuit operates more
high-frequency than that of
the previous square-rooting circuits.
(i)
The proposed square rooting is suitable for bipolar IC technology.(ii)
The proposed square rooting provides wide input current range.(iii)
The proposed square rooting provides excellent temperature stability.(iv)
It possesses high output impedance.


## 2. Circuit Description

Figure1 shows the dual
translinear loop of the proposed square-rooting circuit; here I1, I2,
I3, and I4 are the currents taken as the collector currents of Q1,
Q2, Q3, and Q4, respectively. Neglect the
based currents and assume that the four transistors are identical. Summing the
based-emitter voltages around the closed-loop containing Q1, Q2, Q3, and Q4, gives by [9]
(1)Vbe1+Vbe3=Vbe2+Vbe4.
Substituting for the
relationship between collector currents IC and base voltages VBE
[10] yields
(2)kTqln(I1IS)+kTqln(I3IS)=kTqln(I2IS)+kTqln(I4IS),
from which
(3)I1Iin=I2I4. Let I1 be the
constant current source that provides the bias current for the circuit. When
the input signal current Iin is applied to the circuit, then the
relationship of the currents I2, I4, and Iin,
since I2 is equal to I4, can be expressed as
(4)I2=−I4=I1Iin. It means that the currents I2 and I4 are a square root of the input current Iin with
the current gain equal to I1. In addition, the temperature effect in terms of the thermal voltage is
compensated. It can be noted from Figure 1 that only positive input signal
current Iin can be applied to the circuit. To achieve wide input
current range that can apply both negative and positive signal currents, the
absolute-value circuit is required.Figure 1
Dual translinear loop.Figure2 shows the absolute-value circuit. The transistors Q1–Q4 and
Iq function as a current-mode full-wave rectifier [11]. The current
source Iq provides the biasing current for the circuit. The current
mirrors, Q5-Q6 and Q7-Q8, are
supplied by the current source IB1, which ensures that the two
current mirrors are
continuously on, thereby, improving frequency response and linearity overall
system. The current source IB2 is used to eliminate the DC current
offset of the output current. The output current Io of circuit can
be expressed as
(5)Io=|Iin|.Figure 2
Absolute value circuit.Figure3 shows the proposed square-rooting circuit using a dual translinear loop, an
absolute-value circuit, and current mirrors. In this circuit, the input is a
current, and the output is also the dual currents which are proportional to the
square root of the input current. Using (4) and (5), the output current can be
expressed as
(6)Iout+=−Iout−=Io|Iin|.
From (6), it means that the output current Iout is
a square-root of the input current Iin, with the current gain equal
to Io. It is also shown in (6) that the output current is not
sensitive to temperature. It is noted that the proposed square-rooting circuits
in Figure 3 provide the output current which is proportional to the square root
of the input current at high output impedance. Hence, it
can be directly connected as the load. The proposed circuit in Figure 3 can
easily be modified to be as voltage-in current-out or voltage-in voltage-out
circuits by using the converting resistances. If the square-rooting circuit
with voltage-in current-out circuit is desired, the new input voltage can be
applied to the node Y of absolute-value circuit and disconnect grounded resistor; while its node
X is terminated with grounded resistor. If the square-rooting circuit with
voltage-in voltage-out circuit is continually desired, the additional grounded
resistor is required to connect at nodes Z for operating as current-to-voltage
conversion.Figure 3
Proposed dual-output current-mode square-rooting circuit.In the practical realization, the device mismatch between NPN and PNP bipolar
transistors groups ofQ11–Q14 function is the major factor that contributes to the errors from the ideal
performance. The output current error can be expressed as
(7)Iout=(1−2βN+2)(1−2βP+2)IoIin,
where βN and βP are the current gains of NPN and
PNP bipolar transistors, respectively, and Io is the bias current of
the circuit. If βN=137.5, βP=110, Io=50 μA, and Iin=1  mA,
then the resulting output current error is equal to 2%.


## 3. Simulation Results

The square-rooting circuit in
Figure3 is simulated by using the PSpice simulator program. The proposed
square-rooting circuit is simulated based on the model parameters of the
AT&T ALA400-CBIC-R [12]. The supply voltages are chosen as VCC=2.5 V
and VEE=−2.5 V. The current supplies are Iq=8 μA, IB1=100 μA,
IB2=116 μA, and Io=50 μA.Figure4 shows the simulated DC transfer characteristic for the input current Iin of the proposed square-rooting circuit in Figure 3. The simulation of transfer
curve is compared with the calculated value. This result demonstrates that the proposed
square-rooting circuit yields the operating current range from <−1 mA to
>1 mA of the input current. At Iin=1 mA and −1 mA, it also shows
that the difference of the output current between simulation value and calculated value is 10.11 μA (4.52%) and 13.88 μA (6.18%), respectively. The amplitude error of
the output current signal more than 2% may be resulting from the error of the absolute-value
circuit which is neglected.Simulated DC transfer characteristics of proposed square-rooting circuit:
(a) positive input; (b) negative output.
(a)(b)Figure5 shows the operation of proposed square-rooting circuit in Figure 3 while
applying the 2 mAP-P triangle wave with 100 kHz frequency at the input. The input and
output waveforms are shown in Figures 5(a) and 5(b), respectively. Again, a 2 mAP-P sinusoidal signal with
100 kHz frequency is applied to the proposed square-rooting circuit in Figure
3. The input and output waveforms are shown in Figures 6(a) and 6(b),
respectively. Figure 6 is confirmed while the input is nonlinear, as the output corresponds
proportionally to the square root for the input. The
simulated output waveforms are also compared with the calculated values. The
simulated frequency response of the proposed circuits has been done as shown in
Figure 7. It should be noted that the bandwidth is about 30 MHz. This
simulation, the power consumption, is approximated
to 15 mW.Operation of circuit for the 100 kHz input triangular signal: (a) input
waveform; (b) output waveforms.
(a)(b)Operation of circuit for the 100 kHz sine wave input signal: (a) input
waveform; (b) output waveforms.
(a)(b)Figure 7
Simulated result for frequency responses.To demonstrate the performance of the proposed square-rooting circuit, Figure8
shows the simulated output waveform for the cases of the 1 MHz frequency
triangle wave input signal and for 2 mAP-P amplitude. From Figure 8,
it is shown that the proposed square-rooting circuit provides the good output
waveform at 1 MHz. Figure 9 shows the output current of proposed square-rooting
circuit at 50°C, 75°C, and
100°C
temperatures while applying the 100 kHz frequency triangle wave with 2 mAP-P amplitude at the input of the circuit. From the simulation result in Figure 9,
it is obviously shown that the proposed square-rooting circuit provides the
excellent temperature stability; this result can be confirmed as in (6).Operation of circuit for the 1 MHz input triangular signal: (a) input waveform; (b) output waveform.
(a)(b)Figure 9
Output waveforms at different temperatures at 100 kHz frequency input signal.


## 4. Conclusions

In this paper, a new
current-mode square-rooting circuit is presented. The proposed circuit employs
a dual translinear loop, an absolute-value circuit, and current mirrors. Simulation results show that the
proposed square-rooting circuit provides the wide input current range with
excellent temperature stability. Better performance can be expected by using
the bipolar transistors and the parameters of complementary high performance
processes which were not available to the authors. The proposed square-rooting
circuit is suitable for IC fabrication because of the absence of the external
resistor.



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*Source: 623970-2008-12-18.xml*