# A High Efficiency Li-Ion Battery LDO-Based Charger for Portable Application

Authors: Youssef Ziadi; Hassan Qjidaa
Journal: Active and Passive Electronic Components
 (2015)

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## Abstract

This paper presents a high efficiency Li-ion battery LDO-based charger IC which adopted a three-mode control: trickle constant current, fast constant current, and constant voltage modes. The criteria of the proposed Li-ion battery charger, including high accuracy, high efficiency, and low size area, are of high importance. The simulation results provide the trickle current of 116 mA, maximum charging current of 448 mA, and charging voltage of 4.21 V at the power supply of 4.8–5 V, using 0.18μm CMOS technology.


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## Body

## 1. Introduction

As we know, portable devices have become the main applications of advanced technical products. Due to their small size, light weight, and recharge ability, Li-ion batteries are well suited to portable electronic manufactures such as cell phones and PDAs [1] because of their high energy density, long cycle life, high voltage, and absence of memory effects. But the life of a rechargeable battery depends not only on charging time, but also on overcharging control and charging strategies [2]. To avoid the battery from overcharging, the charging process needs a specific method supporting the constant current (CC) and the constant voltage (CV) modes in order to charge the battery by a degrading current [3–5].In literature, there are several architectures of battery chargers with different approaches of power control methods in order to adapt the supply voltage. The same are characterized by high efficiency such as the DC/DC converter, switching-capacitor, or switching mode power supply [1, 6–8], but they are not suitable for single chip integration and, sometimes, they have low accuracy despite their efficiency. On the other hand, the same are using charge pump as an adaptive supply voltage [3]; however this one is distinguished by its high current ripple and low efficiency. LDO-based charger is characterized by a low current ripple and it can be integrated into the chip without descript components [9], but its major problem is the low efficiency. In this work we will improve the efficiency of an LDO-based charger, using the power transistor as a variable current source and minimizing its dropout.One of the important missed criteria in several works [1, 3, 6, 8–12] is the control of temperature during charging and the lack of trickle current charge mode in [1, 13] which is necessary for the battery protection when it is fully discharged. That makes this work a complete battery charger chip with respect to all charge procedures and the battery protection.This paper describes the architecture and simulation results of a three-mode control high efficiency battery charger integrated circuit for Li-ion batteries with charging currents from 116 mA up to 448 mA. In Section2 we describe the typical charging method of Li-ion battery. The architecture and the functionality of major blocks of the proposed integrated circuit are illustrated in Section 3. Simulation results are shown in Section 4. Finally, the conclusion is remarked in Section 5.


## 2. Li-Ion Battery Charger Method

Amongst the important criteria of Li-ion battery charger is safety of charging. Yet there are some limitations for the current and voltage of charging; thus, the battery temperature will augment severely causing fatal troubles due to some of these limitations.Notably, the typical charging current is 1C, in which the current can completely charge a battery in one hour [14].The typical charging profile of Li-ion batteries shown in Figure1 is needed to achieve three fundamental modes: trickle constant current, fast constant current, and constant voltage modes.Figure 1
Typical charging process of a Li-ion battery.So far as the first trickle constant current mode is concerned, when the battery voltage (Vbat) is less than 2.9 V, the internal resistance of Li-ion battery is getting larger; the Li-ion battery, accordingly, has to be charged by a trickle constant current phase; this strategy is called an “overnight charger” [15]; as for the second phase, once the value of Vbat is larger than 2.9 V, the process switches from the trickle current to the fast constant current phase.Ultimately, we use constant voltage to charge the battery when the battery voltage is greater than 4.2 V, whilst the charger is operating within constant voltage mode.There are two methods to terminate the charging process, the first of which is monitoring the minimum charging current at the CV stage. The charger terminates the charging process when the charging current shrinks to the specified range. To finish the charging process, the other one is based on the maximum charging time [16].In the proposed design, we have adopted the first method to terminate the charging process; the battery is charging until the charging current is less than 1C/40.The whole charging flow of our Li-ion battery charger is designed as shown in Figure2.Figure 2
Battery charging flowchart.


## 3. Circuit Descriptions

Contrary to the other architectures which use a microprocessor to control the different modes of the charge, our proposed architecture is a purely analogic support of the three modes of Li-ion battery charging, trickle constant current, fast constant currant, and constant voltage, as shown in Figure3. It is made of many blocks: LDO, current generator, current sense, temperature sense (PTAT circuit), and bandgap multioutput. The supplying tension 4.8 V–5 V is adapted by LDO regulator before generating Vadapt. The power transistor MP is equivalent to a variable current source; this technique has been used in [10] with flyback converter. The MP control made by two current sources Iref1 and Iref2 passed through a shifter level composed of M1, M2, M′1, and M′2, so that the transistor MP provides a constant current order of 116 mA and 448 mA to order the trickle constant current and the fast constant current modes. We use the integrator to control the constant voltage mode. These modes are switched by Op A2 and A3 that compares tensions  Vfb1 and Vfb2 with Vref1. We use the output of A1 and A4 to stop charging when the battery is full or when the temperature detected by the PTAT circuit exceeds 115 degrees.Figure 3
Simplified diagram of the proposed Li-ion battery charger.Figure4 shows the complete architecture of the proposed Li-ion battery charger. What distinguishes our architecture is the use of current like a parameter of command to switch the power transistor MP between different modes of charge, and it is utilized like a variable current source. The current generator furnishes two reference currents Iref1 and Iref2 which are copied by current mirror (M4 and M3) to command the MP gate with level shifter (this current generator will be discussed in Section 3.1). Unlike trickle constant current and fast constant current (CC mode) witch are under the control of Iref1 and Iref2, CV mode is controlled by an integrator, following its principles [10]; when Vfb1 is getting larger gradually, the integrator output is decreasing, so the MP furnishes a current decrease until the end of charge; we could make use of voltage-to-current conversion to generate CV current.Figure 4
Complete architecture of the proposed Li-ion battery charger.The end of charge occurs when the current sense detects thatIchg (charge current) equals 20 mA or when the die temperature transpasses 115°C switching off PMOS (Meoc) integrated into the current generator.


### 3.1. Current Generator

The current generator furnishes the reference currents,Iref1 and Iref2, to control the trickle CC and fast CC modes. We have opted for utilizing this architecture, as shown in Figure 5, which is not influenced by the temperature variation [17]. It is formed by a conventional architecture (M6-M6-M9-M10) where the passive resistor is changed with a PMOS transistor M18 and its gate bias generator. There are two diode-connected NMOS transistors and one PMOS transistor that make up the gate bias generator, for each mode (M11, M12, and M7 for Iref1 mode and M13, M14, and M8 for Iref2 mode). Whereas M7 copies the reference current I, the gate voltage of M18 is generated by the diode-connected transistors M11 and M12 to generate Iref1. We can generate the reference current Iref1 or Iref2 by the control switches M15 and M16. We integrate a transistor Meoc switcher to cancel the generation of Iref1 and Iref2 to end the charging process.Figure 5
Current generator circuit.


### 3.2. Bandgap Reference Multioutput

In our proposed design, four reference tensions would be prerequisite (Vref1, Vref2, Vref3, and Vref4), hence making use of multioutput bandgap reference tensions. Figure 6 shows a high precision temperature compensates CMOS bandgap reference [18]. This latter is improved in order to generate Vref1 = 1.3 V, Vref2 = 1.4 V, Vref3 = 0.53 mV, and Vref4 = 0.99 mV reference voltages by means of adding four out-stages.Figure 6
Bandgap reference multioutput.The equation of the two generated currents, which are proportional toVEB and ΔVEB, to bias these four added stages, is the following equation:(1)I1=I2=αI3=βI4=γI5=δI6.As shown in Figure6, each current is divided into two other currents passing through two branches containing resistor and bipolar transistor in such a way that(2)I11=I22;I12=I21.We madeR2=R3, to make the voltage of A equal to B.The inputs of the operational amplifier are equalized. From Figure6, VA=VEB1. Consider(3)R3I11=R2I22,VA=VB,R2I22=VA=VB=VEB1,I22=VEB1R2,I21R1=VB-VEB2=VA-VEB2=VEB1-VEB2=ΔVEB,I21=ΔVEBR1.So, the outputs reference voltages of the proposed multioutput BGR can be obtained as(4)Vref1=R4I5=R4I2α=R4I21+I22α=R4αΔVEBR1+VEB1R2,Vref2=R5βΔVEBR1+VEB1R2,Vref3=R6γΔVEBR1+VEB1R2,Vref4=R7δΔVEBR1+VEB1R2.Unlike VEB1, which has a negative TC, ΔVEB has a positive TC. So, all outputs (Vref1, Vref2, Vref3, and Vref4) become almost autonomous from temperature. Figure 7 shows the simulation of these aforementioned output reference voltages as a function of temperature over the range −40°C to 120°C.Figure 7
Reference voltages versus temperature.


### 3.3. Current Sense

To sense the current on power transistor MP we have used theMcs transistor in the current sense circuit shown in Figure 8 to make the voltage of Vsd of Mcs and MP equal. We have used the OP. The current of Mcs MP can be described as the following equation:(5)IMcs=12μnCoxWcsLcs2VSG-VthpVSD-VSD2=Isens,IMP=12μnCoxWpLp2VSG-VthpVSD-VSD2=Ichg.Ichg and Isens are proportional to their aspect ratios. Their ratio can be described as(6)IsensIchg≅Wcs/LcsWp/Lp=1N.Figure 9 shows the simulation results of sensing currents.Figure 8
Current sense circuit.Figure 9
Simulation results of sensing currents; from top to bottom, the waveforms are the charging currentIchg and the sensed current Isens, respectively.


## 3.1. Current Generator

The current generator furnishes the reference currents,Iref1 and Iref2, to control the trickle CC and fast CC modes. We have opted for utilizing this architecture, as shown in Figure 5, which is not influenced by the temperature variation [17]. It is formed by a conventional architecture (M6-M6-M9-M10) where the passive resistor is changed with a PMOS transistor M18 and its gate bias generator. There are two diode-connected NMOS transistors and one PMOS transistor that make up the gate bias generator, for each mode (M11, M12, and M7 for Iref1 mode and M13, M14, and M8 for Iref2 mode). Whereas M7 copies the reference current I, the gate voltage of M18 is generated by the diode-connected transistors M11 and M12 to generate Iref1. We can generate the reference current Iref1 or Iref2 by the control switches M15 and M16. We integrate a transistor Meoc switcher to cancel the generation of Iref1 and Iref2 to end the charging process.Figure 5
Current generator circuit.


## 3.2. Bandgap Reference Multioutput

In our proposed design, four reference tensions would be prerequisite (Vref1, Vref2, Vref3, and Vref4), hence making use of multioutput bandgap reference tensions. Figure 6 shows a high precision temperature compensates CMOS bandgap reference [18]. This latter is improved in order to generate Vref1 = 1.3 V, Vref2 = 1.4 V, Vref3 = 0.53 mV, and Vref4 = 0.99 mV reference voltages by means of adding four out-stages.Figure 6
Bandgap reference multioutput.The equation of the two generated currents, which are proportional toVEB and ΔVEB, to bias these four added stages, is the following equation:(1)I1=I2=αI3=βI4=γI5=δI6.As shown in Figure6, each current is divided into two other currents passing through two branches containing resistor and bipolar transistor in such a way that(2)I11=I22;I12=I21.We madeR2=R3, to make the voltage of A equal to B.The inputs of the operational amplifier are equalized. From Figure6, VA=VEB1. Consider(3)R3I11=R2I22,VA=VB,R2I22=VA=VB=VEB1,I22=VEB1R2,I21R1=VB-VEB2=VA-VEB2=VEB1-VEB2=ΔVEB,I21=ΔVEBR1.So, the outputs reference voltages of the proposed multioutput BGR can be obtained as(4)Vref1=R4I5=R4I2α=R4I21+I22α=R4αΔVEBR1+VEB1R2,Vref2=R5βΔVEBR1+VEB1R2,Vref3=R6γΔVEBR1+VEB1R2,Vref4=R7δΔVEBR1+VEB1R2.Unlike VEB1, which has a negative TC, ΔVEB has a positive TC. So, all outputs (Vref1, Vref2, Vref3, and Vref4) become almost autonomous from temperature. Figure 7 shows the simulation of these aforementioned output reference voltages as a function of temperature over the range −40°C to 120°C.Figure 7
Reference voltages versus temperature.


## 3.3. Current Sense

To sense the current on power transistor MP we have used theMcs transistor in the current sense circuit shown in Figure 8 to make the voltage of Vsd of Mcs and MP equal. We have used the OP. The current of Mcs MP can be described as the following equation:(5)IMcs=12μnCoxWcsLcs2VSG-VthpVSD-VSD2=Isens,IMP=12μnCoxWpLp2VSG-VthpVSD-VSD2=Ichg.Ichg and Isens are proportional to their aspect ratios. Their ratio can be described as(6)IsensIchg≅Wcs/LcsWp/Lp=1N.Figure 9 shows the simulation results of sensing currents.Figure 8
Current sense circuit.Figure 9
Simulation results of sensing currents; from top to bottom, the waveforms are the charging currentIchg and the sensed current Isens, respectively.


## 4. Simulation Results

The results simulation waveforms of the proposed Li-ion battery charger are presented in Figure10. The reference currents are, respectively, 116 mA and 448 mA for working at the trickle constant current and fast constant current modes. The range voltages are presented as 2.5 V and 4.2 V, correspondingly. The stop current is 20 mA that is equal to around 1C/40 that we have defined. The transition between CC and CV mode occurs, as shown in Figure 11. And as can be observed in Figure 12, the system is stable.Figure 10
Simulation results of output voltage and current; from top to bottom, the waveforms are the battery voltageVbatt and the charging current Ichg, respectively.Figure 11
Transition from CC to CV mode.Figure 12
Frequency response of battery charger.Figure13 shows a layout of the battery charger integrated circuit. As expected, the Li-ion battery charger was designed using 0.18 μm technology; most of the area is occupied by the power PMOS pass device, in which the effective die area is 1.172 mm2.Figure 13
Layout of proposed charger.Table1 summarizes the performance characteristics of the proposed battery charger IC herein presented. Apparently, this work presents an average power efficiency up to 87% and better performance in terms of maximum current charge and very small chip size.Table 1
Summary of simulation results.
Topology
Adaptive LDO
Technology
0.18μm
Supply voltage (V)
4.8–5
Efficiency (%)
87 at 4.8 V84 at 5 V
Output voltage (V)
2.5–4.2
Maximum charging current
448 mA
Chip area
1.172 mm2


## 5. Conclusion

The presented Li-ion battery charger has been designed with 0.18μm CMOS processes. The proposed charger is operating within trickle constant current, fast constant current, and constant voltage triple mode with high power efficiency of 87%, small chip size, and low consumption and it is suitable for portable system as battery charger.



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*Source: 591986-2015-09-07.xml*