# Improvement of High-Power Three-Level Explosion-Proof Inverters Using Soft Switching Control Based on Optimized Power-Loss Algorithm

Authors: Shi-Zhou Xu; Feng-You He
Journal: Journal of Electrical and Computer Engineering
 (2015)

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## Abstract

The high-power three-level explosion-proof inverters demand high thermal stability of power devices, and a set of theories and methods is needed to achieve an accurate power-loss calculation of power devices, to establish heat dissipation model, and ultimately to reduce the power loss to improve thermal stability of system. In this paper, the principle of neutral point clamped three-level (NPC3L) inverter is elaborated firstly, and a fourth-order RC equivalent circuit of IGBT is derived, on which basis the power-loss model of IGBT and the optimized maternal power-loss thermal model, using an optimized power-loss algorithm, are established. Secondly, in accordance with the optimized maternal power-loss thermal model, the generic formulas of power-loss calculation are deduced to calculate the power-loss modification values of NPC3L and soft switching three-level (S3L) inverters, which will be the thermal sources during thermal analysis for maternal power-loss thermal models. Finally, the experiment conducted on the 2.1 MW experimental platform shows that S3L inverter has the same excellent output characteristics with NPC3L inverter, reduces the power loss significantly by 213 W in each half-bridge, and decreases the temperature by 10°C, coinciding with the theoretical calculation, which verifies the accuracy of optimized power-loss algorithm and the effectiveness of the improvement.


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## Body

## 1. Introduction

In explosion-proof inverters field, the NPC3L inverter is one of the most mature facilities of high-power three-level inverters at present [1]. The high-power explosion-proof inverters have the features of high current, flowing through the main circuit power devices, great power losses, and high reliability requirement. What is more, from the view of applications, there is a serious problem that the power loss of inverter power devices is too great, which will cause a high failure rate of inverter power devices and poor thermal stability of the whole system. In order to improve the existing NPC3L inverters, there are three issues to be addressed. The basal one is the accurate power-loss calculation of power devices, and it is the premise of thermal analysis and converter improvement. The second one is a general power-loss calculation and analysis theory of three-level inverter acting as evaluation criteria to predict the results of improvements. Finally, a new topology should be introduced to reduce the power loss effectively.Generally speaking, accurate power-loss calculation can figure out the existing power-loss values of three-level inverters, which will be a thermal source during the thermal analysis of inverter system. The inverter temperature rise is mainly caused by conduction loss and switching loss of power devices, while the conduction and switching characteristics of the power devices are very sensitive to temperature, so calculating the power loss of the device accurately is the foundation to optimize the design of inverters. Currently, there are many researches on power-loss calculation and thermal analysis for single IGBT module and two-level inverters [2–6]. However, three-level and two-level inverter currents are essentially different in the flow paths, and their losses of power devices are of huge difference. The fact that the literature [7–10] did not consider the impact of junction temperature of power devices on power losses is the main reason causing errors between their theoretical calculations and experimental results, where Dieckerhoff et al. [10] considered that the switching power loss of power device has a linear relationship with its withstanding voltage, while this assumption is approximately valid only in ±20% range of the test voltage. A much accurate losses calculation and heat dissipation method was introduced in [11], but it did not take all the thermal sources in consideration, which has an effect on the power devices and thermal analysis. In the literature [12], the transient modeling of loss and thermal dynamics in power semiconductor devices is analyzed, while it needs to improve the model by considering the peripheral circuits. Several soft switching inverter types and control methods are proposed in [13–18], where the S3L inverter in [18] has a much more significant effect on the reduction of power losses. It is the accurate thermal analysis methods of inverter system that can analyze the inverter temperature quantitatively, providing references for inverter improvements [19, 20]. In the existing loss calculation studies of three-level inverters, it lacks a system of theories and methods to provide theoretical support for the improvements. Before a new three-level topology improving the NPC3L inverter, it is necessary to apply a common theoretical calculation and method to anticipate its advantages. The S3L inverter proposed in the literature [18] holds the viewpoint that it can reduce the power loss in terms of the NPC3L inverter under the same conditions, but there is no quantitative experimental temperature to support it and demonstrate its effectiveness of improvement.For the above reasons, a general power-loss calculation method of three-level inverters was established in this paper based on the optimized power-loss algorithm in Section2, with which an accurate power-loss calculation and performance evaluation approach of three-level inverters was proposed. To improve NPC3L inverter, the S3L inverter working principle was elaborated in Section 3 and put into the general approach mentioned above. What is more, according to this approach, it is expected in Section 4 that the S3L inverter has the same excellent output characteristics with NPC3L inverter and it can reduce power loss by 213 W, bringing in a 10°C decrease in temperature intuitively. In the same section, the experiment results support the validity of the theoretical prediction. Finally, Section 5 concludes this paper.


## 2. General Optimized Power-Loss Algorithm Based on NPC3L Inverter

The main circuit topology of NPC3L inverter is shown in Figure1.Figure 1
The main circuit topology of NPC3L inverter.Each leg has four IGBTs, labeledTi1, Ti2, Ti3, and Ti4 (where i represents one phase of a, b, and c phases and each IGBT has one antiparallel diode, labeled Di1, Di2, Di3, and Di4, resp.) and two clamping diodes, labeled Di5 and Di6 [11, 21].At present, the IGBT device is a power module packaged by one IGBT and a fast recovery antiparallel diode. Therefore, its total power loss is composed of these two parts, expressed as follows:(1)Pmod⁡=PT+PD.The equivalent structure model of power device and heat sink is shown in Figure2.Figure 2
Equivalent structure model of power device and heat sink.It can be seen from Figure2 that the whole model consists of four conductive layers, and therefore if we consider the power device and the heat sink as a maternal model, the four conductive layers would be four submodels. On this basis, the thermal resistance and heat capacity of the four submodels can be calculated at first, respectively, and then all the four submodels’ thermal resistance and heat capacity constitute the total thermal resistance and heat capacity of the whole model.The calculation formula of thermal resistanceRth is described as follows:
(2)Rth=ΔTP=ΔTQ/Δt,
where ΔT is the temperature increase of submodel. P and Δt are the heat flow and time period, respectively. Then, the total thermal resistance of maternal model is shown as
(3)Rth-total=Rth1+Rth2+Rth3+Rth4.The calculation formula of thermal capacityCth is delivered as follows [20, 21]:
(4)Cth=QΔT.The total heat capacity of the maternal model can be written as [20, 21]
(5)Cth-total=Cth1+Cth2+Cth3+Cth4.Thus, the maternal model can be replaced alternatively by a fourth-order RC circuit, shown in Figure3.The fourth-order RC thermal resistance equivalent circuits of IGBT. (a) Partial network; (b) continuous network.
(a)
(b)According to the partial network structure of Figure3(a), the IGBT thermal resistance can be derived as [20, 21]
(6)Zthjc,T=∑i=1nRthi1-e-t/τii=1,2,3,4,
where τi is the RC time constant of each layer.The thermal equivalent circuit of IGBT module in steady state is shown in Figure4.Figure 4
The thermal resistance equivalent circuit of IGBT module in steady state.As a switching device, the IGBT’s power lossPT is primarily composed of conduction loss Pcon,T and switching loss Psw,T; namely [3–5],
(7)PT=Pcon,T+Psw,T.The conduction resistance, initial saturation voltage, and conduction loss of IGBT can be expressed, respectively, as follows [11]:
(8)rT=rT-25∘C+Kr,TTvj,T-25∘C,v0,T=v0,T-25∘C+Kv0,TTvj,T-25∘C,Pcon,T=v0,TI+rTI2,
where rT-25∘C and v0,T-25∘C are the conduction resistance and initial saturation voltage of IGBT with the junction temperature at 25°C; Kr,T and Kv0,T are the initial saturation voltage and conduction resistance temperature correction factor of IGBT; Tvj,T is the junction temperature of IGBT; I is the instantaneous current flowing through the IGBT.Combine the three-level working principle and optimized IGBT power-loss model, and the average conduction and switching losses formula ofT1 in a modulation voltage period will be as follows [11, 22]:
(9)Pcon,T1npc,spwm=f0∑k=pq(v0,T1+rT1ILk)ILkτkTs,Psw,T1npc,spwm=f0∑k=pqEsw,T1(ILk),
where f0 is the frequency of modulation voltage; τ(k) is the kth duty cycle of switching period; IL(k) is the average load current of the kth switching period; p and q represent the sampling period’s beginning and end of T1 during one modulation period, respectively.Generally speaking, when the carrier ratio is large enough, the discrete power-loss formula can be transformed into a continuous integral form, and the average conduction losses and switching losses ofT1 can be expressed as [22]
(10)Pcon,T1npc,spwm=12π∫φπv0,T1+rT1iLαiLαDαdαPcon,T1npc,spwm=mv0,T1Im4ππ-φcos⁡φ+sinφPcon,T1npc,spwm+mrT1Im24π1+43cos⁡φ+13cos⁡2φ,Psw,T1npc,spwm=12π∫φπfswEsw,T1iLαdαPsw,T1npc,spwm=fsw2πAsw,TIm212π-φ+12sin2φHHHHHHHHH+Bsw,TIm1+cos⁡φ+Csw,Tπ-φπ-φ+12sin2φPsw,T1npc,spwm·Udc/2UbaseDsw,TTvj,T1TbaseKsw,T.In accordance with the same calculation principle asT1’s, the conduction losses and switching losses (or reverse recovery losses) of D1, T2, D2, and D5 in the same half-bridge leg will be Pcon,D1npc,spwm, Prec,D1npc,spwm, Pcon,T2npc,spwm, Psw,T2npc,spwm, Pcon,D2npc,spwm, Prec,D2npc,spwm, Pcon,D5npc,spwm, and Prec,D5npc,spwm.Some explanatory notes in expressions (8)~(10) are as follows.v0,Tx=v0,T-25∘C+Kv0,T(Tvj,Tx-25∘C) denotes the xth IBGT’s initial saturation voltage;rTx=rT-25∘C+Kr,T(Tvj,Tx-25∘C) represents the xth IGBT’s conduction resistance;Tvj,Tx means the xth IGBT’S junction temperature;v0,Dx=v0,D-25∘C+Kv0,D(Tvj,Dx-25∘C) indicates the xth fast recovery diode’s initial saturation voltage;rDx=rD-25∘C+Kr,D(Tvj,Dx-25∘C) stands for the xth fast recovery diode’s conduction resistance;Tvj,Dx means the xth fast recovery diode’s junction temperature; what is more, x=1,2,5 [22].In accordance with the above step, the power losses of heat sink and IGBT maternal model can be calculated. However, there may be buffer circuit or something like that in the periphery around the power devices of different three-level topologies. That means part of the power difference (Pin-IGBT-Pout-IGBT) flowing through the IGBT model is dissipated in the IGBT model and some other part is consumed by the peripheral circuits; namely,
(11)Pin-IGBT-Pout-IGBT=PIGBT+Padd.Hence, it is necessary to optimize the maternal model, and the equivalent circuit of optimized maternal model is shown in Figure5.Figure 5
The equivalent circuit of optimized power-loss model.According to the equivalent circuit of optimized maternal model, the total power-loss equation of half-bridge leg can be modified as follows:(12)Ptotal=PT1+PD1+PT2+PD2+Padd.The general power-loss calculation of half-bridge leg of three-level inverters using SPWM modulation algorithm in a modulation period will be the one as follows [22, 23]:
(13)Ptotal=Pcon,T1npc,spwm+Psw,T1npc,spwm+Pcon,D1npc,spwm+Prec,D1npc,spwm+Pcon,T2npc,spwm+Psw,T2npc,spwm+Pcon,D2npc,spwm+Prec,D2npc,spwm+Padd,
where the SPWM modulation algorithm can be replaced by the actual algorithm, but the power-loss calculation has the same process based on optimized power-loss algorithm and maternal model, and all we should do is to change the variables consistent with the algorithm we are going to use. In addition, during the analysis of maternal module in Section 4, it is necessary to modify Padd by considering precharge current-limiting resistor, balanced resistors, absorption capacitance, DC-link capacitors, and buffer devices of S3L inverter.


## 3. S3L Inverter Principle

As shown in Figure6, one full-bridge leg topology of S3L inverter contains four IGBTs (Ta1′~Ta4′), four diodes (Da1′~Da4′), snubber inductor, snubber capacitances C1′ and C2′, and four snubber diodes DaT1~DaT4, where the latter four constitute the snubber circuit [14].Figure 6
One full-bridge leg topology of S3L inverters.S3L three-level inverter switching state and commutation process are shown in Tables1 and 2.Table 1
Switching states of S3L inverter.
Switching state
+
0
-
U
load
′
+
U
d
/
2
0
-
U
d
/
2
Conduction
T
a
1
′ or Da1′
T
a
2
′, Da2′ or Ta3′, Da3′
T
a
4
′ or Da4′
T
a
1
′
ON
OFF
OFF
T
a
2
′
OFF
ON
ON
T
a
3
′
ON
ON
OFF
T
a
4
′
OFF
OFF
ONTable 2
Commutation processes of S3L inverter.
Load current is positive
Load current is negative
Commutation
Allowed
Involved
Commutation
Allowed
Involved
T
a
1
′ → Da3′, Ta3′
YES
C
2
′
D
a
1
′ → Da2′, Ta2′
YES
C
2
′
D
a
3
′, Ta3′ → Ta1′
YES
C
2
′
D
a
2
′, Ta2′ → Da1′
YES
C
2
′
D
a
3
′, Ta3′ → Da4′
YES
C
1
′
D
a
2
′, Ta2′ → Ta4′
YES
C
1
′
D
a
4
′ → Da3′, Ta3′
YES
C
1
′
T
a
4
′ → Da2′, Ta2′
YES
C
1
′
T
a
1
′ → Da4′
NO
—
D
a
1
′ → Ta4′
NO
—
D
a
4
′ → Ta1′
NO
—
T
a
4
′ → Da1′
NO
—For zero load current commutation process, it can be considered as three special cases, specified in Table3.Table 3
Commutation processes with zero load current.
Commutation
Allowed
Involved
T
a
1
′ → Da3′, Ta3′
YES
C
2
′
D
a
3
′, Ta3′ → Ta1′
YES
C
2
′
T
a
1
′ → Da4′
NO
—
D
a
1
′ → Da2′, Ta2′
YES
C
1
′
D
a
2
′, Ta2′ → Da1′
YES
C
1
′
D
a
1
′ → Ta4′
YES
—Each of these commutation processes is slightly different, and therefore only theTa1′→Da3′,Ta3′ was chosen to describe the working details as an example. In order to facilitate the analysis, the load current in the commutation process is supposed to be constant substantially and its path is marked in red.Before the commutation process begins,Ta1′ carries the positive load current ILoad, and Ta3′ is switched on (but does not carry current, because of diode Da3′); Ta2′ and Ta4′ are switched off. The output terminal is connected to the positive terminal of the input DC voltage. The capacitor C1′ is discharged; the capacitor C2′ is charged to -Ud. The current in the snubber inductor is zero (Figure 7(a)) [14].Commutation process ofTa1′→Da3′, Ta3′. (a) Before commutation; (b) t0≤t<t1 period; (c) t1≤t<t2 period; (d) after commutation.
(a)
(b)
(c)
(d)TheTa1′→Da3′,Ta3′ commutation process starts as soon as Ta1′ is switched off, when Ta2′ is switched off, and what is more Ta3′ and Ta4′ remain switched on and off, respectively. In accordance with the different current path and IGBT action sequences, the whole process can be divided into two periods.(1)  t0≤t<t1Period. Two current loops are generated during this stage. One of them is the oscillating current loop constituted by C2′, Ta2′, Da2′,L, Ud/2, and DaT4; the other is the load current loop generated by the load current flowing through C2′, load, midpoint 0, Ud/2, and DaT4. As shown in Figure 7(b), the two current paths overlap each other. It is noteworthy that the current flow decreases rapidly to zero, and the rising slope of the voltage both ends is limited to a small amplitude, so that the power loss is correspondingly small. At this time, the switching-off process of Ta1′ is the so-called soft switching.(2)  t1≤t<t2Period. The first period of commutation process comes to an end, when C2′ discharges and Da4′ starts conducting. At the same time, the current flowing through inductor L reduces to 0, and what is more Ta3′ and Da3′ start to conduct as soon as Da2′ switches off. Since the voltage applied to inductor L is the constant Ud/2, the current flowing through L increases linearly with time. In contrast, the current flowing through Da4′ decreases linearly with time (as shown in Figure 7(c)). At the same time when the current flowing through Da4′ decreases to 0, the current flowing through the snubber inductor is equivalent to the load current, and then the whole commutation process comes to an end. Da4′ is blocked; Ta3′ and Da3′ are carrying the load current and C2′ is discharged simultaneously (Figure 7(d)).The red lines represent the current path ofTa1′→Da3′,Ta3′ commutation process in S3L inverter during different periods.It can be seen from the figures that the ratios of the current flowing throughSa2′, Da2′, Sa3′, and Da3′ are limited within a limited range. Meanwhile, the switching process of Sa3′ is soft switching and its power loss is small as well. Similarly, the ratios of currents flowing through Da4′ and Da1′ are limited in a certain range. Therefore, a substantial reduction of charging energy is realized during the reverse recovery and the power loss of charging is reduced with it as well.The rest of commutation processes in Table3 work in a similar way, which is soft switching type and has nothing to do with the influences caused by the amplitude and angle (0°~360°) of load current, so it will not be detailed, respectively.


## 4. Simulation and Experiment

Based on the theories and algorithms above, the experiment was conducted on a 2.1 MW experimental platform (Figures8 and 9), which includes two 2.1 MW motors and both of them are controlled running under the same conditions by NPC three-level inverter and S3L inverter, respectively, to carry out the comparing experiment of improvement effectiveness.Figure 8
The 2.1 MW dragging platform-motor part.Figure 9
The 2.1 MW dragging platform-inverter part.It can be seen by analyzing the waveforms in Figures10 and 11 that the output waveforms of the two three-level inverters, which use the same SPWM modulation algorithm and control parameters, are almost consistent in waveform distortion and harmonic content, when the peak value of output phase voltage is Vdc/3. Therefore, it is considered that the S3L inverter has the same output characteristics with NPC three-level inverter with the same modulation conditions, and S3L inverter has a much higher harmonic content in output voltage and slightly smaller total distortion rate; however, its low-order harmonics account for a much bigger proportion. It can be summarized by analyzing Figures 12 and 13 that S3L inverter has the same excellent output waveforms with NPC3L inverter and its output waveforms of current are smoothing and approximate sine curve.The comparison of phase-voltage harmonic characteristics withm=1.154.
(a)
The modulation waveform atm=1.154
(b)
NPC harmonic content
(c)
S3L harmonic contentThe comparison of phase-voltage harmonic characteristics withm=0.1.
(a)
The modulation waveform atm=0.1
(b)
NPC harmonic content
(c)
S3L harmonic contentThe comparison of voltage and current in the same IGBT of two inverters.
(a)
NPC3L waveforms
(b)
S3L waveformsThe output voltage and current waveforms of S3L inverter.
(a)
The AB line voltage and phase A current
(b)
Details of AB line voltage and phase A currentIt can be seen by analyzing Figures14(a)~14(f) that the IGBT (Ta2′) current surge of S3L inverter is only two-thirds of NPC3L inverter (Ta2) at the switching-on instant; the IGBT (Ta2′) voltage surge of S3L inverter is only half of NPC3L inverter (Ta2) at the switching-off instant; overall, S3L inverters have much lower switching-on and switching-off voltage and current surges than NPC3L inverters.The comparative experiments of IGBT and diode’s characteristics.
(a)
IGBT switch-on (NPC)
(b)
IGBT switch-on (S3L)
(c)
IGBT switch-off (NPC)
(d)
IGBT switch-off (S3L)
(e)
NPC diode reverse recovery
(f)
S3L diode reverse recoveryIt is pointed out in the optimized power-loss calculation algorithm and maternal module concept that it is necessary to calculate the power losses of other devices except power devices on the same bridge to modify the total loss when performing the system thermal analysis. In this paper the modification aspects include the power losses of precharge current-limiting resistor, balanced resistors, absorption capacitance, DC-link capacitors, and buffer devices of S3L inverter. By the way, in any other cases the modification can be calculated in accordance with the actual conditions. These devices are usually fixed in the explosion-proof inverter housing and some of them are working all the way releasing some power as constant thermal sources, which will elevate the ambient temperature of the whole cabinet and affect the thermal flow in the cabinet. All of this above will finally influence the power-loss calculation and generate an error between theoretical calculation and actual value. The conclusion can be drawn by analyzing Figures15(a)~15(d) that the power loss of IGBT Ta1 and its antiparallel diode Da1 in NPC three-level inverters is much bigger than Ta1′ and its antiparallel diode Da1′ in S3L inverter with different modulations and load impedance angles. According to the optimized power-loss calculation algorithm, the additional power loss of each power device module was calculated and completed the modification of maternal model power loss; in summary, the half-bridge total power loss of S3L inverter maternal model is much smaller than NPC’s inverter after the modification by 213 W, on which basis the total power loss of inverters can be obtained.The half-bridge power devices’ power-loss calculation of the two inverters based on optimized power-loss algorithm. (a)Ta1 power loss; (b) Ta1′ power loss; (c) Da1 power loss; (d) Da1′ power loss; (e) NPC additional power-loss correction; (f) S3L additional power-loss correction.
(a)
T
a
1 power loss
(b)
T
a
1
′ power loss
(c)
D
a
1 power loss
(d)
D
a
1
′ power loss
(e)
NPC additional power-loss correction
(f)
S3L additional power-loss correctionThe calculated power-loss value before modification and after modification was put into the thermal model of maternal model built by ANSYS ICEPAK, respectively, as a thermal resource value, and the thermal analysis results of two inverters were presented in Figures16 and 17. It can be derived by analyzing the Figures 17(a) and 17(b) that the heat sink temperature of S3L inverter is about 8°C lower than that of NPC three-level inverter running in the same cooling systems and operating under the same conditions, while the same value in Figures 16(a) and 16(b) before modification is 3°C. It is easy to find that the substrate temperature of S3L inverter is 10°C lower than that of NPC inverter approximately running in the same cooling systems and operating under the same conditions by analyzing Figures 17(c) and 17(d). But there is a 4°C decline in Figures 16(c) and 16(d) before modification. Overall, the analysis shows that the power devices’ temperature of S3L inverter has a 9°C advantage over NPC inverter under modification and a 3.5°C advantage without modification.The temperature distribution 3D map of maternal thermal models before modification. (a) One heat sink temperature chart of NPC3L inverter; (b) one heat sink temperature chart of S3L inverter; (c) one substrate temperature chart of NPC3L inverter; (d) one substrate temperature chart of S3L inverter.
(a)
(b)
(c)
(d)The temperature distribution 3D map of maternal thermal models after modification. (a) One heat sink temperature chart of NPC3L inverter; (b) one heat sink temperature chart of S3L inverter; (c) one substrate temperature chart of NPC3L inverter; (d) one substrate temperature chart of S3L inverter.
(a)
(b)
(c)
(d)By observing the experiment results in Figures18(a) and 18(b) the fact that the heat sink surface temperature of S3L inverter is about 6°C lower than that of NPC three-level inverter in average under the same conditions can be obtained, which is in line with the theoretical analysis expectation; by observing the experiment results in Figures 18(c) and 18(d) the fact that the IGBT substrate temperature of S3L inverter is lower than NPC three-level inverter by 11°C can be figured out, which is consistent with the theoretical analysis results. Generally speaking, the experimental results show that the power device temperature of S3L inverter is lower than that of NPC three-level inverter by 10°C approximately, which is much closer to the theoretical analysis result 9°C with modification and only has 1°C error under these experiment conditions.The experimental temperature results of IGBT’s surface and substrate. (a) IGBT surface temperature of NPC3L inverter; (b) IGBT surface temperature of S3L inverter; (c) IGBT substrate temperature of NPC3L inverter; (d) IGBT substrate temperature of S3L inverter.
(a)
(b)
(c)
(d)In summary, the maternal model based on the optimized power-loss algorithm has a much higher thermal analysis accuracy in the improvement process of three-level inverters, which offers a 1°C error between theoretical calculation and experiment value in this paper, and can be used as a tool to support the accurate power-loss calculation and thermal analysis; using the S3L inverter based on the soft switching control to improve the NPC three-level inverter can get a good result that S3L inverter has the same excellent output characteristic with NPC three-level inverter and has a great advantage in reducing power loss, with a 213 W decline in each half-bridge and 10°C decline on power device temperature. The thermal stability of three-level inverters can be enhanced by this improvement.


## 5. Conclusions

The optimized maternal power-loss thermal models of NPC three-level inverter and S3L inverter were established based on the optimized power-loss algorithm, and a set of general optimized power-loss calculation formulas was derived to modify the total power loss and figure out the modification power-loss values. Then, these values were considered as thermal sources to analyze the maternal thermal models. The three-level inverter can be improved by comparing and analyzing power-loss modification values and experiment results. Based on this principle and methods, the fact that, under the same conditions, the power-loss modification value of S3L inverter is smaller than that of NPC three-level inverter by 213 W and has a 9°C advantage is obtained, which is only 1°C smaller than the experiment result. Experimental results validate the proposed theoretical calculation and analysis and prove the effectiveness of the improvement.



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*Source: 571209-2015-03-02.xml*