# Design Methodology for Interfacing DERs to Power Systems through VSC

Authors: A. Valderrabano-Gonzalez; F. Beltran-Carbajal; R. Tapia-Olvera; O. Aguilar-Mejia; J. C. Rosas-Caro
Journal: Mathematical Problems in Engineering
 (2021)

---

## Abstract

This paper presents a methodology to connect distributed energy resources via an 84-pulse voltage source converter to three-phase system grid or load of standard or nonstandard voltage values. Transfer function blocks are included to illustrate interfacing among converters. The main input-output values to be considered in the application are detailed and the system can be modified to be included in other systems without loss of generality. The definition of the reactive component for supporting grid or load variations without degrading the overall performance is carried by for the DC-DC converter. A control variable for reducing the DC gain is used to improve the settling time. Our proposal defines the capacitive and inductive component values for an operating point and gives the option to reduce them when adding smoothed variations and adaptive controllers.


---

## Body

## 1. Introduction

Voltage source converters (VSC) have been used for many years to adapt DC voltage to three-phase AC voltage load or interfacing to grid for improving power quality by reducing the conducted low-frequency phenomena described in [1]. They are encouraged to follow the attributes of the steady-state phenomena listed in [2]. In recent years, VSCs have been used to add compatibility for the interoperability between utility electric power systems (EPSs) and distributed energy resources (DERs) [3]. Topologies used for VSC vary from multilevel, pulse width modulation (PWM), and multipulse, and each one has some advantages over the others depending on the application. Because of that, combinations of topologies have been used for improving the response in particular applications, such as that described in [4] for sag, swell, three-phase failure, and motor startup and in [5] for large induction motor control. DC-link capacitor or battery energy storage systems (BESS) are needed for an optimal operation of the system based on VSC [6, 7]. Low ripple or almost constant DC-link signals require bulky components leading to slow dynamic response of the system while maintaining the DC voltage under established parameters. Complex control routines or switching strategies for reducing these components are needed [8]. Maintaining the voltage level on the capacitor is another field of research, as we can get the energy from AC or DC sources and with different amplitudes. When high DC gain is required, quadratic converters can be used [9, 10], but low modifications on the DC input voltage can bring to large AC output voltage variations, which might require complex control strategies to operate [11]. Practical engineering applications require the system to work with the least amount of measurements possible, but the controllers have to be robust enough to parametric variation, nonmodeled dynamics, and disturbances, so, the system becomes high complex to model, even in a specific application [12, 13]. One of the hardest tasks for the power systems’ designer is to develop a set of component values for interfacing standard or nonstandard nominal system voltages of low and medium voltages with distributed energy resource connection [14, 15]. This paper defines a methodology for connecting an 84-pulse VSC to the grid or load specifying the needed DC voltage for it. As this voltage can be obtained from different sources, we are using the grid with standard or nonstandard values to build the AC-DC converter. The configuration is complemented by a simple buck-boost converter with a limited gain to avoid big voltage variations in the load. The VSC’s output is defined by transformers’ output and DC input, but we can select the transformers’ ratio gain ″n″ to limit DC gain. Capacitive and inductive component values are chosen to limit the ripple, but by using programmed trajectories for smoothed transitions, the reduction of these components and settling time is granted. DER can be connected as the AC source when its output is AC or as the input to the buck-boost converter when its output is DC without changing the method. Simulations for a big load are included to verify the appropriateness of the proposal.


## 2. Methodology

This section deals with the voltage characteristics of the three-phase system to be converted to a DC signal using a noncontrolled three-phase full-wave rectifier. After that, the DC signal might need to be adapted in magnitude; for this, we use a buck-boost converter. Then, the DC signal is converted again to a three-phase quasi-sinusoidal signal using an 84-pulse voltage source converter. Lastly, this signal will be connected to the grid if the system is used as a StatCom or to the load if this works in an isolated system. This scheme is presented in Figure1. This scheme illustrates the kind of converter required to adapt the power signals for feeding a load or give the energy back to the grid. The starting point would be associated to the type of distributed energy resource output voltage available.Figure 1
Block diagram of the proposal with variable names.In many cases, a single AC-AC converter is preferred over this three part cascaded converter, but the harmonic distortion obtained can be very high, and controlling it might be a hard task, reducing its capacity of use to a specific application. For the sake of simplicity, the variable names used on this section are detailed in Table1.Table 1
Acronyms and abbreviations.
ParametersDescriptionUnitv3ϕInput grid RMS line to line voltageVVmInput grid phase voltage amplitudeVva,b,cInput grid phase voltageVVmeanFull wave rectified average voltageVVRMSFull wave rectified RMS voltageVRFRipple on the rectified DC output%VmoduleDC equivalent of a three-phase input voltageVVDCDC capacitor voltage for 7-level inverterVVoCapacitor chain voltage4VDCVV_⋅_mOutput VSC phase peak voltage amplitudeVv_⋅_3ϕOutput VSC RMS line to line voltageVaOptimized reinjection transformer ratioNonenInteger factor for adjusting output transformers ratioNonevu,v,wOutput VSC phase voltageVvu1,v1,w1Output VSC fundamental frequency phase voltageVδPhase shift amongv3ϕ and v0⋅03ϕradTHDPer phase output voltage total harmonic distortion%


### 2.1. Input AC-DC Converter

On this study, a balanced three-phase system withv3ϕ of nominal RMS line voltage is used. For rectifying, it is needed to have a neutral point, so the phase peak voltage can be obtained by Vm=v3ϕ2/3. Then, the phase voltage system is described by(1)va=Vmsinωt,vb=Vmsinωt−2π3,vc=Vmsinωt+2π3.When this system is feeding a three-phase full wave rectifier for obtaining a DC signal, the average valueVmean and the root mean square VRMS can be calculated by(2)Vmean=6π∫0π/6vc−vbdt,(3)VRMS=6π∫0π/6vc−vb2dt.With these two values, it is possible to know the ripple factor (RF) on the rectified signal. This is a measure of how far is a DC signal from a constant value. This is obtained by(4)RF=VRMS2−Vmean2Vmean.The lowerRF on the output would bring better results in the DC-DC conversion, or it can be used to calculate a passive input filter.When we manage control tasks for alternating currents, the usage of nonvarying signals reduces the computational effort, so it is important to use signals that are pure DC, and we can utilize the module of the three signals, defined by (5), as the reference:(5)Vmodule=va2+vb2+vc2.Consider a balanced system,Vmodule=Vm3/2, which is equal to the value of line voltage v3ϕ.


### 2.2. Output DC-AC Converter

When using an 84-pulse voltage source converter for obtaining the AC signal from the DC signal, we get the peak value of the three-phase staircase sinusoidalV_⋅_m when the YY converter is at its maximum value, but YΔ is at its minimum on the diagram of Figure 2.Figure 2
84-pulse voltage source converter.Considering the converter structure defined in [5] and references therein,(6)V_⋅_m=2n32VDC+a3VDC+n32VDC−a3VDC.This equation shows2n/3 as the gain of the six pulses YY transformers, n/3 as the gain of the YΔ transformers, 3VDC as the amplitude of the seven-level inverter, 2VDC is the central point or offset for the seven-level inverter, and a is the reinjection transformer ratio. The factor n is included in the case; we need to change the voltage output level in a fixed amount on the output transformers or add a coupling transformer with an integer transformer ratio. The factor a=0.5609 is the optimized value to minimize the voltage THD, being according to IEEE Recommended Practice and Requirements for Harmonic Control in Electric Power Systems [16]. A strict reinjection transformer turns’ ratio a is not obligated, as this factor can have 12.5% of variation to have a maximum THD lower than 3% when DC sources are used for the staircase signal generation [4].The VSC phase voltagevu can be calculated using the Fourier series of the staircase signal obtained at the VSC’s output [4], which is related to the VSC phase peak voltage amplitude V_⋅_m by the following expression:(7)vu=∑m=1∞Vu2m−1sin2m−1ωt,Vu2m−1=4V_⋅_m3π2m−1A2m−1+aB2m−1,A2m−1=2+2cos13π2m−1+23cos16π2m−1,B2m−1=∑i=020Cicosi42π2m−1,Ci=−3,1,1,1,1,1,1,…−33,3−1,3−1,3−1,3−1,3−1,3−1,…−3,−3+2,−3+2,−3+2,−3+2,−3+2,−3+2.In a similar way,vv and vw are obtained with a phase shift of −2π/3 rad and 2π/3 rad, respectively. Figure 3 depicts the 84-pulse output used with this strategy.Figure 3
84-pulse output voltage.The expected RMS line voltage for the VSC staircase signal to be connected to the point of common coupling (PCC) is(8)v_⋅_3ϕ=22nVDC−33a2+6a2+33+63,where VDC is the DC voltage of one capacitor or source of the ones connected in chain on the 7-level inverter, that is, the first part of the 84-pulse converter of Figure 2, and can be obtained with the next expression:(9)VDC=v_⋅_3ϕ22n−33a2+6a2+33+6.In a natural way, it can be noticed that it is needed to match the input voltage from the grid to the output voltage of the VSC affected by a gain. This gain can be obtained by a DC-DC converter that will be analyzed in Section2.3, but it can drift the system to obtain a high DC gain. If we do not want to increase the DC components, we can take advantage of the transformers used on the VSC’s output by modifying the transformer ratio by the factor "n," which can be obtained by(10)ratio=v_⋅_3ϕv3ϕ,n=1form=1r−1forratio<0.5rotherwise.In this equation, “r” is the greatest integer less than or equal to “ratio.”The total harmonic distortion (THD) indicates how far is the shape of the generated staircase signalvu,v,w, from a pure sinusoidal signal with the grid fundamental frequency. It can be computed by adding all the RMS ratios from single harmonic to the fundamental frequency signal or using the simplified version illustrated in (11), which is utilized for the data presented in this paper:(11)THD=vuvu12−1,where vu represents the output VSC phase voltage and vu1 is the output VSC fundamental frequency phase voltage.


### 2.3. DC-DC Converter Design

It is important to verify the input and output voltage levels to define the type of the DC-DC converter to be used. A great deal of converters to adapt the DC voltage levels are available in the literature; many of them are encouraged to bring a high gain and are considered to step-up the voltage, but not all of them have the ability to step-down it. Among the ones with both attributes, Divya Navamani et al. [9] combine quadratic boosting with a multiplier cell, while Zhang et al. [10] merge one boost converter, one buck-boost converter, and one buck converter having a quadratic gain. In comparison, Hasanpour et al. [17] use a buck-boost converter along with a coupled inductor for increasing the voltage gain. As we are dealing with a rectified signal, we use Vmean (2) as input. The 7-level converter of Figure 2 goes up to 4VDC, so we use this voltage as the output Vo of the converter. This work deals with the combination of one buck and one boost converter on their basic configuration connected in cascade to increase the dynamic range conversion and be able to reduce or increase the output using a simple configuration, as depicted in Figure 4.Figure 4
Positive output buck-boost converter.The switchS1, diode D1, and inductor L in the dashed box constitute the first part of the converter, forming a buck converter, while the second part, that is also the inductor L, switch S2, and diode D2 in the dotted box, is forming the boost converter.In order to design this DC to DC converter, it is needed to know the parameters and variables of the system where it will be immersed. Considering a balanced system, the power needed for the load will be generated in a balanced way, so the base impedance can be calculated from (12) as(12)ZB=v3ϕline2P3ϕ.This impedance is used for the capacitive and inductive component calculation.The gain of these buck and boost converters considering continuous conduction mode (CCM) can be obtained by (13) and (14), respectively:(13)Vo′Vmean=D,(14)VoVo′=11−D,where D is the duty cycle of the switches. It is important to remember that the output voltage of the DC-DC converter will split to the four capacitors of the seven-level inverter of the 84-pulse voltage source converter, so Vo=4VDC. As both converters are connected in a cascaded way, using the expected interfacing gain, the equation that dominates the ratio output/input is(15)VoVmean=D1−D,where Vo=4VDC is the converter output voltage and Vmean is the source voltage. It is important to notice from (15) that when D is lower than 50%, the converter is functioning as a buck, with a transfer ratio close to a linear function; with D = 50%, the output is equal to the input, and for larger values of D, the converter has a boost behavior, but it becomes highly nonlinear when D is larger than 70%, as depicted in Figure 5. For keeping the conversion ratio within the most linear part of the graphic, the proposal is to have 1/3<D<2/3, which bonds the ratio output/input to 1/2<Vo/Vmean<2. If a higher ratio is expected, we will use n on the output transformers of the VSC.Figure 5
Buck-boost voltage ratio.At the moment of writing, there is a wide variation of switching times allowed on the available devices. We have chosen a low switching frequencyfs=20KHz in order for this strategy to work with most of the devices. D is the duty cycle defined as the time the switch is closed (ton) in relation to the switching period (T=1/fs):(16)D=tonT.The controlling variable for the converter output voltage is going to be the duty cycleD, so it is convenient to represent (16) as the voltage transfer function:(17)D=VoVmean+Vo.The size of the capacitive and inductive components is obtained for continuous conduction mode, considering the motor load is requiring the nominal line current and the impedance as three times the the ratio between nominal voltage and current:(18)L=VmeanfsΔILD,C=VoDZBfsΔVC.On (18), ΔIL and ΔVC are the allowable variations on the inductor current and voltage capacitor and are selected as 1% of the nominal current and 1% of the rated voltage at the steady state.


## 2.1. Input AC-DC Converter

On this study, a balanced three-phase system withv3ϕ of nominal RMS line voltage is used. For rectifying, it is needed to have a neutral point, so the phase peak voltage can be obtained by Vm=v3ϕ2/3. Then, the phase voltage system is described by(1)va=Vmsinωt,vb=Vmsinωt−2π3,vc=Vmsinωt+2π3.When this system is feeding a three-phase full wave rectifier for obtaining a DC signal, the average valueVmean and the root mean square VRMS can be calculated by(2)Vmean=6π∫0π/6vc−vbdt,(3)VRMS=6π∫0π/6vc−vb2dt.With these two values, it is possible to know the ripple factor (RF) on the rectified signal. This is a measure of how far is a DC signal from a constant value. This is obtained by(4)RF=VRMS2−Vmean2Vmean.The lowerRF on the output would bring better results in the DC-DC conversion, or it can be used to calculate a passive input filter.When we manage control tasks for alternating currents, the usage of nonvarying signals reduces the computational effort, so it is important to use signals that are pure DC, and we can utilize the module of the three signals, defined by (5), as the reference:(5)Vmodule=va2+vb2+vc2.Consider a balanced system,Vmodule=Vm3/2, which is equal to the value of line voltage v3ϕ.


## 2.2. Output DC-AC Converter

When using an 84-pulse voltage source converter for obtaining the AC signal from the DC signal, we get the peak value of the three-phase staircase sinusoidalV_⋅_m when the YY converter is at its maximum value, but YΔ is at its minimum on the diagram of Figure 2.Figure 2
84-pulse voltage source converter.Considering the converter structure defined in [5] and references therein,(6)V_⋅_m=2n32VDC+a3VDC+n32VDC−a3VDC.This equation shows2n/3 as the gain of the six pulses YY transformers, n/3 as the gain of the YΔ transformers, 3VDC as the amplitude of the seven-level inverter, 2VDC is the central point or offset for the seven-level inverter, and a is the reinjection transformer ratio. The factor n is included in the case; we need to change the voltage output level in a fixed amount on the output transformers or add a coupling transformer with an integer transformer ratio. The factor a=0.5609 is the optimized value to minimize the voltage THD, being according to IEEE Recommended Practice and Requirements for Harmonic Control in Electric Power Systems [16]. A strict reinjection transformer turns’ ratio a is not obligated, as this factor can have 12.5% of variation to have a maximum THD lower than 3% when DC sources are used for the staircase signal generation [4].The VSC phase voltagevu can be calculated using the Fourier series of the staircase signal obtained at the VSC’s output [4], which is related to the VSC phase peak voltage amplitude V_⋅_m by the following expression:(7)vu=∑m=1∞Vu2m−1sin2m−1ωt,Vu2m−1=4V_⋅_m3π2m−1A2m−1+aB2m−1,A2m−1=2+2cos13π2m−1+23cos16π2m−1,B2m−1=∑i=020Cicosi42π2m−1,Ci=−3,1,1,1,1,1,1,…−33,3−1,3−1,3−1,3−1,3−1,3−1,…−3,−3+2,−3+2,−3+2,−3+2,−3+2,−3+2.In a similar way,vv and vw are obtained with a phase shift of −2π/3 rad and 2π/3 rad, respectively. Figure 3 depicts the 84-pulse output used with this strategy.Figure 3
84-pulse output voltage.The expected RMS line voltage for the VSC staircase signal to be connected to the point of common coupling (PCC) is(8)v_⋅_3ϕ=22nVDC−33a2+6a2+33+63,where VDC is the DC voltage of one capacitor or source of the ones connected in chain on the 7-level inverter, that is, the first part of the 84-pulse converter of Figure 2, and can be obtained with the next expression:(9)VDC=v_⋅_3ϕ22n−33a2+6a2+33+6.In a natural way, it can be noticed that it is needed to match the input voltage from the grid to the output voltage of the VSC affected by a gain. This gain can be obtained by a DC-DC converter that will be analyzed in Section2.3, but it can drift the system to obtain a high DC gain. If we do not want to increase the DC components, we can take advantage of the transformers used on the VSC’s output by modifying the transformer ratio by the factor "n," which can be obtained by(10)ratio=v_⋅_3ϕv3ϕ,n=1form=1r−1forratio<0.5rotherwise.In this equation, “r” is the greatest integer less than or equal to “ratio.”The total harmonic distortion (THD) indicates how far is the shape of the generated staircase signalvu,v,w, from a pure sinusoidal signal with the grid fundamental frequency. It can be computed by adding all the RMS ratios from single harmonic to the fundamental frequency signal or using the simplified version illustrated in (11), which is utilized for the data presented in this paper:(11)THD=vuvu12−1,where vu represents the output VSC phase voltage and vu1 is the output VSC fundamental frequency phase voltage.


## 2.3. DC-DC Converter Design

It is important to verify the input and output voltage levels to define the type of the DC-DC converter to be used. A great deal of converters to adapt the DC voltage levels are available in the literature; many of them are encouraged to bring a high gain and are considered to step-up the voltage, but not all of them have the ability to step-down it. Among the ones with both attributes, Divya Navamani et al. [9] combine quadratic boosting with a multiplier cell, while Zhang et al. [10] merge one boost converter, one buck-boost converter, and one buck converter having a quadratic gain. In comparison, Hasanpour et al. [17] use a buck-boost converter along with a coupled inductor for increasing the voltage gain. As we are dealing with a rectified signal, we use Vmean (2) as input. The 7-level converter of Figure 2 goes up to 4VDC, so we use this voltage as the output Vo of the converter. This work deals with the combination of one buck and one boost converter on their basic configuration connected in cascade to increase the dynamic range conversion and be able to reduce or increase the output using a simple configuration, as depicted in Figure 4.Figure 4
Positive output buck-boost converter.The switchS1, diode D1, and inductor L in the dashed box constitute the first part of the converter, forming a buck converter, while the second part, that is also the inductor L, switch S2, and diode D2 in the dotted box, is forming the boost converter.In order to design this DC to DC converter, it is needed to know the parameters and variables of the system where it will be immersed. Considering a balanced system, the power needed for the load will be generated in a balanced way, so the base impedance can be calculated from (12) as(12)ZB=v3ϕline2P3ϕ.This impedance is used for the capacitive and inductive component calculation.The gain of these buck and boost converters considering continuous conduction mode (CCM) can be obtained by (13) and (14), respectively:(13)Vo′Vmean=D,(14)VoVo′=11−D,where D is the duty cycle of the switches. It is important to remember that the output voltage of the DC-DC converter will split to the four capacitors of the seven-level inverter of the 84-pulse voltage source converter, so Vo=4VDC. As both converters are connected in a cascaded way, using the expected interfacing gain, the equation that dominates the ratio output/input is(15)VoVmean=D1−D,where Vo=4VDC is the converter output voltage and Vmean is the source voltage. It is important to notice from (15) that when D is lower than 50%, the converter is functioning as a buck, with a transfer ratio close to a linear function; with D = 50%, the output is equal to the input, and for larger values of D, the converter has a boost behavior, but it becomes highly nonlinear when D is larger than 70%, as depicted in Figure 5. For keeping the conversion ratio within the most linear part of the graphic, the proposal is to have 1/3<D<2/3, which bonds the ratio output/input to 1/2<Vo/Vmean<2. If a higher ratio is expected, we will use n on the output transformers of the VSC.Figure 5
Buck-boost voltage ratio.At the moment of writing, there is a wide variation of switching times allowed on the available devices. We have chosen a low switching frequencyfs=20KHz in order for this strategy to work with most of the devices. D is the duty cycle defined as the time the switch is closed (ton) in relation to the switching period (T=1/fs):(16)D=tonT.The controlling variable for the converter output voltage is going to be the duty cycleD, so it is convenient to represent (16) as the voltage transfer function:(17)D=VoVmean+Vo.The size of the capacitive and inductive components is obtained for continuous conduction mode, considering the motor load is requiring the nominal line current and the impedance as three times the the ratio between nominal voltage and current:(18)L=VmeanfsΔILD,C=VoDZBfsΔVC.On (18), ΔIL and ΔVC are the allowable variations on the inductor current and voltage capacitor and are selected as 1% of the nominal current and 1% of the rated voltage at the steady state.


## 3. Simulation Results

The proposed methodology is suitable to be used by DC or AC sources to be connected to AC grid or load. In order to test it, this paper uses a 500 HP, 2300VRMS, 60 Hz, three-phase induction motor as a load, and three-phase AC grid inputs of several levels. If the input was DC, the strategy would initiate from Vmean and follow the same steps. Base power and base voltage are selected, and all parameters and variables are normalized using these base quantities [18]. The main motor parameters for connection to the grid are described in Table 2 [5, 18]. Three different ways to feed the motor for free acceleration are described in the following sections.Table 2
Motor and grid parameters.
ParametersValueUnitP3ϕ500HPv3ϕline2300VRMSfB60HziBa,b,c93.6ARMSfrom thisZB14.188Ω


### 3.1. Case 1: Free Acceleration andn = 1

Several standard and nonstandard nominal system input voltages are selected for this study [14, 15] and concentrated in Table 3 for easier reading. These voltages include 690VRMS used as the output voltage by the largest wind turbine manufacturers and utilized as v3ϕV on this proposal [19] and 900VDC as the output voltage for a photovoltaic system used as VmeanV which is normally used when power exceeds 10 kW [20]. Values of L and C are obtained according to Section 2.3, and THD is obtained using (11) after 10 seconds. As it is illustrated on this table, THD has no variations when n = 1.Table 3
Parameter values for case 1:ΔIL1%, ΔVC1%, n=1, and ZB=14.19Ω.
v3ϕVVmeanVv0⋅03ϕVLHCFTHD%220297.1023000.01438960.0003194952.43440594.2123000.02632090.0002922032.43600810.2823000.03379270.0002751122.43690wind turbine931.8323000.03762380.0002663492.43– –PV array900.0023000.03664450.0002685892.43The free acceleration plot for these cases is depicted in Figure6. A faster response is observed when the ratio v_⋅_3ϕ/v3ϕ⟶1.Figure 6
Rotational speedn=1 (rad/s).As illustrated in voltage profile (Figure7), the behavior of the whole system is a second-order under damped system with base impedance ZB constant, and components L and C change to have faster settling time. Again, the response is faster when the ratio v_⋅_3ϕ/v3ϕ⟶1.Figure 7
Voltage profilen=1 (V).


### 3.2. Case 2: Free Acceleration andn Variant

By limiting the DC gain to1/2<Vo/Vmean<2 as expressed in Section 2.3, we obtain the results of Table 4, with substantial improvement on the settling time for rotational speed and voltage profile, as observed in Figure 8 for the free acceleration and Figure 9 for the voltage profile. It can be inferred that it is recommended to limit the DC-DC gain. THD is also computed by using (11) after 10 seconds. It is observed that the THD increases when the value of n increases.Table 4
Parameter values for case 2:ΔIL1%, ΔVC1%, and ZB=14.19Ω.
nv3ϕVVmeanVv0⋅03ϕVLHCFTHD%9220297.1023000.0009150922.03179e−056.024440594.2123000.004350484.82972e−053.082600810.2823000.0138570.0001128122.482690wind turbine931.8323000.01511960.0001070362.482– –PV array900.0023000.01480170.000108492.48Figure 8
Rotational speedn variant (rad/s).Figure 9
Voltage profilen variant (V).


### 3.3. Case 3: Free Acceleration and Bézier Curve

If the VSC is intended to connect a motor, the rotor speed regulation tasks and starting up can be smoothed by using a Bézier curve for the voltage that shows a more convenient transition [21, 22]. The component values are the ones indicated in Table 5. This case presents a voltage trajectory given by(19)va,b,c⋆=0for0≤t≤t1va,b,cB1fort1<t<t2va,b,cfort≥t2,with Bézier curves(20)Bj=∑k=16rkt−tjtj+1−tj4+k,j=1,3,where r1=252, r2=−1050, r3=1800, r4=−1575, r5=700, r6=−126, t1=0 s, and t2=0.5 s.Table 5
Parameter values for case 3:ΔIL1%, ΔVC1%, and ZB=14.19Ω.
nv3ϕVVmeanVv0⋅03ϕVLHCFTHD%9220297.1023000.0009150922.03179e−056.014440594.2123000.004350484.82972e−053.062600810.2823000.0138570.0001128122.482690wind turbine931.8323000.01511960.0001070362.482– –PV array900.0023000.01480170.000108492.48The settling time for rotational speed and voltage profile is reduced, making the system faster. As it is illustrated in Table5, THD increases as n increases. If the variation is bounded to 1% on voltage and current for the DC-DC converter, we can even reduce the value of the L and C to an optimum, which will be calculated on a new research. Figure 10 presents the free acceleration response, and Figure 11 is the voltage profile.Figure 10
Rotational speedn variant and Bézier curve (rad/s).Figure 11
Voltage profilen variant and Bézier curve (V).


## 3.1. Case 1: Free Acceleration andn = 1

Several standard and nonstandard nominal system input voltages are selected for this study [14, 15] and concentrated in Table 3 for easier reading. These voltages include 690VRMS used as the output voltage by the largest wind turbine manufacturers and utilized as v3ϕV on this proposal [19] and 900VDC as the output voltage for a photovoltaic system used as VmeanV which is normally used when power exceeds 10 kW [20]. Values of L and C are obtained according to Section 2.3, and THD is obtained using (11) after 10 seconds. As it is illustrated on this table, THD has no variations when n = 1.Table 3
Parameter values for case 1:ΔIL1%, ΔVC1%, n=1, and ZB=14.19Ω.
v3ϕVVmeanVv0⋅03ϕVLHCFTHD%220297.1023000.01438960.0003194952.43440594.2123000.02632090.0002922032.43600810.2823000.03379270.0002751122.43690wind turbine931.8323000.03762380.0002663492.43– –PV array900.0023000.03664450.0002685892.43The free acceleration plot for these cases is depicted in Figure6. A faster response is observed when the ratio v_⋅_3ϕ/v3ϕ⟶1.Figure 6
Rotational speedn=1 (rad/s).As illustrated in voltage profile (Figure7), the behavior of the whole system is a second-order under damped system with base impedance ZB constant, and components L and C change to have faster settling time. Again, the response is faster when the ratio v_⋅_3ϕ/v3ϕ⟶1.Figure 7
Voltage profilen=1 (V).


## 3.2. Case 2: Free Acceleration andn Variant

By limiting the DC gain to1/2<Vo/Vmean<2 as expressed in Section 2.3, we obtain the results of Table 4, with substantial improvement on the settling time for rotational speed and voltage profile, as observed in Figure 8 for the free acceleration and Figure 9 for the voltage profile. It can be inferred that it is recommended to limit the DC-DC gain. THD is also computed by using (11) after 10 seconds. It is observed that the THD increases when the value of n increases.Table 4
Parameter values for case 2:ΔIL1%, ΔVC1%, and ZB=14.19Ω.
nv3ϕVVmeanVv0⋅03ϕVLHCFTHD%9220297.1023000.0009150922.03179e−056.024440594.2123000.004350484.82972e−053.082600810.2823000.0138570.0001128122.482690wind turbine931.8323000.01511960.0001070362.482– –PV array900.0023000.01480170.000108492.48Figure 8
Rotational speedn variant (rad/s).Figure 9
Voltage profilen variant (V).


## 3.3. Case 3: Free Acceleration and Bézier Curve

If the VSC is intended to connect a motor, the rotor speed regulation tasks and starting up can be smoothed by using a Bézier curve for the voltage that shows a more convenient transition [21, 22]. The component values are the ones indicated in Table 5. This case presents a voltage trajectory given by(19)va,b,c⋆=0for0≤t≤t1va,b,cB1fort1<t<t2va,b,cfort≥t2,with Bézier curves(20)Bj=∑k=16rkt−tjtj+1−tj4+k,j=1,3,where r1=252, r2=−1050, r3=1800, r4=−1575, r5=700, r6=−126, t1=0 s, and t2=0.5 s.Table 5
Parameter values for case 3:ΔIL1%, ΔVC1%, and ZB=14.19Ω.
nv3ϕVVmeanVv0⋅03ϕVLHCFTHD%9220297.1023000.0009150922.03179e−056.014440594.2123000.004350484.82972e−053.062600810.2823000.0138570.0001128122.482690wind turbine931.8323000.01511960.0001070362.482– –PV array900.0023000.01480170.000108492.48The settling time for rotational speed and voltage profile is reduced, making the system faster. As it is illustrated in Table5, THD increases as n increases. If the variation is bounded to 1% on voltage and current for the DC-DC converter, we can even reduce the value of the L and C to an optimum, which will be calculated on a new research. Figure 10 presents the free acceleration response, and Figure 11 is the voltage profile.Figure 10
Rotational speedn variant and Bézier curve (rad/s).Figure 11
Voltage profilen variant and Bézier curve (V).


## 4. Conclusions

This proposal defines a straightforward methodology for calculating the DC-DC capacitive and inductive component values used for interfacing energy resources of different AC or DC voltage levels by using a VSC of 84 pulses. The strategy can be used also for driving AC motors or improving power quality on three-phase systems. The use of an 84-pulse voltage source converter at the point of common coupling allows to have low-voltage THD to accomplish standard limits. Defining the voltage transfer function in terms ofn for the DC-AC converter gives the possibility of reducing the settling time to get the load expected characteristics, such as the speed of an induction motor. On this fashion, using a traditional buck-boost converter with a restricted operating range makes the interfacing between different voltage levels as an easy task. The nominal 1% of variation on the current and voltage for reactive components allows to obtain the initial values for base behavior. Bézier curves for smoothing behavior allow the reduction in the settling time and voltage ripple. As the ripple is reduced, further research will be conducted to reduce the capacitive and inductive components to optimum values and being within operating limits. Classical or modern control strategies for power, speed, or any variable required will be better achievable while using a power electronics interface with performance like the one of this proposal.



---

*Source: 5541375-2021-10-31.xml*