# On Designing Feedback Controllers for Master-Slave Synchronization of Memristor-Based Chua’s Circuits

Authors: Ke Ding
Journal: Complexity
 (2018)

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## Abstract

This paper is concerned with designing feedback controllers for master-slave synchronization of two chaotic memristor-based Chua’s circuits. The memductance function of memristor-based Chua’s circuits is a bounded function with a bounded derivative which is more generalized than those piecewise constant-valued functions or quadratic functions in some existing papers. The main contributions are that one master-slave synchronization criterion is established for two chaotic memristor-based Chua’s circuits, and the feedback controller gain is easily obtained by solving a set of linear matrix inequalities. One numerical example is given to illustrate the effectiveness of the design method.


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## Body

## 1. Introduction

Since the memristor, a missing circuit element, was first introduced by Chua in 1971 [1] and was realized in 2008 [2], memristor-based Chua’s circuits have received some attention, see, for example, [3–5].When some equipment of circuits in oscillators were replaced by memristors, complex and dynamical properties were revealed in the circuits. Chaotic attractors have been studied in memristor-based Chua’s circuits in which the memductance functions of memristors were characterized by a piecewise constant-valued function [3, 6, 7] or a quadratic function [4, 5, 8, 9]. It should be pointed out that the memductance function of memristor can be represented by a bounded function with a bounded derivative [2], which is more generalized than those piecewise constant-valued functions or quadratic functions in some existing papers [3, 4]. However, to the best of author’s knowledge, there is no result available in the existing published literature to study memristor-based Chua’s circuits with abovementioned memductance function, which is the first motivation of this paper.Chaotic synchronization and chaos control have received much attention due to its theoretical importance and practical applications [10–33]. Due to the existence of memristors, the product of the memductance function and voltage can give rise to chaotical behaviors in circuits. Most research efforts [3–5, 7–9, 17–19] were made to chaotic behaviors of memristor-based circuits, rather than master-slave synchronization and chaos control for two memristor-based circuits. Zhang et al. [6] conducted stability analysis for a single circuit with a piecewise constant-valued memductance function, but they did not consider the synchronization problem of two circuits. In [15, 16], synchronization of memristor-based Chua’s circuits has been investigated, in which the memductance elements were piecewise linear functions. In addition, the memristor with a passive nonlinearity and a piecewise constant-valued memductance function is essential to generate the high signal-to-noise ratio which is not suitable for achieving the secure communication [5]. Therefore, the memristor with nonlinear memductance function which is suitable for secure communication should be worth studying. The memristor in which the memductance function is a bounded function with a bounded derivative can satisfy this criterion, but the mathematical model of corresponding circuit is a set of nonlinear differential equations as well as the corresponding error systems derived by the master-slave scheme. Thus, how to derive master-slave synchronization criteria for two memristor-based Chua’s circuits in which the memductance function is a bounded function with a bounded derivative and how to design a feedback controller matrix gain to achieve synchronization is the second motivation of this paper.In this paper, we will deal with the problem of the controller design for master-slave synchronization of chaotic memristor-based Chua’s circuits. The master-slave scheme will be constructed by using an error state feedback control. We will derive one synchronization criterion. Based on the obtained synchronization criterion, we will give the sufficient conditions on the existence of an error state feedback controller. Moreover, we will obtain the controller gain. We will also use one numerical example to illustrate the effectiveness of the synchronization criterion and the design method.Notation 1.
ℝn denotes the n-dimensional Euclidean space. ℝm×n is the set of all m×n real matrices. For symmetric matrices P and Q, the notation P>Q (respectively, P≥Q) means that matrix P−Q is positive definite (respectively, positive semidefinite). λmaxP and λminP are the maximum and minimum eigenvalues of the matrix P, respectively.


## 2. Memristor-Based Chua’s Circuits

The memristor in Chua’s circuits is a two-terminal element. The magnetic flux of memristor between the terminals is a function of the electric charge which passes through the device [1]. A flux-controlled memristor can be characterized by the incremental menductance function ωϕ describing the flux-dependent rate of change of charge [2], i.e., ωϕ=dqϕ/dϕ. Therefore, the voltage vt across and the current it through the memristor can be described as it=ωϕvt [3].Figure1 shows a smooth flux-controlled memristor-based Chua’s circuit, where v1 and v2 are the voltages across capacitors C1 and C2, respectively; iL is the current through the inductances L; R is a linear resistor; the Chua’s diode is replaced by a memristor. The mathematical model of the Chua’s circuit with the memristor can be described as
(1)dv1tdt=1C1v2t−v1tR−wϕtv1t,dv2tdt=1C2v1t−v2tR−iLt,diLtdt=1Lv2t,dϕtdt=v1t,with the initial condition v10=v10,v20=v20,iL0=iL0,ϕ0=ϕ0.Figure 1
The memristor-based chaotic Chua’s circuit.Letf· and g·:ℝ→ℝ be two differentiable functions. In this paper, we mainly focus on the following nonlinearity, i.e., qϕt=aϕt+bgϕt, ωϕt=a+bfϕt, dgϕ/dϕ=fϕ, and it=a+bfϕtvt, where a and b are the parameters of electronic equipment. Besides fϕ is differentiable, we assume that fϕ is a bounded function and dfϕ/dϕ is a bounded function where, i.e., there exist two scales μf>0 and μf′>0 such that
(2)fϕ≤μf,dfϕdϕ≤μf′,∀ϕ∈ℝ.Rescaling the parameters of the circuit asx1t=v1t, x2t=v2t, x3t=iLt, x4t=ϕt, τ=t/RC2, α=C2/C1, β=C2R/L, γ=C2R, ν1=aR, and ν2=bR, we obtain the following dimensionless form for system (1):
(3)dx1τdτ=αx2τ−1+v1x1τ−v2x1τfx4τ,dx2τdτ=x1τ−x2τ−Rx3τ,dx3τdτ=βx2τ,dx4τdτ=γx1τ,where the initial condition is x10=v10, x20=v20, x30=iL0, and x40=ϕ0. Let xτ=x1τ,x2τ,x3τ,x4τT∈ℝ4, and
(4)A=−α1+v1α001−1−R00β00γ000.Then, system (3) can be rewritten as
(5)dxτdτ=Axτ+φxτ,where φxτ=ν3x1τfx4τ and ν3=−αν2.Remark 1.
In [3–5, 7–9, 17–19], dynamical behaviors of the single memristor-based Chua’s circuit have been studied. In this paper, the synchronization of two memristor-based Chua’s circuits is investigated.Remark 2.
In [6, 15, 16], the memductance elements of memristor-based Chua’s circuits were either piecewise linear functions or piecewise constant-valued memductance functions. It is well known that the memristor with a passive nonlinearity or a piecewise constant-valued memductance function is easy to generate the high signal-to-noise ratio which is not suitable for achieving the secure communication [5]. Thus, the memristor with nonlinear memductance function should be investigated. The memristor with bounded memductance functions and bounded derivatives which is suitable for secure communication can satisfy this criterion. Moreover, the mathematical model of corresponding circuit is easily to set up. Thus, it is worth studying master-slave synchronization for two memristor-based Chua’s circuits in which the memductance function is a bounded function with a bounded derivative. It is also worth designing a feedback controller matrix gain to achieve synchronization.


## 3. Master-Slave Synchronization

Letzτ=z1τz2τz3τz4τT∈ℝ4. We construct a master-slave synchronization scheme for system (5).
(6)ℳ:dxτdτ=Axτ+φxτ,(7)S:dyτdτ=Ayτ+φyτ+uτ,(8)C:uτ=Kxτ−yτ,with master system ℳ, slave system S, and controller C.Defining a signalet=xt−yt=e1τe2τe3τe4τT∈ℝ4 with eit=xit−yit,i=1,2,3,4, we have the error system
(9)deτdτ=A−Keτ+φ~eτ,where
(10)φ~eτ=φxτ−φyτ.The initial values of (6) and (7) are x0=x10,x20,x30,x40T and y0=y10,y20,y30,y40T, respectively. Thus,
(11)e0=e10,e20,e30,e40T,with ei0=xi0−yi0,i=1,2,3,4.It follows from (10) and the differential mean value theorem that
(12)φ~eτ=φxτ−φyτ=v3x1τfx4τ−y1τfy4τ=v3x1τfx4τ−fy4τ+v3e1τfy4τ=v3x1τe4τdfςdςς=ξ+v3e1τfy4τ,where ξ∈minx4τ,y4τ,maxx4τ,y4τ. Notice that the error system (9) can be rewritten as
(13)deτdτ=A+Bτ−Keτ,where
(14)Bτ=b11τ00b14τ000000000000,with
(15)b11τ=v3fy4τ,b14τ=v3x1τdfςdςs=ξ,ς∈minx4τ,y4τ,maxx4τ,y4τ.Choosing the proper parameters of system (3), there exist some chaotic attractors which indicate that for any initial condition x0 within the domain of system (3), there are bounds μix0>0,i=1,2,3,4, such that
(16)xit,x0≤μix0,∀t>0,i=1,2,3,4.From inequalities (2) and (16), we know that
(17)b11τ≤ν3μf,b14τ≤ν3μ1x0μf′.Therefore, the error system (13) can be modeled as a polytopic system.Let(18)B1=v3μf00v3μ1x0μf′000000000000,B2=−v3μf00v3μ1x0μf′000000000000,B3=v3μf00−v3μ1x0μf′000000000000,B4=−v3μf00−v3μ1x0μf′000000000000.It is clear thatBii=1,2,3,4 are the vertices of Bτ.This paper intends to derive synchronization criteria for two memristor-based Chua’s circuits and to design the controller (8), i.e., to find the controller gain K, such that the system described by (13) is asymptotically stable, which means that the system described by (6), (7), and (8) synchronizes.


## 4. Controller Design

### 4.1. A Synchronization Criterion

This subsection aims to derive a synchronization criterion for two memristor-based Chua’s circuits. Choose the quadratic Lyapunov function.(19)Vτ,eτ=eTτPeτ,where P∈ℝ4×4,P=PT>0.Applying Lyapunov’s direct method, we obtain the following result.Proposition 1.
The error system described by (11) and (13) is asymptotically stable if there exists a matrix P=PT>0 such that
(20)PA+Bi−K+A+Bi−KTP<0,i=1,2,3,4.Proof 1.
Taking the derivative ofVτ,eτ with respect to τ along the trajectory of (13) yields
(21)dVτ,eτdτ=eTτPA+Bτ−Keτ+eTτA+Bτ−KTPeτ.
A sufficient condition for the asymptotic stability of system (13) is that there exists a matrix P=PT>0 such that
(22)PA+Bτ−K+A+Bτ−KTP<0.
It is easy to see that LMI (22) can be ensured by LMIs (20). This ends the proof.
If the menductance function is a linear piecewise constant-valued function, i.e.,(23)wϕt=κ1,forϕt≥1,wϕt=κ2,forϕt≥1,we obtain the following dimensionless form for system (1):
(24)dxτdτ=A^ixτ,i=1,2,by rescaling the parameters of the circuit as (3), where
(25)A^1=θ1α001−1R00β00γ000,A^2=θ2α001−1R00β00γ000,
θ1=−α1+κ1R, θ2=−α1+κ2R, and the initial condition is x10=v10, x20=v20, x30=iL0, and x40=ϕ0. The switched rule is if x4≥1, then dxτ/dτ=A^1xτ; if x4<1, then dxτ/dτ=A^2xτ. The chaotical behaviors of model (24) have been studied in [3, 6, 7].We construct a master-slave synchronization scheme for system (24).
(26)ℳ:dxτdτ=A^ixτ,i=1,2,S:dyτdτ=A^iyτ+uit,i=1,2,C:uiτ=Kixτ−yτ,i=1,2,with master system ℳ, slave system S, and controller C. Defining an error signal eτ=xτ−yτ, we obtain the error system.
(27)deτdτ=Bieτ,i=1,2,3,4,where B1=B2=0, B3=A^1−A^2, B4=−B3, C1=C4=−A^1+K1, and C2=C3=−A^2+K2. The initial value is the same as that defined in (11). The switched rule is if x4≥1, y4≥1, then deτ/dτ=B1xτ−C1eτ; if x4<1, y4<1, then deτ/dτ=B2xτ−C2eτ; if x4≥1, y4<1, then deτ/dτ=B3xτ−C3eτ; if x4<1, y4≥1, then deτ/dτ=B4xτ−C4eτ.We choose the quadratic Lyapunov function.(28)Vτ,eτ=eTτeτ.Taking the derivative of (28) with respect to τ along the trajectory of (27), we can derive the following state estate which can be stated as the error system described by (27) and (11) converges exponentially to the following ball M with a convergence rate r/2, where M=e∈ℝ4∣e2≤q/r with q=maxq1,q2,q3,q4, qi=λmaxρTBiTBiρ, ρT=μ1x0,μ2x0,μ3x0,μ4x0, r=minr1,r2,r3,r4, and ri=λminCiT+Ci−I4,i=1,2,3,4.


### 4.2. The Controller Design

In this subsection, we will design the controller (8) based on the synchronization criterion derived in Section 4.1.Applying Proposition1, we establish the following result.Proposition 2.
The error system described by (11) and (13) is asymptotically stable if there exists a matrix P~=P~T>0 and a matrix Y of appropriate dimensions such that
(29)A+BiP~+P~A+BiT−Y−YT<0,i=1,2,3,4.
Moreover, the feedback controller gain matrix is given byK=YP~−1.Proof 2.
Pre- and postmultiplying both sides of (20) with P−1 gives
(30)A+BiP−1+P−1A+BiT−KP−1−P−1K<0,i=1,2,3,4.
SettingP~=P−1 and Y=KP−1 yields (29).


## 4.1. A Synchronization Criterion

This subsection aims to derive a synchronization criterion for two memristor-based Chua’s circuits. Choose the quadratic Lyapunov function.(19)Vτ,eτ=eTτPeτ,where P∈ℝ4×4,P=PT>0.Applying Lyapunov’s direct method, we obtain the following result.Proposition 1.
The error system described by (11) and (13) is asymptotically stable if there exists a matrix P=PT>0 such that
(20)PA+Bi−K+A+Bi−KTP<0,i=1,2,3,4.Proof 1.
Taking the derivative ofVτ,eτ with respect to τ along the trajectory of (13) yields
(21)dVτ,eτdτ=eTτPA+Bτ−Keτ+eTτA+Bτ−KTPeτ.
A sufficient condition for the asymptotic stability of system (13) is that there exists a matrix P=PT>0 such that
(22)PA+Bτ−K+A+Bτ−KTP<0.
It is easy to see that LMI (22) can be ensured by LMIs (20). This ends the proof.
If the menductance function is a linear piecewise constant-valued function, i.e.,(23)wϕt=κ1,forϕt≥1,wϕt=κ2,forϕt≥1,we obtain the following dimensionless form for system (1):
(24)dxτdτ=A^ixτ,i=1,2,by rescaling the parameters of the circuit as (3), where
(25)A^1=θ1α001−1R00β00γ000,A^2=θ2α001−1R00β00γ000,
θ1=−α1+κ1R, θ2=−α1+κ2R, and the initial condition is x10=v10, x20=v20, x30=iL0, and x40=ϕ0. The switched rule is if x4≥1, then dxτ/dτ=A^1xτ; if x4<1, then dxτ/dτ=A^2xτ. The chaotical behaviors of model (24) have been studied in [3, 6, 7].We construct a master-slave synchronization scheme for system (24).
(26)ℳ:dxτdτ=A^ixτ,i=1,2,S:dyτdτ=A^iyτ+uit,i=1,2,C:uiτ=Kixτ−yτ,i=1,2,with master system ℳ, slave system S, and controller C. Defining an error signal eτ=xτ−yτ, we obtain the error system.
(27)deτdτ=Bieτ,i=1,2,3,4,where B1=B2=0, B3=A^1−A^2, B4=−B3, C1=C4=−A^1+K1, and C2=C3=−A^2+K2. The initial value is the same as that defined in (11). The switched rule is if x4≥1, y4≥1, then deτ/dτ=B1xτ−C1eτ; if x4<1, y4<1, then deτ/dτ=B2xτ−C2eτ; if x4≥1, y4<1, then deτ/dτ=B3xτ−C3eτ; if x4<1, y4≥1, then deτ/dτ=B4xτ−C4eτ.We choose the quadratic Lyapunov function.(28)Vτ,eτ=eTτeτ.Taking the derivative of (28) with respect to τ along the trajectory of (27), we can derive the following state estate which can be stated as the error system described by (27) and (11) converges exponentially to the following ball M with a convergence rate r/2, where M=e∈ℝ4∣e2≤q/r with q=maxq1,q2,q3,q4, qi=λmaxρTBiTBiρ, ρT=μ1x0,μ2x0,μ3x0,μ4x0, r=minr1,r2,r3,r4, and ri=λminCiT+Ci−I4,i=1,2,3,4.


## 4.2. The Controller Design

In this subsection, we will design the controller (8) based on the synchronization criterion derived in Section 4.1.Applying Proposition1, we establish the following result.Proposition 2.
The error system described by (11) and (13) is asymptotically stable if there exists a matrix P~=P~T>0 and a matrix Y of appropriate dimensions such that
(29)A+BiP~+P~A+BiT−Y−YT<0,i=1,2,3,4.
Moreover, the feedback controller gain matrix is given byK=YP~−1.Proof 2.
Pre- and postmultiplying both sides of (20) with P−1 gives
(30)A+BiP−1+P−1A+BiT−KP−1−P−1K<0,i=1,2,3,4.
SettingP~=P−1 and Y=KP−1 yields (29).


## 5. Simulation Results

In this section, in order to illustrate the effectiveness of the derived results, we consider a memristor-based Chua’s circuit (1) in which the parameters are chosen as R=2×103Ω, C1=6.8×10−9nF, C2=6.8×10−8nF, and L=1.8×10−2mH. Thus, we have α=10,β=7.5×10−3,γ=1.36×10−4.For the initial value (0.11, 0.11, 0, 0) of (6), we give Figures 2 and 3 for system (3) with fx4τ=arctanx4τ and fx4τ=sin2x4τ to illustrate the chaotic attractors in the x4−x1 plate. We can also obtain the values for μ1x0, μf, μf′, b11, and b14, respectively. If fx4τ=arctanx4τ, then a=−1.3550×10−4, b=6.0930×10−4, μf=1, μf′=π/2μ1x0=400, b11=nu3arctany4t, and b14=v3x1τ/1+ξ2. If fx4τ=sin2x4τ, then a=−5.9900×10−4, b=6.0930×10−4, μf=1, μf′=1μ1x0=6, b11=ν3sin2y4τ, and b14=ν3x1τsin2ξ.Figure 2
The chaotic attractors of system (3) with fx4τ=arctanx4τ.Figure 3
The chaotic attractors of system (3) with fx4τ=sin2x4τ.We choose the initial condition of master system (6) as x10,x20,x30,x40=0.11,0.11,0,0 and the initial condition of slave system (7) as y10,y20,y30,y40=0.12,0.12,0.01,0.01. From Proposition 2, we obtain the feedback gain matrix K for fx4τ=arctanx4τ and fx4τ=sin2x4τ, respectively, which are listed in Table 1.Table 1
The feedback gain matrix derived by Proposition2.
fx4τ
K
arctanx4τ
−10100691750100−100000−100000−40009360
sin2x4τ
000695900000−100000−100000−162000200The simulation results for master, slave, and error systems forfx4τ=arctanx4τ and fx4τ=sin2x4τ and the feedback controller gain derived by Proposition 2 are illustrated in Figures 4 and 5, from which one can clearly see that the master and slave systems are synchronized, which means that the design method is effective.Figure 4
(a) Simulation result for master system withfx4τ=arctanx4τ and K derived by Proposition 2. (b) Simulation result for slave system with fx4τ=arctanx4τ and K derived by Proposition 2.
(a)
(b)Figure 5
(a) Simulation result for master system withfx4τ=sin2x4τ and K derived by Proposition 2. (b) Simulation result for slave system with fx4τ=sin2x4τ and K derived by Proposition 2.
(a)
(b)


## 6. Conclusions and Future Works

We have addressed the problem of the controller design for master-slave synchronization of memristor-based Chua’s circuits and constructed a master-slave scheme by using an error state feedback control. We have derived a master-slave synchronization criterion and provided the sufficient conditions on the existence of an error feedback controller. Moreover, we have obtained the error state feedback controller gain by solving a set of LMIs. The effectiveness of the synchronization criterion and the design method has been illustrated through one numerical example. It should be pointed out that we only consider the state feedback control for synchronization of memristor-based Chua’s circuits in this paper. To design the time-delayed controller is our future research focus.



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