# Weighting Factor-Less Sequential Predictive Control of LC-Filtered Voltage Source Inverters

Authors: Changming Zheng; Zheng Gong; Rongwu Zhu
Journal: International Transactions on Electrical Energy Systems
 (2022)

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## Abstract

To eliminate the weighting factor tuning effort of typical finite-set model predictive control (FS-MPC), this paper proposes a weighting factor-less sequential model predictive control (SMPC) scheme for LC-filtered voltage source inverters. Two independent cost functions for minimizing capacitor-voltage and inductor-current tracking errors are deployed in a cascaded structure, eliminating the weighting factor. First, the optimal cascade order of the cost function is selected by the internal relationship of two control variables. Then, a graphical method is proposed to determine the optimal number of candidate voltage vectors selected from the first cost function. Moreover, to realize the strict current limitation, the current-constraint term is proved to be included in the voltage-related cost function. Another attractive feature of the proposed SMPC is that a smoother inductor-current starting response can be obtained compared to typical FS-MPC. Simulation and experimental results verify the feasibility of the presented approach.


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## Body

## 1. Introduction

Two-level three-phase voltage source inverters (VSIs) with output LC filters are critical topologies for renewable energy systems, including uninterruptible power supplies, distributed generation systems, and parallel VSI-based AC microgrids [1, 2]. Among the existing control strategies that aim to obtain a high-quality output voltage, model predictive control, particularly finite-set model predictive control (FS-MPC), has gained increasing attention due to its intuitive concept, inherent fast dynamic response without using modulation, simple handling of system constraints, and multiple control objectives without increasing too much computational complexity [3–5].Generally, FS-MPC considers a system model-based cost function (CF) to forecast future system states using online receding horizon optimization. For control of LC-filtered VSIs, typical FS-MPC schemes simultaneously include the output capacitor voltage and filter-inductor current control objectives in a single CF, and the importance of these two control objectives is balanced by a weighting factor. It is known that the proper tuning of the weighting factor is very important for obtaining a satisfying control performance. However, till now, there are no rigorous theoretical guidelines for optimal selection of the weighting factor. As a consequence, how to select the weighting factors in FS-MPC schemes is still an open issue.Several approaches have been proposed to tackle this issue. In [6], a heuristic “branch and bound” strategy was first employed to select the weighting factors, reducing the number of tuning trials based on the empirical procedures. In [7], algebraic tuning of the weighting factor was proposed for current distortion minimization. However, it neglects the impacts of the varying working conditions. In [8], an online optimization-based weighting factor selection approach was proposed. The optimal weighting factor is obtained by optimizing the analytical expression of various control objectives. Unfortunately, its computational complexity significantly increases with the increase of the control objectives. In [9, 10], metaheuristic optimization-based algorithms were proposed for fast selection of weighting factors online. In [11], an artificial neural network-based approach was employed to select the weighting factor automatically offline. However, a large number of simulations and experiments are still inevitable for extracting sufficient sample data to obtain satisfactory training results.On the other hand, the weighting factors are eliminated in FS-MPC schemes, which is a promising strategy to solve the weighting factors’ selection issue [12–20]. In [12], a fuzzy decision-making-based weighting factor elimination method was proposed, replacing the CF-based expression with a multiobjective optimization algorithm. However, the additional computational burden is the main drawback of this method. In [13], a ranking optimization-based strategy was proposed. For each control objective, all candidate voltage vectors are ranked, and the optimal voltage vector (OVV) is selected as the one with the minimum averaged rank. In [14], the weighting factor of the stator flux linkage was avoided by converting multiple objectives to a single one. However, this method essentially assigns an equal weight for all control objectives. Moreover, not all control systems can simply merge different control objectives. Recently, a simple sequential model predictive control (SMPC) scheme was proposed to eliminate the weighting factors for stator flux linkage and torque control of induction machines [15]. Two optimal candidate voltage vectors (CVVs) that can minimize the first CF are selected and then used to find the OVV for the second CF. Following the same principle in [15], the sequential predictive torque control scheme was extended for 3L-NPC fed induction machine drives in [16], and a direct SMPC scheme was proposed for grid-tied converters for grid-current and DC-voltage control in [17]. Moreover, SMPC was introduced to multistep-prediction MPC schemes in [18].Nevertheless, the aforementioned SMPC schemes neglect the impacts of the cascade order of CFs (COCFs) and the number of CVVs selected from the first CF on control performance. By contrast, in [19], a generalized SMPC was proposed, eliminating the limitation of COCFs in [15] using simulation analysis. Moreover, to tackle the priority selection problem of SMPC for torque and flux linkage control, an even-handed SMPC was proposed in [20] using an adaptive priority based on cross-error minimization. However, this method is based on online sorting, which would increase the computational burden. Besides, all the aforementioned SMPC schemes do not consider the handling of system constraints. Most importantly, the determination of CVVs and COCFs of SMPC schemes still lacks theoretical analysis, which somewhat hinders the development of SMPC schemes.To this end, a weighting factor-less SMPC scheme for LC-filtered VSIs is presented in this paper, eliminating the weighting factor by incorporating two cascaded CFs for separate control of capacitor voltage and inductor current. The selection of COCFs and the number of CVVs is evaluated by a graphical method. Besides, the current constraint is discussed, and the current-limiting term should be included in voltage-related CF to realize a strict current limit. Since the inductor-current control is assigned a higher priority in the proposed SMPC, an inherent smoother current-starting response is achieved with linear loads. The remainder of this paper is structured as follows. Section2 describes the system dynamics and predictive model. Section 3 presents the working principle of proposed SMPC for LC-filtered VSIs. Simulation and experimental results are given in Section 4, and the work is concluded in Section 5.


## 2. System Description and Predictive Model

Figure1 depicts a two-level three-phase VSI system, which is connected to an output LC filter. The system dynamic model in the α-β reference frame is depicted in Figure 2, which can be expressed as(1)ddtifvf︸x˙t=0−1Lf1Cf0︸Aifvf︸xt+1Lf00−1Cf︸Bvio︸utLf,where Lf and Cf are output-filter inductance and capacitance. vf=vfα+jvfβ, if=ifα+jifβ, v=vα+jvβ, and io=ioα+jioβ are the stationary α-β frame-based capacitance voltage, inductance current, converter-side voltage, and load current.Figure 1
Topology of a two-level three-phase LC-filtered VSI.Figure 2
Second-order dynamic model of an LC filter.By utilizing a zero-order hold strategy, the discrete state-space predictive model of a second order is formulated as [21](2)if,k+1pvf,k+1p︸xk+1=Φ11Φ12Φ21Φ22︸Φif,kvf,k︸xk+Γ11Γ12Γ21Γ22︸Γvkio,k︸uk,where Φ=eATs and Γ=∫0TseAτBdτ.In digital implementations, to compensate the one-step computational delay, a two-step forward prediction approach is employed, which is implemented by predicting thek+2 instant values if,k+2p and vf,k+2p as(3)if,k+2p=Φ11if,k+1p+Φ12vf,k+1p+Γ11vk+1+Γ12io,k+1,vf,k+2p=Φ21if,k+1p+Φ22vf,k+1p+Γ21vk+1+Γ22io,k+1,where io,k+1 can be substituted by io,k since the dynamics of the load current are very slow [22].


## 3. Proposed SMPC Scheme for LC-Filtered VSI

The block diagram of the proposed SMPC is depicted in Figure3. The core idea of this paper is to configure the two CFs in a sequential structure for separate control of capacitor voltage and inductor current, which eliminates the weighting factor in typical FS-MPC schemes of LC-filtered VSIs.Figure 3
Block diagram of the proposed SMPC for an LC-filtered VSI.


### 3.1. CFs in a Cascaded Structure

For voltage control of LC-filtered VSIs, a dual-objective CF has been proved to obtain an improved voltage control performance compared to conventional single-voltage-objective CF-based FS-MPC schemes [3]. However, the two control objectives are always deployed in a common CF and their importance is balanced by a weighting factor(4)G=vf∗−vf,k+2p2+λif∗−if,k+2p2,with the voltage and current reference as(5)vf∗=V∗cosω∗kTs+jV∗sinω∗kTs,if∗=jCfω∗vf∗+io,k,where V∗, ω∗, and λ>0 are the reference voltage amplitude, reference angular frequency, and the weighting factor.Since the selection of weighting factor needs tedious efforts, to resolve this issue, the two control objectives above are split into two separate CFs below:(6)G1=vf∗−vf,k+2p2=Δvfα2+Δvfβ2,(7)G2=if∗−if,k+2p2=Δifα2+Δifβ2,where G1 and G2 are the voltage and current-related CFs. The voltage and current tracking errors are Δvfx=vfx∗−vfx,k+2p and Δifx=ifx∗−ifx,k+2p with x=α or β.The basic principle of the proposed SMPC is shown in Figure4. The essence of the proposed SMPC is to sequentially evaluate two separate CFs. To be specific, CF 1 is first evaluated by enumerating all eight candidate voltage vectors of a VSI. Then, the first n2≤n≤7 CVVs that obtain the minimum values of CF 1 are preselected for further evaluation of CF2. Finally, the OVV that can minimize CF 2 among the preselected n CVVs is selected and applied to the VSI. Since the two CFs are configured in a cascaded structure instead of being integrated into a single CF, the weighting factor is eliminated.Figure 4
Basic principle of the proposed SMPC.


### 3.2. Determination of the Number of COCFs and CVVs

From Figure4, it can be observed that the two CFs G1 and G2 in (6) and (7) can be formulated into two different orders: one is COCF1 (i.e., CF1=G1, CF2=G2) and the other one is COCF2 (i.e., CF1=G2, CF2=G1). It should be noted that different COCFs may affect the control performance since the preselected CVVs from the first CF for each COCF are different. In addition, a different number of CVVs can also result in different control performances since it determines the control set and priorities of the two control objectives.


#### 3.2.1. Selection of Optimal Number of CVVs

It is difficult to directly select proper COCFs and the number of CVVs based on (6) and (7). Herein, the control of capacitor voltage and inductor current should be first converted to the control of their separate reference voltage vector, which can be expressed as(8)vv∗=1Γ21vf∗−Φ21if,k+1p−Φ22vf,k+1p−Γ22io,k,(9)vi∗=1Γ11if∗−Φ11if,k+1p−Φ12vf,k+1p−Γ12io,k.Hence, the control objective of minimizing (6) and (7) becomes to find basic voltage vectors closest to vv∗ and vi∗, which means G1 and G2 can be rewritten as(10)G1=vv∗−vk+12,(11)G2=vi∗−vk+12.Herein, we propose a graphical method to discuss all possible OVV distributions based on the distance between eight basic voltage vectors and the reference voltage vector in (8) and (9). Figure 5 shows the newly proposed division of 36 sectors, and Table 1 lists the optimal candidate OVV distributions. For example, sector S1 and its OVV order mean that when vi∗ or vv∗ is located in sector S1, 8 basic voltage vectors can be sorted by their distance from vi∗ or vv∗ from the nearest to the farthest: v1, v2, v0, v7, v6, v3, v5, v4 (since v0 =  v7, they are in no fixed order). Next, we would try to find the proper number of CVVs that can guarantee a satisfying control performance based on Figure 5 and Table 1.Figure 5
Graphical method for selecting the number of CVVs.Table 1
Candidate OVV distributions.
SectorOVV orderSectorOVV orderS1v1, v2, v0, v7, v6, v3, v5, v4S7’v4, v0, v7, v5, v3, v6, v2, v1S2v2, v1, v0, v7, v3, v6, v4, v5S8’v5, v0, v7, v4, v6, v3, v1, v2S3v2, v3, v0, v7, v1, v4, v6, v5S9’v5, v0, v7, v6, v4, v1, v3, v2S4v3, v2, v0, v7, v4, v1, v5, v6S10’v6, v0, v7, v5, v1, v4, v2, v3S5v3, v4, v0, v7, v2, v5, v1, v6S11’v6, v0, v7, v1, v5, v2, v4, v3S6v4, v3, v0, v7, v5, v2, v6, v1S12’v1, v0, v7, v6, v2, v5, v3, v4S7v4, v5, v0, v7, v3, v6, v2, v1S1”v0, v7, v1, v2, v6, v3, v5, v4S8v5, v4, v0, v7, v6, v3, v1, v2S2”v0, v7, v2, v1, v3, v6, v4, v5S9v5, v6, v0, v7, v4, v1, v3, v2S3”v0, v7, v2, v3, v1, v4, v6, v5S10v6, v5, v0, v7, v1, v4, v2, v3S4”v0, v7, v3, v2, v4, v1, v5, v6S11v6, v1, v0, v7, v5, v2, v4, v3S5”v0, v7, v3, v4, v2, v5, v1, v6S12v1, v6, v0, v7, v2, v5, v3, v4S6”v0, v7, v4, v3, v5, v2, v6, v1S1’v1, v0, v7, v2, v6, v3, v5, v4S7”v0, v7, v4, v5, v3, v6, v2, v1S2’v2, v0, v7, v1, v3, v6, v4, v5S8”v0, v7, v5, v4, v6, v3, v1, v2S3’v2, v0, v7, v3, v1, v4, v6, v5S9”v0, v7, v5, v6, v4, v1, v3, v2S4’v3, v0, v7, v2, v4, v1, v5, v6S10”v0, v7, v6, v5, v1, v4, v2, v3S5’v3, v0, v7, v4, v2, v5, v1, v6S11”v0, v7, v6, v1, v5, v2, v4, v3S6’v4, v0, v7, v3, v5, v2, v6, v1S12”v0, v7, v1, v6, v2, v5, v3, v4The number of CVVs should not miss some optimal options [20]. Considering that the final OVV (which optimizes the second CF) may cause poor performance of the first CF, it is expected to select an OVV that is located in the first four ranks of the OVV order in Table 1 for both CFs. For example, if the CVV number for optimizing the first CF is selected as n=2, it can be deduced from Table 1 that numerous cases may cause the final OVV to be located in the last 4 ranks, which cannot guarantee the second CF to obtain a good performance. In contrast, if n=3, the final OVV can be assured to be located in the first 3 ranks for both CFs, since there is an intersection among the first three vectors, i.e., v0. Since v0 is always followed by v7, selecting four CVVs can also guarantee the final OVV to be located in the first 4 ranks. Further, if the CVV number is selected as n≥5, the first CF may also obtain poor performance under certain cases. Hence, the optimal CVV number is chosen as n=3 or 4, which can guarantee a relative optimal performance for both CFs.


#### 3.2.2. Selection of Optimal COCFs

Then, it is required to determine the optimal COCFs. According to the dynamic model in Figure2, it can be deduced that the capacitor voltage is determined by the inductor current. Hence, to obtain an optimal capacitor voltage control performance, it is necessary to first optimize the inductor current control objective, which means the optimal COCF is COCF2.


#### 3.2.3. Enumeration Verification

Further, we evaluate all possible COCFs and the number of CVVs2≤n≤7 under various working conditions by simulations with the parameters listed in Table 2.Table 2
Nominal parameters of the system.
Reference voltageV∗ = 300 V, ω∗ = 100π rad/sDC bus voltageVdc = 700 VSampling periodTs = 20 µsLC filterLf = 2.4 mH, Cf = 15 µFNominal linear loadRl = 60 ΩNonlinear loadRn = 465 Ω, Ln = 1.8 mH, Cn = 2.2 mFThe performance indexes for evaluating different COCFs and the number of CVVs are phase-voltage total harmonic distortion (THD) and magnitude of the fundamental component. To emulate the actual implementations, one-step computational delay and its compensation are also considered. Figure6 depicts the steady-state voltage control performance with a different number of CVVs and COCFs under different load conditions, including a linear resistive load and a nonlinear diode rectifier bridge load. By comparing Figures 6(a)–6(c), it shows that for COCF1, to obtain a satisfactory control performance, the feasible number of CVVs is n = 2 and 3, and the system undergoes large distortions or oscillations when n>3. In contrast, the feasible number of CVVs for COCF2 is n= 3 to 7, and most of them can result in better performance than that using COCF1. The system has large distortions or oscillations when n< 3 since the lack of voltage control causes the oscillations. According to our study, the conclusions above are still valid even with a much larger load current (>100 A). This means COCF2 is more universal compared to COCF1. Hence, in the case of a wide range of load variations, the relative optimal control performance is obtained by COCF2 with 3 or 4 CVVs.Figure 6
Evaluation of steady-state capacitor voltage control performance with different CVVs and COCFs under different load conditions. (a) Rated linear load:R = 60 Ω (5 A). (b) Heavy linear load: R = 5 Ω (60 A). (c) Rated nonlinear diode bridge rectifier load.
(a)(b)(c)It should be mentioned that the analysis above is based on the nominal system parameters. It is also important to evaluate the different numbers of CVVs and COCFs under model mismatches. Figure7 illustrates the typical cases of model mismatches. It can be seen that 3 or 4 CVVs can offer a relatively optimal control performance. Moreover, for all the model mismatch cases, the optimal performance is always achieved by COCF2 instead of COCF1. Hence, the optimal COCF is selected as COCF2.Figure 7
Evaluation of steady-state voltage performance with different CVVs and COCFs under model mismatches. (a)−50%Lf. (b) −50%Cf. (c) +100%Lf. (d) +100%Cf. (e) −50%Lf and +100%Cf. (f) +100%Lf and −50%Cf.
(a)(b)(c)(d)(e)(f)


### 3.3. Priority Division of CFs

In effect, the control priorities of capacitor voltage and inductor current are directly determined by the CVV number selected from the first CF, which can be classified by the median of basic voltage vectors’ number as shown in Table3. To be specific, if the CVV number n<5, this means there are fewer CVVs that can be selected from CF1 for minimizing CF2. As a result, the final selected OVV for CF2 has a greater probability to achieve a better minimization of CF1 instead of CF2, and thus CF1 has a higher control priority, and vice versa.Table 3
Priority of CFs classified by the CVV number.
Priority of CFsCVV number:nCOCFs1 (G1−G2)COCFs2 (G2−G1)Higher priority toG12, 3, 45, 6, 7Higher priority toG25, 6, 72, 3, 4Single-voltage CF :G118Single-current CF :G281In addition, an extreme case is that if the CVV numbern= 1 or 8, then the two sequential CFs are degraded into conventional single-voltage or single-current objective CF, which means the other control objective is lost.It should be noted that the CVV number in the proposed SMPC is selected asn=3 or 4, which indicates that the current-related G2 is assigned a higher control priority. As a result, the inductor current is more tightly controlled to track its reference (start from 0 A). Hence, an inherent smoother current starting response without overshoot is obtained using the proposed SMPC compared to typical weighting factor-based FS-MPC, which is beneficial to hardware safety.


### 3.4. Handling of Current Constraint

To realize the over-current protection, an inductor-current constraint term is usually included in the CF of typical weighting factor-based FS-MPC below:(12)Glim=∞,ifif,k+2>Imax,0,ifif,k+2≤Imax,where Imax is the maximum limit of the inductor current.Similarly, the handling of the current constraint is discussed for the proposed SMPC. According to our simulation study, to obtain a strict current-limiting capability,Glim should be included in the voltage-related G1 as shown in Figure 3. For simplicity, considering a particular case that the number of CVVs is selected as n= 8 in the proposed SMPC, the current control objective G2 is invalid. In this case, if Glim is included in G2, the current-limiting capability will be lost. Hence, to realize a strict current limit under all cases, Glim in the proposed SMPC should be included in G1. The flowchart of the proposed SMPC for LC-filtered VSIs is depicted in Figure 8.Figure 8
Flowchart of the proposed SMPC for LC-filtered VSIs.


## 3.1. CFs in a Cascaded Structure

For voltage control of LC-filtered VSIs, a dual-objective CF has been proved to obtain an improved voltage control performance compared to conventional single-voltage-objective CF-based FS-MPC schemes [3]. However, the two control objectives are always deployed in a common CF and their importance is balanced by a weighting factor(4)G=vf∗−vf,k+2p2+λif∗−if,k+2p2,with the voltage and current reference as(5)vf∗=V∗cosω∗kTs+jV∗sinω∗kTs,if∗=jCfω∗vf∗+io,k,where V∗, ω∗, and λ>0 are the reference voltage amplitude, reference angular frequency, and the weighting factor.Since the selection of weighting factor needs tedious efforts, to resolve this issue, the two control objectives above are split into two separate CFs below:(6)G1=vf∗−vf,k+2p2=Δvfα2+Δvfβ2,(7)G2=if∗−if,k+2p2=Δifα2+Δifβ2,where G1 and G2 are the voltage and current-related CFs. The voltage and current tracking errors are Δvfx=vfx∗−vfx,k+2p and Δifx=ifx∗−ifx,k+2p with x=α or β.The basic principle of the proposed SMPC is shown in Figure4. The essence of the proposed SMPC is to sequentially evaluate two separate CFs. To be specific, CF 1 is first evaluated by enumerating all eight candidate voltage vectors of a VSI. Then, the first n2≤n≤7 CVVs that obtain the minimum values of CF 1 are preselected for further evaluation of CF2. Finally, the OVV that can minimize CF 2 among the preselected n CVVs is selected and applied to the VSI. Since the two CFs are configured in a cascaded structure instead of being integrated into a single CF, the weighting factor is eliminated.Figure 4
Basic principle of the proposed SMPC.


## 3.2. Determination of the Number of COCFs and CVVs

From Figure4, it can be observed that the two CFs G1 and G2 in (6) and (7) can be formulated into two different orders: one is COCF1 (i.e., CF1=G1, CF2=G2) and the other one is COCF2 (i.e., CF1=G2, CF2=G1). It should be noted that different COCFs may affect the control performance since the preselected CVVs from the first CF for each COCF are different. In addition, a different number of CVVs can also result in different control performances since it determines the control set and priorities of the two control objectives.


### 3.2.1. Selection of Optimal Number of CVVs

It is difficult to directly select proper COCFs and the number of CVVs based on (6) and (7). Herein, the control of capacitor voltage and inductor current should be first converted to the control of their separate reference voltage vector, which can be expressed as(8)vv∗=1Γ21vf∗−Φ21if,k+1p−Φ22vf,k+1p−Γ22io,k,(9)vi∗=1Γ11if∗−Φ11if,k+1p−Φ12vf,k+1p−Γ12io,k.Hence, the control objective of minimizing (6) and (7) becomes to find basic voltage vectors closest to vv∗ and vi∗, which means G1 and G2 can be rewritten as(10)G1=vv∗−vk+12,(11)G2=vi∗−vk+12.Herein, we propose a graphical method to discuss all possible OVV distributions based on the distance between eight basic voltage vectors and the reference voltage vector in (8) and (9). Figure 5 shows the newly proposed division of 36 sectors, and Table 1 lists the optimal candidate OVV distributions. For example, sector S1 and its OVV order mean that when vi∗ or vv∗ is located in sector S1, 8 basic voltage vectors can be sorted by their distance from vi∗ or vv∗ from the nearest to the farthest: v1, v2, v0, v7, v6, v3, v5, v4 (since v0 =  v7, they are in no fixed order). Next, we would try to find the proper number of CVVs that can guarantee a satisfying control performance based on Figure 5 and Table 1.Figure 5
Graphical method for selecting the number of CVVs.Table 1
Candidate OVV distributions.
SectorOVV orderSectorOVV orderS1v1, v2, v0, v7, v6, v3, v5, v4S7’v4, v0, v7, v5, v3, v6, v2, v1S2v2, v1, v0, v7, v3, v6, v4, v5S8’v5, v0, v7, v4, v6, v3, v1, v2S3v2, v3, v0, v7, v1, v4, v6, v5S9’v5, v0, v7, v6, v4, v1, v3, v2S4v3, v2, v0, v7, v4, v1, v5, v6S10’v6, v0, v7, v5, v1, v4, v2, v3S5v3, v4, v0, v7, v2, v5, v1, v6S11’v6, v0, v7, v1, v5, v2, v4, v3S6v4, v3, v0, v7, v5, v2, v6, v1S12’v1, v0, v7, v6, v2, v5, v3, v4S7v4, v5, v0, v7, v3, v6, v2, v1S1”v0, v7, v1, v2, v6, v3, v5, v4S8v5, v4, v0, v7, v6, v3, v1, v2S2”v0, v7, v2, v1, v3, v6, v4, v5S9v5, v6, v0, v7, v4, v1, v3, v2S3”v0, v7, v2, v3, v1, v4, v6, v5S10v6, v5, v0, v7, v1, v4, v2, v3S4”v0, v7, v3, v2, v4, v1, v5, v6S11v6, v1, v0, v7, v5, v2, v4, v3S5”v0, v7, v3, v4, v2, v5, v1, v6S12v1, v6, v0, v7, v2, v5, v3, v4S6”v0, v7, v4, v3, v5, v2, v6, v1S1’v1, v0, v7, v2, v6, v3, v5, v4S7”v0, v7, v4, v5, v3, v6, v2, v1S2’v2, v0, v7, v1, v3, v6, v4, v5S8”v0, v7, v5, v4, v6, v3, v1, v2S3’v2, v0, v7, v3, v1, v4, v6, v5S9”v0, v7, v5, v6, v4, v1, v3, v2S4’v3, v0, v7, v2, v4, v1, v5, v6S10”v0, v7, v6, v5, v1, v4, v2, v3S5’v3, v0, v7, v4, v2, v5, v1, v6S11”v0, v7, v6, v1, v5, v2, v4, v3S6’v4, v0, v7, v3, v5, v2, v6, v1S12”v0, v7, v1, v6, v2, v5, v3, v4The number of CVVs should not miss some optimal options [20]. Considering that the final OVV (which optimizes the second CF) may cause poor performance of the first CF, it is expected to select an OVV that is located in the first four ranks of the OVV order in Table 1 for both CFs. For example, if the CVV number for optimizing the first CF is selected as n=2, it can be deduced from Table 1 that numerous cases may cause the final OVV to be located in the last 4 ranks, which cannot guarantee the second CF to obtain a good performance. In contrast, if n=3, the final OVV can be assured to be located in the first 3 ranks for both CFs, since there is an intersection among the first three vectors, i.e., v0. Since v0 is always followed by v7, selecting four CVVs can also guarantee the final OVV to be located in the first 4 ranks. Further, if the CVV number is selected as n≥5, the first CF may also obtain poor performance under certain cases. Hence, the optimal CVV number is chosen as n=3 or 4, which can guarantee a relative optimal performance for both CFs.


### 3.2.2. Selection of Optimal COCFs

Then, it is required to determine the optimal COCFs. According to the dynamic model in Figure2, it can be deduced that the capacitor voltage is determined by the inductor current. Hence, to obtain an optimal capacitor voltage control performance, it is necessary to first optimize the inductor current control objective, which means the optimal COCF is COCF2.


### 3.2.3. Enumeration Verification

Further, we evaluate all possible COCFs and the number of CVVs2≤n≤7 under various working conditions by simulations with the parameters listed in Table 2.Table 2
Nominal parameters of the system.
Reference voltageV∗ = 300 V, ω∗ = 100π rad/sDC bus voltageVdc = 700 VSampling periodTs = 20 µsLC filterLf = 2.4 mH, Cf = 15 µFNominal linear loadRl = 60 ΩNonlinear loadRn = 465 Ω, Ln = 1.8 mH, Cn = 2.2 mFThe performance indexes for evaluating different COCFs and the number of CVVs are phase-voltage total harmonic distortion (THD) and magnitude of the fundamental component. To emulate the actual implementations, one-step computational delay and its compensation are also considered. Figure6 depicts the steady-state voltage control performance with a different number of CVVs and COCFs under different load conditions, including a linear resistive load and a nonlinear diode rectifier bridge load. By comparing Figures 6(a)–6(c), it shows that for COCF1, to obtain a satisfactory control performance, the feasible number of CVVs is n = 2 and 3, and the system undergoes large distortions or oscillations when n>3. In contrast, the feasible number of CVVs for COCF2 is n= 3 to 7, and most of them can result in better performance than that using COCF1. The system has large distortions or oscillations when n< 3 since the lack of voltage control causes the oscillations. According to our study, the conclusions above are still valid even with a much larger load current (>100 A). This means COCF2 is more universal compared to COCF1. Hence, in the case of a wide range of load variations, the relative optimal control performance is obtained by COCF2 with 3 or 4 CVVs.Figure 6
Evaluation of steady-state capacitor voltage control performance with different CVVs and COCFs under different load conditions. (a) Rated linear load:R = 60 Ω (5 A). (b) Heavy linear load: R = 5 Ω (60 A). (c) Rated nonlinear diode bridge rectifier load.
(a)(b)(c)It should be mentioned that the analysis above is based on the nominal system parameters. It is also important to evaluate the different numbers of CVVs and COCFs under model mismatches. Figure7 illustrates the typical cases of model mismatches. It can be seen that 3 or 4 CVVs can offer a relatively optimal control performance. Moreover, for all the model mismatch cases, the optimal performance is always achieved by COCF2 instead of COCF1. Hence, the optimal COCF is selected as COCF2.Figure 7
Evaluation of steady-state voltage performance with different CVVs and COCFs under model mismatches. (a)−50%Lf. (b) −50%Cf. (c) +100%Lf. (d) +100%Cf. (e) −50%Lf and +100%Cf. (f) +100%Lf and −50%Cf.
(a)(b)(c)(d)(e)(f)


## 3.2.1. Selection of Optimal Number of CVVs

It is difficult to directly select proper COCFs and the number of CVVs based on (6) and (7). Herein, the control of capacitor voltage and inductor current should be first converted to the control of their separate reference voltage vector, which can be expressed as(8)vv∗=1Γ21vf∗−Φ21if,k+1p−Φ22vf,k+1p−Γ22io,k,(9)vi∗=1Γ11if∗−Φ11if,k+1p−Φ12vf,k+1p−Γ12io,k.Hence, the control objective of minimizing (6) and (7) becomes to find basic voltage vectors closest to vv∗ and vi∗, which means G1 and G2 can be rewritten as(10)G1=vv∗−vk+12,(11)G2=vi∗−vk+12.Herein, we propose a graphical method to discuss all possible OVV distributions based on the distance between eight basic voltage vectors and the reference voltage vector in (8) and (9). Figure 5 shows the newly proposed division of 36 sectors, and Table 1 lists the optimal candidate OVV distributions. For example, sector S1 and its OVV order mean that when vi∗ or vv∗ is located in sector S1, 8 basic voltage vectors can be sorted by their distance from vi∗ or vv∗ from the nearest to the farthest: v1, v2, v0, v7, v6, v3, v5, v4 (since v0 =  v7, they are in no fixed order). Next, we would try to find the proper number of CVVs that can guarantee a satisfying control performance based on Figure 5 and Table 1.Figure 5
Graphical method for selecting the number of CVVs.Table 1
Candidate OVV distributions.
SectorOVV orderSectorOVV orderS1v1, v2, v0, v7, v6, v3, v5, v4S7’v4, v0, v7, v5, v3, v6, v2, v1S2v2, v1, v0, v7, v3, v6, v4, v5S8’v5, v0, v7, v4, v6, v3, v1, v2S3v2, v3, v0, v7, v1, v4, v6, v5S9’v5, v0, v7, v6, v4, v1, v3, v2S4v3, v2, v0, v7, v4, v1, v5, v6S10’v6, v0, v7, v5, v1, v4, v2, v3S5v3, v4, v0, v7, v2, v5, v1, v6S11’v6, v0, v7, v1, v5, v2, v4, v3S6v4, v3, v0, v7, v5, v2, v6, v1S12’v1, v0, v7, v6, v2, v5, v3, v4S7v4, v5, v0, v7, v3, v6, v2, v1S1”v0, v7, v1, v2, v6, v3, v5, v4S8v5, v4, v0, v7, v6, v3, v1, v2S2”v0, v7, v2, v1, v3, v6, v4, v5S9v5, v6, v0, v7, v4, v1, v3, v2S3”v0, v7, v2, v3, v1, v4, v6, v5S10v6, v5, v0, v7, v1, v4, v2, v3S4”v0, v7, v3, v2, v4, v1, v5, v6S11v6, v1, v0, v7, v5, v2, v4, v3S5”v0, v7, v3, v4, v2, v5, v1, v6S12v1, v6, v0, v7, v2, v5, v3, v4S6”v0, v7, v4, v3, v5, v2, v6, v1S1’v1, v0, v7, v2, v6, v3, v5, v4S7”v0, v7, v4, v5, v3, v6, v2, v1S2’v2, v0, v7, v1, v3, v6, v4, v5S8”v0, v7, v5, v4, v6, v3, v1, v2S3’v2, v0, v7, v3, v1, v4, v6, v5S9”v0, v7, v5, v6, v4, v1, v3, v2S4’v3, v0, v7, v2, v4, v1, v5, v6S10”v0, v7, v6, v5, v1, v4, v2, v3S5’v3, v0, v7, v4, v2, v5, v1, v6S11”v0, v7, v6, v1, v5, v2, v4, v3S6’v4, v0, v7, v3, v5, v2, v6, v1S12”v0, v7, v1, v6, v2, v5, v3, v4The number of CVVs should not miss some optimal options [20]. Considering that the final OVV (which optimizes the second CF) may cause poor performance of the first CF, it is expected to select an OVV that is located in the first four ranks of the OVV order in Table 1 for both CFs. For example, if the CVV number for optimizing the first CF is selected as n=2, it can be deduced from Table 1 that numerous cases may cause the final OVV to be located in the last 4 ranks, which cannot guarantee the second CF to obtain a good performance. In contrast, if n=3, the final OVV can be assured to be located in the first 3 ranks for both CFs, since there is an intersection among the first three vectors, i.e., v0. Since v0 is always followed by v7, selecting four CVVs can also guarantee the final OVV to be located in the first 4 ranks. Further, if the CVV number is selected as n≥5, the first CF may also obtain poor performance under certain cases. Hence, the optimal CVV number is chosen as n=3 or 4, which can guarantee a relative optimal performance for both CFs.


## 3.2.2. Selection of Optimal COCFs

Then, it is required to determine the optimal COCFs. According to the dynamic model in Figure2, it can be deduced that the capacitor voltage is determined by the inductor current. Hence, to obtain an optimal capacitor voltage control performance, it is necessary to first optimize the inductor current control objective, which means the optimal COCF is COCF2.


## 3.2.3. Enumeration Verification

Further, we evaluate all possible COCFs and the number of CVVs2≤n≤7 under various working conditions by simulations with the parameters listed in Table 2.Table 2
Nominal parameters of the system.
Reference voltageV∗ = 300 V, ω∗ = 100π rad/sDC bus voltageVdc = 700 VSampling periodTs = 20 µsLC filterLf = 2.4 mH, Cf = 15 µFNominal linear loadRl = 60 ΩNonlinear loadRn = 465 Ω, Ln = 1.8 mH, Cn = 2.2 mFThe performance indexes for evaluating different COCFs and the number of CVVs are phase-voltage total harmonic distortion (THD) and magnitude of the fundamental component. To emulate the actual implementations, one-step computational delay and its compensation are also considered. Figure6 depicts the steady-state voltage control performance with a different number of CVVs and COCFs under different load conditions, including a linear resistive load and a nonlinear diode rectifier bridge load. By comparing Figures 6(a)–6(c), it shows that for COCF1, to obtain a satisfactory control performance, the feasible number of CVVs is n = 2 and 3, and the system undergoes large distortions or oscillations when n>3. In contrast, the feasible number of CVVs for COCF2 is n= 3 to 7, and most of them can result in better performance than that using COCF1. The system has large distortions or oscillations when n< 3 since the lack of voltage control causes the oscillations. According to our study, the conclusions above are still valid even with a much larger load current (>100 A). This means COCF2 is more universal compared to COCF1. Hence, in the case of a wide range of load variations, the relative optimal control performance is obtained by COCF2 with 3 or 4 CVVs.Figure 6
Evaluation of steady-state capacitor voltage control performance with different CVVs and COCFs under different load conditions. (a) Rated linear load:R = 60 Ω (5 A). (b) Heavy linear load: R = 5 Ω (60 A). (c) Rated nonlinear diode bridge rectifier load.
(a)(b)(c)It should be mentioned that the analysis above is based on the nominal system parameters. It is also important to evaluate the different numbers of CVVs and COCFs under model mismatches. Figure7 illustrates the typical cases of model mismatches. It can be seen that 3 or 4 CVVs can offer a relatively optimal control performance. Moreover, for all the model mismatch cases, the optimal performance is always achieved by COCF2 instead of COCF1. Hence, the optimal COCF is selected as COCF2.Figure 7
Evaluation of steady-state voltage performance with different CVVs and COCFs under model mismatches. (a)−50%Lf. (b) −50%Cf. (c) +100%Lf. (d) +100%Cf. (e) −50%Lf and +100%Cf. (f) +100%Lf and −50%Cf.
(a)(b)(c)(d)(e)(f)


## 3.3. Priority Division of CFs

In effect, the control priorities of capacitor voltage and inductor current are directly determined by the CVV number selected from the first CF, which can be classified by the median of basic voltage vectors’ number as shown in Table3. To be specific, if the CVV number n<5, this means there are fewer CVVs that can be selected from CF1 for minimizing CF2. As a result, the final selected OVV for CF2 has a greater probability to achieve a better minimization of CF1 instead of CF2, and thus CF1 has a higher control priority, and vice versa.Table 3
Priority of CFs classified by the CVV number.
Priority of CFsCVV number:nCOCFs1 (G1−G2)COCFs2 (G2−G1)Higher priority toG12, 3, 45, 6, 7Higher priority toG25, 6, 72, 3, 4Single-voltage CF :G118Single-current CF :G281In addition, an extreme case is that if the CVV numbern= 1 or 8, then the two sequential CFs are degraded into conventional single-voltage or single-current objective CF, which means the other control objective is lost.It should be noted that the CVV number in the proposed SMPC is selected asn=3 or 4, which indicates that the current-related G2 is assigned a higher control priority. As a result, the inductor current is more tightly controlled to track its reference (start from 0 A). Hence, an inherent smoother current starting response without overshoot is obtained using the proposed SMPC compared to typical weighting factor-based FS-MPC, which is beneficial to hardware safety.


## 3.4. Handling of Current Constraint

To realize the over-current protection, an inductor-current constraint term is usually included in the CF of typical weighting factor-based FS-MPC below:(12)Glim=∞,ifif,k+2>Imax,0,ifif,k+2≤Imax,where Imax is the maximum limit of the inductor current.Similarly, the handling of the current constraint is discussed for the proposed SMPC. According to our simulation study, to obtain a strict current-limiting capability,Glim should be included in the voltage-related G1 as shown in Figure 3. For simplicity, considering a particular case that the number of CVVs is selected as n= 8 in the proposed SMPC, the current control objective G2 is invalid. In this case, if Glim is included in G2, the current-limiting capability will be lost. Hence, to realize a strict current limit under all cases, Glim in the proposed SMPC should be included in G1. The flowchart of the proposed SMPC for LC-filtered VSIs is depicted in Figure 8.Figure 8
Flowchart of the proposed SMPC for LC-filtered VSIs.


## 4. Simulation and Experimental Results

Simulation and experimental comparisons between typical weighting factor-based FS-MPC in (5) and the presented SMPC are given to validate the feasibility of the proposed method. The weighting factor in typical FS-MPC is set to be λ = 3 using an artificial-neural-network algorithm [11]. Figures 9(a) and 9(b) depict the basic structure and experimental prototype of the whole system. The nonlinear load is a diode rectifier bridge load as shown in Figure 9(c). Both control algorithms are implemented in a dSPACE DS1202 PowerPC DualCore 2-GHz processor platform with the system parameters tabulated in Table 2.Figure 9
Experimental setup. (a) Basic structure. (b) Laboratory prototype. (c) Diode-rectifier nonlinear load.
(a)(b)(c)


### 4.1. Switching Frequency and Computational Burden

Considering that both typical weighting factor-based FS-MPC and proposed SMPC schemes generate a variable switching frequency, it is necessary to evaluate their average switching frequencyfasw. For a fair comparison, the sampling frequency of both methods is set as 50 kHz to obtain a similar average switching frequency fasw for both methods. Corresponding fasw of both methods under different load conditions is calculated and depicted in Figure 10.Figure 10
Average switching frequency of typical FS-MPC and proposed SMPC under different load conditions.It can be observed that thefasw of typical FS-MPC is reduced compared to the proposed SMPC under heavy loads, which indicates that the control performance using typical FS-MPC will be degraded since the weighting factor may be sensitive to different load conditions. Moreover, to compare the computational burden of the two methods, the total turnaround time of each method in one sampling period, including the algorithm execution time and the A/D conversion time, is computed by the dSPACE profiler. The results reflect that the turnaround time of both methods is 12 μs, verifying that the proposed SMPC method does not increase the computational burden compared to the typical FS-MPC scheme.


### 4.2. Evaluation of Steady-State Performance

Figure11 shows the experimental results of a steady-state voltage tracking response supplying a nominal linear load (Rl=60Ω), where vfe is the phase-voltage tracking error. It can be observed from Figure 11 that voltage RMSE and THD of the proposed SMPC are slightly larger than those of typical FS-MPC due to the reduced number of CVVs. In general, the proposed SMPC can provide comparable performance as a typical weighting factor-based FS-MPC.Figure 11
Experimental results of steady-state response with rated Rl = 60 Ω. (a) Typical FS-MPC (RMSE = 4.600 V). (b) Proposed SMPC (RMSE = 4.957 V). (c) Voltage harmonic spectrum.
(a)(b)(c)To evaluate that the weighting factors in typical FS-MPC are sensitive to different load conditions, Figure12 depicts the simulation comparison of steady-state response using typical FS-MPC and proposed SMPC under various linear loads. It can be seen that the voltage RMSE and THD of the proposed method are similar to those of typical FS-MPC under a wide range of load variations. However, under heavy load conditions (load current > 30 A), the voltage tracking RMSE of typical FS-MPC significantly increases, while that of the proposed SMPC is still stable due to the elimination of weighting factors. This conclusion is consistent with that of Figure 10. Hence, the proposed SMPC is superior to the typical weighting factor-based FS-MPC method under very heavy loads.Figure 12
Simulation results of steady-state response using typical FS-MPC and proposed SMPC with different linear loads. (a) RMSE. (b) THD.
(a)(b)Further, Figure13 shows the experimental results of steady-state response using two methods with a nonlinear load. Similarly, the voltage THD and tracking RMSE using the proposed SMPC are comparable to those using typical FS-MPC. Note that the THD using both methods with a nonlinear load is reduced compared to that with a linear load in Figure 11. This is caused by the slight increase in average switching frequency of both methods under light load as shown in Figure 10.Figure 13
Experimental results of steady-state response with a nonlinear load. (a) Typical FS-MPC (RMSE = 3.576 V). (b) Proposed SMPC (RMSE = 3.531 V). (c) Phase-voltage harmonic spectrum.
(a)(b)(c)


### 4.3. Evaluation of Transient Performance

Figure14 shows the experimental results of transient performance using two approaches under a nominal linear load step. It reflects that both methods have a similar transient time during the load-step process. However, the voltage fluctuation with the proposed SMPC is 40 V, which is smaller than that with the typical FS-MPC, 45 V. Hence, the robustness against load variations is enhanced using the proposed SMPC.Figure 14
Experimental results of transient response with a linear load step (no load to 60 Ω). (a) Typical FS-MPC. (b) Proposed SMPC.
(a)(b)


### 4.4. Current Start-Up Response and Current Limitation

To validate that the proposed SMPC with COCF2 and 4 CVVs can result in a smoother current-starting response and to verify the current-limiting capability of the proposed SMPC, simulation and experimental results are given in Figures15–17.Figure 15
Simulation results of current starting and limiting response. (a) Inductor-current starting response using typical FS-MPC and proposed SMPC. (b) Load current starting response withGlim included in G2 using proposed SMPC. (c) Load current starting response with Glim included in G1 using proposed SMPC.
(a)(b)(c)From Figures15(a) and 16, it can be deduced that an inherent smoother current-starting response from 0 A with no overshoot is obtained by the proposed SMPC in comparison to typical FS-MPC under linear loads, reducing the shock to system hardware. The reason is that the current control is assigned a higher priority. Figures 15(b), 15(c), and 17 reflect that during the system starting process with a nonlinear load, a very large load current is induced when Glim is included in G2, which means the current-limiting capability is invalid. In contrast, when Glim is included in G1, a strict current-limiting capability can be obtained.Figure 16
Experimental results of starting response of inductor current with a nominal linear load. (a) Typical FS-MPC. (b) Proposed SMPC.
(a)(b)Figure 17
Experimental result of current-limiting capability of proposed SMPC during a starting process with a nonlinear load.


### 4.5. Sensitivity to Model Mismatches

To further evaluate the sensitivity to model mismatches using proposed SMPC, Figure18 and Table 4 illustrate the simulation and experimental results using two control schemes under model parameter mismatches, where Δ THD and Δ RMSE are the deviations of THD and RMSE between typical FS-MPC and the proposed SMPC. The results reflect that both methods are sensitive to model parameter mismatch to different degrees. Nevertheless, in most model mismatch cases, ΔTHD < 0.5% and |Δ RMSE| < 3 V (1% of the reference voltage). Moreover, Table 4 shows that the proposed SMPC is robust to various model mismatches, which is comparable with typical FS-MPC schemes as shown in Figure 7.Figure 18
Simulation results of steady-state phase-voltage THD and tracking RMSE deviation between typical FS-MPC and proposed SMPC with model mismatches. (a) ∆ THD. (b) ∆ RMSE.
(a)(b)Table 4
Experimental results using two control schemes under model parameter mismatches.
Model mismatchesTypical FS-MPCProposed SMPCRMSE (V)THD (%)RMSE (V)THD (%)Lf, Cf4.601.474.961.53Lf, 50% Cf6.431.316.741.4250%Lf, Cf8.322.386.201.90Lf, 200% Cf9.142.076.412.12200%Lf, Cf7.441.977.932.02


## 4.1. Switching Frequency and Computational Burden

Considering that both typical weighting factor-based FS-MPC and proposed SMPC schemes generate a variable switching frequency, it is necessary to evaluate their average switching frequencyfasw. For a fair comparison, the sampling frequency of both methods is set as 50 kHz to obtain a similar average switching frequency fasw for both methods. Corresponding fasw of both methods under different load conditions is calculated and depicted in Figure 10.Figure 10
Average switching frequency of typical FS-MPC and proposed SMPC under different load conditions.It can be observed that thefasw of typical FS-MPC is reduced compared to the proposed SMPC under heavy loads, which indicates that the control performance using typical FS-MPC will be degraded since the weighting factor may be sensitive to different load conditions. Moreover, to compare the computational burden of the two methods, the total turnaround time of each method in one sampling period, including the algorithm execution time and the A/D conversion time, is computed by the dSPACE profiler. The results reflect that the turnaround time of both methods is 12 μs, verifying that the proposed SMPC method does not increase the computational burden compared to the typical FS-MPC scheme.


## 4.2. Evaluation of Steady-State Performance

Figure11 shows the experimental results of a steady-state voltage tracking response supplying a nominal linear load (Rl=60Ω), where vfe is the phase-voltage tracking error. It can be observed from Figure 11 that voltage RMSE and THD of the proposed SMPC are slightly larger than those of typical FS-MPC due to the reduced number of CVVs. In general, the proposed SMPC can provide comparable performance as a typical weighting factor-based FS-MPC.Figure 11
Experimental results of steady-state response with rated Rl = 60 Ω. (a) Typical FS-MPC (RMSE = 4.600 V). (b) Proposed SMPC (RMSE = 4.957 V). (c) Voltage harmonic spectrum.
(a)(b)(c)To evaluate that the weighting factors in typical FS-MPC are sensitive to different load conditions, Figure12 depicts the simulation comparison of steady-state response using typical FS-MPC and proposed SMPC under various linear loads. It can be seen that the voltage RMSE and THD of the proposed method are similar to those of typical FS-MPC under a wide range of load variations. However, under heavy load conditions (load current > 30 A), the voltage tracking RMSE of typical FS-MPC significantly increases, while that of the proposed SMPC is still stable due to the elimination of weighting factors. This conclusion is consistent with that of Figure 10. Hence, the proposed SMPC is superior to the typical weighting factor-based FS-MPC method under very heavy loads.Figure 12
Simulation results of steady-state response using typical FS-MPC and proposed SMPC with different linear loads. (a) RMSE. (b) THD.
(a)(b)Further, Figure13 shows the experimental results of steady-state response using two methods with a nonlinear load. Similarly, the voltage THD and tracking RMSE using the proposed SMPC are comparable to those using typical FS-MPC. Note that the THD using both methods with a nonlinear load is reduced compared to that with a linear load in Figure 11. This is caused by the slight increase in average switching frequency of both methods under light load as shown in Figure 10.Figure 13
Experimental results of steady-state response with a nonlinear load. (a) Typical FS-MPC (RMSE = 3.576 V). (b) Proposed SMPC (RMSE = 3.531 V). (c) Phase-voltage harmonic spectrum.
(a)(b)(c)


## 4.3. Evaluation of Transient Performance

Figure14 shows the experimental results of transient performance using two approaches under a nominal linear load step. It reflects that both methods have a similar transient time during the load-step process. However, the voltage fluctuation with the proposed SMPC is 40 V, which is smaller than that with the typical FS-MPC, 45 V. Hence, the robustness against load variations is enhanced using the proposed SMPC.Figure 14
Experimental results of transient response with a linear load step (no load to 60 Ω). (a) Typical FS-MPC. (b) Proposed SMPC.
(a)(b)


## 4.4. Current Start-Up Response and Current Limitation

To validate that the proposed SMPC with COCF2 and 4 CVVs can result in a smoother current-starting response and to verify the current-limiting capability of the proposed SMPC, simulation and experimental results are given in Figures15–17.Figure 15
Simulation results of current starting and limiting response. (a) Inductor-current starting response using typical FS-MPC and proposed SMPC. (b) Load current starting response withGlim included in G2 using proposed SMPC. (c) Load current starting response with Glim included in G1 using proposed SMPC.
(a)(b)(c)From Figures15(a) and 16, it can be deduced that an inherent smoother current-starting response from 0 A with no overshoot is obtained by the proposed SMPC in comparison to typical FS-MPC under linear loads, reducing the shock to system hardware. The reason is that the current control is assigned a higher priority. Figures 15(b), 15(c), and 17 reflect that during the system starting process with a nonlinear load, a very large load current is induced when Glim is included in G2, which means the current-limiting capability is invalid. In contrast, when Glim is included in G1, a strict current-limiting capability can be obtained.Figure 16
Experimental results of starting response of inductor current with a nominal linear load. (a) Typical FS-MPC. (b) Proposed SMPC.
(a)(b)Figure 17
Experimental result of current-limiting capability of proposed SMPC during a starting process with a nonlinear load.


## 4.5. Sensitivity to Model Mismatches

To further evaluate the sensitivity to model mismatches using proposed SMPC, Figure18 and Table 4 illustrate the simulation and experimental results using two control schemes under model parameter mismatches, where Δ THD and Δ RMSE are the deviations of THD and RMSE between typical FS-MPC and the proposed SMPC. The results reflect that both methods are sensitive to model parameter mismatch to different degrees. Nevertheless, in most model mismatch cases, ΔTHD < 0.5% and |Δ RMSE| < 3 V (1% of the reference voltage). Moreover, Table 4 shows that the proposed SMPC is robust to various model mismatches, which is comparable with typical FS-MPC schemes as shown in Figure 7.Figure 18
Simulation results of steady-state phase-voltage THD and tracking RMSE deviation between typical FS-MPC and proposed SMPC with model mismatches. (a) ∆ THD. (b) ∆ RMSE.
(a)(b)Table 4
Experimental results using two control schemes under model parameter mismatches.
Model mismatchesTypical FS-MPCProposed SMPCRMSE (V)THD (%)RMSE (V)THD (%)Lf, Cf4.601.474.961.53Lf, 50% Cf6.431.316.741.4250%Lf, Cf8.322.386.201.90Lf, 200% Cf9.142.076.412.12200%Lf, Cf7.441.977.932.02


## 5. Conclusion

This paper presents a weighting factor-less sequential model predictive control scheme for LC-filtered VSIs. A graphical method is first proposed to determine the optimal candidate voltage vector number. The cascade order of the cost function is also obtained by the internal relationship of the state variables. Then, the current constraint is considered and included in the voltage-related CF, resulting in a strict current-limiting capability. Additionally, an inherent smooth current-starting response is achieved. Simulation and quantitative experimental results reveal that the presented approach can avoid the complex weighting factor tuning efforts without sacrificing the transient and steady-state performance compared to typical FS-MPC.



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*Source: 5190885-2022-04-16.xml*