# Design Consideration for High Step-Up Nonisolated Multicellular dc-dc Converter for PV Micro Converters

Authors: Yusuke Hayashi; Yoshikatsu Matsugaki; Tamotsu Ninomiya
Journal: Journal of Engineering
 (2018)

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## Abstract

High step-up nonisolated multicellular dc-dc converter has been newly proposed for PV microconverters. The multicellular converter consists of the nonisolated step-up cell converters using bidirectional semiconductor switches, and these cell converters are connected in Input Parallel Output Series (IPOS). The voltage transformation ratio of the step-up converter isN/(1-D) in case all the transistors in N cell converters are operated at the duty ratio of D. The proposed multicellular dc-dc converter also accomplishes high efficiency because of no magnetic coupling such as the high frequency transformer and the coupled inductor. Laboratory prototype has been fabricated to show the feasibility of the proposed converter. Design consideration for the 20 V–40 V to 384 V, 240 W nonisolated multicellular dc-dc converter has been also conducted, and the potential to achieve the efficiency of 98% has been shown. The proposed multicellular converter contributes to realizing the environmentally aware data centers for future low carbon society.


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## Body

## 1. Introduction

Environmentally aware data centers have been proposed by NTT (Nippon Telegraph and Telephone Corporation) to realize highly electrified low carbon society [1, 2]. The environmentally aware data center reduces the conversion loss by introducing 380 V dc distribution system and minimizes the environmental impact by installing the solar PV power systems into the 380 V dc distribution system. Highly efficient and ultracompact (high-power-density) power electronics converters are necessary to utilize the renewable energy sources effectively.Microconverter concept is one of attractive solutions for the effective use of the solar PV generations. The low input voltage and low output power dc-dc converter (microconverter) is installed into each solar module and all of microconverters are controlled to achieve MPPT (Maximum Power Point Tracking). Influence of the partially shaded or soiled solar cells on the total output power of the solar power systems is minimized because the output power of solar modules is controlled individually.One of issues for the microconverter concept is the high step-up voltage transformation ratio (voltage gain: output voltage/input voltage) of 10–20. It is difficult to develop the high step-up microconverter by the general nonisolated boost chopper circuit because of the parasitic resistance [3]. High frequency transformers and coupled inductors based on the magnetic coupling are employed to accomplish the high step-up voltage transformation ratio [4–8]. The magnetic coupling achieves the high transformation ratio; however, this causes the nonnegligible power dissipation.In this paper, the high step-up nonisolated dc-dc converter is newly proposed for PV microconverters. The proposed dc-dc converter is based on the multicellular converter topology, and the boost chopper circuits with the bidirectional switches for cell converters are connected in IPOS. The voltage gain isN/(1-D) in case transistors in N cell converters are operated at the duty ratio of D. The number of cell converter contributes to achieving high transformation ratio.In Section2, the next generation dc distribution system for the data center is introduced. The circuit configuration, the control scheme, the fundamental behavior, and the feasibility of the nonisolated multicellular dc-dc converter are described in Section 3. In Section 4, design consideration for the proposed multicellular converter is conducted and the potential to achieve high efficiency is presented.


## 2. Environmentally Aware Data Center for Low Carbon Society

### 2.1. Dc Distribution System in Environmentally Aware Data Center

The simplified schematic diagram of the dc distribution system for the environmentally friendly data centers is shown in Figure1 [9, 13]. This system is based on the 380 V dc distribution system which goes beyond the conventional 48 V dc distribution system, and this achieves higher efficiency providing smaller supply current [14]. In the 380 V dc distribution system, the power factor correction (PFC) converters, the dc-dc transformers (DCX), and point-of-load (POL) converters are introduced to supply the electric power from ac 200 V to ICT (information and communication technology) equipment. Intensive studies have been conducted to realize highly efficient PFCs, DCXs, and POLs [15–18], and the potential to improve the total conversion efficiency in the dc distribution system from 80% to 94% has been discussed [9, 16].Figure 1
Configuration of next generation dc distribution system for environmentally aware data centers [9].In the dc distribution system for the environmentally aware data center, the environmental impact will be also minimized by installing the renewable energy sources such as solar PV power generations. The 380 V dc distribution system contributes smooth introduction of the solar power systems because of the dc interface. To utilize the generated electric power effectively, highly efficient and ultracompact dc-dc converters for PV generation are also indispensable.


### 2.2. Power Electronics Converters for PV Generation

There are mainly two solutions to connect PV cells to the dc distribution system via dc-dc converters. Figure2 shows the schematic for two solutions. One is the centralized converter solution where low voltage PV modules are connected in series and the bundled higher voltage is applied to the single central converter. The other is the microconverter solution where the low-power dc-dc converters are placed beside PV modules and the output powers of PV modules are controlled independently. Characteristics of two solutions are summarized as follows.(i)
Highly efficient dc-dc converter can be developed in the centralized converter solution because of the low voltage transformation ratio. However, the generated electric power from PV cells is not provided to the distribution system effectively in case some solar modules are shaded or soiled.(ii)
Influence of the partially shaded or soiled solar modules on total generated electric power from PV cells can be minimized in the microconverter solution. The efficiency of the dc-dc converter in the microconverter solution is lower than the converter in the centralized solution because of the high voltage transformation ratio.Figure 2
Centralized converter solution and microconverter solution for connecting PV modules into dc distribution system.Microconverter solution is attractive for environmentally aware data centers in terms of the effective utilization of renewable energy sources. Developing highly efficient high step-up dc-dc converter is one of the key issues.The voltage transformation ratio of, for example, 9.6 to 19.2, is required for the dc-dc converter in case the PV modules whose output voltages are, for example, 20 V to 40 V are connected to the 384 V dc distribution line. It is difficult to realize the general boost chopper circuit with the voltage transformation ratio over 10, because the parasitic resistance in the circuit causes the voltage drop [3]. Therefore, the circuit topologies based on the magnetic coupling such as the high frequency transformer and the coupled inductor are employed to realize the high voltage gain converters [4–8]. The magnetic coupling causes the significant power dissipation and prevents achieving high efficiency.


## 2.1. Dc Distribution System in Environmentally Aware Data Center

The simplified schematic diagram of the dc distribution system for the environmentally friendly data centers is shown in Figure1 [9, 13]. This system is based on the 380 V dc distribution system which goes beyond the conventional 48 V dc distribution system, and this achieves higher efficiency providing smaller supply current [14]. In the 380 V dc distribution system, the power factor correction (PFC) converters, the dc-dc transformers (DCX), and point-of-load (POL) converters are introduced to supply the electric power from ac 200 V to ICT (information and communication technology) equipment. Intensive studies have been conducted to realize highly efficient PFCs, DCXs, and POLs [15–18], and the potential to improve the total conversion efficiency in the dc distribution system from 80% to 94% has been discussed [9, 16].Figure 1
Configuration of next generation dc distribution system for environmentally aware data centers [9].In the dc distribution system for the environmentally aware data center, the environmental impact will be also minimized by installing the renewable energy sources such as solar PV power generations. The 380 V dc distribution system contributes smooth introduction of the solar power systems because of the dc interface. To utilize the generated electric power effectively, highly efficient and ultracompact dc-dc converters for PV generation are also indispensable.


## 2.2. Power Electronics Converters for PV Generation

There are mainly two solutions to connect PV cells to the dc distribution system via dc-dc converters. Figure2 shows the schematic for two solutions. One is the centralized converter solution where low voltage PV modules are connected in series and the bundled higher voltage is applied to the single central converter. The other is the microconverter solution where the low-power dc-dc converters are placed beside PV modules and the output powers of PV modules are controlled independently. Characteristics of two solutions are summarized as follows.(i)
Highly efficient dc-dc converter can be developed in the centralized converter solution because of the low voltage transformation ratio. However, the generated electric power from PV cells is not provided to the distribution system effectively in case some solar modules are shaded or soiled.(ii)
Influence of the partially shaded or soiled solar modules on total generated electric power from PV cells can be minimized in the microconverter solution. The efficiency of the dc-dc converter in the microconverter solution is lower than the converter in the centralized solution because of the high voltage transformation ratio.Figure 2
Centralized converter solution and microconverter solution for connecting PV modules into dc distribution system.Microconverter solution is attractive for environmentally aware data centers in terms of the effective utilization of renewable energy sources. Developing highly efficient high step-up dc-dc converter is one of the key issues.The voltage transformation ratio of, for example, 9.6 to 19.2, is required for the dc-dc converter in case the PV modules whose output voltages are, for example, 20 V to 40 V are connected to the 384 V dc distribution line. It is difficult to realize the general boost chopper circuit with the voltage transformation ratio over 10, because the parasitic resistance in the circuit causes the voltage drop [3]. Therefore, the circuit topologies based on the magnetic coupling such as the high frequency transformer and the coupled inductor are employed to realize the high voltage gain converters [4–8]. The magnetic coupling causes the significant power dissipation and prevents achieving high efficiency.


## 3. High Step-Up Nonisolated Multicellular dc-dc Converter

### 3.1. Circuit Configuration and Control System of Nonisolated Multicellular Converter

The nonisolated multicellular dc-dc converter is proposed to realize highly efficient high step-up dc-dc converter. Figure3 shows the circuit configuration of the proposed converter. The multicellular converter consists of the nonisolated cell converters and these cell converters are connected in IPOS. Configuration of each cell converter is based on the general boost chopper circuit and the bidirectional switches substitute for the free-wheeling diode to achieve the isolation barrier. The bidirectional switches affect the converter performance significantly, and the ultralow loss GaN bidirectional transistors under the research and development are attractive for the proposed converter [19].Figure 3
Configuration of high step-up non-isolated multicellular dc-dc converter. (a) IPOS connected cell converters and (b) single cell converter.
(a)
(b)Figure4 shows the control system of the proposed multicellular dc-dc converter for the microconverter solution. The control system consists of the controller for the MPPT (Maximum Power Point Tracking) to adjust the duty ratio D and the controller for PWM (Pulse Width Modulation) to generate the gate signals for transistors Qk (k=1,2,…,N) in the cell converters. The flowchart for the well-known P & O (Perturbation and Observation) algorithm is shown in Figure 4(a) and this control algorithm is generally applied to the boost converter for PV applications [10, 11, 20].Figure 4
Control system of nonisolated multicellular converter for microconverter solution. (a) Control algorithm for MPPT and (b) PWM control.
(a)
(b)The isolated dc-dc converter with the high frequency transformers is often used to develop the IPOS multicellular converter. On the other hand, the proposed converter consists of the nonisolated dc-dc cell converters to simplify the circuit configuration. The isolation barrier has to be achieved by the intrinsic capacitances of the bidirectional switchesQXak, QXbk (k=1,2,…,N), taking the control strategy into account. The gate signals for transistors Qk during one cycle are shown in Figure 4(b). The duty ratio for all the transistors Qk is D, and the bidirectional switches QXak, QXbk are operated complementally. In the proposed circuit, one of cell converters can provide the electric power to the load at an arbitrary time, and the remaining N-1 cell converters have to be isolated by turning off the bidirectional switches to prevent the short circuit among cell converters. The interleaved control is applied to control the cell converters, and the duty ratio is limited as follows.(1)N-1N≤D≤1.All the cell converters operating at the duty ratio in (1) behave as the general boost choppers independently, and the whole multicellular converter achieves high voltage gain realizing the isolation barrier among cell converters. Details of the converter characteristics are described in the next section.


### 3.2. Analysis for Nonisolated Multicellular Converter Based on Space-State Averaging Method

The circuit configuration of the cell converter is based on the typical boost chopper topology, and the fundamental characteristics of the proposed converter are explained by the space-state averaging method [3, 12, 21]. The transfer characteristics of each cell converter shown in Figure 3(b) are formulated as follows.(2)ddtiLikvCok=0-D′LikD′Cok-1RCokiLikvCok+1Lik0vik.In the above equation, the spate variables ofiLik, vCok mean the current through the input inductor Lik and the applied voltage to the output capacitor Cok, respectively. The input voltage of the cell converter k is vik and its output current to the resistive load R is iok. The transistor Qk is operated at the duty ratio of D (D′=1-D). Here the integer k (k=1,2,…,N) means the number of IPOS connected N cell converters in Figure 3(a). Parasitic resistances in the switches Qk, QXak, QXbk, the inductor Lik, and the capacitor Cok are not considered here to simplify the analysis.In Figure3, the input voltage vIN is applied to all cell converters and the output current iOUT flows through all cell converters. In the IPOS connection topology, the following relationships are obtained.(3)vIN=vi1=vi2=⋯=viNiIN=iLi1+iLi2+⋯+iLiNvOUT=vCo1+vCo2+⋯+vCoNiOUT=io1=io2=⋯=ioN.In case that the common design methodology is applied to all cell converters, the equalized inductance and capacitance values are employed for all cell converters as follows, without taking the influence of the variation in the real products into account.(4)Li=Li1=Li2=⋯=LiNCo=Co1=Co2=⋯=CoN.Based on the above relations, the transfer characteristics in (2) are summarized as follows.(5)∑k=1NddtiLikvCok=∑k=1N0-D′LiD′Co-1RCoiLikvCok+1Li0NvIN(6)∴ddtiINvOUT=0-D′LiD′Co-1RCoiINvOUT+1Li0NvIN.Equation (6) means that the multicellular converter in Figure 3(a) behaves as the single step-up converter whose input voltage is N·vIN. The relationship between the input voltage VIN and the output voltage VOUT of the multicellular converter is described as follows through the Laplace transformation.(7)VOUTVIN=ND′11+2δ/ω0s+1/ω02s2(8)ω0=D′LiCo,δ=12D′RLC(9)lims→0⁡s·VOUT=ND′·VIN.Equation (9) shows the voltage transformation ratio of the proposed multicellular converter under the steady state operation condition. The cycle of the output perturbation for the photovoltaics is generally at a level of several minutes. The high frequency converters achieve high-speed response and the converters accomplish the ratio in (9) during the perturbation. The obtained transformation ratio is N times higher than the ratio of the conventional step-up converter under the corresponding duty ratio D.


### 3.3. Output Voltage Unbalance among IPOS Connected Cell Converters

In the real circuit operation condition, the parasitic resistances in switchesQk, QXak, QXbk, the inductors Lik, and the capacitors Cok cause the output voltage unbalance among cell converters. The influence of the parasitic resistances on the unbalanced voltage is discussed here.The equivalent circuit of the multicellular step-up converter is shown in Figure5. The cell converters can be regarded as the dc voltage transformer from (9), and the cell converter k (k=1,2,…,N) is simply composed of the dependent voltage source, the dependent current source, and the equivalent output resistance rok [18, 22]. The parasitic resistances caused by the switches and the inductors are bundled to the resistance rok. From Figure 5, the voltage and the current in each cell converter have the following relationship. (10)1D′vik-rok·iok=vok.Figure 5
Simplified equivalent circuit of multicellular dc-dc converter based on IPOS connection topology.Based on (3), the output voltage vok of the cell converter k is obtained as follows.(11)ND′vIN-∑k=1Nrok·iOUT=vOUT=N·R·iOUT(12)iOUT=1D′1R+∑k=1Nrok/NvIN(13)∴vok=1D′vIN-rok·iOUT=1D′1-rokR+∑k=1Nrok/NvIN.From (13), the output voltages of the cell converters have the unbalance caused by the variation in the equivalent output resistances rok. However, the influence of the resistance rok is negligible in the case of highly efficient cell converter because the load resistance R is sufficiently larger than the resistance rok. This means that the output cell voltages vok converge, and the unbalanced voltage among cell converters is negligible in case all the cell converters are operated at the duty ratio D.


### 3.4. Voltage Transformation Ratio of Nonisolated Multicellular Converter under Real Circuit Operation Condition

Figure6 shows the relationship between the duty ratio D of the transistor Qk (k=1,2,…,N) and the actual voltage transformation ratio G of the proposed multicellular converter, taking the parasitic resistances in the cell converters into account. As the duty ratio approaches 1.0, the transformation ratio diminishes because of the voltage drop caused by the parasitic resistances.Figure 6
Voltage transformation ratio of nonisolated step-up multicellular dc-dc converter taking parasitic resistances into account.The calculation results of the voltage transformation ratio for three kinds of multicellular converter (N=1,2,3 in Figure 3(a)) are shown in Figure 6. The transformation ratio G is calculated as follows based on (11) and (12).(14)vOUT=N·R·iOUT=ND′RR+∑k=1Nrok/NvIN(15)∴G=vOUTvIN=ND′11+∑k=1Nrok/N/R=ND′11+Zo/R.In (15), the symbol of R means the output resistance based on the rated output power of the cell converter. The average parasitic resistance of all the cell converters is Zo. The voltage gain G of the IPOS multicellular converter is simply calculated by stacking the voltage gains of the cell converters without taking the variation in the real product into account. In the steady state averaging method, the average resistance Zo is formulated by using the resistance rs from the main switch Qk, the resistance rD from the bidirectional switches Qxak, Qxbk, and the resistance rL from the input inductor Lik as follows [3].(16)Zo=Drs+1-DrD+rL1-D2≅rL1-D2.In (16), the resistances in the cell converter are bundled to rL to simplify the calculation. Here, the parasitic resistance rL of 0.5 Ω and the output resistance R of 205 Ω were applied to calculate the voltage transformation ratio, assuming the cell converter with the output voltage of 128 V (=384 V/3) and the output power of 80 W (240 W/3).Figure6 means that the nonisolated multicellular converter using 3 cell converters achieves the voltage transformation ratio of 9.6 to 19.2 for the PV microconverter.


## 3.1. Circuit Configuration and Control System of Nonisolated Multicellular Converter

The nonisolated multicellular dc-dc converter is proposed to realize highly efficient high step-up dc-dc converter. Figure3 shows the circuit configuration of the proposed converter. The multicellular converter consists of the nonisolated cell converters and these cell converters are connected in IPOS. Configuration of each cell converter is based on the general boost chopper circuit and the bidirectional switches substitute for the free-wheeling diode to achieve the isolation barrier. The bidirectional switches affect the converter performance significantly, and the ultralow loss GaN bidirectional transistors under the research and development are attractive for the proposed converter [19].Figure 3
Configuration of high step-up non-isolated multicellular dc-dc converter. (a) IPOS connected cell converters and (b) single cell converter.
(a)
(b)Figure4 shows the control system of the proposed multicellular dc-dc converter for the microconverter solution. The control system consists of the controller for the MPPT (Maximum Power Point Tracking) to adjust the duty ratio D and the controller for PWM (Pulse Width Modulation) to generate the gate signals for transistors Qk (k=1,2,…,N) in the cell converters. The flowchart for the well-known P & O (Perturbation and Observation) algorithm is shown in Figure 4(a) and this control algorithm is generally applied to the boost converter for PV applications [10, 11, 20].Figure 4
Control system of nonisolated multicellular converter for microconverter solution. (a) Control algorithm for MPPT and (b) PWM control.
(a)
(b)The isolated dc-dc converter with the high frequency transformers is often used to develop the IPOS multicellular converter. On the other hand, the proposed converter consists of the nonisolated dc-dc cell converters to simplify the circuit configuration. The isolation barrier has to be achieved by the intrinsic capacitances of the bidirectional switchesQXak, QXbk (k=1,2,…,N), taking the control strategy into account. The gate signals for transistors Qk during one cycle are shown in Figure 4(b). The duty ratio for all the transistors Qk is D, and the bidirectional switches QXak, QXbk are operated complementally. In the proposed circuit, one of cell converters can provide the electric power to the load at an arbitrary time, and the remaining N-1 cell converters have to be isolated by turning off the bidirectional switches to prevent the short circuit among cell converters. The interleaved control is applied to control the cell converters, and the duty ratio is limited as follows.(1)N-1N≤D≤1.All the cell converters operating at the duty ratio in (1) behave as the general boost choppers independently, and the whole multicellular converter achieves high voltage gain realizing the isolation barrier among cell converters. Details of the converter characteristics are described in the next section.


## 3.2. Analysis for Nonisolated Multicellular Converter Based on Space-State Averaging Method

The circuit configuration of the cell converter is based on the typical boost chopper topology, and the fundamental characteristics of the proposed converter are explained by the space-state averaging method [3, 12, 21]. The transfer characteristics of each cell converter shown in Figure 3(b) are formulated as follows.(2)ddtiLikvCok=0-D′LikD′Cok-1RCokiLikvCok+1Lik0vik.In the above equation, the spate variables ofiLik, vCok mean the current through the input inductor Lik and the applied voltage to the output capacitor Cok, respectively. The input voltage of the cell converter k is vik and its output current to the resistive load R is iok. The transistor Qk is operated at the duty ratio of D (D′=1-D). Here the integer k (k=1,2,…,N) means the number of IPOS connected N cell converters in Figure 3(a). Parasitic resistances in the switches Qk, QXak, QXbk, the inductor Lik, and the capacitor Cok are not considered here to simplify the analysis.In Figure3, the input voltage vIN is applied to all cell converters and the output current iOUT flows through all cell converters. In the IPOS connection topology, the following relationships are obtained.(3)vIN=vi1=vi2=⋯=viNiIN=iLi1+iLi2+⋯+iLiNvOUT=vCo1+vCo2+⋯+vCoNiOUT=io1=io2=⋯=ioN.In case that the common design methodology is applied to all cell converters, the equalized inductance and capacitance values are employed for all cell converters as follows, without taking the influence of the variation in the real products into account.(4)Li=Li1=Li2=⋯=LiNCo=Co1=Co2=⋯=CoN.Based on the above relations, the transfer characteristics in (2) are summarized as follows.(5)∑k=1NddtiLikvCok=∑k=1N0-D′LiD′Co-1RCoiLikvCok+1Li0NvIN(6)∴ddtiINvOUT=0-D′LiD′Co-1RCoiINvOUT+1Li0NvIN.Equation (6) means that the multicellular converter in Figure 3(a) behaves as the single step-up converter whose input voltage is N·vIN. The relationship between the input voltage VIN and the output voltage VOUT of the multicellular converter is described as follows through the Laplace transformation.(7)VOUTVIN=ND′11+2δ/ω0s+1/ω02s2(8)ω0=D′LiCo,δ=12D′RLC(9)lims→0⁡s·VOUT=ND′·VIN.Equation (9) shows the voltage transformation ratio of the proposed multicellular converter under the steady state operation condition. The cycle of the output perturbation for the photovoltaics is generally at a level of several minutes. The high frequency converters achieve high-speed response and the converters accomplish the ratio in (9) during the perturbation. The obtained transformation ratio is N times higher than the ratio of the conventional step-up converter under the corresponding duty ratio D.


## 3.3. Output Voltage Unbalance among IPOS Connected Cell Converters

In the real circuit operation condition, the parasitic resistances in switchesQk, QXak, QXbk, the inductors Lik, and the capacitors Cok cause the output voltage unbalance among cell converters. The influence of the parasitic resistances on the unbalanced voltage is discussed here.The equivalent circuit of the multicellular step-up converter is shown in Figure5. The cell converters can be regarded as the dc voltage transformer from (9), and the cell converter k (k=1,2,…,N) is simply composed of the dependent voltage source, the dependent current source, and the equivalent output resistance rok [18, 22]. The parasitic resistances caused by the switches and the inductors are bundled to the resistance rok. From Figure 5, the voltage and the current in each cell converter have the following relationship. (10)1D′vik-rok·iok=vok.Figure 5
Simplified equivalent circuit of multicellular dc-dc converter based on IPOS connection topology.Based on (3), the output voltage vok of the cell converter k is obtained as follows.(11)ND′vIN-∑k=1Nrok·iOUT=vOUT=N·R·iOUT(12)iOUT=1D′1R+∑k=1Nrok/NvIN(13)∴vok=1D′vIN-rok·iOUT=1D′1-rokR+∑k=1Nrok/NvIN.From (13), the output voltages of the cell converters have the unbalance caused by the variation in the equivalent output resistances rok. However, the influence of the resistance rok is negligible in the case of highly efficient cell converter because the load resistance R is sufficiently larger than the resistance rok. This means that the output cell voltages vok converge, and the unbalanced voltage among cell converters is negligible in case all the cell converters are operated at the duty ratio D.


## 3.4. Voltage Transformation Ratio of Nonisolated Multicellular Converter under Real Circuit Operation Condition

Figure6 shows the relationship between the duty ratio D of the transistor Qk (k=1,2,…,N) and the actual voltage transformation ratio G of the proposed multicellular converter, taking the parasitic resistances in the cell converters into account. As the duty ratio approaches 1.0, the transformation ratio diminishes because of the voltage drop caused by the parasitic resistances.Figure 6
Voltage transformation ratio of nonisolated step-up multicellular dc-dc converter taking parasitic resistances into account.The calculation results of the voltage transformation ratio for three kinds of multicellular converter (N=1,2,3 in Figure 3(a)) are shown in Figure 6. The transformation ratio G is calculated as follows based on (11) and (12).(14)vOUT=N·R·iOUT=ND′RR+∑k=1Nrok/NvIN(15)∴G=vOUTvIN=ND′11+∑k=1Nrok/N/R=ND′11+Zo/R.In (15), the symbol of R means the output resistance based on the rated output power of the cell converter. The average parasitic resistance of all the cell converters is Zo. The voltage gain G of the IPOS multicellular converter is simply calculated by stacking the voltage gains of the cell converters without taking the variation in the real product into account. In the steady state averaging method, the average resistance Zo is formulated by using the resistance rs from the main switch Qk, the resistance rD from the bidirectional switches Qxak, Qxbk, and the resistance rL from the input inductor Lik as follows [3].(16)Zo=Drs+1-DrD+rL1-D2≅rL1-D2.In (16), the resistances in the cell converter are bundled to rL to simplify the calculation. Here, the parasitic resistance rL of 0.5 Ω and the output resistance R of 205 Ω were applied to calculate the voltage transformation ratio, assuming the cell converter with the output voltage of 128 V (=384 V/3) and the output power of 80 W (240 W/3).Figure6 means that the nonisolated multicellular converter using 3 cell converters achieves the voltage transformation ratio of 9.6 to 19.2 for the PV microconverter.


## 4. Simulation Analysis and Experimental Verification of Nonisolated Multicellular Converter

### 4.1. Simulation Analysis for 20 V–40 V to 384 V Multicellular dc-dc Converter Using Three Nonisolated Cell Converters

Figure7 shows the circuit configuration of the nonisolated multicellular dc-dc converter for circuit simulation analysis. Two antiseries connected power transistors QXak, QXbk in Figure 7 substituted for the single bidirectional switch shown in Figure 3 because of the research and development phase and no circuit simulation models for the single bidirectional switch.Figure 7
Circuit configuration of non-isolated multicellular dc-dc converter using three cell converters for circuit simulation.Table1 shows the parameters for the simulation. The input voltage of the multicellular converter Vin is from 20 V to 40 V, taking the output perturbation of the PV module into account [4–7]. The output voltage of the multicellular converter Vout is nominally 384 V to connect to the 380 V dc distribution system. The rated output power of the converter Pout is 240 W here. The output voltage of the cell converter Vok is nominally 128 V and the output power of the cell converter Pok is 80 W because of three cell converters. The GaN-FET (50 mΩ, 200 V) was utilized for the main transistor Qk and the GaN-HEMTs (150 m Ω, 650 V) were employed for the bidirectional switches QXak, QXbk in each cell converter. The multilayer ceramic capacitors (MLCCs) were utilized for both the input and the output capacitors Cik, Cok.Table 1
Parameters for circuit simulation of nonisolated multicellular converter.
Multicellular converter
Input voltageVIN
20 V to 40 V
Output voltageVOUT
384 V
Output powerPOUT
240 W
Connection topology
Input Parallel Output Series
Number of cells
3 (k=1,2,3)
Single cell converter
Input voltageVIN
20 V to 40 V
Output voltageVok
128 V
Output powerPok
80 W
TransistorQk
GaN-FET (50 mΩ, 200 V)Coss = 110 pF @ 100 V
Bidirectional switchesQXak, QXbk
Two GaN-HEMTs (150 mΩ, 600 V)Coss = 145 pF @ 100 Vconnected in antiseries
Input capacitorCik
MLCC (52.3μF, 63 V)
Output capacitorCok
MLCC (1.37μF, 200 V)
Input inductorLik
Mn-Zn ferrite (68.8μH)
Switching frequencyfSW
100 kHz
Parasitic inductance
22.5 nHThe capacitancesCik, Cok were designed to suppress the voltage ripple of the input and the output voltages within 3% of their rated voltages, respectively. The input inductance Lik was designed to achieve the zero current switching (ZCS) under the critical current mode (CCM) of the boost chopper cell converter at the input voltage of 40 V and the output power of 80 W. Here, the subscript k for the symbols means the number of the cell converters and k has the integer of 1, 2, 3.The output characteristics of the PV module are given by the published datasheet. Figure8 shows the normalized I-V and P-V characteristics of the commercially available PV module, taking the influence of the solar radiation into account. The operation conditions to achieve the MPPT are extracted from Figure 8. In case the normalized voltage of 1.0 corresponds to 40 V and the normalized current of 1.0 means 8.0 A, the maximum output power of the PV module for the irradiation of 100% becomes 244 W under the condition that the voltage VIN and the current IIN are 33.2 V and 7.36 A, respectively. The maximum output power for the solar radiation of 60% becomes 140 W under the voltage VIN of 32.0 V. Here, the effect of the temperature of the PV module on its I-V characteristics is not considered.Figure 8
I-V and P-V characteristics of PV module.Figures9(a) and 9(b) show the simulation results of 32.0 V–384 V, 140 W operation and 33.4 V–384 V, 240 W operation, respectively. PSIM software was utilized for the simulation. The operation conditions in Figures 9(a) and 9(b) corresponded to the conditions which achieved the maximum power points MPP2, MPP1 under the irradiations of 60% and 100%, respectively, in Figure 8. In Figure 9(a), the transistors Qk (k=1,2,3) were operated at the duty ratio of 0.75 to boost the input voltage VIN of 32.0 V to the output voltage of the cell converter Vok of 128 V. The output voltage Vout of 384 V was obtained because three cell converters were connected in IPOS. In Figure 9(b), the duty ratio for transistors was 0.74.Figure 9
Simulation result for nonisolated multicellular dc-dc converter. (a) 32.0 V–384 V 140 W operation and (b) 33.4 V–384 V 240 W operation.
(a)
(b)The interleaved control was applied to the proposed multicellular converter to prevent the short circuit among cell converters. The off-states of the drain to source voltagesVQ1, VQ2, VQ3 for transistors Q1, Q2, Q3 appeared alternately, and this meant that the electric power was provided from one cell converter to the load at an arbitrary time.The interleaved control enables shrinking the input inductor. The input inductorsLik were designed to achieve CCM at the input voltage of 40 V and the inductor currents ILik have large ripple for the average current as shown in Figure 9. These ripples caused by the inductor currents ILik were bundled and canceled at the input side and the reduced ripple was confirmed in the input current IIN.The applied voltages to the bidirectional switchesQXak, QXbk (k=1,2,3) were also shown in Figure 9. The bidirectional switches were utilized for the isolation barrier. Maximum applied voltage to the switches QXak, QXbk corresponded to the output voltage Vout, and the applied voltages varied for the switching conditions of transistors Qk.The applied voltages to the transistors and the bidirectional switches have overshoots. The voltage overshoots depend on the intrinsic and parasitic parameters caused by the circuit dimensions and the device structures. In this simulation, the 110 pF for GaN-FETs, 145 pF for GaN-HEMTs and 22.5 nH for the circuit parasitic inductances were considered in each cell converter.


### 4.2. First Laboratory Prototype of Nonisolated Multicellular Converter Using Two Cell Converters

The feasibility of the nonisolated multicellular dc-dc converter is verified in this section. Figure10 shows the circuit configuration of the nonisolated multicellular converter for the experiment. This multicellular converter consists of two cell converters and these cell converters are connected in IPOS. The detailed circuit parameters are shown in Table 2. The nominal input voltage VIN was 12 V and the input voltages of cell converters Vi1, Vi2 corresponded to the input voltage VIN. The voltage transformation ratio of cell converters Gk (k=1,2) was 2.22 because the duty ratio of the main switches Q1, Q2 was 0.55. The voltage gain G of the multicellular boost converter was 4.44 because the output terminals of two cell converters were connected in series.Table 2
Parameters for experiment.
Multicellular converter
Nominal input voltageVIN
12 V
Nominal output voltageVOUT
53 V
Resistive loadROUT
20 Ω
Connection topology
Input Parallel Output Series
Number of cellsN
2 (k=1,2)
Voltage gainG
4.44
Single cell converter
Input voltageVik
12 V
Output voltageVok
26.6 V
Duty ratioD
0.55
Voltage gainGk
2.22
Switching frequencyfSW
100 kHz
Main transistorQk
100 V, 2.8 mΩ(IRF7769 from IR)
Input inductorLik
10μH
Output capacitorCok
44μFFigure 10
Circuit configuration of nonisolated multicellular boost converter for experiment.In the experiment, Si-MOSFETs (100 V, 2.8 mΩ from IR) were employed for the main switchesQ1, Q2. The body diodes of the Si-MOSFETs and the Si-SBD (Shottoky Barrier Diode) substituted for the bidirectional switches QXak, QXbk (k=1,2) shown in Figure 7 because the applied voltages to the switches QXak, QXbk were unidirectional in the case of the number of the cell converters N was 2.Figures11 and 12 show the experimental apparatus and the experimental result, respectively. The legends for the voltage waveforms VIN, Vo1, Vo2, VOUT and the current waveforms IIN, ILi1, ILi2, IOUT shown in Figure 12 corresponded to the legend in Figure 10. The voltages VQ1, VQ2 in Figure 12 means the applied voltages to the main switches Q1, Q2.Figure 11
Experimental apparatus of nonisolated multicellular dc-dc converter using two cell converters connected in IPOS.Figure 12
Experimental result for nonisolated multicellular boost converter using two cell converters.In Figure12, the input voltage VIN was 11.1 V and the output voltages of cell converters Vo1, Vo2 were approximately 24.8 V. The voltage transformation ratios of the cell converters G1, G2 were 2.23 (=24.8/11.1) and these ratios were nearly equal to the voltage gain of 2.22 in case the main switches Q1, Q2 were operated at the duty ratio of 0.55. The output voltage of the multicellular converter VOUT resulted in 49.6 V because of the IPOS connection of two cell converters. The voltage transformation ratio G of 4.46 was confirmed under operating at the duty ratio of 0.55.The inductor currentsILi1, ILi2 had the current ripples of ±50% for the average inductor currents of 6.3 A. In the proposed converter, these current ripples were cancelled because the main switches in the cell converters were controlled alternately. The input and the output currents IIN, IOUT were 12.7 A and 2.6 A, respectively, and the current ripples for IIN, IOUT were suppressed. The off-state voltages of VQ1, VQ2 were 24 V and corresponded to the input voltage VIN. This means that the dc voltage between the input side and the output side was successfully blocked by the switches QXak, QXbk (k=1,2).The fundamental circuit behavior of the proposed multicellular converter was confirmed here. The multicellular converter consisted of two cell converters because the unidirectional devices could be utilized in the case ofN=2. The employment of bidirectional switches enables to operate the multicellular converter with large number of cell converters as shown in the above simulation analysis.


## 4.1. Simulation Analysis for 20 V–40 V to 384 V Multicellular dc-dc Converter Using Three Nonisolated Cell Converters

Figure7 shows the circuit configuration of the nonisolated multicellular dc-dc converter for circuit simulation analysis. Two antiseries connected power transistors QXak, QXbk in Figure 7 substituted for the single bidirectional switch shown in Figure 3 because of the research and development phase and no circuit simulation models for the single bidirectional switch.Figure 7
Circuit configuration of non-isolated multicellular dc-dc converter using three cell converters for circuit simulation.Table1 shows the parameters for the simulation. The input voltage of the multicellular converter Vin is from 20 V to 40 V, taking the output perturbation of the PV module into account [4–7]. The output voltage of the multicellular converter Vout is nominally 384 V to connect to the 380 V dc distribution system. The rated output power of the converter Pout is 240 W here. The output voltage of the cell converter Vok is nominally 128 V and the output power of the cell converter Pok is 80 W because of three cell converters. The GaN-FET (50 mΩ, 200 V) was utilized for the main transistor Qk and the GaN-HEMTs (150 m Ω, 650 V) were employed for the bidirectional switches QXak, QXbk in each cell converter. The multilayer ceramic capacitors (MLCCs) were utilized for both the input and the output capacitors Cik, Cok.Table 1
Parameters for circuit simulation of nonisolated multicellular converter.
Multicellular converter
Input voltageVIN
20 V to 40 V
Output voltageVOUT
384 V
Output powerPOUT
240 W
Connection topology
Input Parallel Output Series
Number of cells
3 (k=1,2,3)
Single cell converter
Input voltageVIN
20 V to 40 V
Output voltageVok
128 V
Output powerPok
80 W
TransistorQk
GaN-FET (50 mΩ, 200 V)Coss = 110 pF @ 100 V
Bidirectional switchesQXak, QXbk
Two GaN-HEMTs (150 mΩ, 600 V)Coss = 145 pF @ 100 Vconnected in antiseries
Input capacitorCik
MLCC (52.3μF, 63 V)
Output capacitorCok
MLCC (1.37μF, 200 V)
Input inductorLik
Mn-Zn ferrite (68.8μH)
Switching frequencyfSW
100 kHz
Parasitic inductance
22.5 nHThe capacitancesCik, Cok were designed to suppress the voltage ripple of the input and the output voltages within 3% of their rated voltages, respectively. The input inductance Lik was designed to achieve the zero current switching (ZCS) under the critical current mode (CCM) of the boost chopper cell converter at the input voltage of 40 V and the output power of 80 W. Here, the subscript k for the symbols means the number of the cell converters and k has the integer of 1, 2, 3.The output characteristics of the PV module are given by the published datasheet. Figure8 shows the normalized I-V and P-V characteristics of the commercially available PV module, taking the influence of the solar radiation into account. The operation conditions to achieve the MPPT are extracted from Figure 8. In case the normalized voltage of 1.0 corresponds to 40 V and the normalized current of 1.0 means 8.0 A, the maximum output power of the PV module for the irradiation of 100% becomes 244 W under the condition that the voltage VIN and the current IIN are 33.2 V and 7.36 A, respectively. The maximum output power for the solar radiation of 60% becomes 140 W under the voltage VIN of 32.0 V. Here, the effect of the temperature of the PV module on its I-V characteristics is not considered.Figure 8
I-V and P-V characteristics of PV module.Figures9(a) and 9(b) show the simulation results of 32.0 V–384 V, 140 W operation and 33.4 V–384 V, 240 W operation, respectively. PSIM software was utilized for the simulation. The operation conditions in Figures 9(a) and 9(b) corresponded to the conditions which achieved the maximum power points MPP2, MPP1 under the irradiations of 60% and 100%, respectively, in Figure 8. In Figure 9(a), the transistors Qk (k=1,2,3) were operated at the duty ratio of 0.75 to boost the input voltage VIN of 32.0 V to the output voltage of the cell converter Vok of 128 V. The output voltage Vout of 384 V was obtained because three cell converters were connected in IPOS. In Figure 9(b), the duty ratio for transistors was 0.74.Figure 9
Simulation result for nonisolated multicellular dc-dc converter. (a) 32.0 V–384 V 140 W operation and (b) 33.4 V–384 V 240 W operation.
(a)
(b)The interleaved control was applied to the proposed multicellular converter to prevent the short circuit among cell converters. The off-states of the drain to source voltagesVQ1, VQ2, VQ3 for transistors Q1, Q2, Q3 appeared alternately, and this meant that the electric power was provided from one cell converter to the load at an arbitrary time.The interleaved control enables shrinking the input inductor. The input inductorsLik were designed to achieve CCM at the input voltage of 40 V and the inductor currents ILik have large ripple for the average current as shown in Figure 9. These ripples caused by the inductor currents ILik were bundled and canceled at the input side and the reduced ripple was confirmed in the input current IIN.The applied voltages to the bidirectional switchesQXak, QXbk (k=1,2,3) were also shown in Figure 9. The bidirectional switches were utilized for the isolation barrier. Maximum applied voltage to the switches QXak, QXbk corresponded to the output voltage Vout, and the applied voltages varied for the switching conditions of transistors Qk.The applied voltages to the transistors and the bidirectional switches have overshoots. The voltage overshoots depend on the intrinsic and parasitic parameters caused by the circuit dimensions and the device structures. In this simulation, the 110 pF for GaN-FETs, 145 pF for GaN-HEMTs and 22.5 nH for the circuit parasitic inductances were considered in each cell converter.


## 4.2. First Laboratory Prototype of Nonisolated Multicellular Converter Using Two Cell Converters

The feasibility of the nonisolated multicellular dc-dc converter is verified in this section. Figure10 shows the circuit configuration of the nonisolated multicellular converter for the experiment. This multicellular converter consists of two cell converters and these cell converters are connected in IPOS. The detailed circuit parameters are shown in Table 2. The nominal input voltage VIN was 12 V and the input voltages of cell converters Vi1, Vi2 corresponded to the input voltage VIN. The voltage transformation ratio of cell converters Gk (k=1,2) was 2.22 because the duty ratio of the main switches Q1, Q2 was 0.55. The voltage gain G of the multicellular boost converter was 4.44 because the output terminals of two cell converters were connected in series.Table 2
Parameters for experiment.
Multicellular converter
Nominal input voltageVIN
12 V
Nominal output voltageVOUT
53 V
Resistive loadROUT
20 Ω
Connection topology
Input Parallel Output Series
Number of cellsN
2 (k=1,2)
Voltage gainG
4.44
Single cell converter
Input voltageVik
12 V
Output voltageVok
26.6 V
Duty ratioD
0.55
Voltage gainGk
2.22
Switching frequencyfSW
100 kHz
Main transistorQk
100 V, 2.8 mΩ(IRF7769 from IR)
Input inductorLik
10μH
Output capacitorCok
44μFFigure 10
Circuit configuration of nonisolated multicellular boost converter for experiment.In the experiment, Si-MOSFETs (100 V, 2.8 mΩ from IR) were employed for the main switchesQ1, Q2. The body diodes of the Si-MOSFETs and the Si-SBD (Shottoky Barrier Diode) substituted for the bidirectional switches QXak, QXbk (k=1,2) shown in Figure 7 because the applied voltages to the switches QXak, QXbk were unidirectional in the case of the number of the cell converters N was 2.Figures11 and 12 show the experimental apparatus and the experimental result, respectively. The legends for the voltage waveforms VIN, Vo1, Vo2, VOUT and the current waveforms IIN, ILi1, ILi2, IOUT shown in Figure 12 corresponded to the legend in Figure 10. The voltages VQ1, VQ2 in Figure 12 means the applied voltages to the main switches Q1, Q2.Figure 11
Experimental apparatus of nonisolated multicellular dc-dc converter using two cell converters connected in IPOS.Figure 12
Experimental result for nonisolated multicellular boost converter using two cell converters.In Figure12, the input voltage VIN was 11.1 V and the output voltages of cell converters Vo1, Vo2 were approximately 24.8 V. The voltage transformation ratios of the cell converters G1, G2 were 2.23 (=24.8/11.1) and these ratios were nearly equal to the voltage gain of 2.22 in case the main switches Q1, Q2 were operated at the duty ratio of 0.55. The output voltage of the multicellular converter VOUT resulted in 49.6 V because of the IPOS connection of two cell converters. The voltage transformation ratio G of 4.46 was confirmed under operating at the duty ratio of 0.55.The inductor currentsILi1, ILi2 had the current ripples of ±50% for the average inductor currents of 6.3 A. In the proposed converter, these current ripples were cancelled because the main switches in the cell converters were controlled alternately. The input and the output currents IIN, IOUT were 12.7 A and 2.6 A, respectively, and the current ripples for IIN, IOUT were suppressed. The off-state voltages of VQ1, VQ2 were 24 V and corresponded to the input voltage VIN. This means that the dc voltage between the input side and the output side was successfully blocked by the switches QXak, QXbk (k=1,2).The fundamental circuit behavior of the proposed multicellular converter was confirmed here. The multicellular converter consisted of two cell converters because the unidirectional devices could be utilized in the case ofN=2. The employment of bidirectional switches enables to operate the multicellular converter with large number of cell converters as shown in the above simulation analysis.


## 5. Design Consideration for Nonisolated Multicellular dc-dc Converter

Design consideration for 20 V–40 V to 384 V, 240 W multicellular converter is conducted to show the possibility of the highly efficient PV microconverter. The circuit configuration corresponds to the schematic in Figure7 and the parameters are based on Table 1. The power losses generated from the semiconductor power devices, the input inductors, and the capacitors are calculated to estimate the conversion efficiency, varying the switching frequency from 100 kHz to 1 MHz. Detailed calculation methods for the power losses are shown in the following sections.


### 5.1. Switching Loss Estimation Using Device Total Loss Simulator (DTLS)

The power loss generated from the semiconductor power device consists of the conduction lossPcond and the switching loss Psw. In the proposed circuit, the cell converter is based on the boost chopper circuit topology, and the conduction loss of the transistor Qk is simply calculated by the formula of Pcond=D·ILik2. The conduction losses generated from the bidirectional switches QXak, QXbk are also calculated in the same manner as the transistor Qk.The switching lossPsw generated from Qk is calculated by using the device total loss simulator (DTLS) [23, 24]. The DTLS was developed to estimate the switching loss energy exactly for high-speed and ultralow loss devices such as GaN transistors. Figure 13 shows the equivalent circuit to calculate the switching loss generated from Qk, taking the nonlinear capacitances in power device and the circuit parasitic parameters into account. In Figure 13, the circuit parasitic inductances are Ls1, Ls2, Ls3, and Ls4, and these inductances are generally bundled to the equivalent inductor Lst (=Ls1+Ls2+Ls3+Ls4). The symbols of CsH and CsL mean the circuit parasitic capacitances. The gate resistance and the inductance are Rg and Lsg, respectively, and the common inductance which affects both the gate circuit and the main circuit is Lsc. Not only the device parameters but also the circuit parasitic parameters have to be designed in advance to estimate the exact switching loss.Figure 13
Equivalent circuit for switching loss energy calculation in device total loss simulator [10].In DTLS, the turn-on energyEon and the turn-off energy Eoff generated from Qk are calculated as follows.(17)Eon=∫idt×vdstdt+12CDkVcc2+12LstILik2(18)Eoff=∫idt×vdstdt+12CossVcc2.The drain to source voltagevds and the drain current id of the transistor Qk are basically calculated based on the numerical analysis, taking the nonlinearity of device capacitances into account. As shown in (17) and (18), a part of the switching loss energy is described by the stored energies in the circuit parasitic inductance and the device capacitances. The nonlinear analysis which causes the accumulated error is reduced to estimate the switching loss energies in DTLS.To confirm the availability of DTLS, the switching loss energy of the GaN-HEMT (600 V, 150 mΩ) was measured here. Figure14 shows the measurement setup and the measured turn-off waveforms for the drain current of 2 A to 12 A. The circuit parasitic inductance Lst of the setup was 22.5 nH and the gate resistance Rg of 3.0 Ω was connected externally in the experimental setup.Figure 14
Measurement result of turn-off waveforms for 600 V 150 mΩ GaN-HEMT under 384 V, 2 A to 12 A operation conditions.Both the measured switching loss energies of GaN-HEMT and the calculated energies by DTLS were compared in Figure15. Detailed circuit parameters were shown in Table 3, and these parameters corresponded in the experimental condition in Figure 14. The circles filled in blue were the turn-on energies by the experiment and the circles filled in white were the measurement results of the turn-off energies in Figure 14. The blue solid line means the turn-on energy and the blue dashed line means the turn-off energy calculated by DTLS. The calculation results had good agreement with the experimental results. The validity for the commercially available 200 V class GaN-HFET has been already confirmed [23]; therefore, DTLS is available to estimate the switching loss of datasheet-level high-speed and ultralow loss power transistors exactly.Table 3
Parameters for switching energy calculation.
Circuit parasitic parameters
Total parasitic inductanceLst
22.5 nH
Parasitic capacitancesCsH, CsL
10 pF, 30 pF
Common inductanceLsc
1 nH
Gate inductanceLsg
3 nH
Gate resistanceRg
3 Ω
GaN-HEMTQXak, QXbk for free-wheeling diode Dk
On-resistance
150 mΩ
Output capacitance
110 pF @ 100 V
Breakdown voltage
600 V
GaN-FETQk
On-resistance
50 mΩ
Output capacitance
110 pF @ 100 V
Breakdown voltage
200 VFigure 15
Turn-on and turn-off switching energies of GaN-FET in nonisolated multicellular converter calculated by DTLS.The switching loss energy from the GaN-FET (200 V, 50 mΩ) suitable for the cell converter was calculated and the calculation results were also shown in Figure15. The solid and the dashed lines in green means the loss energies for the GaN-FET. The circuit parasitic parameters were based on Table 3 and the turn-on and the turn-off switching energies below 1 μJ are expected. The switching loss of GaN-FET for cell converter is calculated based on Figure 15, taking the turn-on and the turn-off currents obtained from the circuit simulation.


### 5.2. Input Inductor Design for Cell Converter

The power loss generated from the inductor consists of the copper lossPCu and the core loss Pcore. The copper loss is generally calculated by the formula of PCu=rwfsw·ILik2. Here, rw is the resistance of the inductor winding and the resistance rw depends on the switching frequency fsw of the converter because of the skin effect. Details to estimate the core loss is described below.The input inductance of the cell converterLik is designed to achieve the CCM under the 40 V–128 V, 80 W operation to shrink the inductor here. The inductance value of 68.8 μH at the switching frequency of 100 kHz is obtained by the following equation.(19)VLik=LikΔILikΔtLik=Vin·D2·ILik·fsw=40V·0.6882·2A·100kHz=68.8μH.The relationship between the inductance and the magnetic core shape is approximately formulated as follows.(20)LikH=μ0μrN2Sem2lem(21)Volcorem3≅le·Se.Here, the permeability of vacuum isμ0, and the relative permeability of the magnetic material is μr. The turn number of the inductor winding is N. The magnetic length and the cross section area of the magnetic core are le and Se, respectively. The magnetic core volume Volcore is approximately calculated as (21). The core loss Pcore is generally estimated as follows. (22)PcoreW=fswHz·EcoreJ/m3·Volcorem3.As shown in the above equation, the core loss depends on the dimensions of the magnetic coreVolcore. There are various solutions to realize the designated inductor Lik. To extract the suitable core dimension to realize the compact and low loss inductor, design consideration for the inductor is necessary.Table4 shows the parameters for the input inductor design. The Mn-Zn ferrite with the permeability of 2,300 was assumed for the magnetic core material of the inductor [25]. This is based on the commercially available magnetic material. The maximum magnetic flux density Bm, residual magnetization Br, and the coercivity Hc in Table 4 are extracted from the published datasheet. Figure 16 shows the core loss energy Ecore of the magnetic core material.Table 4
Parameters for inductor design installed into cell converter.
Magnetic material
Material
Mn-Zn ferrite
Permeabilityμr
2,300
Max. flux densityBm
0.5 T
Residual magnetizationBr
0.12 T
CoercivityHc
14.3 A/m
Circuit specifications
Switching frequencyfsw
100 kHz to 1 MHz
InductanceLik
68.8μH to 6.88 μH
Magnetic core dimensions
Core shape
PQ core
WidthX
10 mm to 35 mm
DepthY
6.7 mm to 23.4 mm
HeightZ
8.6 mm to 30.2 mm
Gap lengthlg
0 mm to 25 mmFigure 16
Core loss energy of magnetic core material [11].The PQ core was also assumed for the dimensions of the magnetic core. The core width was varied from 10 mm to 35 mm to design the inductors which were operated at 100 kHz to 1 MHz. The core depthY and the core height Z are proportion to the core width X, keeping the dimensions of existing PQ core shape. The magnetic length le and the cross section area of the core Se are found by the dimensions X, Y, Z.Figure17 shows the calculation result of the efficiency and the power density of the inductor for 80 W cell converter. The power loss from the inductor and the inductor volume were translated to the efficiency and the power density to normalize the performance of the inductor. The copper loss PCu and the core loss Pcore were considered to calculate the inductor loss, and the envelope volume determined by the core dimensions X, Y, Z was also taken into account for the inductor volume. The heat sink volume is not considered here.Figure 17
Calculated efficiency and power density of inductor.As the gap lengthlg becomes shorter, the inductor loss decreases. The material characteristics for the saturation determine the minimum gap length. As the core width X becomes shorter, the core volume shrinks. The turn number of the inductor winding N increases, and the efficiency decreases because of the copper loss. Based on the aforementioned trend, the inductor has the operation condition to maximize its power density for each switching frequency. The symbol of OPT in Figure 17 means the conditions to achieve the highest power density for each frequency. The efficiency of the inductor at OPT is improved in case the switching frequency increases from 100 kHz to 700 kHz. The smaller inductance and the smaller core volume contribute to achieving higher efficiency. The core loss over 700 kHz operation affects the inductor loss significantly and the efficiency at OPT decreases. In this study, the operating condition to achieve the highest power density for each switching frequency is applied to the converter design.


### 5.3. Input and Output Capacitor Design for Cell Converter

The capacitance values for the input and the output capacitorsCik, Cok are designed to suppress the voltage ripples within 3% of the rated input and output voltages Vin, Vok. The capacitances of 56.3 μF and 1.37 μF under 100 kHz operation are calculated as follows.(23)Cik=ILik·DΔVik·fsw=4A·0.8440.03·20V·100kHz=56.3μFCok=Iout·DΔVok·fsw=0.625A·0.8440.03·128V·100kHz=1.37μF.The multilayer ceramic capacitors (MLCC) are assumed to develop the input and the output capacitors to reduce the loss caused by the equivalent series resistance (ESR).Figure18 shows the relationship between the ESR and the capacitance value of the MLCC for the various rated voltages. The ESRs of the capacitors were obtained from the design tool provided by the manufacturer [26]. The ESRs were plotted for the capacitances of 0.1 μF to 100 μF whose rated voltages were 6.3 V to 1 kV. As the capacitance increases, the ESR decreases because the capacitor volume is generally proportional to the capacitance and the electrode area depends on the capacitance. The influence of the rated voltage of the capacitor on its ESR is not clear from Figure 18, and the capacitor loss caused by the ESR is calculated by using the fitted curve in this figure.Figure 18
Equivalent series resistance of multilayer ceramic capacitor [12].


### 5.4. Efficiency Calculation for Cell Converter

Figure19 shows the conversion efficiency of 32.0 V–128 V, 47 W cell converter in the case of the irradiation of 60% and the efficiency of 33.2 V–128 V, 80 W cell converter for the irradiation of 100%, taking the operation condition to achieve MPPT in Section 4. The conduction loss Pcond and the switching loss Psw were considered for the transistor Qk. The symbol of Psr means the conduction loss generated from the bidirectional switch QXak, QXbk. The copper loss PCu and the core loss Pcore were also considered for the inductor Lik. The losses generated by ESR in the input and the output capacitors were PCi, PCo.Figure 19
Calculated power loss and efficiency for cell converter. (a) 32.0 V–128 V, 47 W operation with 60% irradiation and (b) 33.2 V–128 V, 80 W operation with 100% radiation.From Figure19, the maximum efficiency over 98.0% was expected for the 32.0 V–128 V converter under the 60% irradiation in case the switching frequency was smaller than 200 kHz. The switching loss from the power devices was dominant over 300 kHz. The maximum efficiency of 97.8% was also observed around 200 kHz for the 33.2 V–128 V cell converter with 100% irradiation.The performance of the cell converter ideally corresponds to the performance of the multicellular converter [22]. Based on the multicellular converter topology, the maximum efficiency of 98% is expected to the nonisolated multicellular dc-dc converter. Now, the efficiencies of 93% to 97.5% have been reported for the microconverter [4–8]. This means that the proposed converter topology has the potential to achieve higher efficiency and has the possibility to contribute to realizing low carbon society.Figure20 shows the illustration of the PV microconverter based on the proposed multicellular dc-dc converter. The electric components designed in the previous sections were arranged in the chassis for the microconverter. In Figure 20, the converter volume was small enough to house it into the chassis, taking the noise filter and microcontroller into account. The details of the thermal design, the noise analysis, and the experimental verification will be operated in near future.Figure 20
Illustration for PV microconverter based on multicellular converter topology.


## 5.1. Switching Loss Estimation Using Device Total Loss Simulator (DTLS)

The power loss generated from the semiconductor power device consists of the conduction lossPcond and the switching loss Psw. In the proposed circuit, the cell converter is based on the boost chopper circuit topology, and the conduction loss of the transistor Qk is simply calculated by the formula of Pcond=D·ILik2. The conduction losses generated from the bidirectional switches QXak, QXbk are also calculated in the same manner as the transistor Qk.The switching lossPsw generated from Qk is calculated by using the device total loss simulator (DTLS) [23, 24]. The DTLS was developed to estimate the switching loss energy exactly for high-speed and ultralow loss devices such as GaN transistors. Figure 13 shows the equivalent circuit to calculate the switching loss generated from Qk, taking the nonlinear capacitances in power device and the circuit parasitic parameters into account. In Figure 13, the circuit parasitic inductances are Ls1, Ls2, Ls3, and Ls4, and these inductances are generally bundled to the equivalent inductor Lst (=Ls1+Ls2+Ls3+Ls4). The symbols of CsH and CsL mean the circuit parasitic capacitances. The gate resistance and the inductance are Rg and Lsg, respectively, and the common inductance which affects both the gate circuit and the main circuit is Lsc. Not only the device parameters but also the circuit parasitic parameters have to be designed in advance to estimate the exact switching loss.Figure 13
Equivalent circuit for switching loss energy calculation in device total loss simulator [10].In DTLS, the turn-on energyEon and the turn-off energy Eoff generated from Qk are calculated as follows.(17)Eon=∫idt×vdstdt+12CDkVcc2+12LstILik2(18)Eoff=∫idt×vdstdt+12CossVcc2.The drain to source voltagevds and the drain current id of the transistor Qk are basically calculated based on the numerical analysis, taking the nonlinearity of device capacitances into account. As shown in (17) and (18), a part of the switching loss energy is described by the stored energies in the circuit parasitic inductance and the device capacitances. The nonlinear analysis which causes the accumulated error is reduced to estimate the switching loss energies in DTLS.To confirm the availability of DTLS, the switching loss energy of the GaN-HEMT (600 V, 150 mΩ) was measured here. Figure14 shows the measurement setup and the measured turn-off waveforms for the drain current of 2 A to 12 A. The circuit parasitic inductance Lst of the setup was 22.5 nH and the gate resistance Rg of 3.0 Ω was connected externally in the experimental setup.Figure 14
Measurement result of turn-off waveforms for 600 V 150 mΩ GaN-HEMT under 384 V, 2 A to 12 A operation conditions.Both the measured switching loss energies of GaN-HEMT and the calculated energies by DTLS were compared in Figure15. Detailed circuit parameters were shown in Table 3, and these parameters corresponded in the experimental condition in Figure 14. The circles filled in blue were the turn-on energies by the experiment and the circles filled in white were the measurement results of the turn-off energies in Figure 14. The blue solid line means the turn-on energy and the blue dashed line means the turn-off energy calculated by DTLS. The calculation results had good agreement with the experimental results. The validity for the commercially available 200 V class GaN-HFET has been already confirmed [23]; therefore, DTLS is available to estimate the switching loss of datasheet-level high-speed and ultralow loss power transistors exactly.Table 3
Parameters for switching energy calculation.
Circuit parasitic parameters
Total parasitic inductanceLst
22.5 nH
Parasitic capacitancesCsH, CsL
10 pF, 30 pF
Common inductanceLsc
1 nH
Gate inductanceLsg
3 nH
Gate resistanceRg
3 Ω
GaN-HEMTQXak, QXbk for free-wheeling diode Dk
On-resistance
150 mΩ
Output capacitance
110 pF @ 100 V
Breakdown voltage
600 V
GaN-FETQk
On-resistance
50 mΩ
Output capacitance
110 pF @ 100 V
Breakdown voltage
200 VFigure 15
Turn-on and turn-off switching energies of GaN-FET in nonisolated multicellular converter calculated by DTLS.The switching loss energy from the GaN-FET (200 V, 50 mΩ) suitable for the cell converter was calculated and the calculation results were also shown in Figure15. The solid and the dashed lines in green means the loss energies for the GaN-FET. The circuit parasitic parameters were based on Table 3 and the turn-on and the turn-off switching energies below 1 μJ are expected. The switching loss of GaN-FET for cell converter is calculated based on Figure 15, taking the turn-on and the turn-off currents obtained from the circuit simulation.


## 5.2. Input Inductor Design for Cell Converter

The power loss generated from the inductor consists of the copper lossPCu and the core loss Pcore. The copper loss is generally calculated by the formula of PCu=rwfsw·ILik2. Here, rw is the resistance of the inductor winding and the resistance rw depends on the switching frequency fsw of the converter because of the skin effect. Details to estimate the core loss is described below.The input inductance of the cell converterLik is designed to achieve the CCM under the 40 V–128 V, 80 W operation to shrink the inductor here. The inductance value of 68.8 μH at the switching frequency of 100 kHz is obtained by the following equation.(19)VLik=LikΔILikΔtLik=Vin·D2·ILik·fsw=40V·0.6882·2A·100kHz=68.8μH.The relationship between the inductance and the magnetic core shape is approximately formulated as follows.(20)LikH=μ0μrN2Sem2lem(21)Volcorem3≅le·Se.Here, the permeability of vacuum isμ0, and the relative permeability of the magnetic material is μr. The turn number of the inductor winding is N. The magnetic length and the cross section area of the magnetic core are le and Se, respectively. The magnetic core volume Volcore is approximately calculated as (21). The core loss Pcore is generally estimated as follows. (22)PcoreW=fswHz·EcoreJ/m3·Volcorem3.As shown in the above equation, the core loss depends on the dimensions of the magnetic coreVolcore. There are various solutions to realize the designated inductor Lik. To extract the suitable core dimension to realize the compact and low loss inductor, design consideration for the inductor is necessary.Table4 shows the parameters for the input inductor design. The Mn-Zn ferrite with the permeability of 2,300 was assumed for the magnetic core material of the inductor [25]. This is based on the commercially available magnetic material. The maximum magnetic flux density Bm, residual magnetization Br, and the coercivity Hc in Table 4 are extracted from the published datasheet. Figure 16 shows the core loss energy Ecore of the magnetic core material.Table 4
Parameters for inductor design installed into cell converter.
Magnetic material
Material
Mn-Zn ferrite
Permeabilityμr
2,300
Max. flux densityBm
0.5 T
Residual magnetizationBr
0.12 T
CoercivityHc
14.3 A/m
Circuit specifications
Switching frequencyfsw
100 kHz to 1 MHz
InductanceLik
68.8μH to 6.88 μH
Magnetic core dimensions
Core shape
PQ core
WidthX
10 mm to 35 mm
DepthY
6.7 mm to 23.4 mm
HeightZ
8.6 mm to 30.2 mm
Gap lengthlg
0 mm to 25 mmFigure 16
Core loss energy of magnetic core material [11].The PQ core was also assumed for the dimensions of the magnetic core. The core width was varied from 10 mm to 35 mm to design the inductors which were operated at 100 kHz to 1 MHz. The core depthY and the core height Z are proportion to the core width X, keeping the dimensions of existing PQ core shape. The magnetic length le and the cross section area of the core Se are found by the dimensions X, Y, Z.Figure17 shows the calculation result of the efficiency and the power density of the inductor for 80 W cell converter. The power loss from the inductor and the inductor volume were translated to the efficiency and the power density to normalize the performance of the inductor. The copper loss PCu and the core loss Pcore were considered to calculate the inductor loss, and the envelope volume determined by the core dimensions X, Y, Z was also taken into account for the inductor volume. The heat sink volume is not considered here.Figure 17
Calculated efficiency and power density of inductor.As the gap lengthlg becomes shorter, the inductor loss decreases. The material characteristics for the saturation determine the minimum gap length. As the core width X becomes shorter, the core volume shrinks. The turn number of the inductor winding N increases, and the efficiency decreases because of the copper loss. Based on the aforementioned trend, the inductor has the operation condition to maximize its power density for each switching frequency. The symbol of OPT in Figure 17 means the conditions to achieve the highest power density for each frequency. The efficiency of the inductor at OPT is improved in case the switching frequency increases from 100 kHz to 700 kHz. The smaller inductance and the smaller core volume contribute to achieving higher efficiency. The core loss over 700 kHz operation affects the inductor loss significantly and the efficiency at OPT decreases. In this study, the operating condition to achieve the highest power density for each switching frequency is applied to the converter design.


## 5.3. Input and Output Capacitor Design for Cell Converter

The capacitance values for the input and the output capacitorsCik, Cok are designed to suppress the voltage ripples within 3% of the rated input and output voltages Vin, Vok. The capacitances of 56.3 μF and 1.37 μF under 100 kHz operation are calculated as follows.(23)Cik=ILik·DΔVik·fsw=4A·0.8440.03·20V·100kHz=56.3μFCok=Iout·DΔVok·fsw=0.625A·0.8440.03·128V·100kHz=1.37μF.The multilayer ceramic capacitors (MLCC) are assumed to develop the input and the output capacitors to reduce the loss caused by the equivalent series resistance (ESR).Figure18 shows the relationship between the ESR and the capacitance value of the MLCC for the various rated voltages. The ESRs of the capacitors were obtained from the design tool provided by the manufacturer [26]. The ESRs were plotted for the capacitances of 0.1 μF to 100 μF whose rated voltages were 6.3 V to 1 kV. As the capacitance increases, the ESR decreases because the capacitor volume is generally proportional to the capacitance and the electrode area depends on the capacitance. The influence of the rated voltage of the capacitor on its ESR is not clear from Figure 18, and the capacitor loss caused by the ESR is calculated by using the fitted curve in this figure.Figure 18
Equivalent series resistance of multilayer ceramic capacitor [12].


## 5.4. Efficiency Calculation for Cell Converter

Figure19 shows the conversion efficiency of 32.0 V–128 V, 47 W cell converter in the case of the irradiation of 60% and the efficiency of 33.2 V–128 V, 80 W cell converter for the irradiation of 100%, taking the operation condition to achieve MPPT in Section 4. The conduction loss Pcond and the switching loss Psw were considered for the transistor Qk. The symbol of Psr means the conduction loss generated from the bidirectional switch QXak, QXbk. The copper loss PCu and the core loss Pcore were also considered for the inductor Lik. The losses generated by ESR in the input and the output capacitors were PCi, PCo.Figure 19
Calculated power loss and efficiency for cell converter. (a) 32.0 V–128 V, 47 W operation with 60% irradiation and (b) 33.2 V–128 V, 80 W operation with 100% radiation.From Figure19, the maximum efficiency over 98.0% was expected for the 32.0 V–128 V converter under the 60% irradiation in case the switching frequency was smaller than 200 kHz. The switching loss from the power devices was dominant over 300 kHz. The maximum efficiency of 97.8% was also observed around 200 kHz for the 33.2 V–128 V cell converter with 100% irradiation.The performance of the cell converter ideally corresponds to the performance of the multicellular converter [22]. Based on the multicellular converter topology, the maximum efficiency of 98% is expected to the nonisolated multicellular dc-dc converter. Now, the efficiencies of 93% to 97.5% have been reported for the microconverter [4–8]. This means that the proposed converter topology has the potential to achieve higher efficiency and has the possibility to contribute to realizing low carbon society.Figure20 shows the illustration of the PV microconverter based on the proposed multicellular dc-dc converter. The electric components designed in the previous sections were arranged in the chassis for the microconverter. In Figure 20, the converter volume was small enough to house it into the chassis, taking the noise filter and microcontroller into account. The details of the thermal design, the noise analysis, and the experimental verification will be operated in near future.Figure 20
Illustration for PV microconverter based on multicellular converter topology.


## 6. Conclusions

High step-up nonisolated multicellular dc-dc converter was proposed to realize the highly efficient PV microconverter. The circuit configuration and the control scheme were introduced and the fundamental behavior of the proposed converter was also confirmed by the circuit simulation. Laboratory prototype using two cell converters was fabricated and the feasibility of the proposed multicellular converter was also confirmed. Design consideration for the 20 V–40 V to 384 V, 240 W multicellular converter was carried out and the potential to achieve the efficiency of 98% was observed.Feasibility of the proposed converter topology using three cell converters with the bidirectional switches will be verified in near future. The detailed thermal design and the noise analysis will be also operated.The proposed topology contributes to realizing the low carbon society through the smooth introduction of PV modules to dc distribution network.



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*Source: 5098083-2018-03-01.xml*