# Model Predictive Controlled Four-Bus System Employing Hybrid Power Flow Controller

Authors: A. John Rose; G. Anandha Kumar; A. Ragavendiran; A. Kalaimurugan
Journal: Journal of Sensors
 (2023)

---

## Abstract

A fuzzy logic- (FL-) based control technique for unified power flow controller (UPFC) to resolve the power quality issues in transmission network is presented in this paper. MATLAB/Simulink is used to design the FL-based controllers for shunt and series converters of UPFC, which is validated on 4-bus system. In addition, the performance of the suggested FL-based UPFC is compared with PI (proportional integral), HC (hysteresis controller), MPC (model predictive controller), and FLC (fuzzy logic controller), and the outcomes are compared in terms of settling time and steady-state error. The consequences characterize that the higher enactment of closed loop hybrid power flow controller (HPFC) 4-bus system with FLC UPFC controller’s (FL based) robustness is ensured from the simulation results as it has overcome the power quality issues like reactive power compensation, voltage sag mitigation, and THD reduction of transmission line current below 5% as per IEEE standard. Settling time of CL FBS is abridged from 0.87 to 0.62 sec, and steady-state error of voltage in CL FBS is abridged from 0.9 to 0.1 V using FLC.


---

## Body

## 1. Introduction

An itemized dynamic model of the HPFC was created by Claudio and Cañizares [1] and executed in PSCAD, portraying and proposing control methodologies to appropriately work this regulator in dissemination framework applications, for example, a compelling and straightforward strategy for firing up the gadget. Consistent state models of the HPFC for power stream and ideal power stream were introduced by Tamimi et al. [2], considering the numerous control methods of the gadget. A procedure for control mode exchanging and limit dealing within power stream figuring was proposed. A HPFC was proposed by Shotorbani et al. [3], which included 2 shunt secluded multilevel converter-based voltage source converters and 1 series capacitor. A nonlinear multiloop regulator was planned by means of control Lyapunov capacity to accomplish optimizing execution and vigor against framework vulnerabilities and unsettling influences.Chen et al. [4] proposed an improved IHU-PFC which is created to control the force stream and increment the usage pace of the current transmission lines. The IHU-PFC was made out of an improved “SEN” transformer (IST) and a little limit UPFC. After an itemized presentation of the construction and voltage guideline execution of the IST, this inferred the limit connection between the IST and the UPFC. Bhasin et al. [5] covered the surveys of HPFC for building up the achievement of force framework. Here, we utilized one geography of HPFC which results in 2VSCs in shunt and series uninvolved segment between the tie lines. The models were actualized on MATLAB/Simulink. A HPFC setup for FACTS was assessed by Sood and Sivadas [6]. It comprised of a responsive power compensator and 2 voltage source converters (VSCs). Here, the VSCs can trade power through a typical DC circuit. The framework was reproduced utilizing Electromagnetic Transient Program-Restructured Version (EMTP-RV). Ideal situation of UPFC and HPFC utilizing advancement method was proposed by Bhandakkar and Mathew [7]. The HPFC design included 2VSC associated in shunt through coupling transformers, on one or the other side of TCSC which was associated in arrangement with the transmission line, and the 2VSC offer a typical DC capacitor connection. In this, ideal arrangement of UPFC and HPFC was obtained utilizing GA-based methodology. A power stream model of UPFC and HPFC was created utilizing limitation conditions and target capacities.Chaudhary et al. [8] introduced improvement power nature of half-breed power framework reconciliation with PV, wind, and battery framework by FACTS gadget. In transmission and conveyance framework, power quality was a significant limitation. Reality gadgets have numerous benefits in transmission like adaptability and high velocity. The advantage of this framework was that the assorted sources can be associated with at one intersection of electrical cable; on account of this, these strategies are finding out to be a viable and bendable technique for the improvement of the framework. Zeng et al. [9] assembled a hybrid AC/DC microgrid containing the DC dispersion lattice. The relating segments of the actual model and control system were proposed. In the trial, this exertion zeroed in on the examination of miniature segments under various working conditions. The outcomes demonstrated that the proposed cross breed AC/DC microgrid structure was sensible, and the control methodology and execution of the parts was acceptable.Rouzbehi et al. [10] built up a HPFC to step forward for building FDCTS. The thought for proposing HPFC was motivated by the fruitful activity of FACTS gadgets; the FDCTS included static force hardware-based components to give voltage guideline, power control, and burden stream control in the multiterminal DC (MTDC) networks. Displaying and simulation of mixture power stream regulator actualized on multimachine framework was proposed by Mathew and Chatterji [11]. Novel and practical converter-based FACTS geographies had been proposed which utilize apparently existing uninvolved segments likewise and, in this way, viewed as half breed in nature. The distinctive HPFC designs formulated by the specialist have been executed on a multimachine framework and recreated utilizing MATLAB. Optimal power flow controller for a hybrid renewable energy system using particle swarm improvement was proposed by Suchetha and Ramprabhakar [12]. The principle objective was to direct the progression of genuine and receptive capacity to the heap and to use greatest accessible force from HRES. Two control circles, current and force control, were planned utilizing traditional PI controllers. Because of the irregular idea of sustainable power sources, a keen calculation was needed to direct the constants of PI regulators. The boundaries of PI controllers were ideally tuned utilizing particle swarm enhancement calculation.Displaying and simulation of mixture power stream regulator executed on SMIB framework was introduced by Mathew and Chatterji [13]. The diverse HPFC setups contrived by the specialist had been actualized on a SMIB framework and reenacted utilizing MATLAB/Simulink.Seshapalli [14] introduced an examination of HPFC utilizing static burden displaying on the transmission framework. Burden stream was brought out on each chosen strategy for the base case load and prepossibility conditions. The definition of a question was set to be poorly adapted whenever assessed values were truly defenseless to minute changes in info conditions.In this, a novel construction for crossover power stream regulator (HPFC) had been proposed by Tiwari et al. [15] and actualized on a test framework having static simultaneous compensator (STATCOM) introduced as a preceding framework. Case savvy considers had been performed on the test framework to analyze the presentation of arrangement and shunt regulators alongside the half breed of the two kinds while keeping up satisfactory voltage profile at whatever point a heap change happens in the framework [16–22].The exceeding literature does not deal with the enhancement of dynamic response of CLFBS with PI (proportional integral), HC (hysteresis controller), MPC (model predictive controller), and FLC (fuzzy logic controller). Hence, the present work deals with the comparison of dynamic responses of closed loop HPFC 4-bus system with PI (proportional integral), HC (hysteresis controller), MPC (model predictive controller), and FLC (fuzzy logic controller). The key factors for microgrid systems are voltage stability and enhanced dynamic response. Therefore, in this topic, the present work is exposed with FL control to improve the dynamic response of CL MGS and is organized in five sections. Section2 presents the description of proposed MHGSC system. In Section 3, topology of FB MGS is given. The simulation results of FB MGS are given and presented in Section 4. Conclusion is discussed in the last section.


## 2. System Description

Single line diagram of the 4-bus MGS with HPFC is shown in Figure1. The HPFC is located between buses 3 and 4. Block diagram of closed loop HPFC 4-bus system with PI and hysteresis controller appears in Figure 2. Load voltage is measured and it is associated with the reference voltage. The voltage error is implied to the voltage PI controller. The reference current is matched with the actual current, and the current error is used to update the pulse width of HPFC.Figure 1
Single line diagram of the 4-bus MGS with HPFC.Figure 2
Block diagram of closed loop HPFC 4-bus system with PI and hysteresis controller.Voltage of load bus is sensed and is evaluated with the reference voltage. The voltage error is applied to PI/SMC. The productivity of controller adjusts the pulse width applied to HPFC. Block diagram of closed loop HPFC FB system with MPC and HC is revealed in Figures3 and 4. Block diagram of closed loop HPFC with HC and fuzzy logic controller is outlined in Figure 4.Figure 3
Hysteresis controller.Figure 4
Block diagram of proposed system HC and FLC.Load voltage is unrushed and it is allied with the reference voltage. The voltage error is implied to the voltage hysteresis controller. The reference current is matched with the actual current, and the current error is used to update the pulse width of HPFC.


## 3. Control Techniques

### 3.1. Model Predictive Control Scheme

The duty cycle is derived by deliberating the modes of operation of the converter at thekth and k+1th switching instants. During mode I, the inductor current is prompted as
(1)Vin=LidiLidttk≤t≤tk+DkTs.The inductor current during mode II is prompted as(2)Vin−Vct=LidiLidttk+DkTs≤t≤tk.On discretizing, the following equations are attained:(3)LiiLik+DkTsDkTs=Vink,(4)LiiLik+1−iLik+DkTs1−DkTs=Vink−Vctk.Here,Vink and Vctk are the examined information and move the capacitor voltages at the kth exchanging moment, and iLik and iLik+1 are the tested inductor flows toward the start of kth and k+1th exchanging moments separately. To accomplish PFC, the information inductor current iLik ought to follow the reference current irefk, which is relative to the amended information voltage.
(5)iLik+1=irefk+1,(6)iLik=irefk.From Equations (5) and (6), the inductor currents at the instants k+DkTs and k+1 are derived as
(7)iLik+DkTs=VinkDkTsLi+iLik,(8)iLik+1=Vink−Vctk1−DkTsLi+iLik.Substituting Equation (7) in Equation (8), the inductor current Li, i at the beginning of the k+1th switching instant is given as
(9)iLik+1=VinkTs−VctkTs1−DkTsLi+iLik.The above condition demonstrates that the inductor current on the start of the next exchanging cycle can be controlled by the inductor current, input voltage, moving capacitor voltage, and the obligation pattern of the current exchanging cycle. Revamping Equation (9), the obligation cycle for the current exchanging cycle, Dk is communicated to RMS of the exchange capacitor voltage, input voltage, and reference current at the kth and k+1th exchanging moments individually. To accomplish the PFC, the obligation cycle Dk is determined dependent on the prescient calculation and is given beneath:
(10)Dk=LiTsirefk+1−irefkVctk+Vctk−VinkVctk.The duty cycleDk is prompted as
(11)Dk=LiTsksinωk+1−irefkVctk+Vctk−VinkVctk.Here,irefk+1is replaced by the termKsink1in Equation (10) andKis the PI which is the controller’s output.


## 3.1. Model Predictive Control Scheme

The duty cycle is derived by deliberating the modes of operation of the converter at thekth and k+1th switching instants. During mode I, the inductor current is prompted as
(1)Vin=LidiLidttk≤t≤tk+DkTs.The inductor current during mode II is prompted as(2)Vin−Vct=LidiLidttk+DkTs≤t≤tk.On discretizing, the following equations are attained:(3)LiiLik+DkTsDkTs=Vink,(4)LiiLik+1−iLik+DkTs1−DkTs=Vink−Vctk.Here,Vink and Vctk are the examined information and move the capacitor voltages at the kth exchanging moment, and iLik and iLik+1 are the tested inductor flows toward the start of kth and k+1th exchanging moments separately. To accomplish PFC, the information inductor current iLik ought to follow the reference current irefk, which is relative to the amended information voltage.
(5)iLik+1=irefk+1,(6)iLik=irefk.From Equations (5) and (6), the inductor currents at the instants k+DkTs and k+1 are derived as
(7)iLik+DkTs=VinkDkTsLi+iLik,(8)iLik+1=Vink−Vctk1−DkTsLi+iLik.Substituting Equation (7) in Equation (8), the inductor current Li, i at the beginning of the k+1th switching instant is given as
(9)iLik+1=VinkTs−VctkTs1−DkTsLi+iLik.The above condition demonstrates that the inductor current on the start of the next exchanging cycle can be controlled by the inductor current, input voltage, moving capacitor voltage, and the obligation pattern of the current exchanging cycle. Revamping Equation (9), the obligation cycle for the current exchanging cycle, Dk is communicated to RMS of the exchange capacitor voltage, input voltage, and reference current at the kth and k+1th exchanging moments individually. To accomplish the PFC, the obligation cycle Dk is determined dependent on the prescient calculation and is given beneath:
(10)Dk=LiTsirefk+1−irefkVctk+Vctk−VinkVctk.The duty cycleDk is prompted as
(11)Dk=LiTsksinωk+1−irefkVctk+Vctk−VinkVctk.Here,irefk+1is replaced by the termKsink1in Equation (10) andKis the PI which is the controller’s output.


## 4. Simulation Results

### 4.1. Open Loop Four-Bus HPFC System with Load Disturbance

The detailed MATLAB simulation of modeling and control scheme of the controller is discussed in this section, considering that the dynamic control of the HPFC is realized in the current space. Circuit diagram of open loop HPFC 4-bus system with load disturbance appears in Figure5. The bus information and line information are given in Tables 1 and 2 separately. Voltage at bus 3 is shown in Figure 6 and its value is 0.7∗104 volts. RMS voltage at bus 3 is shown in Figure 7(a) and its value is 5750 volts. The fall in voltage is due to addition of load at bus 3 of FB MGS. Real power at bus 3 appears in Figure 8 and its value is 3.5∗105 var.Figure 5
Circuit diagram of open loop FBS with load disturbance.Table 1
Line data for FBS.
Line impedance
Resistance
Inductance
Buses 1-2
0.05 Ω
0.23 mH
Buses 2-3
0.15 Ω
0.28 mH
Buses 3-4
0.20 Ω
0.45 mH
Buses 1-4
0.13Ω
0.34 mHTable 2
Bus data for FBS.
Voltage
Load impedance
Resistance
Inductance
Bus 1
6.96 kV
Bus 2
6.96 kV
Bus 3
80 Ω
75 mH
Bus 4
100 Ω
80 mHFigure 6
Voltage at bus 3with load disturbance.Figure 7
RMS voltage at bus 3: (a) open loop; (b) with HPFC, CL, and PI; (c) with HPFC, CL, and PIC; (d) with HPFC, CL, and HC.
(a)
(b)
(c)
(d)Figure 8
Real power at bus 3: (a) with load disturbance; (b) with HPFC, CL, and PIC.
(a)
(b)Reactive power at bus 3 is delineated in Figure9 and its value is 10∗104 watts.Figure 9
Reactive power at bus 3 with load disturbance: (a) open loop; (b) with HPFC, CL, and PIC.
(a)
(b)


### 4.2. Closed Loop Four-Bus HPFC System with PI Controller

Circuit diagram of closed loop HPFC 4-bus system with PI controller is shown in Figure10(a).Figure 10
Circuit diagram of closed loop system: (a) HPFC 4-bus system with PI controller; (b) HPFC 4-bus system with HC controller.
(a)
(b)RMS voltage at bus 3 with HPFC, CL, and PIC appears in Figure11 and its value is 5800 volts. The voltage comes back to normal value at t=1sec.Figure 11
RMS voltage at bus 3: (a) with HPFC, CL, and PIC; (b) with HPFC, CL, and HC.
(a)
(b)Real power at bus 3 with HPFC, CL, and PIC appears in Figure12 and its value is 3.5∗105 watts.Figure 12
Circuit diagram of closed loop system: (a) FB system using MPC; (b) HPFC 4-bus system with FL controller.
(a)
(b)


### 4.3. Closed Loop Four-Bus HPFC System with Hysteresis Controller

Circuit diagram of closed loop HPFC 4-bus system with HC controller is shown in Figure10(b).RMS voltage at bus 3 with HPFC-CL-HC appears in Figure11 and its value is 5850 volts.


### 4.4. Closed Loop Four-Bus HPFC System with MP Controller

Circuit diagram of FB system with HPFC closed loop MP controller is portrayed in Figure12.RMS voltage is portrayed in Figure11. Voltage at bus 3 with CL and MPC is portrayed in Figure 13 and its value is0.7∗104V.Figure 13
Voltage of closed loop FB system using MPC.


### 4.5. Closed Loop Four-Bus HPFC System with FL Controller

Circuit diagram of closed loop HPFC 4-bus system with fuzzy logic controller is outlined in Figure12(b). Fuzzy logic rule viewer is portrayed in Figure 14. RMS voltage at bus 3 of CL HPFC with FLC is outlined in Figure 15 and its value is 5800 volts. The voltage quickly comes back to normal value due to FLC.Figure 14
Fuzzy logic: (a) rule viewer and rulebook (b, c) surface viewer.
(a)
(b)
(c)Figure 15
RMS voltage at bus 3 of CL HPFC with FLC.Comparison of time domain parameters (voltage) using PI, HC, MPC, and FLC is given in Table3. By using FLC, the risetime is abridged from 0.63 sec to 0.60 sec, the peak time is abridged from 0.92 sec to 0.61 sec, the settling time is abridged from 0.89 sec to 0.63 sec, and the steady-state error is abridged from 2.6 V to 0.7 V. Bar chart comparison of time domain parameters (voltage) is given in Figure 16.Table 3
Comparison of time domain parameters of voltage using PI, HC, MPC, and FLC.
Types of controllers
T
r
T
p
T
s
E
s
s
PI
0.63
0.92
0.99
2.6
HC
0.61
0.78
0.86
1.5
MPC
0.605
0.72
0.75
0.9
FLC
0.60
0.61
0.63
0.7Figure 16
Bar chart comparison of time domain parameters (current).Comparison of time domain parameters (current) using PI, HC, MPC, and FLC is shown in Figure17. By using FLC, the risetime is abridged from 0.64 sec to 0.60 sec, the peak time is abridged from 0.93 sec to 0.61 sec, the settling time is abridged from 1.00 sec to 0.62 sec, and the steady-state error is abridged from 1.6 Amp to 0.1 Amp. Bar chart comparison of time domain parameters (current) is given in Figures 16 and 17.Figure 17
Bar chart comparison of time domain parameters (voltage).


## 4.1. Open Loop Four-Bus HPFC System with Load Disturbance

The detailed MATLAB simulation of modeling and control scheme of the controller is discussed in this section, considering that the dynamic control of the HPFC is realized in the current space. Circuit diagram of open loop HPFC 4-bus system with load disturbance appears in Figure5. The bus information and line information are given in Tables 1 and 2 separately. Voltage at bus 3 is shown in Figure 6 and its value is 0.7∗104 volts. RMS voltage at bus 3 is shown in Figure 7(a) and its value is 5750 volts. The fall in voltage is due to addition of load at bus 3 of FB MGS. Real power at bus 3 appears in Figure 8 and its value is 3.5∗105 var.Figure 5
Circuit diagram of open loop FBS with load disturbance.Table 1
Line data for FBS.
Line impedance
Resistance
Inductance
Buses 1-2
0.05 Ω
0.23 mH
Buses 2-3
0.15 Ω
0.28 mH
Buses 3-4
0.20 Ω
0.45 mH
Buses 1-4
0.13Ω
0.34 mHTable 2
Bus data for FBS.
Voltage
Load impedance
Resistance
Inductance
Bus 1
6.96 kV
Bus 2
6.96 kV
Bus 3
80 Ω
75 mH
Bus 4
100 Ω
80 mHFigure 6
Voltage at bus 3with load disturbance.Figure 7
RMS voltage at bus 3: (a) open loop; (b) with HPFC, CL, and PI; (c) with HPFC, CL, and PIC; (d) with HPFC, CL, and HC.
(a)
(b)
(c)
(d)Figure 8
Real power at bus 3: (a) with load disturbance; (b) with HPFC, CL, and PIC.
(a)
(b)Reactive power at bus 3 is delineated in Figure9 and its value is 10∗104 watts.Figure 9
Reactive power at bus 3 with load disturbance: (a) open loop; (b) with HPFC, CL, and PIC.
(a)
(b)


## 4.2. Closed Loop Four-Bus HPFC System with PI Controller

Circuit diagram of closed loop HPFC 4-bus system with PI controller is shown in Figure10(a).Figure 10
Circuit diagram of closed loop system: (a) HPFC 4-bus system with PI controller; (b) HPFC 4-bus system with HC controller.
(a)
(b)RMS voltage at bus 3 with HPFC, CL, and PIC appears in Figure11 and its value is 5800 volts. The voltage comes back to normal value at t=1sec.Figure 11
RMS voltage at bus 3: (a) with HPFC, CL, and PIC; (b) with HPFC, CL, and HC.
(a)
(b)Real power at bus 3 with HPFC, CL, and PIC appears in Figure12 and its value is 3.5∗105 watts.Figure 12
Circuit diagram of closed loop system: (a) FB system using MPC; (b) HPFC 4-bus system with FL controller.
(a)
(b)


## 4.3. Closed Loop Four-Bus HPFC System with Hysteresis Controller

Circuit diagram of closed loop HPFC 4-bus system with HC controller is shown in Figure10(b).RMS voltage at bus 3 with HPFC-CL-HC appears in Figure11 and its value is 5850 volts.


## 4.4. Closed Loop Four-Bus HPFC System with MP Controller

Circuit diagram of FB system with HPFC closed loop MP controller is portrayed in Figure12.RMS voltage is portrayed in Figure11. Voltage at bus 3 with CL and MPC is portrayed in Figure 13 and its value is0.7∗104V.Figure 13
Voltage of closed loop FB system using MPC.


## 4.5. Closed Loop Four-Bus HPFC System with FL Controller

Circuit diagram of closed loop HPFC 4-bus system with fuzzy logic controller is outlined in Figure12(b). Fuzzy logic rule viewer is portrayed in Figure 14. RMS voltage at bus 3 of CL HPFC with FLC is outlined in Figure 15 and its value is 5800 volts. The voltage quickly comes back to normal value due to FLC.Figure 14
Fuzzy logic: (a) rule viewer and rulebook (b, c) surface viewer.
(a)
(b)
(c)Figure 15
RMS voltage at bus 3 of CL HPFC with FLC.Comparison of time domain parameters (voltage) using PI, HC, MPC, and FLC is given in Table3. By using FLC, the risetime is abridged from 0.63 sec to 0.60 sec, the peak time is abridged from 0.92 sec to 0.61 sec, the settling time is abridged from 0.89 sec to 0.63 sec, and the steady-state error is abridged from 2.6 V to 0.7 V. Bar chart comparison of time domain parameters (voltage) is given in Figure 16.Table 3
Comparison of time domain parameters of voltage using PI, HC, MPC, and FLC.
Types of controllers
T
r
T
p
T
s
E
s
s
PI
0.63
0.92
0.99
2.6
HC
0.61
0.78
0.86
1.5
MPC
0.605
0.72
0.75
0.9
FLC
0.60
0.61
0.63
0.7Figure 16
Bar chart comparison of time domain parameters (current).Comparison of time domain parameters (current) using PI, HC, MPC, and FLC is shown in Figure17. By using FLC, the risetime is abridged from 0.64 sec to 0.60 sec, the peak time is abridged from 0.93 sec to 0.61 sec, the settling time is abridged from 1.00 sec to 0.62 sec, and the steady-state error is abridged from 1.6 Amp to 0.1 Amp. Bar chart comparison of time domain parameters (current) is given in Figures 16 and 17.Figure 17
Bar chart comparison of time domain parameters (voltage).


## 5. Conclusion

Closed loop FBS with PI, hysteresis controller, MPC, and FLC is simulated. Simulation is done and the outcomes are compared in terms of risetime, peak time, settling time, and steady-state error. By using FLC, the risetime is abridged from 0.63 sec to 0.60 sec, the peak time is abridged from 0.92 sec to 0.61 sec, the settling time is abridged from 0.89 sec to 0.63 sec, and the steady-state error is abridged from 2.6 V to 0.7 V. The outcomes represent that the closed loop HPFC four-bus system with fuzzy logic controller is superior to the closed loop HPFC four-bus system with PI/hysteresis controller/MPC. The simulation outcomes represent the ability of the HPFC in improving the power quality using fuzzy logic controller. The scope of present work deals with closed loop HPFC 4-bus system with fuzzy logic controller. Closed loop HPFC 4-bus system with slide mode controller can be done in the future.



---

*Source: 4621537-2023-03-03.xml*