# Grid Connected Solar PV System with SEPIC Converter Compared with Parallel Boost Converter Based MPPT

Authors: T. Ajith Bosco Raj; R. Ramesh; J. R. Maglin; M. Vaigundamoorthi; I. William Christopher; C. Gopinath; C. Yaashuwanth
Journal: International Journal of Photoenergy
 (2014)

---

## Abstract

The main objective of this work is to study the behaviour of the solar PV systems and model the efficient Grid-connected solar power system. The DC-DC MPPT circuit using chaotic pulse width modulation has been designed to track maximum power from solar PV module. The conversion efficiency of the proposed MPPT system is increased when CPWM is used as a control scheme. This paper also proposes a simplified multilevel (seven level) inverter for a grid-connected photovoltaic system. The primary goal of these systems is to increase the energy injected to the grid by keeping track of the maximum power point of the panel, by reducing the switching frequency, and by providing high reliability. The maximum power has been tracked experimentally. It is compared with parallel boost converter. Also this model is based on mathematical equations and is described through an equivalent circuit including a PV source with MPPT, a diode, a series resistor, a shunt resistor, and dual boost converter with active snubber circuit. This model can extract PV power and boost by using dual boost converter with active snubber. By using this method the overall system efficiency is improved thereby reducing the switching losses and cost.


---

## Body

## 1. Introduction

Because of constantly growing energy demand, grid-connected photovoltaic (PV) systems are becoming more and more popular, and many countries have permitted, encouraged, and even funded distributed-power-generation systems. Currently, solar panels are not very efficient with only about 12–20% efficiency in their ability to convert sunlight to electrical power. The efficiency can drop further due to other factors such as solar panel temperature and load conditions. In order to maximize the power derived from the solar panel, it is important to operate the panel at its optimal power point. To achieve this, a maximum power point tracker will be designed and implemented.The MATLAB/PSPICE model of the PV module is developed [1–4] to study the effect of temperature and insolation on the performance of the PV module. The power electronics interface, connected between a solar panel and a load or battery bus, is a pulse width modulated (PWM) DC-DC converter or their derived circuits used to extract maximum power from solar PV panel. I
-
V characteristic curve of photovoltaic generators based on various DC-DC converters [5–8] was proposed and concluded that SEPIC converter is the best alternative to track maximum power from PV panel. The various types of nonisolated DC-DC converters for the photo voltaic system is reviewed [9].The maximum power tracking for PV panel using DC-DC converter is developed [10] without using microcontroller. This approach ensures maximum power transfer under all atmospheric conditions. The analogue chaotic PWM is used to reduce the EMI in boost converter. The conversion efficiency is increased when CPWM is used as a control technique [11–13]. To increase conversion efficiency, an active clamp circuit is introduced into the proposed one to provide soft switching features to reduce switching losses. Moreover, switches in the converter and active clamp circuit are integrated with a synchronous switching technique to reduce circuit complexity and component counts, resulting in a lower cost and smaller volume [14].Multilevel inverter consists of an array of power semiconductor switches, capacitor voltage sources, and clamping diodes. The multilevel inverter produces the stepped voltage waveforms with less distortion, less switching frequency, higher efficiency, lower voltage devices, and better electromagnetic compatibility [15]. The commutation (process of turn off) of the switches permits the addition of the capacitor voltages, which reach high voltages at the output [16].A modular grid-connected PV generation system presents an actual behavioural model of a grid tied PV system suitable for system level investigations. Simplified means for modelling the PV array and investigating a gradient based MPPT into a very simple averaged model of the power converter was developed, and the model has been experimentally vetted [17, 18]. A single-phase grid-connected inverter which is usually used for residential or low-power applications of power ranges that are less than 10 kW [15]. Types of single-phase grid-connected inverters have been investigated [19]. A common topology of this inverter is full-bridge three-level. The three-level inverter can satisfy specifications through its very high switching, but it could also unfortunately increase switching losses, acoustic noise, and level of interference to other equipment. Improving its output waveform reduces its harmonic content and, hence, also the size of the filter used and the level of electromagnetic interference (EMI) generated by the inverter’s switching operation [20].MATLAB-based modelling and simulation scheme which is suitable for studying theI
-
V and P
-
V characteristics of a PV array under a nonuniform insolation due to partial shading [21] was proposed. The mathematical model of solar PV module is useful for the computer simulation. The power electronics interface, connected between a solar panel and a load or battery bus, is a pulse width modulated (PWM) DC-DC converter or their derived circuits used to extract maximum power from solar PV panel [22]. The main drawback of PV systems is that the output voltage of PV panels is highly dependent on solar irradiance and ambient temperature. Therefore PV panels outputs cannot connect directly to the load. To improve this, a DC-DC boost converter is required to interface between PV panels and loads [23]. The boost converter is fixing the output voltage of the PV system. Converter receives the variable input voltage which is the output of PV panels and gives up constant output voltage across its output capacitors where the loads can be connected. In general, a DC-DC boost converter operates at a certain duty cycle. In this case, the output voltage depends on that duty cycle. If the input voltage is changed while the duty cycle is kept constant, the output voltage will vary. Duty cycle is varied by using a pulse width modulation (PWM) technique [24].Silicon carbide (SiC) represents an advance in silicon technology because it allows a larger energy gap. SiC is classified as a wide-band-gap (WBG) material, and it is the mainstream material for power semiconductors [25, 26]. Among the different types of power semiconductors, the power diode was the best device to adopt SiC technology. The main advantage of SiC is high-breakdown voltage and reverse-recovery current is small [27–29]. As a result, higher efficiency and higher power density can be brought to power electronic systems in different applications [30, 31]. In this research, a new active snubber circuit is proposed to contrive a new family of PWM converters. This proposed circuit provides perfectly ZVT turn on and ZCT turn off together for the main switch of a converter by using only one quasiresonant circuit without an important increase in the cost and complexity of the converter. This paper proposes to implement Chaotic PWM as a control method to improve the steady state performance of the DC-DC SEPIC converter based MPPT system for solar PV module. The nominal duty cycle of the main switch of DC-DC SEPIC converter is adjusted so that the solar panel output impedance is equal to the input resistance of the DC-DC converter which results in better spectral performance in the tracked voltages when compared to conventional PWM control. The conversion efficiency of the proposed MPPT system is increased when CPWM is used; this will be compared with parallel boost converter. Multilevel inverters are promising as they have nearly sinusoidal output-voltage waveforms, output current with better harmonic profile, less stressing of electronic components owing to decreased voltages, switching losses that are lower than those of conventional two-level inverters, a smaller filter size, and lower EMI, all of which make them cheaper, lighter, and more compact [29].


## 2. MATLAB Model of L1235-37W Solar PV Module

The output characteristics of the solar PV module depend on the irradiance and the operating temperature of the cell. The equivalent circuit of PV module is shown in Figure1.Figure 1
Equivalent circuit of solar PV module.From Figure1, the current and voltage equation is given by
(1)
I
sc
=
I
D
+
I
PV
+
(
V
D
R
p
)
,
V
PV
=
V
D
-
(
I
PV
*
R
s
)
,
where diode current is I
D
=
I
o
+
(
e
(
V
D
/
V
T
)
-
1
).Based on the electrical equation (1) and the solar PV module are modelled in MATLAB as shown in Figure 2, which is used to enhance the understanding and predict the V
-
I characteristics and to analyze the effect of temperature and irradiation variation. If irradiance increases, the fluctuation of the open-circuit voltage is very small. But the short circuit current has sharp fluctuations with respect to irradiance. However, for a rising operating temperature, the open-circuit voltage is decreased in a nonlinear fashion [4].Figure 2
MATLAB model for PV module.TheV
-
I characteristics are validated experimentally in the L1235-37Wp solar module as shown in Figure 3. The technical specifications of L1235-37Wp solar module under test are given in Table 1. Figure 4 shows the V
-
I characteristics of L1235-37Wp which is based on the experimental results under irradiation (
G
)
=
1000 W/m2 and temperature = 25°C.Table 1
Specifications of L1235-37W solar PV panel.
Short circuit current (I
sc)
2.5 A
Voltage at MPP (V
m)
16.4
Current at MPP (I
m)
2.25
Open circuit voltage (V
oc)
21 V
Length
645 mm
Width
530 mm
Depth
34 mm
Weight
4 kg
Maximum power (P
max
⁡)
37 WFigure 3
L1235-37W solar module under test.Figure 4
V
-
I characteristics of L 1235-37W solar panel.


### 2.1. Space Modelling of SEPIC Converter Input at MPP

The relation between input and output currents and voltage are given by(2)
V
OUT
V
IN
=
D
(
1
-
D
)
,
I
IN
I
OUT
=
D
(
1
-
D
)
.
The duty cycle of the SEPIC converter under continuous conduction mode is given by
(3)
D
=
V
OUT
+
V
D
V
IN
+
V
OUT
+
V
D
.
V
D is the forward voltage drop across the diode (D). The maximum duty cycle is
(4)
D
max
⁡
=
V
OUT
+
V
D
V
IN
(
MIN
)
+
V
OUT
+
V
D
.
The value of the inductor is selected based on the below equations
(5)
L
1
=
L
2
=
L
=
V
IN
(
MIN
)
*
D
max
⁡
Δ
I
L
*
f
S
.
Δ
I
L is the peak-to-peak ripple current at the minimum input voltage and f
S is the switching frequency. The value of C
1 depends on RMS current, which is given by
(6)
I
C
1
(
RMS
)
=
I
OUT
*
V
OUT
+
V
D
V
IN
(
MIN
)
.
The voltage rating of capacitor C
1 must be greater than the input voltage. The ripple voltage on C
1 is given by
(7)
Δ
V
C
1
=
I
(
OUT
)
*
D
max
⁡
C
1
*
f
S
.
The parameters governing the selection of the MOSFET are the minimum threshold voltage V
th
(
min
⁡
), the on-resistance R
DS
(
ON
), gate-drain charge Q
GD, and the maximum drain to source voltage V
DS
(
max
⁡
). The peak switch voltage is equal to V
IN
+
V
OUT. The peak switch current is given by
(8)
I
Q
1
(
Peak
)
=
I
L
1
(
PEAK
)
+
I
L
2
(
PEAK
)
.
The RMS current is given by
(9)
I
Q
1
(
RMS
)
=
I
OUT
(
V
OUT
+
V
IN
(
MIN
)
)
*
V
OUT
V
IN
(
MIN
)
2
.
The total power dissipation for MOSFETs includes conduction loss (as shown in the first term of the above equation) and switching loss (as shown in the second term). I
G is the gate drive current. The R
DS
(
ON
) value should be selected at maximum operating junction temperature and is typically given in the MOSFET datasheet
(10)
P
switch
=
(
I
Q
1
(
RMS
)
*
R
DS
(
ON
)
*
D
MAX
)
+
(
V
IN
(
MIN
)
+
V
OUT
)
*
I
Q
1
(
Peak
)
*
(
Q
GD
*
f
S
)
I
G
.
The output diode must be selected to handle the peak current and the reverse voltage. In a SEPIC converter, the diode peak current is the same as the switch peak current I
Q
1
(
Peak
). The minimum peak reverse voltage the diode must withstand is
(11)
V
RD
=
V
IN
(
MAX
)
+
V
OUT
(
MAX
)
.


### 2.2. Dynamic Input Characteristics of a SEPIC Converter at MPP

The input voltage and the equivalent input resistance of the converter areV
S  and  R
i, respectively. As the input power ρ
i to the converter is equal to the output power ρ
o of the solar PV module
(12)
ρ
i
=
ρ
o
=
V
S
2
R
i
.The rate of changeρ
i with respect to V
S and R
i can be shown below
(13)
∂
ρ
i
=
2
V
S
R
i
∂
V
S
-
V
S
2
R
i
2
∂
R
i
.At the MPP, the rate of change ofρ
i equals zero and R
i
=
r
g
(14)
∂
ρ
i
=
0
,
hence
∂
V
S
∂
R
i
=
V
S
2
R
i
.The equation gives the required dynamic resistance characteristics of the tracker at MPP.


### 2.3. Generation of Chaotic PWM

In order to improve the steady state performance of solar powered system, direct control Chaotic Pulse width modulated (CPWM) SEPIC converter is proposed to track maximum power from solar PV module. Therefore, in order to get chaotic frequencyf
Δ or chaotic amplitude A
Δ, chaos-based PWM (CPWM) is analyzed to generate chaotic PWM. The MATLAB simulation is carried out as shown in Figure 5. The analogue chaotic PWM has its advantages over the digital in its low costs and easy-to-design, making it suitable for high-frequency operation and situations when design flexibility, high converter conversion efficiency, and low cost. In order to generate chaotic pulse width modulation, Chua’s diode is used to trigger the main switch of SEPIC converter and to be used for reducing spectral peaks in tracked converter voltage.Figure 5
Chaotic PWM pulse generation.The CPWM adopts sawtooth to modulate, but its carrier periodT
Δ
′ changes according to
(15)
T
Δ
′
=
X
i
Mean
(
x
)
*
T
Δ
,
where T
Δ is invariant period, X
i, i
=
1,2
,
…
N, a chaotic sequence, x
=
(
x
1
,
x
2
…
x
N
), and Mean
(
x
) average of the sequence defined as
(16)
Mean
(
x
)
=
Lim
∑
i
=
1
N
|
X
i
|
1
N
;
N
⟶
∞
.
Similarly the CPWM also adopts sawtooth to modulate, but its carrier amplitude A
Δ
′ changes according to
(17)
A
Δ
′
=
{
1
+
K
X
i
Mean
(
x
)
}
A
Δ
,
where A
Δ is the invariant amplitude, X
i, i
=
1
,
2
,
…
N, a chaotic sequence, x
=
(
x
1
,
x
2
…
x
N
) and Mean
(
x
), average of the sequence, and K is the modulation factor of the amplitude which can be set required in practice. The value of K is selected as low so that the ripple in the output voltage of the SEPIC converter is low. Also the ripple in the output voltage controlled by chaotic PWM is low. The analog chaotic carrier is generated based on the circuit; the resistances (
R
d
1
⋯
R
d
6
) are used to realise linear resistor called Chua diode. The parameters for Chua’s diode are designed and chosen as R
d
1
=
2.4 kΩ, R
d
2
=
3.3 kΩ, R
d
3
=
R
d
4
=
220 Ω, and R
d
5
=
R
d
6
=
20 kΩ. The other parameters of Chua’s oscillator used in the experiment are L
1
=
2.2 mH, C
1
=
4.7 nF, C
2
=
500 pF, and R
=
1.75 KΩ.


### 2.4. Experimental Setup: Standalone PV System

Figure6 shows the experimental setup of the proposed SEPIC converter-based MPPT for solar PV module, which is constituted by a power stage and a control circuit. The power stage includes an inductor L
1, L
2, capacitor C
1, C
2, a switch S, a load resistance, and a solar PV module (L1235-37Wp). The analog chaotic carrier is generated based on the hardware output of CPWM is in Figure 7.Figure 6
Hardware setup.Figure 7
Chaotic PWM.


## 2.1. Space Modelling of SEPIC Converter Input at MPP

The relation between input and output currents and voltage are given by(2)
V
OUT
V
IN
=
D
(
1
-
D
)
,
I
IN
I
OUT
=
D
(
1
-
D
)
.
The duty cycle of the SEPIC converter under continuous conduction mode is given by
(3)
D
=
V
OUT
+
V
D
V
IN
+
V
OUT
+
V
D
.
V
D is the forward voltage drop across the diode (D). The maximum duty cycle is
(4)
D
max
⁡
=
V
OUT
+
V
D
V
IN
(
MIN
)
+
V
OUT
+
V
D
.
The value of the inductor is selected based on the below equations
(5)
L
1
=
L
2
=
L
=
V
IN
(
MIN
)
*
D
max
⁡
Δ
I
L
*
f
S
.
Δ
I
L is the peak-to-peak ripple current at the minimum input voltage and f
S is the switching frequency. The value of C
1 depends on RMS current, which is given by
(6)
I
C
1
(
RMS
)
=
I
OUT
*
V
OUT
+
V
D
V
IN
(
MIN
)
.
The voltage rating of capacitor C
1 must be greater than the input voltage. The ripple voltage on C
1 is given by
(7)
Δ
V
C
1
=
I
(
OUT
)
*
D
max
⁡
C
1
*
f
S
.
The parameters governing the selection of the MOSFET are the minimum threshold voltage V
th
(
min
⁡
), the on-resistance R
DS
(
ON
), gate-drain charge Q
GD, and the maximum drain to source voltage V
DS
(
max
⁡
). The peak switch voltage is equal to V
IN
+
V
OUT. The peak switch current is given by
(8)
I
Q
1
(
Peak
)
=
I
L
1
(
PEAK
)
+
I
L
2
(
PEAK
)
.
The RMS current is given by
(9)
I
Q
1
(
RMS
)
=
I
OUT
(
V
OUT
+
V
IN
(
MIN
)
)
*
V
OUT
V
IN
(
MIN
)
2
.
The total power dissipation for MOSFETs includes conduction loss (as shown in the first term of the above equation) and switching loss (as shown in the second term). I
G is the gate drive current. The R
DS
(
ON
) value should be selected at maximum operating junction temperature and is typically given in the MOSFET datasheet
(10)
P
switch
=
(
I
Q
1
(
RMS
)
*
R
DS
(
ON
)
*
D
MAX
)
+
(
V
IN
(
MIN
)
+
V
OUT
)
*
I
Q
1
(
Peak
)
*
(
Q
GD
*
f
S
)
I
G
.
The output diode must be selected to handle the peak current and the reverse voltage. In a SEPIC converter, the diode peak current is the same as the switch peak current I
Q
1
(
Peak
). The minimum peak reverse voltage the diode must withstand is
(11)
V
RD
=
V
IN
(
MAX
)
+
V
OUT
(
MAX
)
.


## 2.2. Dynamic Input Characteristics of a SEPIC Converter at MPP

The input voltage and the equivalent input resistance of the converter areV
S  and  R
i, respectively. As the input power ρ
i to the converter is equal to the output power ρ
o of the solar PV module
(12)
ρ
i
=
ρ
o
=
V
S
2
R
i
.The rate of changeρ
i with respect to V
S and R
i can be shown below
(13)
∂
ρ
i
=
2
V
S
R
i
∂
V
S
-
V
S
2
R
i
2
∂
R
i
.At the MPP, the rate of change ofρ
i equals zero and R
i
=
r
g
(14)
∂
ρ
i
=
0
,
hence
∂
V
S
∂
R
i
=
V
S
2
R
i
.The equation gives the required dynamic resistance characteristics of the tracker at MPP.


## 2.3. Generation of Chaotic PWM

In order to improve the steady state performance of solar powered system, direct control Chaotic Pulse width modulated (CPWM) SEPIC converter is proposed to track maximum power from solar PV module. Therefore, in order to get chaotic frequencyf
Δ or chaotic amplitude A
Δ, chaos-based PWM (CPWM) is analyzed to generate chaotic PWM. The MATLAB simulation is carried out as shown in Figure 5. The analogue chaotic PWM has its advantages over the digital in its low costs and easy-to-design, making it suitable for high-frequency operation and situations when design flexibility, high converter conversion efficiency, and low cost. In order to generate chaotic pulse width modulation, Chua’s diode is used to trigger the main switch of SEPIC converter and to be used for reducing spectral peaks in tracked converter voltage.Figure 5
Chaotic PWM pulse generation.The CPWM adopts sawtooth to modulate, but its carrier periodT
Δ
′ changes according to
(15)
T
Δ
′
=
X
i
Mean
(
x
)
*
T
Δ
,
where T
Δ is invariant period, X
i, i
=
1,2
,
…
N, a chaotic sequence, x
=
(
x
1
,
x
2
…
x
N
), and Mean
(
x
) average of the sequence defined as
(16)
Mean
(
x
)
=
Lim
∑
i
=
1
N
|
X
i
|
1
N
;
N
⟶
∞
.
Similarly the CPWM also adopts sawtooth to modulate, but its carrier amplitude A
Δ
′ changes according to
(17)
A
Δ
′
=
{
1
+
K
X
i
Mean
(
x
)
}
A
Δ
,
where A
Δ is the invariant amplitude, X
i, i
=
1
,
2
,
…
N, a chaotic sequence, x
=
(
x
1
,
x
2
…
x
N
) and Mean
(
x
), average of the sequence, and K is the modulation factor of the amplitude which can be set required in practice. The value of K is selected as low so that the ripple in the output voltage of the SEPIC converter is low. Also the ripple in the output voltage controlled by chaotic PWM is low. The analog chaotic carrier is generated based on the circuit; the resistances (
R
d
1
⋯
R
d
6
) are used to realise linear resistor called Chua diode. The parameters for Chua’s diode are designed and chosen as R
d
1
=
2.4 kΩ, R
d
2
=
3.3 kΩ, R
d
3
=
R
d
4
=
220 Ω, and R
d
5
=
R
d
6
=
20 kΩ. The other parameters of Chua’s oscillator used in the experiment are L
1
=
2.2 mH, C
1
=
4.7 nF, C
2
=
500 pF, and R
=
1.75 KΩ.


## 2.4. Experimental Setup: Standalone PV System

Figure6 shows the experimental setup of the proposed SEPIC converter-based MPPT for solar PV module, which is constituted by a power stage and a control circuit. The power stage includes an inductor L
1, L
2, capacitor C
1, C
2, a switch S, a load resistance, and a solar PV module (L1235-37Wp). The analog chaotic carrier is generated based on the hardware output of CPWM is in Figure 7.Figure 6
Hardware setup.Figure 7
Chaotic PWM.


## 3. Mathematical Model for Parallel Boost Converter with Active Snubber Circuit

Figure12 represents the circuit diagram of the parallel boost converter with active snubber. It consists of five inductors L
f
i, L
f
2, L
R
1, L
R
2, L
n and three capacitors C
s, C
r, C
o, V
g and V
o  represents supply and output voltage, respectively; S
(
S
1
,
S
2
) is an active primary switch, D
(
D
f
1
,
D
f
2
) is a freewheeling diode, D
s
(
D
1
,
D
2
,
D
3
) is a Snubber diode, and R
L is the load resistance. S
(
S
1
,
S
2
,
S
3
) operates at a switching frequency f
S with duty ratio d.Choose the switching frequency of switchesS
1
=
S
2
=
100 KHz and S
3
=
200 KHz.WhenS
1
=
S
2
=
0 and S
3
=
1 as in Figure 8
(18)
d
i
L
F
d
t
=
1
L
F
[
V
g
=
V
o
]
,
d
V
o
d
t
=
1
C
o
[
i
L
F
-
V
o
R
L
-
i
L
S
]
.
Also the switches S
1
=
S
2
=
S
3
=
1 as in Figure 9
(19)
d
i
L
F
d
t
=
1
L
F
[
V
g
-
V
o
]
,
d
V
o
d
t
=
1
C
o
[
i
L
F
-
V
o
R
L
]
.Figure 8
WhenS
1
=
S
2
=
0 and S
3
=
1.Figure 9
WhenS
1
=
S
2
=
S
3
=
1.Similarly, the switchesS
1
=
S
2
=
1 and S
3
=
1 or 0 as in Figure 10
(20)
d
i
L
F
d
t
=
V
g
L
F
,
d
V
o
d
t
=
1
C
o
[
-
V
o
R
L
]
.Figure 10
WhenS
1
=
S
2
=
1 and S
3
=
1 or 0.By using state-space averaging method the state equations during switch-on and switch-off conditions are(21)
x
˙
1
=
-
(
1
-
d
1
)
L
F
x
2
-
(
1
-
d
2
)
L
F
x
2
+
V
g
L
F
,
x
˙
2
=
-
1
R
L
C
o
x
2
+
(
1
-
d
1
)
d
2
C
o
x
1
+
(
1
-
d
1
)
(
1
-
d
2
)
C
o
x
1
,
where x
1 and x
2 are the moving averages of i
L
F and V
o, respectively.


## 4. Proposed Parallel Boost Converter for PV Application

Figure11 shows the Block Diagram of PV based parallel boost converter with active snubber. It is the combination of new active snubber circuit with parallel boost converter. Three switches S
1, S
2, and S
3 are used; S
1 and S
2 act as main switch and S
3 acts as an auxiliary switch. S
1 and S
2 are controlled by ZVT and ZCT, respectively; also S
3 is controlled by ZCS. This circuit operates with the input of solar power.Figure 11
Block diagram of PV based parallel boost converter with active snubber.Figure 12
Circuit diagram of PV based parallel boost converter with active snubber with resistive load.Assume both the main switches (S
1 and S
2) operate in the same frequency. The features of proposed parallel boost converter are as follows.(i)
All the semiconductors work with soft switching in the proposed converter.
(ii)
The main switchesS
1 and S
2 turn on with ZVT and turn off with ZCT.
(iii)
The secondary switch is turned on with ZCS and turned off with ZCS.
(iv)
All other components of the parallel boost converter functions based on this soft switching.
(v)
There is no additional current or voltage force on the main switchesS
1 and S
2.
(vi)
There is no additional current or voltage force on the secondary switchS
3.
(vii)
Also there is no additional current or voltage force on the main diodesD
f
1 and D
f
2.
(viii)
According to the ratio of the transformer, a part of the resonant current is transferred to the output load with the coupling inductance. So there is less current stress on the secondary switch with satisfied points.
(ix)
At resistive load condition, in the ZVT process, the main switches voltage falls to zero earlier due to decreased interval time and that does not make a problem in the ZVT process for the main switch.
(x)
At resistive load condition, in the ZCT process, the main switches body diode on state time is increased when the input current is decreased. However, there is no effect on the main switch turn off process with ZCT.
(xi)
This parallel boost converter operates in high-switching frequency.
(xii)
This converter easily controls because the main and the auxiliary switches are connected with common ground.
(xiii)
The most attractive feature of this proposed converter is using ZVT and ZCT technique.
(xiv)
The proposed new active snubber circuit is easily adopted with other basic PWM converters and also switching converters.
(xv)
Additional passive snubber circuits are not necessary for this proposed converter.
(xvi)
SIC (silicon carbide) is used in the main and auxiliary diodes, so reverse recovery problem does not arise.
(xvii)
The proposed active snubber circuit is also suitable for other DC-DC converters.


### 4.1. Procedure for Constructing a Proposed Converter

Steps to obtain a system level modeling and simulation of proposed power electronic converter are listed below.(i)
Determine the state variables of the proposed power circuit in order to write its switched state-space model, for example, inductance current and capacitance voltage.
(ii)
Assign integer variables (ON-1 and OFF-0 state) to the proposed power semiconductor to each switching circuit.
(iii)
Determine the conditions controlling the states of the proposed power semiconductors or the switching circuit.
(iv)
Assume the main operating modes, apply Kirchhoff’s Current law and Kirchhoff’s Voltage law and combine all the required stages into a switched state-space model, which is the desired system-level of the proposed model.
(v)
Implement the derived equations with MATLAB Simulink.
(vi)
Use the obtained switched space-state model to design linear or nonlinear controllers for the proposed power converter.The algorithm for solving the differential equations and the step size should be chosen before running any simulation. This step is only suitable in closed-loop simulations [21].


### 4.2. Operation of Proposed Boost Converter with Snubber Circuit

The proposed PV based converter is shown in Figure12, and it is based on a dual boost circuit where the first one (switch S
1 and choke L
f
1) is used as main chock of boost converter circuit and where the second one (switch S
2 and choke L
f
2) is used to perform an active filtering. The proposed converter applies active snubber circuit for soft switching. This snubber circuit is built on the ZVT turn on and ZCT turn off processes of the main switches. Specification of proposed parallel boost converter with active snubber is in Table 2.Table 2
Specification of parallel boost converter with active Snubber.
Main inductorL
f
1
750μH
Main inductorL
f
2
750μH
Upper Snubber inductorL
R
1
5μH
Lower Snubber inductorL
R
2 (L
m
+
L
d)
2μH
Magnetization inductorL
M (L
n
+
L
0
l)
3μH
Parasitic capacitorC
s
1μF
Snubber capacitorC
R
4.7 nF
Output capacitorC
o
330μF/450 V
Output load resistanceR
=
R
L
530 ΩThe power from the solar flows through the two parallel paths. High efficiency was obtained by this method. So as to reach soft switching (SS) for the main and the auxiliary switches, main switches turn on with ZVT and turn off with ZCT. The proposed converter utilizes active snubber circuit for SS. This snubber circuit is mostly based on the ZVT turn on and ZCT turn off processes of the main switch.L
R
2 value is limited with (
V
out
/
L
R
2
)
t
rise
S
2
≤
I
i
max
⁡ to conduct maximum input current at the end of the auxiliary switch rise time (t
rise
S
2) and L
R
1
≥
2
L
R
2. To turn off S
1 with ZCT, the duration of t
ZCT is at least longer than fall time of S
1
(
t
fall
S
1
)
t
ZCT
≥
t
fall
S
1. Though the main switches are in off state, the control signal is functional to the auxiliary switch. The parasitic capacitor of the main switch should be discharged absolutely and the main switches antiparallel diode should be turned on. The on state time of the antiparallel diode is named t
ZVT and in this time period, the gate signal of the main switch would be applied. So, the main switch is turned on below ZVS and ZCS with ZVT.Whereas the main switches are in on state and ways input current, the control signal of the auxiliary switch is applied. After the resonant starts, the resonant current should be higher than the input current to turn on the antiparallel diode of the main switch. The on state time of the antiparallel diode (t
ZCT) has to be longer than the main switches fall time (t
f
S
1). After all these terms are completed, while antiparallel diode is in on state, the gate signal of the main switch should be cutoff to provide ZCT for the main switch. Auxiliary switch turn on with ZCS and turn off with ZCS. The auxiliary switch is turned on with ZCS for the coupling inductance limits the current rise speed.The current passing through the coupling inductance must be partial to conduct maximum input current at the end of the auxiliary switch rise time (t
r
S
3). So, the turn on process of the auxiliary switch with ZCS is offered. To turn off the auxiliary switch with ZCS, though the auxiliary switch is in on state, the current passing through the switch should fall to zero with a new resonant. Then, the control signal can be cutoff. If C
S is ignored, L
R
1 value should be two times added with L
R
2 to make the auxiliary switch current fall to zero. As the current cannot stay at zero as long as the auxiliary switch fall time (t
f
S
3), the auxiliary switch is turned off nearly with ZCS.The proposed Simulink topology is shown in Figure13. The inductors L
f
1 and L
f
2 have the similar values, the diodes D
f
1
-
D
f
2 are at the same type and the same guess was for the switches (S
1 & S
2). All the inductors have individual switches and they resemble paralleling of classic converters.Figure 13
Simulink model of proposed PV based parallel boost converter with active snubber circuit with MLI.


## 4.1. Procedure for Constructing a Proposed Converter

Steps to obtain a system level modeling and simulation of proposed power electronic converter are listed below.(i)
Determine the state variables of the proposed power circuit in order to write its switched state-space model, for example, inductance current and capacitance voltage.
(ii)
Assign integer variables (ON-1 and OFF-0 state) to the proposed power semiconductor to each switching circuit.
(iii)
Determine the conditions controlling the states of the proposed power semiconductors or the switching circuit.
(iv)
Assume the main operating modes, apply Kirchhoff’s Current law and Kirchhoff’s Voltage law and combine all the required stages into a switched state-space model, which is the desired system-level of the proposed model.
(v)
Implement the derived equations with MATLAB Simulink.
(vi)
Use the obtained switched space-state model to design linear or nonlinear controllers for the proposed power converter.The algorithm for solving the differential equations and the step size should be chosen before running any simulation. This step is only suitable in closed-loop simulations [21].


## 4.2. Operation of Proposed Boost Converter with Snubber Circuit

The proposed PV based converter is shown in Figure12, and it is based on a dual boost circuit where the first one (switch S
1 and choke L
f
1) is used as main chock of boost converter circuit and where the second one (switch S
2 and choke L
f
2) is used to perform an active filtering. The proposed converter applies active snubber circuit for soft switching. This snubber circuit is built on the ZVT turn on and ZCT turn off processes of the main switches. Specification of proposed parallel boost converter with active snubber is in Table 2.Table 2
Specification of parallel boost converter with active Snubber.
Main inductorL
f
1
750μH
Main inductorL
f
2
750μH
Upper Snubber inductorL
R
1
5μH
Lower Snubber inductorL
R
2 (L
m
+
L
d)
2μH
Magnetization inductorL
M (L
n
+
L
0
l)
3μH
Parasitic capacitorC
s
1μF
Snubber capacitorC
R
4.7 nF
Output capacitorC
o
330μF/450 V
Output load resistanceR
=
R
L
530 ΩThe power from the solar flows through the two parallel paths. High efficiency was obtained by this method. So as to reach soft switching (SS) for the main and the auxiliary switches, main switches turn on with ZVT and turn off with ZCT. The proposed converter utilizes active snubber circuit for SS. This snubber circuit is mostly based on the ZVT turn on and ZCT turn off processes of the main switch.L
R
2 value is limited with (
V
out
/
L
R
2
)
t
rise
S
2
≤
I
i
max
⁡ to conduct maximum input current at the end of the auxiliary switch rise time (t
rise
S
2) and L
R
1
≥
2
L
R
2. To turn off S
1 with ZCT, the duration of t
ZCT is at least longer than fall time of S
1
(
t
fall
S
1
)
t
ZCT
≥
t
fall
S
1. Though the main switches are in off state, the control signal is functional to the auxiliary switch. The parasitic capacitor of the main switch should be discharged absolutely and the main switches antiparallel diode should be turned on. The on state time of the antiparallel diode is named t
ZVT and in this time period, the gate signal of the main switch would be applied. So, the main switch is turned on below ZVS and ZCS with ZVT.Whereas the main switches are in on state and ways input current, the control signal of the auxiliary switch is applied. After the resonant starts, the resonant current should be higher than the input current to turn on the antiparallel diode of the main switch. The on state time of the antiparallel diode (t
ZCT) has to be longer than the main switches fall time (t
f
S
1). After all these terms are completed, while antiparallel diode is in on state, the gate signal of the main switch should be cutoff to provide ZCT for the main switch. Auxiliary switch turn on with ZCS and turn off with ZCS. The auxiliary switch is turned on with ZCS for the coupling inductance limits the current rise speed.The current passing through the coupling inductance must be partial to conduct maximum input current at the end of the auxiliary switch rise time (t
r
S
3). So, the turn on process of the auxiliary switch with ZCS is offered. To turn off the auxiliary switch with ZCS, though the auxiliary switch is in on state, the current passing through the switch should fall to zero with a new resonant. Then, the control signal can be cutoff. If C
S is ignored, L
R
1 value should be two times added with L
R
2 to make the auxiliary switch current fall to zero. As the current cannot stay at zero as long as the auxiliary switch fall time (t
f
S
3), the auxiliary switch is turned off nearly with ZCS.The proposed Simulink topology is shown in Figure13. The inductors L
f
1 and L
f
2 have the similar values, the diodes D
f
1
-
D
f
2 are at the same type and the same guess was for the switches (S
1 & S
2). All the inductors have individual switches and they resemble paralleling of classic converters.Figure 13
Simulink model of proposed PV based parallel boost converter with active snubber circuit with MLI.


## 5. Design of MLI Module

A multilevel converter is a power electronic system that synthesizes a desired output voltage levels from the DC inputs supply. Compared with the traditional two-level voltage converter, the primary advantage of multilevel converters is their smaller output voltage step, which results in high power quality, lower harmonic components, better electromagnetic compatibility, and lower switching losses. The functionality verification of the simplified seven-level inverter is done using MATLAB simulation which is shown in Figure14.Figure 14
Simulated model for seven-level inverter.This single-phase simplified seven-level inverter was developed using a single-phase full bridge (H-bridge) inverter, two bidirectional auxiliary switches, and a capacitor voltage divider formed byC
1, C
2, and C
3, as shown in Figure 14. The simplified multilevel inverter topology is significantly advantageous over other topologies. The advantages of simplified topology are requirement of less power switch, power diodes, and less capacitors for this inverter. Photovoltaic arrays were connected to the inverter via a DC-DC SEPIC converter. The power generated by the inverter is to be delivered to the power network, so the utility grid, rather than a load, was used. The DC-DC SEPIC converter was required because the PV arrays had a voltage that was lower than the grid voltage. High DC bus voltages are necessary to ensure that power flows from the PV arrays to the grid. A filtering inductance L
f was used to filter the current injected into the grid. Proper switching of the inverter can produce seven levels of output-voltage (V
dc, 2
V
dc
/
3, V
dc
/
3, 0, 0
*, -
V
dc
/
3, -
2
V
dc
/
3, -
V
dc) from the DC supply voltage. Table 3 shows the switching pattern for the single-phase simplified seven-level inverter.Table 3
Switching pattern for the single-phase seven-level inverter.
V
0
S
1
S
2
S
3
S
4
S
5
S
6
V
dc
1
0
0
1
0
0
2V
dc/3
0
0
0
1
1
0
V
dc/3
0
0
0
1
0
1
0
0
0
1
1
0
0
0*
1
1
0
0
0
0
−V
dc/3
0
1
0
0
1
0
−2V
dc/3
0
1
0
0
0
1
−V
dc
0
1
1
0
0
0


## 6. Grid-Connected Solar Power System

The modelling and simulation of PV, MPPT, CPWMSEPIC converter, simplified seven-level MLI, and controller had been carried out in MATLAB Simulink environment. The basic block diagram of reliable high efficient grid-connected solar power system has been shown in Figure15.Figure 15
Block diagram of reliable high efficient grid-connected solar power system.The grid-connected PV system consists of MPPT tracking using SEPIC converter which is used to track the maximum voltage. The tracked voltage is boosted in to 325 V. A simplified seven-level MLI is designed to convert into an AC voltage with seven levels which should connect to grid. The simulated results for the MLI output are in Figures16 and 17.Figure 16
MLI output current.Figure 17
MLI output voltage.


## 7. Results and Discussions

A modular solar PV based DC-DC converter using parallel boost converter with active filter of the proposed system is simulated using MATLAB Simulink program. The waveforms of parallel boost converter voltage and MLI filtered output voltage is shown in Figures18 and 19. The control signals of the switches are shown in Figures 20 and 21, respectively. The simulation results show the proposed PV based soft switched parallel boost DC-DC converter has the proper response. The detailed comparison of SEPIC and parallel boost converter is in Table 4.Table 4
Comparison of SEPIC and parallel boost converter.
Parameters
SEPIC converter
Parallel boost converter
Duty cycle
45%
47%
No. of switches
7
9
Input
148
148
Output
325 V
448 V
Efficiency
92.15%
98.7%Figure 18
Parallel boost converter output voltage.Figure 19
MLI filtered output voltage (V
o).Figure 20
Control signals of switchesS
1 and S
2.Figure 21
Control signals of switchS
3.


## 8. Conclusion

The behaviour of solar module (L1235-37Wp) is studied. The maximum power is extracted from solar PV module using CPWM and PWM for different converters. The spectrum performance is improved when CPWM control is used for MPPT purposes. The performance of MLI is studied and the proto type model of MLI is carried out. The main objective of this research was to improve efficiency of the solar PV based parallel boost converter and reduce the switching losses. Simulations were initially done for conventional boost converter with snubber circuit. The changes in the input current waveform were obtained. A parallel boost converter was designed with soft switching which is provided by the active snubber circuit. The main switches and all the other semiconductors were switched by ZVT and ZCT techniques. The active snubber circuit was applied to the parallel boost converter, which is fed by solar input line. This latest converter was achieved with 148 V input. Due to the main and the auxiliary switches have a common ground, the converter was controlled easily. The proposed new active snubber circuit can be simply functional to the further basic PWM converters and to all switching converters thereby increasing efficiency and improving output voltage.



---

*Source: 385720-2014-03-03.xml*