# An UWB LNA Design with PSO Using Support Vector Microstrip Line Model

Authors: Salih Demirel; Filiz Gunes; A. Kenan Keskin
Journal: Journal of Applied Mathematics
 (2015)

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## Abstract

A rigorous and novel design procedure is constituted for an ultra-wideband (UWB) low noise amplifier (LNA) by exploiting the 3D electromagnetic simulator based support vector regression machine (SVRM) microstrip line model. First of all, in order to design input and output matching circuits (IMC-OMC), sourceZS and load ZL
termination impedance of matching circuit, which are necessary to obtain required input VSWR (Vireq), noise (Freq), and gain (GTreq), are determined using performance characterisation of employed transistor, NE3512S02, between 3 and 8 GHz frequencies. After the determination of the termination impedance, to provide this impedance with IMC and OMC, dimensions of microstrip lines are obtained with simple, derivative-free, easily implemented algorithm Particle Swarm Optimization (PSO). In the optimization of matching circuits, highly accurate and fast SVRM model of microstrip line is used instead of analytical formulations. ADCH-80a is used to provide ultra-wideband RF choking in DC bias. During the design process, it is aimed that Vireq = 1.85, Freq = Fmin, and GTreq = GTmax all over operating frequency band. Measurements taken from the realized LNA demonstrate the success of this approximation over the band.


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## Body

## 1. Introduction

Nowadays, RF circuits have many important usage areas in communication systems. In front-end systems, low noise amplifiers are used in first stage of receiver parts because of their low signal to noise ratio which provides possibility of getting more incoming signal from ambient. Besides, ultra-wideband structures are usually demanded because of their multiple operation frequency choices. To design such ultra-wideband low noise amplifiers, a fast, highly accurate, and feasible method which combines many areas like circuit theory, microwave, and so forth is required [1–4].Microstrip transmission lines are popularly used to design microwave circuits because of low cost, flexible structure, and easy production. In order to design microstrip matching network of amplifier, a highly accurate, efficient, and fast microstrip transmission line model is required. After obtaining such a model, the lines are synthesized with circuit theory to compose matching circuit. High frequency elements of RF circuit could be analyzed and optimized with numerical programs, but these numerical methods could be slow because of their solution methodology. This problem would be solved using knowledge based model of RF elements. Learning machine models like artificial neural network (ANN), general regression neural network (GRNN), support vector regression machines (SVRM), and so forth are frequently used in many areas. Microwave applications of learning machines have been issued in previous works such as microwave transistor modeling with ANN [5, 6], SVRM model of a transmission line [7]. Obtained models of different RF elements could be used to synthesise RF circuits.A low noise microwave amplifier is composed of input and output matching circuit (IMC and OMC), microwave transistor, and DC bias. In order to design IMC and OMC, input and output impedance(ZS,ZL) of matching circuits are required for requested transducer gain (GT), input VSWR (Vi), and noise figure (Fi) of low noise amplifier. This impedance is acquired from performance characterisation of employed microwave transistor [8, 9]. After that, dimensions of microstrip lines in matching circuits are obtained with an optimization algorithm. In the literature, different kinds of optimization algorithms, such as genetic, particle swarm, have been successfully utilized together in microwave circuit and antenna design [10–13].In this paper, an ultra-wideband low noise microstrip amplifier is designed with novel methodology and then fabricated and measured. Firstly, highly accurate and fast SVRM model of microstrip line is created. Secondly, input and output impedance of matching networks are obtained with performance characterisation of NE3512S02 high technology transistor all over the operation band for requestedGTreq, Vireq, and Freq. After that, microstrip line dimensions of IMC and OMC are optimized using evolutionary global optimum searcher PSO [14, 15]. In optimization process, microstrip lines are represented by SWRM model. Finally, designed amplifier is fabricated and measured, and then results are compared with each other.


## 2. Performance Characterisation for a Microwave Transistor

### 2.1. Compatible(F,Vi,GT) Triplets and the (ZS,ZL) Terminations

In a typical design problem of a basic microwave amplifier employing per se a FET as an active device, the active device can be represented by a two-port circuit. Since in such a system all the main performance components ofF, Vi, and GT are determined by the active device employed, the device must be identified by all its compatible (F, Vi, and GT) performance triplets and their (ZS=Zout{IMC}, ZL=Zin{IMC}) terminations (Figure 1). Here the (ZS,ZL) terminations are the simultaneous solutions of the following nonlinear performance equations of the transistor subject to the physical realization conditions:(1)F=S/NiS/NO=FRS,XS=Fmin⁡+RNZopt2ZS-Zopt2RS.(2)Vi=ViRS,XS,RL,XL=1+ρi1-ρi,ρi=ZS-Zin∗ZS+Zin.(3)GT≜PLPAVS=GRS,XS,RL,XL=4RSRLz212z11+ZSz22+ZL-z12z212.Here the physical realization conditions can be expressed as follows:(4)ReZin=Rez11-z12z21z22+ZL>0.(5)ReZout=Rez22-z12z21z11+ZS>0.(6)F≥Fmin⁡,Vi≥1,GTmin⁡<GT≤GTmax⁡,where zij=rij+jxij, i,j=1,2, are the open-circuited parameters of the transistor and the conditions given by (4) and (5) ensure the stable operation of the active device.Figure 1
Low noise amplifier withT-type microstrip line matching networks.The simultaneous solution(ZS,ZL) sets of the nonlinear performance equations (1), (2), and (3) subject to the physical realization conditions given by (4), (5), and (6) are obtained in the three main steps which are determinations of (i) the Possible Solution Region (PSR); (ii) the Unconditionally Stable Working Area (USWA); (iii) Variations of the Constrained Gain in the USWA. Finally, the Possible Solution Region (PSR) and the Unconditionally Stable Working Area (USWA) are gathered together with the Variations of the Constrained Gain in the input impedance Zin plane and the resulted configuration may be called “design configuration” which is dependent on the device operation parameters of the frequency f, bias condition IDS, VDS.


### 2.2. The Possible Solution Region (PSR)

Examination of the nonlinear performance equations (1), (2), and (3) reveals, respectively, the following variations for the noise figure F, input VSWR Vi, and gain GT in the ZS plane taking ZL as a control parameter:(i) All the sourceZS=RS+jXS terminations that satisfy F{RS,XS}=Freq=const. in (1) take place on the circle in the ZS plane whose equation is(7)Zs-Zcn=rn,where Zcn and rn are the center and radius of the noise circle which can be, respectively, given by [8](8)Zcn=Ropt+N+jXopt,rn=NN+1+2Ropt,where Zopt=Ropt+jXopt is the source termination providing the minimum noise figure to the transistor and the real constant N is described in terms of the noise parameters such that(9)N≜Freq-Fmin⁡2RnZopt2.Here when Freq=Fmin, then N=0, rn=0, and the noise circle becomes a point of the optimum noise impedance Zopt. While Freq>Fmin, the centers shift to the right on the X=Xopt line and the radii increase according to (8).(ii) All the sourceZS=RS+jXS terminations that satisfy Vi=ViRS,XS,RL,XL=Vireq=const for a fixed passive load ZL take place on the circle of(10)ZS-Zcv=rv,where Zcv is the center phasor and rv is the radius of(11)Zcv=1+ρin21-ρin2Rin-jXin,rv=2ρin1-ρin2Rin.AVi=Vireq circle corresponds to a constant gain circle for a fixed load ZL, which can be expressed using (2) and (3) as(12)GT=1-ρin2RLRinz212z22+ZL2.Therefore, only the required noise and the input VSWR circles are sufficient to be taken into account in theZS plane. As already seen from (7), (8), and (9), while the required noise circle is fixed in the ZS plane, the required input VSWR circle can travel, depending on the load impedance ZL, via the input impedance Zin in a manner given by the center and radius relations in equation given by (11). Thus, the following situations are possible to obtain using the load impedance ZL as the control parameter: these circles may not touch which corresponds to the no-solution case, they become tangential, or they cut each other [8]. In the following step, each of these positions is mapped into the Zin plane.(iii) The equations of theT1 and T2 boundary circles between the solution and no-solution regions in the Zin plane can be obtained from mapping of the external and internal tangential positions of the VSWR circle with respect to the noise circle, respectively, from the ZS plane as follows:(13)Zcn-Zcv2=rn±rv2.SubstitutingZcn, Zcv, rn, and rv from (8), (9), and (11) into the (13), the center phasors Zct1, Zct2 and radii rt1, rt2 of the T1 and T2 circles can be obtained, respectively, as(14)Zct1=RcnU+rnV-jXopt.(15)rt1=Zct12-Zopt2.⟺T1circle⟺Region 2(16)Zct2=RcnU-rnV-jXopt.(17)rt2=Zct22-Zopt2.⟺T2circle⟺Region 4,where U and V stand for(18)U≜1+ρin21-ρin2,V≜ρin1-ρin2.As seen from (14) and (16), the centers of the T1 and T2 circles lie on the same imaginary axis, which is X=-Xopt, and it can also be proved using (14)–(17) that circle T2 is always situated inside circle T1 without touching as shown in Figure 2.Figure 2
The full-moon USWA for the unconditional stability case is at the right hand side of theZin plane.All theZin values ensuring intersection positions of both the noise and input VSWR circles in the ZS plane are situated in Region 3 between the T1 and T2 circles in the Zin plane, which is shown in Figures 2 and 3. The remaining regions numbered 1 and 5, which are the outermost and innermost regions, respectively, are impossible solution regions that include Zin values controlling all the nontouching positions in the ZS plane (Figures 2 and 3).Figure 3
The crescent USWA for the conditional stability case takes place at left hand side of theZin plane.In order to satisfy the physical realization conditions given by (4), (5), and (6), the Unconditionally Stable Working Area (USWA) and the gain circles constrained by the Vireq must also be constructed in the Zin plane; thus the design configuration will have been formed in the Zin plane.


### 2.3. Design Configuration and Compatible Performance(F,Vi,GT) Triplets

There are two types of the design configuration depending on the stability condition of the device:(i) Design configuration for the absolutely stable device: the necessary and sufficient conditions for this case are as follows:(19)r11>0,r22>0,2r11r22-r>z,z≜z12z21≜r+jx.Examination of the gain equation given in (12) under the constraints of (19) reveals the nonintersection geometry of Figure 2, where the input stability circle is the GT=0 circle, since it is the geometric place of the mapped load impedance in the purely reactive nature ZL=jXL. Using (12), one may obtain the centers and radii of the gain circles taking place inside the GT=0 circle which are, respectively, as follows:(20)Rcg=12r22Q-P,Xcg=12r222x11r22-x,(21)rg=1r22P2-2QP+z2,(22)P≜z1221-ρi2GT,Q≜2r11r22-r.It can be seen from (20)–(22) that Rcg decreases with the increase of GTreq≤GTmax when Xcg remains constant (Figure 2) and the GTmax is only achieved at the point where the rg equals zero. Setting rg to zero in (21) gives(23)GTmax⁡=Q-Q2-z21-ρi2z122.Zimax⁡=Zcgmax⁡=Rcgmax⁡+jXcg.Rcgmax⁡=1r22Q2-z2.The minimum gain limit circle is theGT=0 circle input stability circle whose center phasor Zcgmin=Rcgmin+jXcgmin and rgmin can be given as follows:(24)Rcgmin⁡=Q2r22,Xcgmin⁡=Xcg,rgmin⁡=z2r22.BecauseQ is greater than z for the absolutely stable device, Rcgmin is greater than rgmin⁡, which results in a nonintersection geometry with the GT=0 circle being entirely in the right half of the Zin plane with the positive real part and enclosing all the circles for GT>0 (Figure 2). The region inside of the GT=0 circle is the Unconditionally Stable Working Area (USWA); since the device is unconditionally stable, all the compatible (F,Vi,GT) triplets take place in the intersection area between the PSR and USWA and any selection criteria to establish the design target space can be applied to them.(ii) Design configuration for the conditionally stable device: in the case of the conditionally stable transistor, the USWA takes place between the input stability circle which is theGT=0 circle and the arc of the conjugate of the stability circle remaining in the right half of the Zin plane (Figure 3). The constrained gain formula equation (12) can be rearranged in terms of the radius and center of the source plane stability circle as(25)Zi2+2RCS+SRi+2XCSXi+ZCS2-rS2=0,(26)S≜z122GT2r221-ρi2,(27)RCS=-2r11r22-r2r22,XCS=2x11r22-r2r22,rS=z2r22.The features of the GT circles, which can be derived from (25)–(27), can briefly be expressed as follows (Figure 3):(a) AllGT circles cut the imaginary axis at the same points, which are the intersection points of the conjugate of the source plane stability circle with the same axis.(b) TheGT=0 circle whose center is Zcgmin=-Rcs-jXcs with rgmin=rs is symmetrical with the conjugate of the stability circle with respect to the imaginary axis.(c) TheGTmax>GT>0 circles always take place in the USWA. As the absolute stability case, all the compatible (F,Vi,GT) triplets take place in the intersection area between the PSR and USWA.(d) In the conditional stability case, the maximum gain will be obtained on the arc of the conjugate stability circle remaining in the right half of theZin plane. The maximum gain subject to the Vi can be found by substituting Rcg=Rcs in (27):(28)GTmax⁡=21-ρi2z122.We have the Maximum Stable Gain (MSG)(29)MSG=2z21z12η,η≜2r11r22-rz,where η is the stability factor with the values between zero and unity (0>η>1).


## 2.1. Compatible(F,Vi,GT) Triplets and the (ZS,ZL) Terminations

In a typical design problem of a basic microwave amplifier employing per se a FET as an active device, the active device can be represented by a two-port circuit. Since in such a system all the main performance components ofF, Vi, and GT are determined by the active device employed, the device must be identified by all its compatible (F, Vi, and GT) performance triplets and their (ZS=Zout{IMC}, ZL=Zin{IMC}) terminations (Figure 1). Here the (ZS,ZL) terminations are the simultaneous solutions of the following nonlinear performance equations of the transistor subject to the physical realization conditions:(1)F=S/NiS/NO=FRS,XS=Fmin⁡+RNZopt2ZS-Zopt2RS.(2)Vi=ViRS,XS,RL,XL=1+ρi1-ρi,ρi=ZS-Zin∗ZS+Zin.(3)GT≜PLPAVS=GRS,XS,RL,XL=4RSRLz212z11+ZSz22+ZL-z12z212.Here the physical realization conditions can be expressed as follows:(4)ReZin=Rez11-z12z21z22+ZL>0.(5)ReZout=Rez22-z12z21z11+ZS>0.(6)F≥Fmin⁡,Vi≥1,GTmin⁡<GT≤GTmax⁡,where zij=rij+jxij, i,j=1,2, are the open-circuited parameters of the transistor and the conditions given by (4) and (5) ensure the stable operation of the active device.Figure 1
Low noise amplifier withT-type microstrip line matching networks.The simultaneous solution(ZS,ZL) sets of the nonlinear performance equations (1), (2), and (3) subject to the physical realization conditions given by (4), (5), and (6) are obtained in the three main steps which are determinations of (i) the Possible Solution Region (PSR); (ii) the Unconditionally Stable Working Area (USWA); (iii) Variations of the Constrained Gain in the USWA. Finally, the Possible Solution Region (PSR) and the Unconditionally Stable Working Area (USWA) are gathered together with the Variations of the Constrained Gain in the input impedance Zin plane and the resulted configuration may be called “design configuration” which is dependent on the device operation parameters of the frequency f, bias condition IDS, VDS.


## 2.2. The Possible Solution Region (PSR)

Examination of the nonlinear performance equations (1), (2), and (3) reveals, respectively, the following variations for the noise figure F, input VSWR Vi, and gain GT in the ZS plane taking ZL as a control parameter:(i) All the sourceZS=RS+jXS terminations that satisfy F{RS,XS}=Freq=const. in (1) take place on the circle in the ZS plane whose equation is(7)Zs-Zcn=rn,where Zcn and rn are the center and radius of the noise circle which can be, respectively, given by [8](8)Zcn=Ropt+N+jXopt,rn=NN+1+2Ropt,where Zopt=Ropt+jXopt is the source termination providing the minimum noise figure to the transistor and the real constant N is described in terms of the noise parameters such that(9)N≜Freq-Fmin⁡2RnZopt2.Here when Freq=Fmin, then N=0, rn=0, and the noise circle becomes a point of the optimum noise impedance Zopt. While Freq>Fmin, the centers shift to the right on the X=Xopt line and the radii increase according to (8).(ii) All the sourceZS=RS+jXS terminations that satisfy Vi=ViRS,XS,RL,XL=Vireq=const for a fixed passive load ZL take place on the circle of(10)ZS-Zcv=rv,where Zcv is the center phasor and rv is the radius of(11)Zcv=1+ρin21-ρin2Rin-jXin,rv=2ρin1-ρin2Rin.AVi=Vireq circle corresponds to a constant gain circle for a fixed load ZL, which can be expressed using (2) and (3) as(12)GT=1-ρin2RLRinz212z22+ZL2.Therefore, only the required noise and the input VSWR circles are sufficient to be taken into account in theZS plane. As already seen from (7), (8), and (9), while the required noise circle is fixed in the ZS plane, the required input VSWR circle can travel, depending on the load impedance ZL, via the input impedance Zin in a manner given by the center and radius relations in equation given by (11). Thus, the following situations are possible to obtain using the load impedance ZL as the control parameter: these circles may not touch which corresponds to the no-solution case, they become tangential, or they cut each other [8]. In the following step, each of these positions is mapped into the Zin plane.(iii) The equations of theT1 and T2 boundary circles between the solution and no-solution regions in the Zin plane can be obtained from mapping of the external and internal tangential positions of the VSWR circle with respect to the noise circle, respectively, from the ZS plane as follows:(13)Zcn-Zcv2=rn±rv2.SubstitutingZcn, Zcv, rn, and rv from (8), (9), and (11) into the (13), the center phasors Zct1, Zct2 and radii rt1, rt2 of the T1 and T2 circles can be obtained, respectively, as(14)Zct1=RcnU+rnV-jXopt.(15)rt1=Zct12-Zopt2.⟺T1circle⟺Region 2(16)Zct2=RcnU-rnV-jXopt.(17)rt2=Zct22-Zopt2.⟺T2circle⟺Region 4,where U and V stand for(18)U≜1+ρin21-ρin2,V≜ρin1-ρin2.As seen from (14) and (16), the centers of the T1 and T2 circles lie on the same imaginary axis, which is X=-Xopt, and it can also be proved using (14)–(17) that circle T2 is always situated inside circle T1 without touching as shown in Figure 2.Figure 2
The full-moon USWA for the unconditional stability case is at the right hand side of theZin plane.All theZin values ensuring intersection positions of both the noise and input VSWR circles in the ZS plane are situated in Region 3 between the T1 and T2 circles in the Zin plane, which is shown in Figures 2 and 3. The remaining regions numbered 1 and 5, which are the outermost and innermost regions, respectively, are impossible solution regions that include Zin values controlling all the nontouching positions in the ZS plane (Figures 2 and 3).Figure 3
The crescent USWA for the conditional stability case takes place at left hand side of theZin plane.In order to satisfy the physical realization conditions given by (4), (5), and (6), the Unconditionally Stable Working Area (USWA) and the gain circles constrained by the Vireq must also be constructed in the Zin plane; thus the design configuration will have been formed in the Zin plane.


## 2.3. Design Configuration and Compatible Performance(F,Vi,GT) Triplets

There are two types of the design configuration depending on the stability condition of the device:(i) Design configuration for the absolutely stable device: the necessary and sufficient conditions for this case are as follows:(19)r11>0,r22>0,2r11r22-r>z,z≜z12z21≜r+jx.Examination of the gain equation given in (12) under the constraints of (19) reveals the nonintersection geometry of Figure 2, where the input stability circle is the GT=0 circle, since it is the geometric place of the mapped load impedance in the purely reactive nature ZL=jXL. Using (12), one may obtain the centers and radii of the gain circles taking place inside the GT=0 circle which are, respectively, as follows:(20)Rcg=12r22Q-P,Xcg=12r222x11r22-x,(21)rg=1r22P2-2QP+z2,(22)P≜z1221-ρi2GT,Q≜2r11r22-r.It can be seen from (20)–(22) that Rcg decreases with the increase of GTreq≤GTmax when Xcg remains constant (Figure 2) and the GTmax is only achieved at the point where the rg equals zero. Setting rg to zero in (21) gives(23)GTmax⁡=Q-Q2-z21-ρi2z122.Zimax⁡=Zcgmax⁡=Rcgmax⁡+jXcg.Rcgmax⁡=1r22Q2-z2.The minimum gain limit circle is theGT=0 circle input stability circle whose center phasor Zcgmin=Rcgmin+jXcgmin and rgmin can be given as follows:(24)Rcgmin⁡=Q2r22,Xcgmin⁡=Xcg,rgmin⁡=z2r22.BecauseQ is greater than z for the absolutely stable device, Rcgmin is greater than rgmin⁡, which results in a nonintersection geometry with the GT=0 circle being entirely in the right half of the Zin plane with the positive real part and enclosing all the circles for GT>0 (Figure 2). The region inside of the GT=0 circle is the Unconditionally Stable Working Area (USWA); since the device is unconditionally stable, all the compatible (F,Vi,GT) triplets take place in the intersection area between the PSR and USWA and any selection criteria to establish the design target space can be applied to them.(ii) Design configuration for the conditionally stable device: in the case of the conditionally stable transistor, the USWA takes place between the input stability circle which is theGT=0 circle and the arc of the conjugate of the stability circle remaining in the right half of the Zin plane (Figure 3). The constrained gain formula equation (12) can be rearranged in terms of the radius and center of the source plane stability circle as(25)Zi2+2RCS+SRi+2XCSXi+ZCS2-rS2=0,(26)S≜z122GT2r221-ρi2,(27)RCS=-2r11r22-r2r22,XCS=2x11r22-r2r22,rS=z2r22.The features of the GT circles, which can be derived from (25)–(27), can briefly be expressed as follows (Figure 3):(a) AllGT circles cut the imaginary axis at the same points, which are the intersection points of the conjugate of the source plane stability circle with the same axis.(b) TheGT=0 circle whose center is Zcgmin=-Rcs-jXcs with rgmin=rs is symmetrical with the conjugate of the stability circle with respect to the imaginary axis.(c) TheGTmax>GT>0 circles always take place in the USWA. As the absolute stability case, all the compatible (F,Vi,GT) triplets take place in the intersection area between the PSR and USWA.(d) In the conditional stability case, the maximum gain will be obtained on the arc of the conjugate stability circle remaining in the right half of theZin plane. The maximum gain subject to the Vi can be found by substituting Rcg=Rcs in (27):(28)GTmax⁡=21-ρi2z122.We have the Maximum Stable Gain (MSG)(29)MSG=2z21z12η,η≜2r11r22-rz,where η is the stability factor with the values between zero and unity (0>η>1).


## 3. SVRM Model of Microstrip Line

In this section, SVRM model of a microstrip line is presented. It is significant that SVRM model of microstrip line is as fast as analytical formulation and is highly accurate like 3D numerical simulations. The mathematical background and detailed theory of SVRM are explained in previous work [7]. In this study, epsilon SVR [16] is employed as SVM type and radial basis function is performed as kernel type. Input variables of model are line width (W), frequency (f), height (h), and relative permittivity (εr) of substrate material and corresponding output variables are characteristic impedance (Z0) and effective relative permittivity (εeff). Because each machine has one output, there are two machines with the same inputs.First of all, coarse model of microstrip line, which has a training data set acquired from quasi-TEM analytical formulations, is formed. Input and output variable values of training data set are given in Table1. Furthermore, support vectors (SVs) and accuracy of coarse model are shown for different epsilon values in Table 2. The obtained support vectors are used to form training data set of fine model, such that these SVs are chosen as input variables of training data and output data is calculated with 3D electromagnetic simulator, as seen in Figure 4. Therefore, either training data number is reduced or duration of data set forming is shortened. The same SVR model and kernel type are used for fine model training. According to results of fine model, accuracy of characteristic impedance and effective permittivity are %99.4 and %99, respectively, and it is also 400 times faster than 3D EM simulator for 2.3 GHz CPU and 2 GB memory. As an example, Figure 5 shows characteristic impedance and effective relative permittivity variations subject to width of line for fine model (εr=2.94, h=0.762 mm). Consequently, expeditious and highly accurate model of microstrip line is ready to perform in optimization network.Table 1
The range of values for SVRM training data set for coarse model.
Parameters
Start value
Stop value
Interval
Width (W)
0.1 mm
4.6 mm
0.5 mm
Height (h)
0.1 mm
2.2 mm
0.7 mm
Permittivity (εr)
2
10
2
Frequency (f)
2 GHz
14 GHz
3 GHz
Characteristic impedance (Z0)
3 ohms
240 ohms
Effective permittivity (εeff)
1.5
9.7Table 2
SVRM parameters for coarse model.
γ
C
Epsilon (ϵ)
Number of “Z0” SVs
Accuracy
0.001
10000
0.05
583
%99.4
0.001
10000
0.07
402
%98.6
0.001
10000
1
279
%97.9Figure 4
Cost effective 3D EM simulation-based Support Vector Microstrip Modeling.Figure 5
Comparative variations of characteristic impedance and effective dielectric constant versus width of the fine model and the 3D EM simulation on the substrateεr=2.94, h=0.762 mm at f=6 GHz.


## 4. Optimization

During the design optimization process, determining widths and lengths of microstrip lines in input and output matching network is objected, so that IMC and OMC provide source and load impedance which are obtained from performance characterisation of employed transistor (NE3512S02) for minimum noiseFreq(ω)=Fmin, maximum gain GTreq(ω)=GTmax, and Vireq(ω)=1.85 input VSWR. For this purpose, gains of the input/output matching circuits (GT) terminated by the ZStr∗(ω) and the ZLtr∗(ω) are maximized all over the requested operation band (Breq), as seen in Figure 1. In order to do that, the cost function is chosen as minimization of(30)cost⁡W→,l→=∑i=1N1-GTW→,l→,ωi,where(31)GT=4RSRLAZL+B+ZSCZL+D2,Wl≤Wi≤Wu,ll≤li≤lu;i=1,…,Λ,where A, B, C, D, ZS, and ZL parameters of matching circuit configurations are calculated using the cost effective SVRM model of the microstrip line given in Section 3 for chosen substrate (εr,h). Also, N is the number of the sampled frequencies within the bandwidth and is the element number of the matching circuit.PSO algorithm is performed to minimize the cost function given by (30) with respect to the microstrip widths and lengths. PSO is a population based optimization method for an N-dimensional problem; the position and velocity of each particle can be specified by M×N matrices, where M is the number of particles in the swarm.Firstly, physical parameters, which are geometric limits of matching circuits, and convergence parameters, which are tolerance parameter (τ) and maximum iteration number (κmax), of the algorithm are assigned. In the updating process, position, velocity, personal best, and global best matrices are launched randomly. For each iteration, cost function value is calculated for each particle and these values are used to determine each particle’s personal best and global best value of the swarm. The algorithm ends when either the error or the iteration number reaches its assigned value. Comprehensive design optimization algorithm of the amplifier is depicted in Figure 6.Figure 6
Block diagram of the performance characterisation-based design optimization of the matching circuits with the cost effective 3D EM-based Support Vector Microstrip Model.


## 5. Design Example and Measurement

As a test vehicle of the presented methodology, the worked design example of typical wideband, low noise amplifiers using theT-types of microstrip matching circuits will be given. In design example, transistor NE3512S02 is used and Figure 7 gives the maximum gain variations constrained by the minimum noise figure, resulted from its performance characterisation at VDS=2V and IDS=20 mA. From Figure 7, it is understood that there is no solution all over the operation band for every Vi value and Vi=1.85 is the most appropriate solution for both flat gain and mismatching as little as possible. In the design optimization process, the performance (Freq(ω)=Fmin(ω), Vireq(ω)=1.85, and GTreq(ω)=GTmax(ω)) triplet within the bandwidth of 3 GHz ≤ f ≤ 8 GHz at the bias condition of VDS=2V and IDS=20 mA is required as a design target and the real and reactive parts of the corresponding source and load terminations obtained by performance characterisation are trying to satisfy with matching circuits. As substrate material, RO 6002 is used {εr=2.94,h=0.762mm,tan⁡δ=0.002,t=0.035mm}. In order to provide ultra-wideband DC bias of the transistor, ADCH-80A+ RF choke [17] is used in T-type of microstrip MCs, as seen in Figure 1. Moreover, in our PSO application, convergence happens between 150 and 300 iterations depending on the initialization values taking 2 minutes 37 seconds and 4 minutes 33 seconds, respectively, using 50 particles with 2.3 GHz CPU Processor, 2 GB RAM. After so many trials, best particles number is chosen as 50 for this application. Besides, PSO convergence parameters and maximum iteration number are taken as 0.005 and 300, respectively. Figure 8 shows convergence curve of cost function, where the convergence typically occurs within 200 numbers of iterations. After optimization process the designed amplifier is fabricated and measured. Picture of the manufactured ultra-wideband LNA is given in Figure 9 and the optimum values for the T-types of microstrip widths and lengths {W→,l→} are found in Table 3. Furthermore the performances of the synthesized amplifier are compared using a microwave system circuit simulator and verified to agree with each other. Thus the targeted, synthesized, simulated, and measured performance ingredients gain, Vi, Vout, and noise with respect to the frequency are given for the amplifiers with the T-types of microstrip matching circuits in Figures 10, 11, 12, and 13, respectively.Table 3
Solution space for the (T-T) IMC and OMC elements.
W
1 (mm)
W
2 (mm)
W
3 (mm)
W
4 (mm)
W
5 (mm)
W
6 (mm)
2,4
0,25
0,25
0,75
0,25
3
l
1 (mm)
l
2 (mm)
l
3 (mm)
l
4 (mm)
l
5 (mm)
l
6 (mm)
4,25
14,5
2,5
13
6,5
15,75Figure 7
Maximum transducer gain for different input VSWR (VDS=2V, IDS=20 mA, and Freq=Fmin dB).Figure 8
Cost function convergence curve.Figure 9
Fabricated UWB low noise amplifier.Figure 10
Comparative results for transducer gain of designed amplifier.Figure 11
Comparative results for input VSWR of designed amplifier.Figure 12
Comparative results for output VSWR of designed amplifier.Figure 13
Comparative results for noise figure of designed amplifier.


## 6. Conclusions

In this work, the highly nonlinear design optimization problem of the linear regime microwave amplifiers is solved by a systematic and efficient methodology in which each constituent of the optimization procedure is defined on the rigorous mathematical bases. First of all, identification of transistor is based upon the potential performance of the employed transistor in the form of interrelations among the operation parameters(f,VDS,IDS) and performance measure functions, gain, input VSWR, and noise, built by using the linear circuit and noise theories. Thus, this will enable the designer to choose the most proper compatible {noise F(ω)≥Fmin(ω), input VSWR Vin(ω)≥1, gain GTmin(ω)>GT(ω)≥GTmax(ω), bandwidth B} quadrate as being aware of its advantages and disadvantages. The necessary source ZS(ω) and load ZL(ω) terminations will also be provided so that the multiobjective optimization is reduced into the two separate single objective scalar optimization processes within a design variable space subject to the technological limits. Another significant contribution of this work is to provide a fast, accurate, and cost effective model employing novel soft technology facilities in which the characteristic impedance Z0 and the dielectric constant εeff of the equivalent transmission line are expressed as the continuous functions to be used in the updating process. In this work, the 3D EM-based SVRM analysis model of the microstrip line has been provided to be used in the updating process. In the modelling process, the substantial reduction (by up to %60) is obtained utilizing sparseness of the standard SVRM in the number of expensive fine discretization training data with the negligible loss in the predictive accuracy in conjunction with the quasi-TEM microstrip synthesis formulae as the coarse data generator that allow identifying the regions of the design space requiring denser sampling. Besides, any convenient algorithm using either gradient or no gradient can be employed for the updating processes; in our case PSO is used for the accuracy and fast convergence.Finally as the worked example, this design methodology is applied to the design of typical wideband low noise amplifiers of the transistor NE3512S02 on the dielectric substrate{εr=2.94,h=0.762mm,tan⁡δ=0.002,andt=0.035mm} within 3 GHz and 8 GHz satisfying {Fmin(f),Vin=1.85,GTmax(f)} triplet using T-type of microstrip matching circuits. After that, the designed amplifier is manufactured and measured. Both simulated and measured results validate the predicted design with good agreement. It is concluded that this method, which is highly accurate as 3D EM simulator and fast as analytical solution, can also be applied as a robust method for the design and analysis of any microstrip amplifier synthesis.



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*Source: 374325-2015-10-01.xml*