# High-Input Impedance Voltage-Mode Multifunction Filter with Four Grounded Components and Only Two Plus-Type DDCCs

Authors: Hua-Pin Chen
Journal: Active and Passive Electronic Components
 (2010)

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## Abstract

This paper introduces a novel voltage-mode multifunction biquadratic filter with single input and four outputs using two plus-type differential difference current conveyors (DDCCs) and four grounded passive components. The filter can realize inverting highpass, inverting bandpass, noninverting lowpass, and noninverting bandpass filter responses, simultaneously. It still maintains the following advantages: (i) using grounded capacitors attractive for integration and absorbing shunt parasitic capacitance, (ii) using grounded resistors at allX
terminals of DDCCs suitable for the variations of filter parameters and absorbing series parasitic resistances at all X terminals of DDCCs, (iii) high-input impedance good for cascadability, (iv) no need to change the filter topology, (v) no need to component-matching conditions, (vi) low active and passive sensitivity performances, and (vii) simpler configuration due to the use of plus-type DDCCs only. HSPICE and MATLAB simulations results are provided to demonstrate the theoretical analysis.


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## Body

## 1. Introduction

As a current-mode active device, the differential difference current conveyor (DDCC) has the advantages of both the second-generation current conveyor (CCII) (such as large signal bandwidth, great linearity, wide dynamic range) and the differential difference amplifier (DDA) (such as high-input impedance and arithmetic operation capability) [1]. This element is a versatile building block whose applications exist in the literature [1–7]. Voltage-mode active filters with high-input impedance are of great interest because several cells of this kind can be directly connected for implementing higher-order filters [3–11]. In 2003, Chang and Chen proposed a universal voltage-mode filter with three inputs and a single output [2]. The circuit can realize all five different generic filtering responses but only highpass and bandpass responses have the advantage of high-input impedance. In 2004, Horng et al. proposed a multifunction filter with a single input and three outputs [3]. The circuit can realize highpass, bandpass, and lowpass responses, simultaneously. However, it is based on two minus-type DDCCs. In 2005, Ibrahim et al. proposed two single DDCC biquads with high-input impedance and minimum number of passive elements [4]. The highpass, bandpass, or lowpass filter responses cannot be realized in the same configuration. In 2007, Chiu and Horng proposed a universal voltage-mode filter with three inputs and a single output [5]. The circuit has high-input and low-output impedance advantages but it uses three plus-type DDCCs. In the same year, Chen proposed a universal voltage-mode filter based on two plus-type DDCCs [6]. The proposed configuration suffers from high-input impedance. Recently, Horng proposed another universal voltage-mode filter with three inputs and five outputs [7]. However, it still uses three plus-type DDCCs. In this paper, a new voltage-mode multifunction biquadratic circuit with single input and four outputs is presented. The proposed circuit employs only two plus-type DDCCs, two grounded capacitors, and two grounded resistors. It has the same advantages reported by Horng et al. [3], such as realization of highpass (HP), bandpass (BP), and lowpass (LP) filter responses from the same configuration, no requirements for component-matching conditions, the use of only grounded capacitors and resistors, high-input impedance, and low active and passive sensitivity performances. Moreover, the proposed circuit is simpler in configuration than the old circuit, since the use of only plus-type of DDCC is simpler than minus-type one like a CCII [11].


## 2. Circuit Description

The DDCC is a five-terminal analog building block and its terminal relations are given byIY1=IY2=IY3=0, VX=VY1-VY2+VY3, and IZ=IX [1]. The proposed multifunction biquadratic circuit comprises two plus-type DDCCs, two grounded capacitors, and two grounded resistors, as shown in Figure 1. The use of grounded capacitors makes the circuit suitable for integration because grounded capacitor circuit can compensate for the stay capacitances at their nodes [12, 13]. Derived by each nodal equation of the proposed, the input-output relationship matrix form of Figure 1 can be expressed as(1)[sC10-G10G2sC2001-1101001][Vo1Vo2Vo3Vo4]=[00-Vin0],
where G1=1/R1 and  G2=1/R2.Figure 1
The proposed high-input impedance voltage-mode multifunction biquad based on plus-type DDCCs.To derive (1), all the Y1, Y2, and Y3 terminals of DDCC are high-impedance terminals, since they are connected to gates of MOS devices in actual implementation, whereas the port X is low-impedance terminal [1]. Similarly the port Z+ also exhibits high impedance since it is connected to the output stage of current mirror. From (1), the following four output voltages can be derived as(2)Vo1Vin=-sC2G1s2C1C2+sC2G1+G1G2,Vo2Vin=G1G2s2C1C2+sC2G1+G1G2,Vo3Vin=-s2C1C2s2C1C2+sC2G1+G1G2,Vo4Vin=sC2G1s2C1C2+sC2G1+G1G2.Thus, we can obtain an inverting BP, a non-inverting LP, an inverting HP, and a non-inverting BP filter response at the output voltages;Vo1, Vo2, Vo3, and Vo4, respectively. In order to realize allpass and bandstop filter functions, the unity gain voltage difference amplifier is needed. Due to the fact that input voltage signal is connected directly to the Y2 port of the DDCC(1) and input current to the Y2 port is zero, the circuit has the feature of high-input impedance. The employs of only plus-type DDCCs simplify the circuit configuration.The resonance angular frequencyωo, quality factor Q, and bandwidth BW are given by (3)ωo=1R1R2C1C2,Q=R1C1R2C2,BW=ωoQ=1R1C1.
Equation (3), the parameters ωo, and BW can be orthogonally adjusted by resistor R1 while the orthogonal tuning ωo and Q can be achieved by simultaneous adjustment of R1 and R2 such that R1=R2. It must be noted that the use of grounded resistors in the proposed circuit will benefit by an easier electronic tunability. Thus, for the case of R1=R2 can be solved by using two MOSFETs to replace R1 and R2 with its gate connected by the same voltage control [14, 15]. Several realizations of tunable grounded resistors exist in the literature [16, 17].


## 3. Effect of Nonidealities

Take into account the nonidealities of a DDCC, namely,VX=RXIX+βVY1-γVY2+ηVY3 and IZ=αIX, where RX,  α,  β,  η, and γ are the intrinsic resistance at the X terminal, the parasitic current gain at the X terminal to the Z terminal, the parasitic voltage gain at the Y1 terminal to the X terminal, the parasitic voltage gain at the Y2 terminal to the X terminal, and the parasitic voltage gain at the Y3 terminal to the X terminal, respectively. These parasitic components limit the high-frequency operation of the circuit and can be modeled with the following first-order functions [18]:(4)α=αo1+ταs,β=βo1+τβs,γ=γo1+τγs,η=ηo1+τηs.In (4), the pole frequencies  ωα=1/τα,  ωβ=1/τβ,  ωγ=1/τγ, and ωη=1/τη depend on the technological parameters and ideally approach infinity. The operation frequency of the presented filter can be defined as f≪min{ωα,ωβ,ωγ,ωη}. In addition, the dc gain αo,  βo,  γo, and ηo  are ideally equal to unity and can be expressed as αo=1-εα, βo=1-εβ, γo=1-εγ, and ηo=1-εη, where εβ,  εγ, and εη are the voltage tracking errors, and εα is the current tracking error in addition to|εβ|≪1, |εγ|≪1, |εη|≪1, and |εα|≪1. Taking into account the nonidealities, the denominator of the transfer functions of Figure 1 becomes(5)D(s)=s2C1C2+αo1ηo1γo2sC2G1′+αo1αo2βo1γo2G1′G2′.
The nonideal resonance angular frequency ωo and quality factor Q are obtained by(6)ω0=αo1αo2βo1γo2G1′G2′C1C2,Q=1ηo1αo2βo1C1G2′αo1γo2C2G1′.A sensitivity study forms an important index of the performance of any active network. The formal definition of sensitivity isSxF=(x/F)(∂F/∂x), where F represents one of ωo, Q and x represents any of the elements (G1′-G2′, C1-C2) or the active parameters (αi, βi, γi, ηi). Based on the sensitivity expression, the active and passive sensitivities of the proposed circuit shown in Figure 1 are given as(7)Sαo1,αo2,βo1,γo2ωo=SG1′,G2′ωo=-SC1,C2ωo=12,Sαo2,βo1Q=SC1,G2′Q=-Sαo1,γo2Q=-SC2,G1′Q=12,Sηo1Q=-1.
Hence, the filter parameter sensitivities are low and not larger than unity in absolute value.


## 4. Simulation Results

The device model parameters used for the HSPICE simulations are TSMC 0.35μm CMOS 2P4M process and MATLAB for the theoretical part to compare the results. The CMOS implementation of the differential difference voltage current conveyor is shown in Figure 2 [4]. The NMOS and PMOS transistor aspect ratios are given by W/L=2.5 μm/0.5 μm and W/L=10 μm/0.5 μm, respectively. The supply voltages are VDD=-VSS=1.65 V, and the biasing voltages of Vb1 and Vb2 are –0.1 V and –0.8 V, respectively. The proposed circuit was designed for fo=1 MHz and Q=1 by choosing R1=R2=50 kΩ and C1=C2=3.18 pF. Figure 3 shows the simulated results amplitudes for HP, LP, and two BP filter responses of Figure 1. The total power dissipation is found to be 0.52 mW. As can be seen, there is a close agreement between theory and simulation.Figure 2
CMOS implementation of the plus-type DDCC.Figure 3
Simulated frequency responses of highpass, bandpass, and lowpass of Figure1 at  fo=1 MHz  and Q=1.The noise behavior of the filter was simulated using the INOISE and ONOISE statements of frequency responses of the BP response atVo4 output terminal. Figure 4 shows the simulated amplitude-frequency responses for the BP filter with INOISE- and ONOISE-designed R1=R2=31.8 kΩ and C1=C2=5 pF. The total equivalent input and output noise voltages are 13.8 mV and 0.48 mV, respectively.Figure 4
Equivalent output and input noise of the bandpass filter versus frequency.To test the input dynamic range of the filter, the simulation has been repeated for a sinusoidal input signal atfo=1 MHZ. Figure 5 shows the input dynamic range of the inverting BP response at Vo1 output terminal with R1=R2=50 kΩ and C1=C2=3.18 pF, which extends up to amplitude of 0.7 V (peak to peak) without signification distortion. The dependence of the output harmonic distortion of BP filter on input voltage amplitude is illustrated in Figure 6. From Figure 6, we can see that the harmonic distortion rapidly increases if the input signal is increased beyond 0.7 V for the chosen DDCC implementation.Figure 5
The input and output waveforms of inverting BP response for a 1 MHz sinusoidal input of 0.7 V (peak to peak).Figure 6
THD variations of the BP filter versus amplitudes of the applied sinusoidal voltages at 1 MHz.


## 5. Conclusion

In this paper, the  author also proposes a new high-input impedance voltage-mode multifunction  biquadratic filter. This circuit offers several advantages, such as no requirements for component-matching conditions, the use of only grounded passive components, high-input impedance, and low active and passive sensitivity performances. The proposed circuit has the same advantages reported by [3] which is using two minus-type DDCCs, two grounded capacitors, and two grounded resistors. Moreover, the proposed circuit is simpler in configuration than the old circuit, since the use of only plus-type of DDCCs is simpler than the use of the minus-type of DDCCs. In addition to inverting highpass, inverting bandpass, and non-inverting lowpass filter responses, the proposed circuit can also realize non-inverting bandpass filter response.



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*Source: 362516-2010-06-29.xml*