# DRV Evaluation of 6T SRAM Cell Using Efficient Optimization Techniques

Authors: Vinod Kumar Joshi; Chetana Nayak
Journal: Active and Passive Electronic Components
 (2018)

---

## Abstract

An optimization based method which uses bisection search algorithm has been proposed to evaluate the accurate value of Data Retention Voltage (DRV) of a 6T Static Random Access Memory (SRAM) cell using 45 nm technology in the presence of process parameter variations. Further, we incorporate an Artificial Neural Network (ANN) block in our proposed methodology to optimize the simulation run time. The highest values obtained from these two methods are declared as the DRV. We noted an increase in DRV with temperature (T) and process variations (PVs). The main advantage of the proposed technique is to reduce the DRV evaluation time and for our case, we observe improvement in evaluation time of DRV by ≈46, ≈27, and ≈8 times at 25°C for 3 σ, 4 σ, and 5 σ variations, respectively, using ANN block to without using ANN block.


---

## Body

## 1. Introduction

Memory structures are now present not just as stand-alone memory chips but also an integral part of complex VLSI systems [1]. SRAM plays a major role in random access memory design, but its leakage currents reduction has become a major concern in past decade. Various architectures of SRAM cell have been also proposed in this regard [2, 3]. The most straightforward and easier approach for reducing the leakage power is to reduce the supply voltage (Vdd) of the SRAM cell. Moreover, reducing it below a certain limit may result in the detrition of the stored data due to T and PVs. In SRAM cell, the critical Vdd above which a data-bit is retained reliably is called the DRV of the cell. Figure 1 shows the reduction of leakage current with the Vdd. Hence, operating the SRAM cell with the voltage higher than its DRV helps in reducing leakage current in standby mode [4]. However, some of the circuit mismatches result in the variation of the Vt of transistors, which causes shifts in the DRV value. Hence, accurate estimation of DRV is a major challenge in low power SRAM design [5, 6].Figure 1
Graph showing leakage current versusVdd [1, 4].Qin et al. developed an analytical model for DRV to get a substantial reduction in leakage current by suppressing theVdd to DRV [7]. The most straightforward method being used to obtain the DRV is by running Monte-Carlo (MC) simulations until a desired failure probability level is reached [8]. However, this method has many disadvantages.Since obtaining the failure point is a rare event which makes MC simulation time-consuming [9]. Another issue is the time to find a large number of samples to get the accurate value of the tail of the DRV distribution as shown in Figure 2(a). Importance sampling (mixture importance and sequential importance) methods are developed to improve the speed of simulation. These methods have been proved to be more effective than MC samples in obtaining the failure point [10–12]. Wang et al. proposed two methods to evaluate DRV [13]. In the first method, they propose a statistical model for DRV evaluation which uses the relationship between DRV and SNM. Mean and variance of the SNM distribution have been obtained using MC simulations, and DRV is evaluated as the value of the Vdd at which SNM reaches zero. In the second method, a generic tail model from recursive statistical blockage has been proposed. Postfabrication methods are also developed which uses canary replica cells [14, 15] and built-in self-test [16, 17] to obtain DRV. However, the optimization based method proposed by G. Huang et al. [18] has been claimed to be the fastest evaluation method to obtain DRV. He formulated DRV as a time domain worst performance bound problem and then multistart point (MSP) optimization strategy is developed to evaluate the failure bound.Figure 2
(a) DRV distribution obtained by statistical methods using 90 nm technology node for 10K-b SRAM [13]. (b) Schematic of conventional 6T SRAM cell [4].
(a) (b)We use MATLAB tool (version 2015b) to evaluate DRV using optimization based method. A MATLAB code is written for the node voltage equations (Q,QB) of MOSFET operating in the subthreshold region [19, 20]. Further, we use bisection search algorithm [21] to search the optimum Vdd, and SNM is evaluated using rotation algorithm [22]. PVs are incorporated by generating 5000 quasirandom samples for the Gaussian distribution of Vt. To reduce the time taken for evaluation, an ANN block is incorporated which predicts the value of SNM for a particular sample point. A set of DRV values are evaluated, and the corresponding histogram is plotted. The highest value of DRV obtained or the tail point of the histogram is considered as the DRV. The procedure used by us has not been claimed so far as per our knowledge. A basic 6T SRAM cell consists of two cross-coupled inverters and two access transistors (M5 and M6) are shown in Figure 2(b). M1 and M3 PMOS transistors are pull-up transistors while M2 and M4 NMOS transistors are known as pull-down transistors. During read or write operation word line (WL) is raised high (transistors M5 and M6 become on) while in hold mode (or retention mode) WL is made low (transistors M5 and M6 turn off) and SRAM store the data present in Q and QB nodes. The ability of the SRAM cell to hold the data in retention mode is determined by the SNM of the SRAM cell. The value of SNM is determined from the butterfly curve of the cell in hold mode. Butterfly curve is a plot of voltages (Q versus QB and QB versus Q), where Q and QB are the node voltages of SRAM cell as shown in Figure 3(a). SNM is evaluated as the length of the diagonal of the maximum square that can be incorporated in the butterfly curve. Figure 3(a) shows the butterfly curve plotted at Vdd = 1V and Figure 3(b) shows the butterfly curve drawn by varying Vdd. It can be observed from Figure 3(b) that the butterfly curve shrinks as the Vdd is reduced and the SNM of the cell reduces to zero at Vdd = 0.048 V.Figure 3
Butterfly curve to obtain the SNM of 6T SRAM cell in hold mode (a) atVdd = 1V (b) by varying Vdd.
(a) (b)


## 2. Proposed Method

The block diagram used for DRV evaluation has been shown in Figure4 with different colors. The evaluation procedure has four major blocks.(1)
Bisection search algorithm is used for optimizing the value ofVdd (blue color in Figure 4).(2)
Quasi MC sample generation block is used to incorporate process parameter variation or variation of the threshold voltage (Vt) (red color in Figure 4).(3)
Seevinck’s rotation algorithm is used for SNM evaluation (green color in Figure4).(4)
ANN block is used to optimize simulation time (yellow color in Figure4).Figure 4
General block diagram for DRV evaluation using optimization based method.


### 2.1. Bisection Search Algorithm [21]

This algorithm helps to evaluate the accurate value of the DRV by searching an optimum solution ofVdd at which the SRAM cell fails. First, we define a rough range of Vdd from 0 to 1 V based on the initial guess of the DRV. Suppose, if the range is defined as Vdd1 and Vdd2, the average between these two points is evaluated as Vddm and this value is used in the analysis phase to evaluate the SNM of the SRAM cell. If the SNM point is evaluated as zero under PVs, it means that the failure has occurred, which implies that the DRV is situated above Vddm and the point Vdd1 is replaced with Vddm. On the other hand, if the failure has not occurred, the DRV is located below Vddm and Vdd2 is replaced with Vddm. The process is repeated as the Vdd1 and Vdd2 values get updated. It is continued until the differenceΔ = Vdd2 - Vdd1 evaluates to be less than a defined tolerance (Tol = 0.001). Once this condition is met the process ends and the final value of Vdd2 (or Vdd1) is declared as the DRV. If the DRV is not located within the defined range, the process repeats for a new range. Table 1 represents the MOSFET constants assumed during the evaluation of SNM which is taken from the 45 nm Predictive Technology Model (PTM) [24].Table 1
MOSFET parameters used in MATLAB tool for SNM evaluation.
Parameter (unit) NMOS value PMOS value μ 0, Mobility (A/V2) μ 0 n = 0.04398 μ 0 p = 0.0044 t o x, Thickness of oxide (nm) t o x n = 1.75 t o x p = 1.85 ɛ r, Relative permittivity 3.9 3.9 n, Subthreshold slope factor n n = 1.042 n p = 1.042 W, Channel width (μm) W n = 0.12 W p = 0.14 L, Channel length (nm) 45 45 Mean ofVt variation (V) V t n = 0.466 V t p = -0.4118V


### 2.2. Quasi MC Sample Generation

The value of DRV largely depends onVt of the transistors,T, and channel length (L). Variation of these parameters affects the value of SNM and hence the DRV. We do the DRV evaluation only by varying Vt of transistors M1, M2, M3, and M4 as shown in Figure 2(b). These values are defined in a Gaussian range with particular mean and variance, and their samples are combined with the Quasi MC samples to obtain the seed points. We take 5000 Quasi MC samples for evaluation to get the better accuracy. The SNM is evaluated for each of these seed points generated by Sobol sequence, and failure analysis is done accordingly. The variance of the Gaussian distribution is calculated by Pelgrom model [25, 26],(1)σ=1.8mV∗μmW.Lwhere W is the width of MOSFET and L can be used from Table 1. Since during hold mode only transistors M1, M2, M3, and M4 are active, we have employed the variation only for these transistors, which is calculated in Table 2.Table 2
The variance ofVt variation (σ) is calculated using (1).
Transistors Variance ofVt variation (σ) NMOS 0.02449 V PMOS 0.0226 V


### 2.3. SNM Evaluation

We use theoretical equations developed for node voltages (Q, QB) to calculate the SNM using butterfly curve. These equations have been derived by Calhoun et al. which evaluate the node voltages by considering the characteristics of MOSFETS operating in the subthreshold region. The equation for QB is given by [19](2)QB=Vthnnnpnn+npln⁡IspIsn+ln⁡1-exp⁡-Vdd+Q/Vth1-exp⁡-Q/Vth+nn.Vddnn+np+nn.npnn+npVtnnn-Vtpnpwhere Isnand Isp are given by [27](3)Isn=μ0n.Coxn.Vth2.WnL.nn-1,(4)Isp=μ0p.Coxp.Vth2.WpL.np-1,where Vth =kT/q, thermal voltage, nn, np are subthreshold slope factor for NMOS and PMOS transistors, respectively, Isn, Ispare drain current (when VGS = Vt) for NMOS and PMOS transistors, respectively, Vdd is supply voltage, Vtn, Vtp are threshold voltage of NMOS and PMOS transistors, respectively, μ0n, μ0p are mobility of NMOS and PMOS transistors, respectively, Coxn, Coxpare oxide capacitance of NMOS and PMOS transistors, respectively, Wn,Wp are width of polysilicon for NMOS and PMOS transistors, respectively, andLis length of polysilicon.The subthreshold slope factor n is evaluated using (5) by evaluating subthreshold slope (S) [27],(5)S=n.Vth.ln⁡10The value ofS is found to be 60 mV/decade at roomT = 25°C. Its value for typical bulk CMOS can range from 70 to 120 mV/decade [28]. The value ofn is evaluated as 1.042 using (5) at roomT. The voltage at which node value Q equals QB is known as tripping voltage (Vm). It is the point where curves (Q versus QB and QB versus Q) intersect, as shown in Figure 3(a). Here, we assume the identical cross-coupled inverters to evaluate Vm. The relation of Vm for an inverter is given by (6) (by ignoring the Drain Induced Barrier Lowering (DIBL) effects) as follows [29]:(6)Vm=Vdd.nnnn+np+np.Vtn-nnVtpnn+np+nn.np.Vth.ln⁡Wp/L.Isp/Wn/L.Isnnn+np+nnnp.Vth.ln⁡1-exp⁡-Vdd+Vm/Vth/1-exp⁡-Vm/Vthnn+npAll the notations used for (6) are same as mentioned for (2), (3), (4), and (5).We use the graphical technique proposed by Seevinck [22] to calculate the SNM value as shown in Figure 5. The steps involved in this techniques are as follows:(1)
Obtain Q and QB samples using (2). Figure 6 shows the butterfly curve which is plotted using Q and QB samples for Vdd = 0.5V.(2)
Combine Q and QB set into a matrix, X.(3)
Multiply X with rotation matrix, i.e., [U  V′] = Rot∗[Q QB], where ∗ indicates matrix multiplication and Rot is the rotational matrix,(7)Rot=cos⁡π4-sin⁡π4sin⁡π4cos⁡π4New axis for the rotated curve is (U, V′). V1 is the matrix corresponding to V′.(4)
EvaluateV2 asV2 = -V1 + (2.2.Vm), where Vm is obtained using (6). (U, V1) is the rotated version of (Q, QB) and (U, V2) is the rotated version of (QB, Q). Figure 7(a) shows the rotated version of Figure 6.(5)
Take the difference betweenV2 andV1 samples, i.e.,Z =V2 - V1.(6)
Plot (U, Z) as shown in Figure7(b), and obtainS1 = -min (Z),S2 = max (Z), andS3 = min (S1, S2).(7)
Finally, SNM is evaluated as SNM =S3/2.Figure 5
General block diagram to evaluate the SNM using optimization method.Figure 6
Butterfly curve forVdd = 0.5V using optimization method.Figure 7
(a) Rotated butterfly curve atVdd = 0.5V. (b) Plot ofZ = V2-V1with respect toU.
(a) (b)For a particular value ofVdd and each and every sample of Quasi MC seed, the SNM is evaluated.


### 2.4. ANN Block

Artificial neural networks (ANNs) are a family of learning models that are used to estimate functions that depend on a large number of inputs. ANN is generally presented as system of interconnected “neurons” which exchange messages between each other. This functions approximately as a brain. It consists of three layers input variables, hidden nodes, and outputs. Inputs can be of any number and are provided in the initial learning phase. Outputs are the ones which are obtained after the analysis. During the process, many intermediate hidden nodes are created that are essential for optimizing. However, the user does not have any control over them. The optimization process includes two important stages [23]:(i)
Training or learning phase. This phase uses all the different input signals to predict the possible outcomes of outputs using cautious learning of previous experiments. These can be accomplished either by conducting a large number of experiments or by using values of the previously conducted experiments. These values will be stored and is used for the upcoming analysis phase.(ii)
Analysis phase. After learning all the calculation procedure from the previous phase, the network is now ready for successfully providing outputs for any inputs provided.For a 5000-sample space as mentioned in Section2.2, the process of SNM evaluation is time-consuming. Hence, an ANN block which has been trained to evaluate the SNM is used. This block evaluates the SNM for all the samples and then separates the samples having low SNM (SNM < 0.02V). Only these samples are now sent to the actual analysis block where the accurate value of SNM is evaluated using rotation algorithm.If the SNM = 0, the sample is declared as the failure sample. Input data set consists ofVt variations of M1, M2, M3, and M4 transistors and the Vdd. SNM is the output vector as shown in Figure 8. Fifty data sets are generated using SNM evaluation algorithm, and the network is trained using Radial Basis Function (RBF) network, which is explained in next subsection.Figure 8
General block diagram of ANN block.


#### 2.4.1. RBF Network [23]

An RBF network uses nonlinear functions to map inputs to the outputs into a high dimensional feature space. A general RBF network consists of three layers as shown in Figure9. The input layer with inputsxi (i = 1, 2,…m) where m is a number of input parameters. The hidden layer is generated by one-to-one correspondence between the training input data xi and the kernel functionK(x,xi) for i = 1, 2, …N, where N is the number of training samples [23]. In the third layer, the output is evaluated as the linear weighted sum of the kernel functions generated in the hidden layer. The following equations are used by the network:Figure 9
Schematic of RBF [23].(i) To evaluate kernel functionK (xi,xj),(8)Kxi,xj=exi-xj/2σ′2where xi,xj represent input vectors with i,j= 1, 2, …m. Here, σ′denotes the Gaussian bandwidth.(i) Weight vectorw is calculated by (9)K+λIw=ydHere K is the kernel matrix, I is the identity matrix of order N, λ is called the regularization parameter, and yd is the desired response vector.(ii) To evaluate output of the networky,(10)y=∑i=1NwiKx,xiwi is the ith (i = 1, 2,….N) element of the weight vector w and K(x, xi) is the kernel function.Kernel used for the control technique is an Exponential Radial Basis Function (ERBF). By considering this ANN block, a considerable reduction in the evaluation time is observed. Four different ANN blocks are generated to evaluate the DRV forT = 15°C, 25°C, 50°C, and 100°C, respectively.


## 2.1. Bisection Search Algorithm [21]

This algorithm helps to evaluate the accurate value of the DRV by searching an optimum solution ofVdd at which the SRAM cell fails. First, we define a rough range of Vdd from 0 to 1 V based on the initial guess of the DRV. Suppose, if the range is defined as Vdd1 and Vdd2, the average between these two points is evaluated as Vddm and this value is used in the analysis phase to evaluate the SNM of the SRAM cell. If the SNM point is evaluated as zero under PVs, it means that the failure has occurred, which implies that the DRV is situated above Vddm and the point Vdd1 is replaced with Vddm. On the other hand, if the failure has not occurred, the DRV is located below Vddm and Vdd2 is replaced with Vddm. The process is repeated as the Vdd1 and Vdd2 values get updated. It is continued until the differenceΔ = Vdd2 - Vdd1 evaluates to be less than a defined tolerance (Tol = 0.001). Once this condition is met the process ends and the final value of Vdd2 (or Vdd1) is declared as the DRV. If the DRV is not located within the defined range, the process repeats for a new range. Table 1 represents the MOSFET constants assumed during the evaluation of SNM which is taken from the 45 nm Predictive Technology Model (PTM) [24].Table 1
MOSFET parameters used in MATLAB tool for SNM evaluation.
Parameter (unit) NMOS value PMOS value μ 0, Mobility (A/V2) μ 0 n = 0.04398 μ 0 p = 0.0044 t o x, Thickness of oxide (nm) t o x n = 1.75 t o x p = 1.85 ɛ r, Relative permittivity 3.9 3.9 n, Subthreshold slope factor n n = 1.042 n p = 1.042 W, Channel width (μm) W n = 0.12 W p = 0.14 L, Channel length (nm) 45 45 Mean ofVt variation (V) V t n = 0.466 V t p = -0.4118V


## 2.2. Quasi MC Sample Generation

The value of DRV largely depends onVt of the transistors,T, and channel length (L). Variation of these parameters affects the value of SNM and hence the DRV. We do the DRV evaluation only by varying Vt of transistors M1, M2, M3, and M4 as shown in Figure 2(b). These values are defined in a Gaussian range with particular mean and variance, and their samples are combined with the Quasi MC samples to obtain the seed points. We take 5000 Quasi MC samples for evaluation to get the better accuracy. The SNM is evaluated for each of these seed points generated by Sobol sequence, and failure analysis is done accordingly. The variance of the Gaussian distribution is calculated by Pelgrom model [25, 26],(1)σ=1.8mV∗μmW.Lwhere W is the width of MOSFET and L can be used from Table 1. Since during hold mode only transistors M1, M2, M3, and M4 are active, we have employed the variation only for these transistors, which is calculated in Table 2.Table 2
The variance ofVt variation (σ) is calculated using (1).
Transistors Variance ofVt variation (σ) NMOS 0.02449 V PMOS 0.0226 V


## 2.3. SNM Evaluation

We use theoretical equations developed for node voltages (Q, QB) to calculate the SNM using butterfly curve. These equations have been derived by Calhoun et al. which evaluate the node voltages by considering the characteristics of MOSFETS operating in the subthreshold region. The equation for QB is given by [19](2)QB=Vthnnnpnn+npln⁡IspIsn+ln⁡1-exp⁡-Vdd+Q/Vth1-exp⁡-Q/Vth+nn.Vddnn+np+nn.npnn+npVtnnn-Vtpnpwhere Isnand Isp are given by [27](3)Isn=μ0n.Coxn.Vth2.WnL.nn-1,(4)Isp=μ0p.Coxp.Vth2.WpL.np-1,where Vth =kT/q, thermal voltage, nn, np are subthreshold slope factor for NMOS and PMOS transistors, respectively, Isn, Ispare drain current (when VGS = Vt) for NMOS and PMOS transistors, respectively, Vdd is supply voltage, Vtn, Vtp are threshold voltage of NMOS and PMOS transistors, respectively, μ0n, μ0p are mobility of NMOS and PMOS transistors, respectively, Coxn, Coxpare oxide capacitance of NMOS and PMOS transistors, respectively, Wn,Wp are width of polysilicon for NMOS and PMOS transistors, respectively, andLis length of polysilicon.The subthreshold slope factor n is evaluated using (5) by evaluating subthreshold slope (S) [27],(5)S=n.Vth.ln⁡10The value ofS is found to be 60 mV/decade at roomT = 25°C. Its value for typical bulk CMOS can range from 70 to 120 mV/decade [28]. The value ofn is evaluated as 1.042 using (5) at roomT. The voltage at which node value Q equals QB is known as tripping voltage (Vm). It is the point where curves (Q versus QB and QB versus Q) intersect, as shown in Figure 3(a). Here, we assume the identical cross-coupled inverters to evaluate Vm. The relation of Vm for an inverter is given by (6) (by ignoring the Drain Induced Barrier Lowering (DIBL) effects) as follows [29]:(6)Vm=Vdd.nnnn+np+np.Vtn-nnVtpnn+np+nn.np.Vth.ln⁡Wp/L.Isp/Wn/L.Isnnn+np+nnnp.Vth.ln⁡1-exp⁡-Vdd+Vm/Vth/1-exp⁡-Vm/Vthnn+npAll the notations used for (6) are same as mentioned for (2), (3), (4), and (5).We use the graphical technique proposed by Seevinck [22] to calculate the SNM value as shown in Figure 5. The steps involved in this techniques are as follows:(1)
Obtain Q and QB samples using (2). Figure 6 shows the butterfly curve which is plotted using Q and QB samples for Vdd = 0.5V.(2)
Combine Q and QB set into a matrix, X.(3)
Multiply X with rotation matrix, i.e., [U  V′] = Rot∗[Q QB], where ∗ indicates matrix multiplication and Rot is the rotational matrix,(7)Rot=cos⁡π4-sin⁡π4sin⁡π4cos⁡π4New axis for the rotated curve is (U, V′). V1 is the matrix corresponding to V′.(4)
EvaluateV2 asV2 = -V1 + (2.2.Vm), where Vm is obtained using (6). (U, V1) is the rotated version of (Q, QB) and (U, V2) is the rotated version of (QB, Q). Figure 7(a) shows the rotated version of Figure 6.(5)
Take the difference betweenV2 andV1 samples, i.e.,Z =V2 - V1.(6)
Plot (U, Z) as shown in Figure7(b), and obtainS1 = -min (Z),S2 = max (Z), andS3 = min (S1, S2).(7)
Finally, SNM is evaluated as SNM =S3/2.Figure 5
General block diagram to evaluate the SNM using optimization method.Figure 6
Butterfly curve forVdd = 0.5V using optimization method.Figure 7
(a) Rotated butterfly curve atVdd = 0.5V. (b) Plot ofZ = V2-V1with respect toU.
(a) (b)For a particular value ofVdd and each and every sample of Quasi MC seed, the SNM is evaluated.


## 2.4. ANN Block

Artificial neural networks (ANNs) are a family of learning models that are used to estimate functions that depend on a large number of inputs. ANN is generally presented as system of interconnected “neurons” which exchange messages between each other. This functions approximately as a brain. It consists of three layers input variables, hidden nodes, and outputs. Inputs can be of any number and are provided in the initial learning phase. Outputs are the ones which are obtained after the analysis. During the process, many intermediate hidden nodes are created that are essential for optimizing. However, the user does not have any control over them. The optimization process includes two important stages [23]:(i)
Training or learning phase. This phase uses all the different input signals to predict the possible outcomes of outputs using cautious learning of previous experiments. These can be accomplished either by conducting a large number of experiments or by using values of the previously conducted experiments. These values will be stored and is used for the upcoming analysis phase.(ii)
Analysis phase. After learning all the calculation procedure from the previous phase, the network is now ready for successfully providing outputs for any inputs provided.For a 5000-sample space as mentioned in Section2.2, the process of SNM evaluation is time-consuming. Hence, an ANN block which has been trained to evaluate the SNM is used. This block evaluates the SNM for all the samples and then separates the samples having low SNM (SNM < 0.02V). Only these samples are now sent to the actual analysis block where the accurate value of SNM is evaluated using rotation algorithm.If the SNM = 0, the sample is declared as the failure sample. Input data set consists ofVt variations of M1, M2, M3, and M4 transistors and the Vdd. SNM is the output vector as shown in Figure 8. Fifty data sets are generated using SNM evaluation algorithm, and the network is trained using Radial Basis Function (RBF) network, which is explained in next subsection.Figure 8
General block diagram of ANN block.


### 2.4.1. RBF Network [23]

An RBF network uses nonlinear functions to map inputs to the outputs into a high dimensional feature space. A general RBF network consists of three layers as shown in Figure9. The input layer with inputsxi (i = 1, 2,…m) where m is a number of input parameters. The hidden layer is generated by one-to-one correspondence between the training input data xi and the kernel functionK(x,xi) for i = 1, 2, …N, where N is the number of training samples [23]. In the third layer, the output is evaluated as the linear weighted sum of the kernel functions generated in the hidden layer. The following equations are used by the network:Figure 9
Schematic of RBF [23].(i) To evaluate kernel functionK (xi,xj),(8)Kxi,xj=exi-xj/2σ′2where xi,xj represent input vectors with i,j= 1, 2, …m. Here, σ′denotes the Gaussian bandwidth.(i) Weight vectorw is calculated by (9)K+λIw=ydHere K is the kernel matrix, I is the identity matrix of order N, λ is called the regularization parameter, and yd is the desired response vector.(ii) To evaluate output of the networky,(10)y=∑i=1NwiKx,xiwi is the ith (i = 1, 2,….N) element of the weight vector w and K(x, xi) is the kernel function.Kernel used for the control technique is an Exponential Radial Basis Function (ERBF). By considering this ANN block, a considerable reduction in the evaluation time is observed. Four different ANN blocks are generated to evaluate the DRV forT = 15°C, 25°C, 50°C, and 100°C, respectively.


## 2.4.1. RBF Network [23]

An RBF network uses nonlinear functions to map inputs to the outputs into a high dimensional feature space. A general RBF network consists of three layers as shown in Figure9. The input layer with inputsxi (i = 1, 2,…m) where m is a number of input parameters. The hidden layer is generated by one-to-one correspondence between the training input data xi and the kernel functionK(x,xi) for i = 1, 2, …N, where N is the number of training samples [23]. In the third layer, the output is evaluated as the linear weighted sum of the kernel functions generated in the hidden layer. The following equations are used by the network:Figure 9
Schematic of RBF [23].(i) To evaluate kernel functionK (xi,xj),(8)Kxi,xj=exi-xj/2σ′2where xi,xj represent input vectors with i,j= 1, 2, …m. Here, σ′denotes the Gaussian bandwidth.(i) Weight vectorw is calculated by (9)K+λIw=ydHere K is the kernel matrix, I is the identity matrix of order N, λ is called the regularization parameter, and yd is the desired response vector.(ii) To evaluate output of the networky,(10)y=∑i=1NwiKx,xiwi is the ith (i = 1, 2,….N) element of the weight vector w and K(x, xi) is the kernel function.Kernel used for the control technique is an Exponential Radial Basis Function (ERBF). By considering this ANN block, a considerable reduction in the evaluation time is observed. Four different ANN blocks are generated to evaluate the DRV forT = 15°C, 25°C, 50°C, and 100°C, respectively.


## 3. Result and Future Work

In this section, we present the results of an optimization based method which evaluates the DRV of a 6T SRAM cell incorporating the process parameter variation by considering the variation ofVt of four transistors.DRV varies within a range and changes with each run of the experiment. It depends on the samples generated by Quasi MC simulation. To obtain the actual DRV, we conduct the experiment for 25 runs and the highest value obtained is considered as the DRV. After getting the DRV value from 25 experiments the corresponding histogram is plotted for two cases, (i) by considering the ANN block and (ii) by ignoring the ANN block. Table3 indicates the Vt variation range for PMOS and NMOS transistors for 3σ, 4σ, and 5σ variation.Table 3
V t variation range used for PMOS and NMOS.
Variation Range for PMOS Range for NMOS 3σ -0.4796V to -0.344V 0.39253V to 0.53947V 4σ -0.5022V to -0.3214V 0.36804V to 0.56396V 5σ -0.5248V to -0.2988V 0.34355V to 0.58845VTable4 represents the DRV obtained at 3σ, 4σ, and 5σ variation for T = 15°C, 25°C, 50°C, and 100°C, respectively, using the parameter specifications shown in Table 1 and the methodology followed in Section 2. From Table 4 we can observe that DRV increases with T slightly, while it increases significantly with the variation of Vt. To compare the time taken for DRV evaluation using with and without ANN block we run the MATLAB code at 25°C for 3 σ, 4 σ, and 5 σ variations and note the corresponding time taken for the highest value of DRV for 25 runs as shown in Table 5. Figure 10 represents the corresponding bar chart. The histogram to obtain the DRV at T = 15°C, 25°C, 50°C, and 100°C for 3 σ, 4 σ, and 5 σ variation follows the distribution shown in Figure 2(a) and has been presented in Appendix.Table 4
DRV values with 3σ, 4 σ, and 5 σ variation of Vt for T = 15°C, 25°C, 50°C, and 100°C.
Temperature (°C) DRV Without ANN (V) DRV With ANN (V) 3σ 4σ 5σ 3σ 4σ 5σ 15 0.325 0.416 0.4951 0.325 0.4141 0.4961  25 0.331 0.4189 0.5 0.333 0.4189 0.5  50 0.352 0.4229 0.5069 0.352 0.4229 0.5078  100 0.36 0.4443 0.5146 0.36 0.4443 0.5107Table 5
Time elapsed for DRV evaluation at 25°C for 3σ, 4 σ, and 5 σ variations.
Temperature (25°C) DRV Without ANN (V) DRV With ANN (V) 3σ 4σ 5σ 3σ 4σ 5σ DRV 0.331 0.4189 0.5 0.333 0.4189 0.5  Time (s) 459 649 783 10 24 103Figure 10
Plot of DRV for 3σ, 4σ, and 5σ variation atT = 15°C, 25°C, 50°C, and 100°C.However, the time taken for evaluation depends on the version of MATLAB tool, the machine on which the program is executing and how fast the failure sample is obtained out of the 5000 Quasi MC samples generated. From Table5, we can observe that ANN block helps in reducing the time taken for DRV evaluation. Since the evaluation, time varies randomly for each run so the comparison of evaluation time cannot be generalized. The method can be extended to evaluate DRV for a memory chip with complex circuit structure. The modification can be made in the algorithm, to obtain the more accurate DRV results with better simulation time. Instead of obtaining the node voltage values using theoretical equations, practical SPICE-level simulation can be used to evaluate the SNM for a given Vdd and Vt. Optimization algorithms can be implemented for the node voltages generated by the circuit. The procedure can be extended for other technology nodes by considering other process parameter variations like T and geometry variations in W and L for other cell topologies.



---

*Source: 3457284-2018-07-25.xml*