# Single-Input Four-Output Current Mode Filter Using Operational Floating Current Conveyor

Authors: Neeta Pandey; Deva Nand; Zubair Khan
Journal: Active and Passive Electronic Components
 (2013)

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## Abstract

This paper presents operational floating current conveyor (OFCC) based single input four output current mode filter. It employs only three OFCCs and two grounded capacitors and resistors each. The MOS based grounded resistors implementation is used, which adds feature of electronic tunability to the filter parameters. The filter also enjoys low component spread and low sensitivity performance. The effect of finite transimpedance and parasites of OFCC on the proposed circuit is also analyzed. The functionality of the proposed circuit is demonstrated through SPICE simulations using 0.5 µm CMOS process model provided by MOSIS (AGILENT).


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## Body

## 1. Introduction

The development of current mode continuous time filters has received growing interest due to its applications in sampled data systems, communications, and control systems [1, 2]. This is also in consonance with the trend of operating circuits at lower supply voltages where the current mode concept is more useful. The circuit operation in current mode circuits is decided by current which enables the system design to have wider dynamic range [3]. These circuits are also simple and compact as current addition/subtraction does not require additional circuit elements. Owing to the advantages of current mode filters, considerable research has directed towards the realization of single-input multiple output filters. A variety of current mode building blocks [4–10], namely, current follower transconductance amplifier [4], current conveyor [5–7], operational transconductance amplifier [8], Z copy current follower transconductance amplifier [9], and Z-Copy Current Inverter Transconductance amplifier [10], have been used to implement these filters [1, 4–22]. The structures—use excessive number of elements [6, 7, 13, 15] some of the references cited in [17], do not present low input impedance [1, 8, 13–16, 19] which is necessary for a current mode filter, employ multiple inputs to provide output responses [15, 16], put matching constraint [7, 10, 15, 16] to obtain all five responses of universal filter, has less than three simultaneous output responses [4, 8, 15, 16, 21], employ different type of active blocks [12, 19, 20]. The operational floating current conveyor (OFCC) [23, 24], which was introduced as operational floating conveyor (OFC) [25], combines the features of current conveyor and the current feedback op-amp along with additional current outputs that add flexibility in the circuit design. Literature survey on OFCC based circuits [26–32] shows that voltage mode filter [26–28], variable gain amplifier [29], wheatsone bridge [30], and instrumentation amplifier [31] and read out circuit [32] are available. The study of current mode filters [1, 4–22] shows that no OFCC based current mode filter is available in the literature. Therefore, this paper aims at presenting a single-input four-output OFCC based current mode filter. The proposed filter uses three OFCCs, two grounded capacitors and two grounded resistors. The resistors are implemented using MOSFETs so as to achieve electronic tunability of filter parameters. The filter enjoys low component spread and low sensitivity performance. The proposed circuit is also analyzed to take finite transimpedance and parasites of OFCC into account. The functionality of the proposed circuit is demonstrated through SPICE simulations using 0.5 µm CMOS process model provided by MOSIS (AGILENT).


## 2. Circuit Description

### 2.1. OFCC

The circuit symbol of operational floating current conveyor (OFCC) [23, 24] is shown in Figure 1. It has a low impedance current input port X and a high impedance voltage input port Y. It also has a low impedance voltage output port W and high impedance current output ports Z1, Z2, Z3, and Z4. The output voltage at port W is multiplication of input current at port X and the open loop transimpedance gain Zt. The port relationships of the OFCC is characterized by the following matrix:
(1)[IYVXVWIZ1IZ2IZ3IZ4]=[000000010000000Zt000000010000001000000-1000000-10000][VYIXIWVZ1VZ2VZ3VZ4].
It may be noted that the voltage at port X is the same as input voltage at port Y, so voltage tracking action is available at input port. The output current flowing through port W is copied to ports Z1 and Z2 in phase and to ports Z3 and Z4 out of phase, thereby offering current tracking at the output ports. Figure 2 shows the CMOS based schematic of OFCC which is based on topology proposed in [29].Figure 1
Circuit symbol of  OFCC.Figure 2
CMOS schematic of OFCC [29].


### 2.2. Proposed Filter

In this section the implementation of OFCC based current mode single-input four-output filter, as shown in Figure3, is proposed. It employs three OFCCs, and two grounded capacitors and resistors each. The analysis of the circuit gives the following transfer functions:
(2)TLPF1=TLPF2=ILPF1Iin=ILPF2Iin=-1D(s),(3)TBPF=IBPFIin=-sC2R2D(s),THPF=IHPFIin=-s2C1C2R1R2D(s),TNOTCH=INOTCHIin=s2C1C2R1R2+1D(s),
where
(4)D(s)=s2C1C2R1R2+sC2R2+1.
Thus the proposed circuit provides low pass, band pass, and notch (band stop) response simultaneously at high impedance. It may be noted that the current IHPF is not explicitly available at high impedance and therefore cannot be used directly. However, by connecting INOTCH and ILPF1, the high-pass response can be made available at high output impedance. This arrangement makes low pass, band pass, and high-pass responses available simultaneously. Similarly, the all pass function can easily be obtained by connecting band pass and notch output currents, that is, IAP=IBP+INOTCH, and the corresponding transfer function is obtained as
(5)TAP=IAPIin=s2C1C2R1R2-sC2R2+1D(s).
It may be noted that all the five filter responses can be made simultaneously available by adding Z stages in 2nd OFCC (Figure 3). Further, there is no matching constraint for realization of filter responses.Figure 3
Proposed OFCC based single-input four-output current mode filter.All the responses are characterized by pole frequency (ω0), bandwidth (ω0/Q0), and quality factor (Q0) given as
(6)ω0=1R1R2C1C2,BW=ω0Q0=1R1C1,Q0=R1C1R2C2.
Equation (6) reveals that the pole frequency (ω0) and quality factor (Q0) can be adjusted by R2, without disturbing ω0/Q0. The orthogonal adjustability of ω0 and Q0 can be achieved by simultaneous adjustment of R1 and R2  such that the product R1R2 remains constant and the quotient R1/R2 varies and vice versa.  With moderate values of ratios of component values ((R1/R2)=(C1/C2)=Q0), that is, from low component spread [34], high values of Q-factor can be obtained. Hence the component spread is of the order of Q0.The proposed filter uses grounded resistors which can easily be implemented using the MOS based structure given in Figure4 [33]. It uses two diode connected matched transistors, operating in saturation region. Assuming V1=-V2, the value of resistor is given by
(7)R=L2μCoxW(V1-VT),
where µ is carrier mobility, Cox is gate capacitance per unit area, VT is threshold voltage, and W, L are the channel width and length respectively.Figure 4
MOS realization of a resistor [33].The sensitivity analysis of the proposed circuit is as follows:(8)SR1ω0=SR2ω0=SC1ω0=SC2ω0=SR2Q=SC2Q=-12,SR1Q=SC1Q=-SR2Q=-SC2Q=12.
Thus the all passive sensitivities are not more than unity in magnitude. So the proposed filter circuit can be classified as insensitive.


### 2.3. Effect of Finite Transimpedance Gain

In this section the effect of finite transimpedance gain of OFCC is considered and compensation is employed for high frequency applications. Ideally the transimpedance gainZt is assumed to approach infinity. However, in practice, Zt is a frequency dependent finite value. Using single pole model for transimpedance gain, Zt(s) is expressed as [29]
(9)Zt(s)=Zto1+(s/ωtc).
The parameter Zto is the DC open loop transimpedance gain and ωtc is the transimpedance cutoff frequency. For high frequency applications, the transimpedance gain, Zt(s), is approximated as
(10)Zt(s)≅1sCp,
where
(11)Cp=1Ztoωtc.
Taking single pole model of Zt(s) into account, the low pass transfer function of (2) modifies to
(12)TLPF1=TLPF2=ILPF1Iin=ILPF2Iin=-1Dn(s),
where
(13)Dn(s)=s2R1ε1(s)R2ε2(s)C1C2+sR2ε2(s)C2+1,ε1(s)=11+sCpR1,ε2(s)=11+sCpR2.
The inclusion of a capacitor of value Cp connected between the terminal W and ground in second and third OFCCs cancels the coefficient of “s” thereby making both ε1(s) and ε2(s) equal to unity. Thus the transfer function of low pass filter after compensation reduces to (2). Similar analysis is valid for other responses as well.


### 2.4. Effect of Other Nonidealities

The second group of nonidealities comes from parasites of OFCC comprising of resistances and capacitances connected in parallel at terminalsY, Z1, Z2,Z3, and Z4 (i.e., RY, CY, Rz, CZ). The effects of these parasites on filter response depend strongly on circuit topology. The proposed   filter  topology of  Figure 3  in  the  presence  of  these  parasites modifies to Figure 5 where C1eq=C1//CY1//CZ41//CZ31//CZ13, C2eq=C2//CY3//CZ42, G1p=1/(RZ41//RZ31//RZ13), and G2p=1/(RY3//RZ42); the subscript i(=1,2,3) refers to parasites of ith OFCC and j denotes jth Z terminal. It may be noted that effect of parasitic capacitances can be accommodated by pre adjusting the value of external capacitor. The parasitics introduce poles at G1P/C1eq and G2P/C2eq. So by choosing operating frequencies sufficiently below these frequencies the effect of parasitic impedance can be practically eliminated and hence filter may approach towards ideal response.Figure 5
Proposed OFCC based current mode filter with parasites.


## 2.1. OFCC

The circuit symbol of operational floating current conveyor (OFCC) [23, 24] is shown in Figure 1. It has a low impedance current input port X and a high impedance voltage input port Y. It also has a low impedance voltage output port W and high impedance current output ports Z1, Z2, Z3, and Z4. The output voltage at port W is multiplication of input current at port X and the open loop transimpedance gain Zt. The port relationships of the OFCC is characterized by the following matrix:
(1)[IYVXVWIZ1IZ2IZ3IZ4]=[000000010000000Zt000000010000001000000-1000000-10000][VYIXIWVZ1VZ2VZ3VZ4].
It may be noted that the voltage at port X is the same as input voltage at port Y, so voltage tracking action is available at input port. The output current flowing through port W is copied to ports Z1 and Z2 in phase and to ports Z3 and Z4 out of phase, thereby offering current tracking at the output ports. Figure 2 shows the CMOS based schematic of OFCC which is based on topology proposed in [29].Figure 1
Circuit symbol of  OFCC.Figure 2
CMOS schematic of OFCC [29].


## 2.2. Proposed Filter

In this section the implementation of OFCC based current mode single-input four-output filter, as shown in Figure3, is proposed. It employs three OFCCs, and two grounded capacitors and resistors each. The analysis of the circuit gives the following transfer functions:
(2)TLPF1=TLPF2=ILPF1Iin=ILPF2Iin=-1D(s),(3)TBPF=IBPFIin=-sC2R2D(s),THPF=IHPFIin=-s2C1C2R1R2D(s),TNOTCH=INOTCHIin=s2C1C2R1R2+1D(s),
where
(4)D(s)=s2C1C2R1R2+sC2R2+1.
Thus the proposed circuit provides low pass, band pass, and notch (band stop) response simultaneously at high impedance. It may be noted that the current IHPF is not explicitly available at high impedance and therefore cannot be used directly. However, by connecting INOTCH and ILPF1, the high-pass response can be made available at high output impedance. This arrangement makes low pass, band pass, and high-pass responses available simultaneously. Similarly, the all pass function can easily be obtained by connecting band pass and notch output currents, that is, IAP=IBP+INOTCH, and the corresponding transfer function is obtained as
(5)TAP=IAPIin=s2C1C2R1R2-sC2R2+1D(s).
It may be noted that all the five filter responses can be made simultaneously available by adding Z stages in 2nd OFCC (Figure 3). Further, there is no matching constraint for realization of filter responses.Figure 3
Proposed OFCC based single-input four-output current mode filter.All the responses are characterized by pole frequency (ω0), bandwidth (ω0/Q0), and quality factor (Q0) given as
(6)ω0=1R1R2C1C2,BW=ω0Q0=1R1C1,Q0=R1C1R2C2.
Equation (6) reveals that the pole frequency (ω0) and quality factor (Q0) can be adjusted by R2, without disturbing ω0/Q0. The orthogonal adjustability of ω0 and Q0 can be achieved by simultaneous adjustment of R1 and R2  such that the product R1R2 remains constant and the quotient R1/R2 varies and vice versa.  With moderate values of ratios of component values ((R1/R2)=(C1/C2)=Q0), that is, from low component spread [34], high values of Q-factor can be obtained. Hence the component spread is of the order of Q0.The proposed filter uses grounded resistors which can easily be implemented using the MOS based structure given in Figure4 [33]. It uses two diode connected matched transistors, operating in saturation region. Assuming V1=-V2, the value of resistor is given by
(7)R=L2μCoxW(V1-VT),
where µ is carrier mobility, Cox is gate capacitance per unit area, VT is threshold voltage, and W, L are the channel width and length respectively.Figure 4
MOS realization of a resistor [33].The sensitivity analysis of the proposed circuit is as follows:(8)SR1ω0=SR2ω0=SC1ω0=SC2ω0=SR2Q=SC2Q=-12,SR1Q=SC1Q=-SR2Q=-SC2Q=12.
Thus the all passive sensitivities are not more than unity in magnitude. So the proposed filter circuit can be classified as insensitive.


## 2.3. Effect of Finite Transimpedance Gain

In this section the effect of finite transimpedance gain of OFCC is considered and compensation is employed for high frequency applications. Ideally the transimpedance gainZt is assumed to approach infinity. However, in practice, Zt is a frequency dependent finite value. Using single pole model for transimpedance gain, Zt(s) is expressed as [29]
(9)Zt(s)=Zto1+(s/ωtc).
The parameter Zto is the DC open loop transimpedance gain and ωtc is the transimpedance cutoff frequency. For high frequency applications, the transimpedance gain, Zt(s), is approximated as
(10)Zt(s)≅1sCp,
where
(11)Cp=1Ztoωtc.
Taking single pole model of Zt(s) into account, the low pass transfer function of (2) modifies to
(12)TLPF1=TLPF2=ILPF1Iin=ILPF2Iin=-1Dn(s),
where
(13)Dn(s)=s2R1ε1(s)R2ε2(s)C1C2+sR2ε2(s)C2+1,ε1(s)=11+sCpR1,ε2(s)=11+sCpR2.
The inclusion of a capacitor of value Cp connected between the terminal W and ground in second and third OFCCs cancels the coefficient of “s” thereby making both ε1(s) and ε2(s) equal to unity. Thus the transfer function of low pass filter after compensation reduces to (2). Similar analysis is valid for other responses as well.


## 2.4. Effect of Other Nonidealities

The second group of nonidealities comes from parasites of OFCC comprising of resistances and capacitances connected in parallel at terminalsY, Z1, Z2,Z3, and Z4 (i.e., RY, CY, Rz, CZ). The effects of these parasites on filter response depend strongly on circuit topology. The proposed   filter  topology of  Figure 3  in  the  presence  of  these  parasites modifies to Figure 5 where C1eq=C1//CY1//CZ41//CZ31//CZ13, C2eq=C2//CY3//CZ42, G1p=1/(RZ41//RZ31//RZ13), and G2p=1/(RY3//RZ42); the subscript i(=1,2,3) refers to parasites of ith OFCC and j denotes jth Z terminal. It may be noted that effect of parasitic capacitances can be accommodated by pre adjusting the value of external capacitor. The parasitics introduce poles at G1P/C1eq and G2P/C2eq. So by choosing operating frequencies sufficiently below these frequencies the effect of parasitic impedance can be practically eliminated and hence filter may approach towards ideal response.Figure 5
Proposed OFCC based current mode filter with parasites.


## 3. Simulation Results

To verify the functionality of the proposed OFCC based current mode filter, SPICE simulations have been carried out using 0.5 µm CMOS process model provided by MOSIS (AGILENT) and CMOS schematic of Figure2 with power supply voltage of VDD=-VSS=1.5 V and VB1=-VB2=0.8 V. The aspect ratios of the transistor are reported in Table 1 [29].Table 1
Transistors aspect ratios of the circuit shown in Figure2.
Transistor
W (μm)/L (μm)
M1, M2
50/1
M3, M4, M11, M12, M14M16, M18, M20, M22, M24
50/2.5
M5, M7, M10, M15, M17, M19 M21, M23, M25
20/2.5
M6, M8
40/2.5
M9, M13
100/2.5The simulations have been performed for a pole frequency of 1.59 MHz with component values asC1=C2=100 pF and MOS based resistors of value 1 kΩ by selecting bias voltages as ±1.310 V. Figure 6 shows the simulation results for low pass, band pass, and high-pass responses.  The phase and magnitude plots for notch and all pass responses are depicted in Figures 7 and 8, respectively.  The responses confirm the theoretical predictions.Figure 6
Simulated low pass, band pass, and high-pass responses.Figure 7
Magnitude and phase plot for notch response.Figure 8
Magnitude and phase plots for all-pass response.The orthogonal adjustment off0 with Q0 is depicted in Figure 9 where the value of        Q0=1 is considered. The capacitors C1 and C2 are taken as 100 pF and the bias voltages along with the resistor values for different values of f0 as given in Table 2. Figure 10 shows orthogonal adjustment of Q0 with f0=800 kHz. The values of Q0 for constant value of f0 as obtained with C1=C2=100 pF and bias voltages and resulting resistor values are listed in Table 3.Table 2
Bias voltages/resistor values for orthogonal adjustment off0 and Q0.
V
11  *(V)
V
21  *(V)
R
1 (KΩ)
V
12
*(V)
V
22
*(V)
R
2 (KΩ)
Q
F (KHz)
1.310
−1.310
1
1.310
−1.310
1
1
1590
0.869
−0.869
2
0.869
−0.869
2
1
800
0.726
−0.726
5
0.726
−0.726
5
1
320
0.711
−0.711
10
0.711
−0.711
10
1
160
*
V
1
i and V2i refer to bias voltages corresponding to resistance Ri.Table 3
Bias voltages/resistor values for orthogonal adjustment ofQ0 with f0.
V
11  *(V)
V
21  *(V)
R
1 (KΩ)
V
12  *(V)
V
22  *(V)
R
2 (KΩ)
C
1 (nF)
C
2 (nF)
Q
F (KHz)
1.310
−1.310
1
0.869
−0.869
2
0.1
0.2
0.5
800
0.869
−0.869
2
0.869
−0.869
2
0.1
0.1
1
800
0.869
−0.869
2
1.310
−1.310
1
0.2
0.1
2
800
*
V
1
i and V2i refer to bias voltages corresponding to resistance Ri.Figure 9
Tuning off0.Figure 10
Tuning ofQ0.To study the time domain behavior of the proposed filter, an input sinusoidal signal of 500 KHz frequency and amplitude 2 µA is applied. The transient response for low pass output is shown in Figure11. To show the effectiveness of proposed filter a mixed sinusoidal signal of frequencies of 50 KHz, 500 KHz, and 4 MHz having amplitude of 2 µA each is applied at the input of the filter. The transient response with its spectrum for input and output signals is shown in Figures 12(a) and 12(b). It is clear that the 50 KHz, and 500 KHz signals are passed without attenuated and 4 MHz signal is significantly attenuated.Figure 11
Transient response for low pass output.(a) Transient response of input and output signals (b) Spectrum of input and output signals.
(a)
(b)


## 4. Conclusion

In this paper, a single-input four-output current mode filter based on OFCC is presented. The circuit uses only three OFCCs, two grounded resistors, and two grounded capacitors. The low pass, band pass and notch responses are available at high impedance whereas high-pass and all pass responses can be obtained by addingZ stages in the second OFCC. The filter parameters are tuned electronically via MOS based grounded resistor. The effect of finite transimpedance and parasites on filter parameters is also included.



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*Source: 318560-2013-06-27.xml*