# Presenting of the Magnetic Coupling-Based Transformer-Less High Step-Up DC-DC Converter for Renewable Energy Applications

Authors: Hossein Shayeghi; Saeed Pourjafar; Seyed Majid Hashemzadeh; Farzad Sedaghati
Journal: International Transactions on Electrical Energy Systems
 (2022)

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## Abstract

This study presents a new high step-up converter based on the voltage multiplier cell and coupled inductor for renewable energy applications such as fuel cell and photovoltaic power systems. This converter achieves a high voltage conversion ratio using a coupled inductor and voltage multiplier cell (VMC). The voltage multiplier cell acts as a passive clamp circuit and reduces the maximum voltage across the power switch. The suggested topology has only one power switch in its structure, which leads to low cost and volume. The other benefits of the proposed structure are low components count, low input current ripple, low voltage stress throughout the semiconductors, high efficiency, zero-current switching (ZCS), and zero-voltage switching (ZVS) of diodes. Besides, due to the soft-switching condition of the diodes, the reverse recovery problem can be decreased. To show the effectiveness of the suggested topology, operation survey, steady-state analysis, and efficiency calculation are provided. Additionally, the comparison study with other similar converters illustrates the superiority of the proposed structure. Finally, an experimental prototype with 150 W rated power, 50 kHz switching frequency, and 24 V input voltage is implemented to prove the mathematical analysis and effectiveness of the proposed DC-DC converter.


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## Body

## 1. Introduction

Recently, photovoltaic (PV) energy applications for DC supplies are rapidly increased. Also, green energy technologies are noticeably developed due to the carbon emissions problems and need to decrease pollution [1, 2]. This matter has encouraged power engineering researchers, organizations, and governments to expand renewable energy studies [3, 4].DC-DC power converters could be increased the voltage level to satisfy the load or transmission line requirements’ needs [5]. Due to these matters, the expansion of high voltage gain converters has emerged as one of the most influential and notable clarifications for utilizing renewable energy [6]. Various kinds of DC-DC converters were represented to obtain high voltage conversion ratios. Usually, the high step-up DC-DC structures can be categorized into two groups as follows: isolated or nonisolated category for DC-microgrid applications [7, 8]. A high voltage conversion ratio can be achieved by a classical boost, a switched-capacitor, a cascaded boost, and switched-inductor topologies. Due to diode reverse recovery currents problems, these converters have some restrictions, which reduce the converter efficiency [6, 9]. The classical boost DC-DC converter is a low-cost solution for voltage boosting. However, in this converter, the voltage stresses of the power switches and diode are equal to the output voltage. Also, a large duty cycle is needed for higher voltage gain, which enhances the power switch conduction loss and reduces efficiency [10, 11]. Furthermore, electromagnetic interface (EMI) concerns limit voltage boosting because of the high duty cycle levels. On the other hand, at high step-up voltage ratios, the associated current stress may be produced a failure and deteriorate element lifetime [12, 13]. These drawbacks can be overcome using the other types of traditional DC-DC converters such as push-pull, forward, and fly-back converters by regulating the transformer’s turn ratio. Nonetheless, a high peak voltage was produced across the power switches by the transformer leakage inductance’s energy [14, 15]. Additionally, a high number of turn ratio raises the transformer losses, cost, and size, which leads to system efficiency reduction. As discussed beforehand, isolated power converters can attain a high voltage gain by regulating the coupled inductor’s turn ratio. Besides, there are infrequent obstacles when a large number of the turn ratio is adjusted for the transformer as follows: (1) high parasitic capacitors of the transformer’s secondary winding, (2) parasitic circuit effects such as spikes, (3) increased component heating losses, (4) high leakage inductance, (5) noise production by windings, (6) large required input filters, and (6) cost enhancement.In references [16, 17], isolated converters were reported with a high voltage gain. However, due to the isolated topology, the cost and volume of these converters are high. The above-mentioned obstacles can be reduced by using nonisolated DC-DC structures. These structures present numerous benefits, such as low cost and volume. The suggested nonisolated converter in reference [18] was suitable for microgrid inverters. Nevertheless, the high input current ripple of this structure can reduce the input PV panel lifetime. In reference [19], a high step-up DC-DC topology was represented based on the voltage multiplier cell (VMC) and a coupled inductor. This converter had high input current ripple. Moreover, the number of used components was high, which leads to low efficiency. In references [20–25], DC-DC converters with high step-up advantage were reported. However, significant problems such as high voltage stress throughout the semiconductor components, diodes reverse recovery problem, high input current ripple, high components count, and low power efficiency still exist in these converters. In reference [26], a steady-state survey of DC-DC structure based on the switched capacitor and magnetic coupling has been introduced. The mentioned converter in reference [26] can achieve high voltage gain by increasing the turn ratio of the coupled inductor. In reference [27], a high step-up DC-DC converter with a single switch has been introduced The suggested converter can achieve higher and lower voltage gains at different rates of duty cycle. The converter has been experimented under real-time conditions with a 660 W system. However, the voltage stress through the semiconductor of the proposed converter is high, which leads to an increase in the overall system cost. A high voltage rate DC-DC converter with LC network and voltage double circuit has been reported in reference [28]. The presented converter advantages are high voltage gain, low voltage stress across the switches, and high efficiency. However, the input ripple of the proposed converter is high and also it cannot be used for high power applications. Reference [29] introduced a high step-up interleaved DC-DC structure with a wide voltage conversion ratio. The suggested converter utilized a large number of components to achieve high output voltage. Therefore, the efficiency of the converter is low, and also the overall system cost is high. In reference [30], a soft-switched DC-DC converter was represented with high efficiency. Also, the peak voltage of the semiconductor devices is low.This study presents a new kind of nonisolated DC-DC converter based on the coupled inductor and VMC for renewable energy applications such as PV power systems. This converter can attain a high voltage conversion ratio using the coupled inductor turns ratio adjustment and used VMC. The suggested nonisolated converter has only one power MOSFET in its structure, which leads to low cost and volume. The other advantages of the proposed topology are as follows: (1) low components count, (2) high efficiency, (3) low input current ripple, and (4) low voltage stress across the semiconductors. The applied VMC acts as a passive clamp circuit and reduces the maximum peak voltage throughout the power switch. Besides, due to the ZVS and ZCS of diodes, the converter’s efficiency is high. Operation survey, steady-state analysis, and efficiency calculation are presented in the literature. Moreover, to show the superiority of the suggested structure, the comparison results with other converters in the same family are reported. Finally, a laboratory prototype with 24/180 V input/output voltage at 50 kHz switching frequency is provided to verify the effectiveness and mathematical analysis of the proposed structure.


## 2. Suggested Nonisolated DC-DC Converter and Operation Modes Analysis

The configuration of the suggested converter is shown in Figure1. The proposed converter includes an input voltage source (Vin), three diodes (D1, D2, and output diode (Do)), a coupled inductor with a winding ratio of n1 (primary winding) and n2 (secondary winding), one power switch (S), and four capacitors (C1, C2, C3, and the output filter capacitor (Co)). The VMC consists of diodes D1 and D2 and capacitors C1 and C3. The coupled inductor is assumed as an ideal transformer, with a turn ratio N = (n1/n2), magnetizing (Lm), and leakage (Lk) inductance. The stored energy in Lk is recycled and transferred to the output capacitor (Co). In addition, capacitor C2 and diode D1 act as a snubber circuit, decreasing the maximum voltage stress throughout the switch S. Thus, a low-cost switch with low on-state resistance (RDS-ON) can be used in the suggested topology.Figure 1
Configuration of the suggested high step-up converter.The following assumptions are taken into account for modes analysis and steady-state investigation:(i)
All semiconductor elements are ideal(ii)
The voltage ripple of the capacitors is neglected(iii)
Lk of the used coupled inductor is neglectedThere are three operation modes in each switching period (Ts), in which two modes are occurred in on-state and three modes in off-state of switch S. The main time waveforms of the recommended topology during one Ts are depicted in Figure 2.Figure 2
Time waveforms of the recommended topology in CCM operation.Mode 1.
[t0 < t < t1]: this mode is beginning when the pulse gate is applied to power switch S. At t = t0, the power switch S is turned on. Also, the diode Do is turned on at ZVS condition. Diode Do is the only diode that is forward biased in this mode and the other diodes are turned off. The input inductor Lin is charged with the input DC source. Therefore, the input inductor current iLin is linearly increased. The energy of the capacitors C2 and C3 and the energy of the secondary side of the coupled inductor are delivered to the load through diode Do. In this mode, the capacitor C1 is charged and the capacitors C2 and C are discharged. The equivalent configuration of mode 1 is illustrated in Figure 3(a). The following equations are described for this mode:(1)VLin=Vin,(2)VLm=VC1−VC2−VC31−N,(3)Vo=VC2+VC3−NVLm,(4)iS=iin+iC1,(5)iC3=iC2=−in2,(6)iDo=iC3−iC1=iCo−io,(7)iC2=iC3=iC1+iDo.Figure 3
The operation modes for the equivalent circuit of the proposed structure. (a) Mode 1, (b) mode 2, and (c) mode 3.
(a)(b)(c)Mode 2.
[t1 < t < t2]: at t = t1, the power switch S is turned off. Besides, the diodes D1 and D2 are turned on. In this operation time, the diode D2 is started to conduct at ZVS. The blocking voltage of the switch S is Vc2. The equivalent configuration of this mode is shown in Figure 3(b). The stored energy in the input inductor Lin is transferred to the capacitors C2. Also, the capacitor C3 is charged by the energy of the coupled inductor’s secondary side. The equations of mode 2 are calculated as follows:(8)VLin=Vin−VC2,VLm=VC1−VLk=1NVC3,iD1=iin−iLk.Mode 3.
[t2 < t < t3]: at t = t2, the diode D2 is still in forward bias. Power switch S and Do are in off-state. The stored energy in Lin charges the coupled inductor’s magnetizing inductor Lm. Therefore, iLm is linearly raised. Also, C2 is charged during this mode. The equivalent circuit of this mode is the same as Figure 3(c). For this mode, we have the following equation:(9)−Vin+VLin+VLk+VLm−VC1+VC2=0.


## 3. Steady-State Analysis

The proposed converter’s voltage gain (Vo/Vin) and the voltage stress across the used semiconductors can be calculated by neglecting the power losses and the coupled inductor’s leakage inductance Lk. Therefore, only the ideal value of the used components is considered for the theoretical steady-state analysis.


### 3.1. Voltage Calculation

Using the volt-second balance principle for input inductorLin and magnetizing inductance Lm, the voltage of the capacitor C2 and C1 are calculated as follows:(10)VC2=11−DVin,VC1=D1−D1−NVin.According to the equivalent circuit of the suggested topology in mode 2, the voltage of the capacitorC3 is given by the following equation:(11)VC3=NVC1=ND1−D1−NVin.Finally, by using equations (2) and (3), the output voltage can be derived as follows:(12)Vo=VC2+VC3+N1−NVC1−VC2−VC3.Thus, the voltage gain of the proposed DC-DC topology can be achieved as follows:(13)M=VoVin=11−D1−N=11−D1−n1/n2.In addition, forN′=1/N=n2/n1, the voltage gain can be rewritten as follows:(14)M=VoVin=N′1−DN′−1=n1/n21−Dn1/n2−1.The voltage gain of the suggested structure versus duty cycle and coupled inductor’s turn ratio is shown in Figure4(a).Figure 4
The voltage gain and semiconductors voltage stresses of the recommended topology. (a) MCCM curve versus duty cycle and (b) voltage stress curve versus duty cycle.
(a)(b)As shown in Figure3(a), during mode 1, the maximum blocking voltage of diode 1 is Vc2. Besides, during the on-state of switch S, its maximum blocking voltage is Vc2. Thus, the voltage stress throughout the power switch S and diode D1 are equal together.(15)VD1=VS=VC2=11−DVin=1−NVo=N′−1N′Vo.Furthermore, the voltage stress across the diodesD2 and Do are calculated as follows:(16)VD2=VC3−NVLm=NVo=1N′Vo,VDo=Vo−VC2=Vo−1−NVo=NVo=1N′Vo.The obtained voltage stresses of the semiconductor devices versus coupled inductor’s turn ratio and power switch’s duty cycle are shown in Figure4(b).


### 3.2. Current Calculation

By using the KCL equations of each mode, which are presented in the previous section, the current stresses of the used semiconductor components are founded as follows:(17)iS=iD1=1−1−D1−ND1−D1−NIo,iD2=iDo=2N1−DIo.According to the proposed converter’s configuration, the average currents of the diodes are obtained as follows:(18)ID1avg=ID2avg=IDoavg=Io.Using the voltage gain of the converter, the input average current versus output current can be expressed as follows:(19)Iin=MIo.Finally, the average current of the power switch is calculated as follows:(20)ISavg=Iin−ID1avg=M−1Io=1−1−D1−ND1−D1−NIo.It should be noticed that, for efficiency analysis, root mean square (RMS) currents calculation is necessary. These currents are summarized in Table1.Table 1
The RMS currents of the recommended converter’s elements.
RMS currents of the used componentsIC1rms=In1rms=1/D1−DNIo/1−NIC2rms=IC3rms=In2rms=1/D1−DIo/1−NICorms=1−D2N−D2+1/D1−DIoISrms=ID1rms=1−1−D1−N/D1−D1−NIoID2rms=IDorms=2N/DIo


### 3.3. Efficiency Analysis

In this section, the proposed converter’s efficiency is analyzed. For this study, the parasitic resistance of the used components is assumed as follows: (1)RDS-ON: turn-on power switch’s resistance, (2) R(D1,D2,DO): diodes equivalent series resistance, (3) R(Lin,n1,n2): equivalent series resistance of inductors windings, (4) R(C1,C2,C3,Co): equivalent series resistance of capacitors, and (5) VF(D1, D2, Do): forward voltage of diodes.Using equations (21) and (22), the converter efficiency can be calculated as follows:(21)ηConverter=PoutPin=PoutPout+Ploss×100%,(22)Ploss=PconductionS+PswitchingS+PconductionD+PforwardD+Pinductors+Pcapacitors.In equation (22), PconductionS is the conduction power loss of the switch S and is obtained as follows:(23)PconductionS=RDS−ONISrms2.PswitchingS is the active switch S switching loss and is expressed as follows:(24)PswitchingS=12fstr+tfVSISturn−off.PconductionD shows the conduction losses of the used diodes and is given by the following equation (25):(25)PconductionD=RD1ID1rms2+RD2ID2rms2+RDoIDorms2.PforwardD demonstrates the diodes forwarded voltage losses as follows:(26)PforwardD=VFD1ID1avg+VFD2ID2avg+VFDoIDoavg.Pinductors indicates the sum of the input and coupled inductors conduction losses, which is calculated as follows:(27)Pinductors=rLinILinrms2+rn1In1rms2+rn2In2rms2.Besides,Pcapacitors indicates the power losses of capacitors, which is calculated as follows:(28)Pcapacitors=rC1IC1rms2+rC2IC2rms2+rC3IC3rms2+rCoICorms2.


## 3.1. Voltage Calculation

Using the volt-second balance principle for input inductorLin and magnetizing inductance Lm, the voltage of the capacitor C2 and C1 are calculated as follows:(10)VC2=11−DVin,VC1=D1−D1−NVin.According to the equivalent circuit of the suggested topology in mode 2, the voltage of the capacitorC3 is given by the following equation:(11)VC3=NVC1=ND1−D1−NVin.Finally, by using equations (2) and (3), the output voltage can be derived as follows:(12)Vo=VC2+VC3+N1−NVC1−VC2−VC3.Thus, the voltage gain of the proposed DC-DC topology can be achieved as follows:(13)M=VoVin=11−D1−N=11−D1−n1/n2.In addition, forN′=1/N=n2/n1, the voltage gain can be rewritten as follows:(14)M=VoVin=N′1−DN′−1=n1/n21−Dn1/n2−1.The voltage gain of the suggested structure versus duty cycle and coupled inductor’s turn ratio is shown in Figure4(a).Figure 4
The voltage gain and semiconductors voltage stresses of the recommended topology. (a) MCCM curve versus duty cycle and (b) voltage stress curve versus duty cycle.
(a)(b)As shown in Figure3(a), during mode 1, the maximum blocking voltage of diode 1 is Vc2. Besides, during the on-state of switch S, its maximum blocking voltage is Vc2. Thus, the voltage stress throughout the power switch S and diode D1 are equal together.(15)VD1=VS=VC2=11−DVin=1−NVo=N′−1N′Vo.Furthermore, the voltage stress across the diodesD2 and Do are calculated as follows:(16)VD2=VC3−NVLm=NVo=1N′Vo,VDo=Vo−VC2=Vo−1−NVo=NVo=1N′Vo.The obtained voltage stresses of the semiconductor devices versus coupled inductor’s turn ratio and power switch’s duty cycle are shown in Figure4(b).


## 3.2. Current Calculation

By using the KCL equations of each mode, which are presented in the previous section, the current stresses of the used semiconductor components are founded as follows:(17)iS=iD1=1−1−D1−ND1−D1−NIo,iD2=iDo=2N1−DIo.According to the proposed converter’s configuration, the average currents of the diodes are obtained as follows:(18)ID1avg=ID2avg=IDoavg=Io.Using the voltage gain of the converter, the input average current versus output current can be expressed as follows:(19)Iin=MIo.Finally, the average current of the power switch is calculated as follows:(20)ISavg=Iin−ID1avg=M−1Io=1−1−D1−ND1−D1−NIo.It should be noticed that, for efficiency analysis, root mean square (RMS) currents calculation is necessary. These currents are summarized in Table1.Table 1
The RMS currents of the recommended converter’s elements.
RMS currents of the used componentsIC1rms=In1rms=1/D1−DNIo/1−NIC2rms=IC3rms=In2rms=1/D1−DIo/1−NICorms=1−D2N−D2+1/D1−DIoISrms=ID1rms=1−1−D1−N/D1−D1−NIoID2rms=IDorms=2N/DIo


## 3.3. Efficiency Analysis

In this section, the proposed converter’s efficiency is analyzed. For this study, the parasitic resistance of the used components is assumed as follows: (1)RDS-ON: turn-on power switch’s resistance, (2) R(D1,D2,DO): diodes equivalent series resistance, (3) R(Lin,n1,n2): equivalent series resistance of inductors windings, (4) R(C1,C2,C3,Co): equivalent series resistance of capacitors, and (5) VF(D1, D2, Do): forward voltage of diodes.Using equations (21) and (22), the converter efficiency can be calculated as follows:(21)ηConverter=PoutPin=PoutPout+Ploss×100%,(22)Ploss=PconductionS+PswitchingS+PconductionD+PforwardD+Pinductors+Pcapacitors.In equation (22), PconductionS is the conduction power loss of the switch S and is obtained as follows:(23)PconductionS=RDS−ONISrms2.PswitchingS is the active switch S switching loss and is expressed as follows:(24)PswitchingS=12fstr+tfVSISturn−off.PconductionD shows the conduction losses of the used diodes and is given by the following equation (25):(25)PconductionD=RD1ID1rms2+RD2ID2rms2+RDoIDorms2.PforwardD demonstrates the diodes forwarded voltage losses as follows:(26)PforwardD=VFD1ID1avg+VFD2ID2avg+VFDoIDoavg.Pinductors indicates the sum of the input and coupled inductors conduction losses, which is calculated as follows:(27)Pinductors=rLinILinrms2+rn1In1rms2+rn2In2rms2.Besides,Pcapacitors indicates the power losses of capacitors, which is calculated as follows:(28)Pcapacitors=rC1IC1rms2+rC2IC2rms2+rC3IC3rms2+rCoICorms2.


## 4. Design Considerations

### 4.1. Input and Magnetizing Inductances

The input magnetizing inductances (Lin and Lm) can be obtained by the following equations:(29)Lin=VLinDTsΔiLin,Lm=VLmDTsΔiLm.In these equations,ΔiLin and ΔiLm show the current ripples of the inductors Lin and Lm. For continuous current mode (CCM) operation of the suggested structure, the value of ΔiLin is considered as follows:(30)ΔiLin≥20%ILin.Finally, the values ofLin and Lm can be expressed as equations (31) and (32), respectively:(31)Lin≥VinD1−D1−n1/n20.2fsIo⟶Lin≥434μH,(32)Lm≥VinD21−Dfs1−1−D1−n1/n2⟶Lm≥230μH.


### 4.2. Capacitors

The capacitors values should be calculated to adjust the capacitor’s voltage in an invariant value. The following equation shows the current and the voltage relation of the capacitors:(33)C=ICDTsΔVC.Assuming∆VC ≥ 0.02VC, the values of the used capacitors can be obtained versus input voltage and output current by equations (34)–(37), respectively:(34)C1≥Io1−Dn1/n22%fsVinD⟶C1≥40.8μF,(35)C2≥IoD2%fsVin1−n1/n2⟶C2≥49μF,(36)C3≥Io2%fsVin1−D1−n1/n2⟶C3≥163μF,(37)Co≥IoD1−D1−n1/n22%fsVin⟶Co≥290μF.


## 4.1. Input and Magnetizing Inductances

The input magnetizing inductances (Lin and Lm) can be obtained by the following equations:(29)Lin=VLinDTsΔiLin,Lm=VLmDTsΔiLm.In these equations,ΔiLin and ΔiLm show the current ripples of the inductors Lin and Lm. For continuous current mode (CCM) operation of the suggested structure, the value of ΔiLin is considered as follows:(30)ΔiLin≥20%ILin.Finally, the values ofLin and Lm can be expressed as equations (31) and (32), respectively:(31)Lin≥VinD1−D1−n1/n20.2fsIo⟶Lin≥434μH,(32)Lm≥VinD21−Dfs1−1−D1−n1/n2⟶Lm≥230μH.


## 4.2. Capacitors

The capacitors values should be calculated to adjust the capacitor’s voltage in an invariant value. The following equation shows the current and the voltage relation of the capacitors:(33)C=ICDTsΔVC.Assuming∆VC ≥ 0.02VC, the values of the used capacitors can be obtained versus input voltage and output current by equations (34)–(37), respectively:(34)C1≥Io1−Dn1/n22%fsVinD⟶C1≥40.8μF,(35)C2≥IoD2%fsVin1−n1/n2⟶C2≥49μF,(36)C3≥Io2%fsVin1−D1−n1/n2⟶C3≥163μF,(37)Co≥IoD1−D1−n1/n22%fsVin⟶Co≥290μF.


## 5. Comparison Study

To verify the performance of the suggested topology, a comparison among the suggested DC-DC topology and other structures is provided. For this study, voltage gain, components count, maximum voltage stress across the semiconductors, input current ripple, soft-switching feature, and efficiency are taken into account. The represented comparison is summarized in Table2. In this comparison, the value of the duty cycle (D) is 0.6. Also, n1 and n2 are 2 and 3, respectively. According to Table 2, the voltage gain of the recommended topology is 7.5, which is higher than the other structures. Besides, this value of voltage gain is obtained with ten used components, including one power switch, two magnetic cores, three diodes, and four capacitors. The number of used semiconductor devices has a high impact on the converter cost. In the suggested topology, only four semiconductor devices are used. Figure 5(a) shows the voltage gain comparison between the introduced converters in Table 2. The normalized maximum voltage stress across the power switch of the proposed structure is 0.33. Although the recommended converter in reference [17] has lower VS/Vo than the suggested topology for D = 0.6 and n2/n1 = 3/2, the voltage gain of this topology is lower than the recommended topology. Besides, the input port current ripple of the represented converter in reference [17] is high and there is no soft-switching condition. Figure 5(b) shows the comparison of the normalized maximum voltage stress across the power switch. Due to this figure, VS/Vo of the suggested topology is higher than the other converters for the high coupled inductor’s turns ratio. However, for a high number of turn ratio, the power loss of winding is increased. Therefore, it is reasonable to use a coupled inducer with a low turn ratio number. The normalized maximum voltage stresses across diodes are shown in Figure 5(c). As can be seen that the proposed topology has a low value of VD/Vo for n2/n1 higher than 2. Also, for n2/n1 = 3/2, the converters in references [19, 20, 25] have lower normalized maximum voltage stress across diodes. Nonetheless, these topologies have a lower voltage conversion ratio and higher VS/Vo. On the other hand, the input current ripple of the structure in [25] is high, which is not proper for renewable energy systems. The efficiency of the introduced structures in Table 2 is compared at 200 W output power. As can be seen that the proposed topology has higher efficiency than the other converters. Although, the converter [25] has higher efficiency than the proposed converter; nevertheless, the voltage gain in this converter is low and also, the input ripple and voltage stress of the switch are high compared to the suggested converter. Some factors of experimental results are added to Table 2. The operating frequency, output voltage, input voltage, turn ratio of the coupled inductor, and nominal power of all converters in the comparison section and suggested converter are illustrated in Table 2. The efficiency comparison of the suggested converter and other converters based on the output power from 50 W output power to 225 W output power has been shown inFigure 5(d). From this figure, it is obvious that the recommended structure can achieve high efficiency compared to other structures from light load to full load condition. Besides, there are soft-switching conditions through the diodes of the presented converter, which leads to a further increase in efficiency.Table 2
Comparison of the suggested converter and other nonisolated topologies.
SpecificationReference [16]Reference [17]Reference [18]Reference [19]Reference [20]Reference [21]Reference [22]Reference [25]ProposedNumber of switches121112111Number of diodes253332443Number of inductors100011101Number of capacitors233333354Number of coupled inductors111111111Mn2/n1/1−D=3.75n2/n12−D/1−D=5.25n2/n1+1/1−D=6.25n2/n1+1/1−D=6.25n2/n1+1/1−D=6.25n2/n1/1−D=3.751+n2/n1D/1−D=4.751+n2/n1D/1−D=4.75n2/n1/1−Dn2/n1−1=7.5VS/Vo1/n2/n1=0.661/2n2/n12−D=0.231/n2/n1+1=0.41/n2/n1=0.661/n2/n1+1=0.41/n2/n1=0.661/1+n2/n1D=0.521/n2/n1+1=0.4n2/n1−1/n2/n1=0.33VD/Vo11/2−D=0.711n2/n1/n2/n1+1=0.6n2/n1/n2/n1+1=0.61n2/n1/1+n2/n1D=0.78n2/n1/n2/n1+1=0.61/n2/n1=0.66Input current rippleLowHighHighLowLowLowHighHighLowEfficiency at 200 W (%)95.994.5595.594-95.493.896.295.8Frequency (kHz)100505050241006010050Vo/Vin146/38200/24200/25400/24300/15400/48400/42400/40180/24N533334541.5Nominal power (W)250200250200100300200350250Soft switchingYesNoNoYesNoYesNoNoYesFigure 5
Comparison result between the suggested converter and other similar topologies. (a) Voltage gainM, (b) normalized maximum voltage stress of switches, (c) normalized maximum voltage stress of diodes, and (d) efficiency comparison of the proposed converter and other published works.
(a)(b)(c)(d)It is apparent that the recommended structure can achieve high voltage gain by using the low turn ratio of the coupled inductor in comparison to other structures. Therefore, the overall cost of the suggested topology is decreased. Soft-switching conditions such as ZVS and ZCS on semiconductor devices and the low number of used components are significant reasons to obtain a high-efficiency DC-DC converter. Therefore, with supposing the comparison results, the proposed topology is a suitable choice for renewable energy applications such as PV power systems. Because in these systems, a high voltage gain and high-efficiency DC-DC converter is necessary to enhance DC voltage level.


## 6. Simulation Results

The purpose of the simulation is to examine the relationships and claims expressed in the previous sections. All simulations are performed by PSIM software. The suggested converter is simulated when the switching frequency, input/output voltages, and coupled inductor turn ratio are set at 50 kHz, 24/180 V, and 3/2 regarding the following parameters:(i)
Capacitors values:C1 = 220 μF, C2 = 220 μF, C3 = 220 μF, and Co = 470 μF.(ii)
Input inductor: 500μH.(iii)
Magnetizing inductance: 250μH.The gate-source voltage of the main switch is shown in Figure6(a). The converter duty cycle is 60% and has a switching frequency of 50 kHz. Figure 6(b) indicates the drain-source voltage of the power switch, which is about 60 V. The voltage of the capacitors is shown in Figure 7(a). From this figure, the voltage of the capacitors C1, C2, and C3 are about 108, 63, and 70 V, respectively. The output and input voltage simulation waveforms are indicated in Figure 7(b). The input voltage (Vin) and output voltage (Vo) of the suggested converter (Vin) is 24 V and approximately 180 V, respectively. Related to this figure, the converter output voltage ripple is poor and can be neglected. The voltage and current simulation waveforms of diodes D1, D2, and Do are illustrated in Figures 8(a)–8(c), respectively. As can be seen, the maximum voltage of diodes D1, D2, and Do are 62, 120, and 120 V and their currents are about 8.9, 3.6, and 2.5 A, respectively. Due to Figure 8, there is ZCS condition throughout diode D1 and also ZVS condition through the diodes D2 and Do. The input current waveform is indicated in Figure 8(d). As depicted in this figure, the peak current of the input current is about 1.5 A, which is a small amount.Figure 6
The simulation measurement of the recommended topology. (a) Gate-source voltage of switch. (b) Drain-source voltage of switch.
(a)(b)Figure 7
The simulation measurement of the recommended topology. (a) Capacitor voltages. (b)Vo − Vin.
(a)(b)Figure 8
The simulation measurement of the recommended topology. (a)VD1 − iD1. (b) VD2 − iD2. (c) VDo − IDo. (d) Iin.
(a)(b)(c)(d)


## 7. Experimental Results

In this section, the laboratory result of the proposed structure is provided to indicate the converter’s performance by consideringVin = 24, fs = 50 kHz, and D = 0.6 in 150 W output power level. The main specifications of the suggested topology are listed in Table 3. The obtained results prove the validity of the technical survey and mathematical calculations. The experimental prototype of the recommended converter is depicted in Figure 9.Table 3
List of the circuit components of the prototype.
ElementSpecificationSwitchSTW55NM60DiodesMUR2060Lin500μHLmFerrite core EE50, 250μH, N2/N1 = 3/2C1,C2, and C3200 V/220μFCo400 V/470μFLk1 and Lk22μHFigure 9
Experimental prototype of the proposed converter.As shown in Figure9, the experimental scheme of the suggested converter includes a power circuit and gate driver circuit. The power circuit includes the following elements:(i)
Electrolyte capacitors (C1, C2, and C3) with the capacity of 220 μF.(ii)
Electrolyte capacitor with the capacity of 470μF.(iii)
The utilized diodes are fast recovery diodes.(iv)
The power switch is a metal-oxide-semiconductor field-effect transistor (MOSFET).(v)
The coupled inductor is EPCOS B66344 (Ferrite core EE50) model.(vi)
The utilized load is the electro-mechanic heating element (200 Ω), which can provide 300 V and 300 W output voltage and output power level.(vii)
The input inductor is the drum core inductor.The laboratory results of the proposed converter are achieved by using a digital signal oscilloscope, which is named GDS-10748. The input source is DC supply. In this study, the RN-3005-D laboratory DC power supply, for signaling, the power MOSFET, and for producing the appropriate duty cycle, the ATMEGA16 microcontroller have been utilized. The required frequency and duty cycle are programmed to the microcontroller. Then, the IR2111 is a half-bridge driver that is used for driving the power MOSFET. It is a high voltage, high-speed power MOSFET driver with dependent high and low side referenced output channels. In order to isolate the microcontroller and IR2111 driver, an optocoupler has been employed between them. The selected devices with their voltage and current rating for the proposed structure are given in Table3.The voltage and current experimental waveforms of the suggested converter are shown in Figures10–13. Figure 10 shows the input current waveform. The input current is tolerated between 6.4 and 7 A. Thus, the ripple of the input current is low compared to the other converters in the same family. The voltage and current waveforms of the diodes are illustrated in Figures 11(a)–11(c). Figure 11(a) shows the voltage and current waveform of diode D1, which are about 59 V and 8.3 A, respectively. As can be seen that diode D1 is turned off in the ZCS condition that decreases the reverse recovery losses of the diode. Due to Figures 11(b) and 11(c), the voltages and currents of diode D2 and D3 are about 118 V, 118 V, 3.5 A, and 2.4 A, respectively. Regarding Figures 11(b) and 11(c), there is zero voltage switching condition through diodes D2 and Do, which enhances the overall efficiency of the suggested topology. Besides, the peak voltage of the diodes is low compared to Vo. The voltage and current waveforms of the main switch are indicated in Figure 11(d). The peak voltage of the switch S is about 59 V that is three-time smaller than the output voltage, and the peak current is almost 12 A. The capacitor voltage and the output voltage waveforms are depicted in Figures 12(a)–12(d), respectively. The measured voltages of C1, C2, and C3 are about 105, 60, and 69 V, respectively. The obtained values for the capacitor voltage validate the calculated equations (equations (11)–(13)). The output voltage waveform is indicated in Figure 12(d). As can be seen that Vo is almost 178 V with a poor voltage ripple. The experimental waveforms of the first and secondary side winding of the coupled inductor current are measured and indicated in Figures 13(a) and 13(b), respectively.Figure 10
The input current measurement of the recommended topology.Figure 11
Experimental measurement of the recommended topology. (a)VD1 − ID1, (b) VD2 − ID2, (c) VDo − IDo, and (d) Vsw − isw.
(a)(b)(c)(d)Figure 12
Experimental measurement of the recommended topology. (a)VC1, (b) VC2, (c) VC3, and (d) Vo.
(a)(b)(c)(d)Figure 13
The experimental measurement of the recommended topology. (a)iLt1 and (b) iLt2.
(a)(b)Table4 indicates the values of the recommended converter elements in theoretical, simulation, and experimental states. It is apparent that there is little difference between the results of each state. The reason for this is that the elements are not ideal in practice, and they have conductive losses.Table 4
Comparison between the values of components.
Value of componentsTheoretical valueSimulation valueExperimental valueVo180179178VDS6059.559VC1105.88105104VC26059.860VC369.886969VD1605959VD2120119118VDo120119118The theoretical and experimental output voltages based on duty cycle are illustrated in Figure14. Regarding this figure, it is apparent that there is a little difference between the results of each section.Figure 14
Theoretical and experimental output voltage curve versus duty cycle.The voltage stress of the switch in experimental results for a different range of duty cycle is measured and indicated in Figure15. From this figure, it can be found that the voltage stress through the switch is lower than the output voltage for all duty cycles, which leads to achieving higher efficiencies for such converter.Figure 15
Voltage stress of switch versus duty cycle.The efficiency curve for different levels of power rating is shown in Figure16 by considering N = 1.5, D = 0.6, and fs = 50 kHz. The proposed topology’s maximum efficiency is about 96.4% at input voltage 24 V and output power 150 W, which is depicted in Figure 16. The full-load efficiency is approximately 95.4% at 250 W. It is obvious that the efficiency of the proposed structure is reduced for power tolerance between 100 W and 250 W. However, the overall efficiency of the suggested topology at different output power is greater than 95%. Besides, the theoretical and measured experimental efficiency curve versus output power is indicated in Figure 17. From this figure, it is obvious that the efficiency of the suggested converter is flexible and high. Noted that DC-DC converters with high voltage gain can be used in a different rate of power conversion systems from light power level to high power levels in many applications such as renewable energy systems.Figure 16
The measured efficiency of the presented structure in various load powers.Figure 17
experimental and theoretical efficiency of the suggested converter.The total losses analysis of the proposed converter in 150 W output power by consideringN = 1.5, D = 0.6, Vin = 24, and fs = 50 kHz and also based on experimental values and losses calculation section is demonstrated in Figure 18.Figure 18
Losses curve of the proposed converter in 150 W output power.Finally, the obtained results of this study verified that the proposed nonisolated DC-DC topology could be a proper choice for renewable energy applications such as fuel cells and PV networks with many features such as soft-switching ability, low volume and core, high voltage conversion ratio, and high efficiency. Besides, by using high power rating elements in the suggested topology, the proposed structure can be utilized in low power and high power applications such as PV systems, fuel cells, and LED lamps.


## 8. Conclusion

In this study, a novel nonisolated DC-DC converter based on the coupled inductor and VMC for renewable energy applications such as photovoltaic power systems has been proposed. Only one power switch is used in the suggested structure, which leads to low cost and volume. Other benefits of the proposed converters are as follows: (1) low components count, (2) high efficiency, (3) low input current ripple, (4) low voltage stress across the semiconductors, and (5) ZCS and ZVS of diodes. The applied VMC acts as a passive clamp circuit and reduces the maximum voltage across the power switch. The operation principles with steady-state calculation were carried out in this study. The design consideration for the capacitors, coupled inductor, and input inductor has been done. Besides, in order to demonstrate the proficiency of the suggested converter, comparison results with other similar converters in many aspects were provided in the literature. Based on the comparison study, the proposed structure has a high voltage gain with low voltage stress across diodes. Finally, a 150 W laboratory prototype with 24 V input voltage and 180 V output voltage at 50 kHz operating frequency is provided. In conclusion, the experimental results are verified the theoretical and simulation analysis. Additionally, the measured efficiency for different power levels, which is higher than 95%, validates that the proposed structure could be an appropriate choice for green energy systems.



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*Source: 3141119-2022-03-14.xml*