# Current Control and Active Damping for Single Phase LCL-Filtered Grid Connected Inverter

Authors: Mohammad Alshiekh; Alaa Marouf; Muhieddin Kubeitari
Journal: Journal of Control Science and Engineering
 (2020)

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## Abstract

LCL filter has been widely used in the grid connected inverter, since it is effective in attenuation of the switching frequency harmonics in the inverter. However, the resonance in this filter causes stability problems and must be damped effectively to achieve stability. There are some methods to damp the resonance; one method is passive damping of resonance by adding a series resistor with the filter capacitor, but passive element reduces the inverter efficiency. Other method uses active damping (AD) by adding a proportional control loop of filter capacitor current, but this method needs additional sensor to measure filter capacitor current; moreover, when the control loops are digitally implemented, the computation delay in AD control loop will lead to some difficulties in choosing control parameters and maintaining system stability. This paper presents current control scheme for the grid connected inverter with the LCL filter. The proposed scheme ensures the control of injected current into grid with AD of the resonance in the LCL filter while keeping system stability and eliminating the effect of computation delay of the AD loop. An estimation of filter capacitor current with one step ahead is performed using the discrete time observer based on measuring the injected current. This reduces the cost and increases the robustness of the system. Proportional Resonant (PR) controller is used to control the injected current. Design of control system and choosing its parameters are studied and justified in details to ensure suitable performance with adequate stability margins. Simulation and experimental results show the effectiveness and the robustness of the proposed control scheme.


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## Body

## 1. Introduction

With the rapid growth in global energy consumption, distributed power generation systems (DPGS) based on renewable energy sources such as solar energy and wind energy has attracted much more interest because of its environment friendly features, where they minimize greenhouse gas emissions and pollution. The grid connected voltage source inverter (VSI) plays an important role in DPGS, where it connects DPGS to the utility power grid. The inverter injects sinusoidal current to the grid, and this current must be synchronized with grid voltage [1, 2].Conventional proportional integral PI controller has well-known drawbacks as inability to track sinusoidal reference without the steady state error in the stationary reference frame, so it needs to convert AC quantities to DC quantities in d-q synchronous reference frame based on Park transformation, but this transformation increases the burden on DSP and it is difficult to be applied in single phase systems [3–5]. For those reasons, proportional resonant (PR) controller is more attractive since it provides infinite gain at grid fundamental frequency. So, it eliminates the steady state error and contributes in rejection of current harmonics caused by grid voltage. Also, it could be used in the single phase system without any transformations and has the ability of harmonics compensation [6–8].Pulse Width Modulation (PWM) of VSI adds harmonics to grid current. So, a filter is needed to attenuate these harmonics. The LCL filter is more preferable than the L filter since it can provide higher attenuation ability, smaller volume, and lower cost compared with the conventional L filter [9–13]. However, the LCL filter generates high gain peak at resonant frequency. So, any harmonics in grid voltage or inverter voltage close to resonance frequency will cause resonance in the injected current. In the literature, many resonance damping methods have been investigated. The simplest method is the passive damping which is implemented by adding a series resistor to the filter capacitor. This method increases the power loss in the inverter [6, 14]. For this reason, the active damping (AD) method is more attractive. The most widely used method to achieve AD is the proportional control loop (i.e., damping loop) of filter capacitor current [6, 15]. However, this method requires measurement of filter capacitor current. Moreover, some problems related to system stability will appear when the controller is digitally implemented due to computation and modulation delays, especially the delay of AD loop [16, 17]. It has been proved in [16, 17] that the AD loop is necessary when the resonant frequency ωres is smaller than one sixth of the sampling frequency ωs (ωres<ωs/6). The system can be stable without the AD loop if ωres>ωs/6. If ωres=ωs/6 (i.e., the boundary case), the system cannot be stable even with the AD loop. So, it is preferable to reduce the computation delay in the AD loop [16]. One solution proposed is to shift the capacitor current sample instant toward PWM update instant [16], but aliasing in measured current could happen. Some other techniques were proposed to avoid using additional current sensor and achieve damping [18, 19]. In [19], estimate the capacitor current was performed directly from the model depending on the derivative of the measured current, where inverter side current is used as feedback; however, differentiation of measured current will amplify the noise. Ideally, to estimate the capacitor current based on measuring grid side current, second derivative of the measured current is required. However, in practice second derivative could not be implemented due to noise amplification [18]. In [20], the second derivative of the measured current is replaced by the first-order high pass filter, but there would be some difficulties in choosing parameters of high pass filter to maintain stability. The full state feedback controller is used with 11 states’ model in [21]. The robust observer using LMI criterion is implemented to achieve active damming in [22]. In [23], inverter side current is measured and capacitor current is estimated. The extended state observer (ESO) is used to estimate capacitor current and grid voltage but the effects of delays were not discussed. In [24], the full state observer is used with measuring grid side current and an additional lead lag network to compensate control delay. The notch filter to eliminate resonance harmonics components in inverter output voltage is used in [25]. However, the notch filter must be tuned carefully since erroneous tuning will compromise the LCL-filter stability.In this paper, step by step design of grid current control is presented. The current control consists of the PR controller to control the grid current, and AD control loop to eliminate the resonance caused by the LCL filter. The AD control loop is implemented without the additional capacitor current sensor. Discrete time full state Luenberger observer is used to estimate capacitor current and avoid the computation delay in the AD loop. Design of control system parameters, to ensure suitable stability margins, and effects of delay on the single-phase system are explained in the context of this paper. Simulation and experimental results show the effectiveness of the proposed control scheme.This paper is organized as follows. In Section2, the model of LCL filter and inverter is presented. It shows the necessity of damping the resonance in the LCL filter to achieve system stability. In Section 3, synchronous sampling and delay sources will be studied and modelled, and the effect of delay in the AD loop will be discussed. Section 4 presents choosing of controller parameters when the delay in the AD loop is cancelled, as well as the discrete time Luenberger observer is designed to avoid measuring filter capacitor current and the delay in the AD loop. In Section 5, simulation and experimental results are presented to validate the proposed control scheme. In Section 6, the conclusion is stated.


## 2. Modelling of the Inverter and LCL Filter

The closed loop for grid current control with AD based on measuring filter capacitor current is shown in Figure1. The VSI is connected to the grid through the LCL filter. The LCL filter and inverter model could be written as follows:(1)digdtdvcdtdiidt︸X˙=01L20−1C01C0−1L10︸Aigvcii︸X˙+00KPWML1︸Bui+−1L200︸Dvg,(2)y=ig=100︸CX,where L1, L2, and C are the filter parameters, ii, ig, vc, vi, and vg are, respectively, inverter side current, grid side injected current, filter capacitor voltage, inverter output voltage, and grid voltage, ui is the control signal, KPWM is the gain of the inverter and the modulator, vi=KPWMui. To track equations easily, Table 1 contains the main parameters definitions used in this paper. Taking the average model of the PWM modulator, KPWM could be determined as KPWM=VDC/Vcarrier. So, if Vcarrier is scaled to equal VDC, then KPWM=1. The system given by equations (1) and (2) could be modelled in S domain as the block diagram shown in Figure 2. The LCL resonance frequency is given by(3)ωres=2πfres=L1+L2L1L2C.Figure 1
Grid current control scheme of grid connected VSI with active damping by measuring capacitor current.Table 1
Parameter definition.
L1Inverter side inductanceL2Grid side inductanceCFilter capacitorfresResonant frequencyfsSampling frequencyfgGrid frequencyvgGrid voltageVDCDC line voltagekpProportional gainviInverter voltagevcCapacitor voltageiiInverter side currentigGrid side currentuiControl signalkrResonant gainKdActive Damping gainPMPhase marginGMGain marginζDamping factorωcCut-off frequencyKPWMInverter gainRvVirtual resistor of active damping loopCeqEquivalent capacitor of active damping loopReqEquivalent resistor of active damping loopFigure 2
Block diagram of the inverter and LCL filter inS domain.The grid side injected current can be written as follows:(4)igs=Giguisvis+Gigvgsvgs.The transfer functionsGigui and Gigvg could be expressed as follows:(5)Giguis=igsuis=KPWML1L2Css2+ωres2,(6)Gigvgs=igsvgs=−1+L1Cs2L1L2Css2+ωres2.From equation (4), the first term is the grid current caused by the inverter voltage and the second term is the grid current caused by the grid voltage, which plays the role of output disturbance of the controlled system and must be rejected by the controller. The loop gain given in equations (5) and (6) has infinite gain at the resonant frequency ωres, so any harmonics in the grid voltage or inverter voltage close to resonant frequency will cause resonant current and instability. To solve this problem, a series resistor is added to the filter capacitor, but it will increase the power loss in the inverter and that is known as passive damping. For this reason, AD is more preferred, the most widely used method to achieve AD is by taking capacitor current ic multiplied by proportional gain Kd and adding it to the input of the modulator, which is equivalent to add a parallel resistor (virtual resistor) to the filter capacitor [26, 27].As shown in Figure1, Phase Locked Loop PLL is used to estimate the angle θ of the grid voltage. The signal IAref is the desired amplitude of the grid current to be injected into the grid. Grid current reference must be synchronized with the grid voltage. Then, the grid current reference could be generated as follows:(7)Iref=IArefsinθ.Error signaleI=Iref−ig is the input of the current controller GPR, which is the PR controller. Since it achieves high gain at the grid frequency, the PR controller high gain reduces the steady state error and rejects the effect of the grid voltage on the controlled current. The transfer function of the PR controller is given as follows:(8)GPRs=kp+kr2ωiss2+2ωis+ωg2.The parameterskp, kr, and ωg are proportional gain, resonant gain, and grid frequency, respectively. In equation (8), the gain of resonant term at ωg is kr, and the controller has some margins around ωg, where the gain of resonant term at ωg±ωi is kr/2, where ωi could be chosen 1%ωg [3, 28, 29].


## 3. Delay Sources and Its Effect on Active Damping

When the current controller of VSI is digitally implemented, synchronous sampling of the measured current is preferred where samples are taken when the PWM counter of the DSP reaches its maximum and/or minimum value [30]. This sampling technique avoids sampling the harmonics in measured current caused by switching and gets the average value of the current. Moreover, it avoids switching noise or electromagnetic interference (EMI) when the transistors switch on or off [1, 31].Figure3 shows the digital control process; bipolar PWM is used to drive VSI. The triangular signal has normalized amplitude carrier. At time instant k, the interrupt of the PWM occurs and the PWM comparison register is updated according to duty ratio Dk, simultaneously the analog to digital converter (ADC) takes the measurements. Then, the controller starts computing the convenient duty ratio Dk+1 and the computation must be finished before time instant k+1, where the PWM comparison register will be updated again, which means that the digital controller produces delay equal to one sampling period. This delay is commonly called computation delay and it is modelled in S domain as Gcds=e−TsS. After updating the PWM comparison register, it is compared with the carrier to generate the duty ratio. This behavior could be modelled by ZOH as follows:(9)Ghs=1−e−sTss.Figure 3
Digital control process to drive VSI using bipolar PWM.In frequency domain,s=jω; then,(10)Ghjω=1−e−jωTsjω=e0.5∗jωTs−e−0.5∗jωTsjωe−0.5∗jωTs≈Tse−0.5∗jωTs.Since the spectrum of a sampled signal, which is the input of the ZOH, is divided byTs, then the delay caused by modulation is Gmds=e−0.5sTs, which means the modulation delay equals half sampling period.Taking the delay into account makes the control design more complex. Figure4 shows the block diagram of the control system, which takes into account the delay. The transfer functions Gcd1 and Gcd2 are, respectively, the computation delay in the AD control loop and in the grid current control loop. Generally, Gcd1=Gcd2=e−TsS. From the block diagram, it could be found that(11)ig=Gols1+GolsIref+Ggs1+Golsvgs.Figure 4
Block diagram of the control system including delay with AD by measuring capacitor current.The transfer functionGol is the open loop transfer function from grid current error eI to grid current ig when vg=0. Gg is the open loop transfer function from grid voltage to grid current when eI=0. Gg and Gol are given by equations (12) and (13), where delays are included in S domain [32]:(12)Gol=GPRGcd2GmdKPWML1L2Css2+KdKPWMGmdGcd1/L1s+ωres2,(13)Gg=−CL1s2+CKdKPWMGmdGcd1s+1L1L2Css2+KdKPWMGmdGcd1/L1s+ωres2.It could be seen from equation (11) that the stability of the system depends on the open loop transfer function Gol. The AD loop adds a term related to the AD gain Kd in the denominator of the open loop transfer function. This parameter Kd could be tuned together with the control parameters to achieve suitable damping, good stability margins, and good current performance.Without the AD loop (i.e.,Kd=0), the system can be stable if the resonant frequency is greater than ωs/6, where ωs is the sampling frequency [17, 33]. This is because of the delay in the system Gcd2Gmd=e−1.5TsS, which causes a phase lag in the open loop transfer function Gol and will contribute a −90° in phase at ωs/6. So, if the resonant frequency is greater than ωs/6, then the phase of the open loop will cut −180° at ωs/6. Since the proportional resonant controller is equivalent to proportional gain kp at high frequency, the system can be stable by choosing a suitable controller gain without the need of the AD loop. Figure 5 shows the bode plot of Gol without the AD loop, with and without considering the delay.Figure 5
Bode plot ofGol without the AD loop, with and without considering the delay when ωres>ωs/6.Indeed, high resonant frequency will cause higher PWM current ripples. Good attenuation for PWM current ripple means reducing resonant frequency. So, ifωres≤ωs/6, the AD loop is essential to achieve system stability with good PWM harmonics attenuation.When the delay is taken into account, the AD loop is equivalent to a virtual impedance instead of the virtual resistor connected in parallel with the filter capacitor [16, 26, 27]. By replacing the feedback from capacitor current ic to capacitor voltage vc and adding the effect of the active damping loop to the output of 1/L1s, as shown in Figure 6,(14)Zeq=L1CKdKPWMGmdGcd1=L1CKdKPWMe1.5TsS=Rve1.5TsS.Figure 6
Block diagram of the control system with equivalent virtual impedance of the AD loop.Virtual impedance can be introduced as resistorReq and capacitor Ceq in parallel with C, as shown in Figure 7. Replacing s=jω in equation (14), then(15)Zeq=Rve1.5TsS=Rvcos1.5ωTs+jsin1.5ωTs=Req1jωCeq.Figure 7
Equivalent circuit of the virtual impedance.Req and Ceq are determined as(16)Req=Rvcos1.5ωTs,(17)j1ωCeq=−jRvsin1.5ωTs,where Req plays the main role in damping the resonant frequency peak. However, it must be noted that the equivalent resistor can go negative for the frequency ω>ωs/6. And the negative equivalent capacitor Ceq will change the resonant frequency of the system. So, increasing AD gain Kd will increase the actual resonant frequency. If ωres is equal or closed to ωs/6, then a small change in Kd will shift the resonant frequency to be in the negative resistor region. This negative resistor will cause two unstable open loop poles and the system will be nonminimum phase system, which should preferably be avoided if a fast-dynamic response is demanded [18]. According to [16, 17], the system cannot be stable if ωres=ωs/6, and it is difficult to achieve good damping if ωres is close to ωs/6. From equation (16), it could be seen that if the AD loop delay Gcd1=1 (no computation delay in AD loop), negative resistor will appear at ω>ωs/2 which is far from ωs/6 and that means the possibility of extending Kd range and achieving good damping and avoiding unstable poles pair.


## 4. Control Design

As seen previously it is better to eliminate AD loop computation delay. Suppose that AD loop computation delay is cancelled (i.e.,Gcd1=1); then, the open loop transfer function in equation (12) is given as follows:(18)Gol=GPRKPWMe−1.5TsSL1L2Css2+KdKPWMe−0.5TsS/L1s+ωres2.In general, the cutoff frequencyωc should be chosen higher enough than grid frequency to achieve fast dynamic response, at the same time should be less enough than the resonant frequency to achieve good stability margins [6, 29, 34]. The LCL filter can be approximated by the L filter, where L=L1+L2 at frequencies lower than resonant frequency (i.e., the capacitor current can be neglected). At the same time, the proportional resonant controller can be approximated by proportional gain kp. So, the open loop gain can be approximated as follows:(19)Gols≈kpKPWMe−1.5TsSL1+L2s.It could be seen that choosing the cutoff frequencyωc depends on kp only. By replacing s=jωc and taking Goljωc=1 in equation (19), then kp can be found as follows:(20)kp=L1+L2KPWMωc.The gain margin (GM) of the open loop depends on AD gainKd. GM in dB is GM=−20logGoljω0 and ω0 is the frequency, where the phase of the open loop cut −180°. ω0 can change with Kd according to equation (21), where equation (21) can be obtained from ∠Goljω0=−π:(21)π2−1.5Tsω0−atanKdKPWMω0cos0.5Tsω0L1ωres2−ω02+KdKPWMω0sin0.5Tsω0=0.Then, GM atω0 is given by(22)GM=−20logkpKPWM/L2Cω0L1ωres2−ω02+KdKPWMω0sin0.5Tsω02+KdKPWMω0cos0.5Tsω02.Figure8 shows the open loop bode plot for different damping gain values Kd; then, Kd can be tuned to achieve good damping and suitable gain margin (GM>3dB). It should be noted that increasing the damping gain too much will affect the phase margin badly.Figure 8
Bode plot of the open loop for different damping gainsKd and kp=25, kr=1500, fres=1.65kHz, and fs=10kHz.After choosing suitable values forkp and Kd to guarantee suitable cutoff frequency and good gain margin, then phase margin (PM) can be manipulated by changing kr. Commonly, PM is chosen to be (PM>45∘). PM=π+∠Goljωc then from equation (18) PM could be calculated as follows:(23)PM=π2−1.5Tsωc+atan2ωiωckr+kpkpωg2−ωc2−atan2ωiωcωg2−ωc2−atanKdKPWMωccos0.5TsωcL1ωres2−ωc2+KdKPWMωcsin0.5Tsωc.Continuous time system in equation (1) could be described in discrete time with ZOH as follows:(24)Xk+1=AdXk+Bduik+Ddvgk,where Ad=eATs, Bd=A−1Ad−I3B, and Dd=A−1Ad−I3D.The system is observable by measuring grid currentig since rankO=3, where O is the observability matrix given as follows:(25)O=CCAdCAd2.To achieve AD without measuring the capacitor current, capacitor current can be estimated using full state Luenberger-like observer given as follows:(26)X^k+1=AoX^k+Bouik+Dovgk+LCXk−X^kk,where Ao, Bo, and Do are the observer matrices and L=l1l2l3T is the observer gain vector. It could be seen that the observer in equation (26) has another benefit of providing one step prediction for current estimation since it estimates state space vector at time instance k+1 using samples of time instance k, which means avoiding the delay in the AD loop, as shown in Figure 9; as seen previously, it is preferable to cancel this delay for system stabilization.Figure 9
Block diagram of the system with the observer to achieve AD.Kdi^c is taken as feedback to the input of the inverter. It is a state feedback with gain K, where Kdi^c=Kdi^i−i^g=KX^ and the gain vector K=−Kd,0,Kd.If the observer matrices match the system matrices (i.e.,Ao=Ad, Bo=Bd, and Do=Dd), then from equations (24) and (26) the dynamic of the observer error is given as follows:(27)X˜k+1=Xk+1−X^k+1=Ad−LCX˜k.Based on separation principle, the AD loop gain and observer can be designed separately. The observer gain vector should be chosen in a way that does not affect the bandwidth of the system [24, 35]. The characteristic equation of the observer error is third-order polynomial and has three poles, which can be located arbitrary in z plan since the system is observable. The poles are chosen as follows:(28)detzI3−Ad−CdK=z−e−ωo1Tsz−e−ζ−j1−ζ2ωo2Tsz−e−ζ+j1−ζ2ωo2Ts,which consists of one real pole and two complex conjugated poles. The poles of the observer should be chosen at least twice faster than the dynamic of the system. One of the poles is dominant one and the other two conjugated poles should be faster than the dominant pole. These two poles are equivalent to a second order system whose characteristic are determined by (ζ, ωo2); the observer dynamic is determined by its dominant pole.The proportional resonant controller is commonly discretized using Tustin transform with prewarping, since it provides good approximation for this controller around grid frequency [6, 36]:(29)GPRz=GPRss=ωg/tanωgTs/21−z−1/1+z−1.The control design of the system can be summarized step by step as follows:(a)
Determine cutoff frequencyωc by tuning kp according to equation (20)(b)
Determine gain margin GM by solving equations (21) and (22) to find proper damping factor Kd(c)
Determine phase margin PM by tuningkr according to equation (23)(d)
Determine observer gain to place the observer poles in proper locations according to equation (28)(e)
Discretize the PR controller using Tustin transform with prewarping using equation (29)


## 5. Simulation and Experimental Results

Simulations and experiments were carried out to validate the proposed control scheme. The simulations are performed using Matlab/Simulink. The experiments are performed using1kW grid connected inverter with the LCL filter implemented in the lab. The system parameters used in simulations and experiments are listed in Table 2.Table 2
LCL filter parameters and grid characteristics.
Inverter side inductanceL16mHGrid side inductanceL22.1mHFilter capacitorC6μFResonant frequencyfres1.65kHzSampling frequencyfs10kHzGrid frequencyfg50HzGrid voltagevg220VrmsDC line voltageVDC380VPowerP1kWAs mentioned previously, cutoff frequencyωc should be higher enough than grid frequency ωg to achieve fast dynamic response. So, it could be chosen as ωc=10ωg. Then, from equation (20), kp=25. AD gain Kd and resonance gain kr could be determined to achieve GM>3dB and PM>45∘. By solving equations (21)–(23) numerically using Matlab, it could be found that kr=1500 and Kd=30 achieve GM=4.2 and PM=45∘.Dominant pole of the observerz1=e−ωo1Ts is chosen to be three times faster than system dynamic ωo1=3ωc, if (ζ, ωo2) are chosen as ωo2=5ωc and ζ=0.7; then, the equivalent part determined by the other two conjugated poles z2 and z3 is faster than the dominant pole.Figure10 shows the simulation results at full load condition, where inverter side current, injected current, and grid voltage are illustrated. It could be seen that synchronization is achieved and tracking the reference signal is performed with the neglected steady state error, and because of using the PR controller, which produces high gain at grid frequency, it eliminates the steady state error in the injected current.Figure 10
Simulation result at full load conditions.The effectiveness of the control method is studied by dropping the reference current from full load condition to half load conditions. Figure11 shows the simulation result of this case. It could be seen that, at time 55ms, when the reference signal amplitude dropped from 7A to 3.5A, the resonance in the injected current is damped effectively, and the injected current has a fast dynamic response in tracking the new reference.Figure 11
Simulation result when current reference drops to half load conditions from full load conditions.Figure12 shows AD loop capability to stabilize the system and damp the resonance in the injected current. When the AD loop is disabled at time 50ms, the resonance in the injected current appears.Figure 12
Simulation result when AD is disabled.To study the robustness of the proposed method against parameter uncertainties, each parameter ofL1, L2, and C is changed in a range −20%,20% of its nominal value, and system stability is studied against those changes. Figure 13 shows the closed loop poles map of the system, where all poles stay inside the unit circle. Simulation results show the ability of the control scheme to maintain stability despite of wide range of uncertainty.Figure 13
Closed loop poles’ map in thez-plane of the overall system when varying the LCL elements in range −20%,20% of their nominal values, where the red points are nominal places of the poles. (a) L1 changed in range 4.8,7.2mH, (b) L2 changed in range 1.7,2.5mH, (c) C changed in range 4.8,7.2μF, and (d) L1, L2, and C changed together each one in the range −20%,20% of its nominal value.
(a)(b)(c)(d)In practice, the system with the PR current controller and AD method with the discrete time Luenberger observer is implemented using FPGA cyclone II kit, and the injected current is measured using LEM LA 55-P hall effect current sensor, and the grid voltage is measured using a transformer. Synchronous sampling technique is used, where switching frequency equals sampling frequencyfs=10kHz. The same filter and control parameters used in simulation are used in practice. The same cases studied in simulation are applied in experiment.The experiment results are shown in Figures14 and 15, where Figure 14 shows the experiment result of the grid voltage, injected current, and inverter side current at full load conditions, and Figure 15 shows the experimental result of the control process when current reference dropped from full load conditions to half load conditions; it could be shown that the results of the simulation and experimental are close. The results show the powerful performance of the control method in practice.Figure 14
Experimental result at full load conditions.Figure 15
Experimental result when current reference drops to half load condition from full load condition.


## 6. Conclusion

In this paper, a control scheme for the grid connected inverter with the LCL filter is presented. The control scheme is composed of two control loops. The first control loop using the PR controller ensures the grid current control. The second loop, AD loop, eliminates the LCL resonance and ensures the stability. The AD loop is implemented using the discrete time Luenberger observer. Simulation and experimental results show the effectiveness of the proposed control scheme. The proposed control scheme eliminates the computation delay in the AD loop, which has a bad effect on system stability, reducing cost since there is no need to use the additional current sensor. The parameters of the control scheme is chosen and discussed in detail. The results show that when the inverter works in full load conditions, the injected current tracks the reference signal with the neglected steady state error; when the system is tested under hard transient in reference signal from full load condition to half load conditions, the results show the effectiveness in damping the resonant frequency and a fast dynamic response in tracking the reference signal again. In future works, extending the proposed control scheme for the three-phase inverter is planned and the robustness in the proposed control scheme against grid impedance variation and model uncertainty is studied.



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