# MEMS Switches and SiGe Logic for Multi-GHz Loopback Testing

Authors: D. C. Keezer; D. Minier; P. Ducharme; D. Viens; G. Flynn; J. McKillop
Journal: VLSI Design
 (2008)

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## Abstract

We describe the use of microelectromechanical system (MEMS) switches and SiGe logic devices for both passive and active loopback testing of wide data buses at rates up to 6.4 Gbps per signal. Target applications include HyperTransport, fully buffered DIMM, and PCI Express, among others. Recently introduced MEMS devices provide>7 GHz bandwidth in a very small package (needed to handle wide buses). SiGe logic supports >7 Gbps signals when active shaping of the waveform is required. Each loopback module typically supports between 9 and 16 differential channels. Multiple cards are used to handle applications with very wide buses or multiple ports.  Passive cards utilize MEMS for switching between the loopback (self-test) mode and traditional automated test equipment (ATE) source/receiver channels. Future active card designs may provide additional waveform-shaping functions, such as buffering, amplitude attenuation/modulation, deskew, delay adjustment, jitter injection, and so forth. The modular approach permits precalibration of the loopback electronics and easy reconfiguration between debug or characterization testing and high-volume production screening.


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## Body

## 1. Introduction

During  the past few years we have
developed a modular approach for production testing at multiple-GHz rates using
conventional automated test equipment (ATE) [1–4]. The modules have included various
configurations of “driver” and “receiver” channels that multiplex low-speed
(<1 Gbps) ATE signals up to 6.4 Gbps as needed for device-under-test (DUT)
testing. Some applications have required as many as 50–100 differential pair
signals, each running at these multi-Gbps rates [4]. We have successfully
applied this approach on two popular ATE platforms: (1) the Agilent/Verigy
93000-P1000 and (2) the Teradyne UltraFlex with “high-speed-digital” (HSD) and
limited “serial-bus-6 GHz” (SB6G) channels.In this paper, we extend the technique to loopback
testing by introducing several new passive and active modules. We target two
I/O standards  including
HyperTransport3 (HT3 at 5.2 Gbps) and fully-buffered dual in-line memory
module (FB-DIMM at 4.8 Gbps). Section2 describes a newly-developed microelectromechanical
(MEMS) switch technology which is critical to the loopback solutions that are introduced
in Section 3. A comparison of passive loopback modules using either miniature
mechanical relays or MEMS is provided in Section 4. Active loopback solutions are shown in
Section 5.Loopback testing, illustrated in Figure1, is a form of built-in
self-test (BIST), whereby the device-under-test (DUT) contains appropriate
logic to synthesize test signals which are transmitted through the DUT outputs,
and are used to stimulate the DUT inputs. During loopback testing, the DUT
outputs take the place of test signals which traditionally are supplied by the
ATE. This greatly reduces the need for
high-performance ATE resources for the loopback tests. Usually this type of
testing requires minimal support from the ATE, so it is highly economical
especially when testing high-speed devices.Figure 1
Loopback testing in an ATE test configuration.However,
loopback testing is only one of many types of tests that need to be applied to
the DUT. For example, DC parametric tests (such as input leakage measurements,
input and output voltage sensitivities, etc.) require direct connection of the
ATE resources to the DUT I/O.
Furthermore, loopback testing tends to be a pass/fail type test, so
direct connections to the ATE are also required for functional diagnostic
testing.Since
at least two connections are needed for each DUT I/O (one for loopback and one
for traditional testing), and each must support a clean (stub-free) 50-Ohm
transmission path, a high-performance switch is needed for each I/O. Logically, 2 : 1 multiplexers and 1 : 2 fanout
buffers might be considered. However, a passive connection to the ATE is preferred
so that DC parametric and AC waveform characteristics can be tested using traditional
ATE resources. In this paper, we demonstrate the advantages of MEMS for this switching
application.


## 2. MEMS Switch Technology

As in many testing applications, loopback
tests require a way of switching between different signal sources and
receivers. Specifically (as shown in Section3), we need to switch between the
ATE resources and the DUT I/O. The traditional approach is to use mechanical
(or “reed” type relays). However, the large channel-counts and need for
ultra-high bandwidth has forced the development of an even smaller technology
called microelectromechanical systems (MEMS) switches. These have proven to be well suited to the
loopback testing application, and represent a critical enabling technology for wide-bus
applications above 3.2 Gbps (see the performance measurements in Sections 4 and
5).Recently, TeraVicta has introduced a MEMS switch called TT712. The TT712 switch is fabricated
using metal deposition processes found in most CMOS microelectronics
manufacturing facilities. However, it also incorporates a number of proprietary
features that enable both high performance and high reliability. The TT712 uses
a unique device-on-package construction in which the MEMS device is fabricated
directly onto the primary packaging material, in this case a ceramic (alumina)
wafer with conductive metal vias. Individual switch features are patterned
using conventional sputter deposition and etching processes with bulk metal
layers (including the sacrificial material) fabricated via electroplating. A
selective metal etch is used to remove this sacrificial metal layer (the
“release” process), leaving the free standing MEMS switch structure. A scanning
electron micrograph (SEM) is shown in Figure2.Figure 2
SEM photographs of the high force disk actuator (a) and details of the
switch contact area (b).This “device-on-package” architecture has several significant benefits, especially
in high-bandwidth test applications. First, the use of conductive vias
minimizes the conduction paths within the device and between the device and the
printed circuit board, directly reducing insertion loss and minimizing the
length of radiating conductive elements that degrade high-frequency performance
[5]. This, coupled with surface mount technology (SMT) compatible ball grid array
(BGA) solder ball attachment, provides reliable, highly manufacturable signal
connections that deliver chip-level high-frequency performance to the circuit
board. The use of an alumina substrate also provides substantially lower high-frequency
losses than the silicon substrates used in other MEMS switches [6]. This is
especially true for devices operating at higher frequencies and for
through-substrate via designs like the TT712.Failures
due to stiction between metal surfaces following removal of the sacrificial
metal are minimized by key features of the proprietary high force disk actuator
(HFDA). This uses a circular design to maximize contact stability and to restore
force within the smallest possible footprint. This design also maximizes
contact force (proportional to electrode area), which is a key factor in
enabling low contact resistance (insertion loss) [7]. Contact stability is
further optimized using a “three point” contact configuration, which helps
assure that the force on the active electrical contact is highly uniform and
repeatable. This results in a very low
loss, highly repeatable contact configuration as shown.The
large restoring force of this design is required to provide reliable (stiction
free) operation. Although this results in a relatively high switch voltage
(68 V), low voltage operation (3–5 V) can be achieved through the use of a
separate charge pump IC.Switches with multiple
contact configurations, such as single-pole-double-throw (SPDT) and
double-pole-double-throw (DPDT) are constructed by connecting multiple HFDAs in
a single package. This is illustrated by the solid model of the basic DC-7 GHz SPDT switch shown in Figure3, which is shaded according to
electric potential of the metal surface (darkest features corresponding to the
highest field). The RF signal is conducted into the switch through a central
terminal (RF common), which connects to two HFDAs on the device.Figure 3
Ansoft model of the DC-7 GHz SPDT switch.The package is carefully
matched to 50-Ohm impedance throughout a very wide bandwidth. Typical
RF performance of the DC-7 GHz SPDT switch is presented in Figure4, and shows that these devices
have insertion loss of less than 0.1 dB at frequencies less than 1 GHz (<0.4 dB at 7 GHz), more than 20 dB of return loss and at
least 25 dB of isolation. These devices are capable of switching up to 15 W of
continuous RF power, with a peak power handling capability of at least 30 W.Figure 4
Typical RF performance of the DC-7 GHz SPDT switch.In
addition to the MEMS Switch’s electrical and reliability advantages, there are
two other very attractive features important for the loopback test application.
First, the electrostatic nature of the actuator is inherently a low-power
device, requiring an insignificant amount of current (≪1 uA) to maintain
the desired state. Therefore, there is negligible power dissipated within the switches
of the loopback module. This feature reduces the cooling requirements. Even
more important for large signal-count applications is the significantly smaller
package size as compared with typical RF mechanical relays. This is illustrated
in Figure 5. The MEMS package has a
somewhat smaller footprint, but a much shorter height. This shorter dimension is a great advantage when designing thin
loopback modules which permits the use of more modules to handle higher-density
buses.Figure 5
Size comparison of typical mechanical RF relay and MEMS switch packages.Notice that the footprint of the TT712 package
is heavily dominated by the external connections. The internal switch elements
account for a very small fraction of the device footprint (as seen in Figure3). Therefore, the MEMS technology
has the potential to provide higher levels of integration and therefore support
for much higher bus densities.


## 3. Loopback Module Designs

Fundamentally,
the minimal loopback test requires that the DUT outputs be connected to appropriate
DUT inputs as introduced in Figure1, and shown in more detail in Figure 6. This allows the internal built-in self-test (BIST)
circuits to generate test stimulus patterns for its own inputs, which are then
analyzed by internal BIST circuitry as well.
However, because we also need to do extensive DC parametric tests, as
well as lower-speed functional tests, there must be an option to break the
loopback path and substitute connections directly to/from the ATE (also shown
in the figure). Switches (relays) are the obvious choice for this. However,
great care is required in order to preserve signal integrity at multi-GHz
rates.Figure 6
Minimum signal connection paths for loopback
and switches to allow direct connection to ATE channels.The design of a suitable loopback module can
leverage many of the features that we have previously applied to “driver” and “receiver”
modules. For
example, in the design of these earlier modules we have taken great care in
selecting connectors, relays, and active components that can support the high
bandwidth required for multi-GHz signals. We have also devised a common card
configuration that fits within the physical constraints of the ATE testheads,
while allowing for a maximum number of modules. In many test applications, the
entire available volume located directly under the device-interface-board (DIB)
is occupied by our modules.Figure7
shows a bottom view of a 2-slot DIB with one of our early 2-card loopback
boards mounted in “Slot 1.”
This loopback
board was specifically designed to be a direct “drop-in” replacement for a 9-channel
HyperTransport driver module (8 data and a clock signal). In this application, Slot 2 (empty in the
photo) normally holds a receiver module which likewise can be replaced with
another loopback card. The two cards connect to one another through an array of
coaxial connectors (upper right corner of the photo), thereby completing the
connection of 9 differential pairs for the loopback test.Figure 7
Nine-channel passive loopback card in a 2-slot
configuration (slot 2 is empty). Bottom view
of DIB.The cards have mechanical
RF relays that allow the DUT I/O to either be connected in the loopack
configuration or directly to ATE channels (“low speed” connections). This
arrangement is illustrated in Figure8. In
the figure the heavy dark arrows show the loopback path and also represent the
coaxial connectors (which can be seen in Figure 7). The thinner lines/arrows
show the “low speed” connections to/from
the ATE.Figure 8
Two-cardpassive loopback
switch arrangement. These loopback
modules are “drop-in” replacements for active driver and receiver modules.In other designs
(where drop-in compatibility was not required), we incorporated both the driver
and receiver loopback switches onto a single card. This eliminates the
card-to-card coaxial connections and reduces transmission line lengths. The
“single-card” loopback arrangement is shown in Figure9.
Performance characteristics for each of these configurations are given in the
following sections.Figure 9
Single-cardpassive loopback switch arrangement. A customized single-card
arrangement provides a more efficient (higher-performance) loopback path.In order to
remove heat and to tightly control the module temperature (for improved timing
accuracy) we construct water-cooled heatsinks for each card. When using mechanical
relays, the total module thickness is between 0.75
and 1.00 inch and is largely limited by the height of the relay packages.
The use of MEMS switches not only reduces the power dissipation, but also
allows the total module thickness to be reduced by about 1/4 inch, freeing up
space for more modules under the DIB.


## 4. Passive Loopback Module Performance

In this section,
we demonstrate the performance of several “passive” loopback cards, beginning
with a 2-card arrangement (as in Figures6 and 7), comparing cards built with
mechanical RF relays to those using MEMS. We also demonstrate a single-card
configuration (as shown in Figure 9) which uses MEMS.Figure10 shows the performance of an individual passive loopback
card designed for the 2-card configuration (Figure 8). Here the data eye diagram is shown at 3.2 Gbps
and 5.0 Gbps. There is a clear degradation of the data eye above 3.2 Gbps. We
have determined that this is due to a combination of factors, including
dielectric loss, skin effect loss, losses within the relays and small impedance
discontinuities in the signal path. Channel-to-channel skew was less than 10 picoseconds. The losses
are even more evident when both driver and receiver loopback cards are operated
together, as shown in Figure
11.Individual card performance of a 2-card
passive loopback configuration, usingmechanical
RF relays.
(a)(b)(c)(d)Full 2-card performance usingmechanical relays.
(a)(b)(c)(d)In order to check
the performance of the MEMS switches, we built a new passive loopback card
using these in place of the mechanical relays (otherwise the designs were very
similar to that shown in Figures7 and 8). The new card using MEMS exhibited
similar performance to the earlier design as shown in Figure 12 (compare to Figure 10).  Although the jitter and loss characteristics
are similar to those of the mechanical relay card, there is a big improvement in
power dissipation (much lower) and a significant reduction in module thickness.Individual card performance of a 2-card
passive loopback configuration,using MEMSrelays (compare to Figure 10).
(a)(b)(c)(d)Even though
these passive loopback cards were able to
pass data at rates up to 5 Gbps and beyond, the signal amplitude was increasingly attenuated above 3.2 Gbps.
To provide full performance at higher rates required the use
ofactive circuits, as shown in the
next section.


## 5. Active Loopback Module Performance

As we saw in
Section4, the performance of passive loopback cards is somewhat limited by the
dielectric and skin-effect losses. In some applications these losses are
realistic and/or can be tolerated (i.e., when the input receivers have high
sensitivity). However, in other cases we desire to recover the full amplitude
signal before transmitting back to the DUT. This requires an active circuit, typically a buffer
or amplifier. If a variable amplitude buffer/amplifier is used, then we can adjust
the amplitude to emulate either small- or large-signal situations. For instance,
this can be used to measure or screen for input sensitivity.This basic
“active loopback” configuration is shown in Figure13(a). In our cards we have
utilized commercially-available SiGe buffers with variable amplitude adjustment
(100 mV to 700 mV) in order to handle data rates up to ~7 Gbps. Only about 10 picoseconds of skew is introduced
throughout this range.  We can also include features such as jitter injection,
preemphasis, skew adjustment, and so forth depending on the type of testing
required. This is illustrated in Figure 13(b). Such features may be
implemented in future designs using SiGe logic technology.(a) The basicactive loopback configuration and
(b) active loopback with advanced features.
(a)
basic active loopback(b)
Advanced active loopbackTo support
HyperTransport3 loopback testing, we have constructed a 16-channel active
loopback card, with each channel having a variable-amplitude differential SiGe
buffer (as in Figure13(a)). The entire card has an adjustable DC offset for matching
to the DUT characteristics.The typical
performance (data eye diagrams) for one of the HyperTransport3 active loopback
channels is shown in Figure14 for both 5.2 Gbps and 6.4 Gbps. It can be seen that this
card provides exceptionally good performance up to the target test rate of 5.2 Gbps
and even to 6.4 Gbps. The channels add about 22 picoseconds to the
total jitter. A detailed jitter analysis shows that RJ = 1.66 picoseconds, DJ = 31 picoseconds,
and TJ = 52 picoseconds at BER = 10−12.The card actually functions up to
8.0 Gbps, with gradually degrading data eyes above 6.4 Gbps. We have measured channel-to-channel skew across all 16
channels to be less than 10 picoseconds.HyperTransport3 active loopback performance at
5.2 Gbps and 6.4 Gbps. Jitter analysis is at 6.4 Gbps.
(a)(b)(c)(d)


## 6. Limitations and Discussions

While the loopback cards demonstrated here met their target performance
objectives, between 3.2 and 6.4 Gbps, it is clear that more work is required to
handle higher rates (10 Gbps and above). Even with our best efforts, we are not
able to completely eliminate jitter. As we increase frequency, the significance
of “small” jitter increases and can pose the limiting obstacle to achieve these
speeds. Future development is
required to realize some “advanced” loopback features that we have suggested,
such as jitter injection, deskew, preemphasis, and so forth.As small as the current MEMS switch is, it is still not small enough for
extreme applications involving hundreds of loopback channels. On the other
hand, the fundamental MEMS technology lends itself to higher levels of
integration, which therefore promises to solve this problem in the near future.
Also, a higher-performance MEMS
switch has recently been introduced by TeraVicta that has <0.4 dB insertion
loss from DC to >20 GHz [8]. This level of performance will be required for
loopback testing above 10 Gbps.


## 7. Conclusions

In this paper, we have shown that loopback testing of multi-Gigahertz
devices can be enhanced by using MEMS switches and SiGe logic devices. The
modular approach provides a high degree of flexibility. Achieving low-distortion
signals at 5 Gbps and 6.4 Gbps requires careful attention to details within the
module design, including the choice of relays, connectors, and logic components.
Very careful attention to transmission line design is necessary to achieve picosecond
delay matching and impedance matching. Newly developed MEMS switches provide
higher bandwidth and smaller size compared to traditional relays. Readily
available SiGe logic can be used to configure a variety of active loopback
structures that exhibit minimal losses up to 6.4 Gbps.



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