# Photovoltaic Energy Conversion System Constructed by High Step-Up Converter with Hybrid Maximum Power Point Tracking

Authors: K. I. Hwu; W. C. Tu; C. R. Wang
Journal: International Journal of Photoenergy
 (2013)

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## Abstract

A photovoltaic energy conversion system, constructed by high step-up converter with hybrid maximum power point tracking (HMPPT), is presented. A voltage converter with a high voltage conversion ratio is proposed, which is simple in circuit and easy in control. After this, such a converter operating with a suitable initial duty cycle of the pulsewidth-modulated (PWM) control signal, together with the proposed HMPPT algorithm combining the fractional open-circuit voltage method and the incremental conductance method, is applied to the photovoltaic energy conversion system. By doing so, not only the maximum power point tracking speed can be increased, but also the oscillation around the maximum power point can be reduced. Aside from these, the field programmable gate array (FPGA) is used as a control kernal of the overall system, so as to realize the HMPPT and fully digitalized control. Finally, via a PV simulator, some experimental results are provided to verify the effectiveness of the proposed photovoltaic energy conversion system.


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## Body

## 1. Introduction

With energy shortage, the solar cell energy is getting more and more important in the world. The photovoltaic energy conversion system contains the solar array, the power conditioner, the electric box, the transformer, the battery, and so forth. As for the power conditioner, it contains DC-DC converter, DC-AC inverter, and the accompanying controller.As generally recognized, high step-up converters are widely used in various applications. In the photovoltaic energy conversion system, the high step-up converter takes an important role in boosting voltage from the low level to the high level as well as in executing the maximum power point tracking. Up to the present, there have been many methods to realize high step-up converters. For example, the literatures [1–9] take the coupling inductor methods or the charge pump methods; the literatures [10–14] adopt the energy superposition or even combine the methods mentioned above. However, the literatures [15–27] have individual demerits. In [9, 13], the output voltages are floating, thus limiting their industrial applications to some extent. In [5, 9, 12, 15, 26, 27], the power switches are floating, thereby causing the gate drivers to be isolated and hence the circuit complexity and cost to be increased. In [16–23], the circuit structures are too large, thus causing the corresponding analysis and design to be complicated or the efficiency to be degraded. In [7, 13, 14], although the circuits are simple and easy to implement, the corresponding voltage conversion ratios are not so high, thereby limiting their industrial applications to some extent. In [3, 15, 16, 25], although the high voltage conversion ratios can be achieved, the high-nonlinear voltage conversion ratios make the systems difficult to control; that is, too many poles and zeros lead to high-order controllers required. As generally recognized, the photovoltaic energy conversion system often uses the battery as a buffer. However, for analysis convenience, the proposed photovoltaic energy conversion system is without the battery and is constructed only by the solar array and the proposed DC-DC converter with the proposed hybrid maximum power point tracking (HMPPT). In the following, the overall system will be described first, and secondly the DC-DC converter will be depicted along with its basic operating principles and small-signal AC model. After this, the HMPPT algorithm will be shown. Finally, some experimental results will be provided to verify the proposed topology.


## 2. Overall System Configuration

Figure1 shows the overall system function block diagram, which is constructed mainly by one solar array, one DC-DC converter, one FPGA controller with peripheral circuits containing one current sensor, one voltage divider, two ADCs (analog-to-digital converters), and two SPIs (series peripheral interfaces). In FPGA, there are one PWM generator, one HMPPT algorithm, one oscillator, and one phase lock loop. The solar array sends out the voltage to the DC-DC converter as well as to the voltage divider. Such a DC-DC converter is controlled by FPGA via the gate driving signals vgs1, vgs2, and vgs3, which needs the digital voltage and current signals, Vpv and Ipv, coming from the solar array after the current sensor, the voltage divider, ADCs, and SPIs. It is noted that the output of the solar array is replaced by the output of the PV simulator, and the output of the proposed DC-DC converter is sent to the electronic load operating under the constant voltage mode.Figure 1
Overall system configuration.Figure2(a) shows the proposed high step-up converter, which is established by one charge pump, one dual-inductor circuit, one output diode, and one output capacitor. The charge pump is built up by one capacitor Cb, one diode Db, and two switches S1 and S2, whereas the dual-inductor circuit is constructed by one capacitor Ce, two diodes D1 and D2, and two inductors L1 and L2. By the way, the load is represented by one resistor RL. It is noted that RL is used for the convenience of analysis of the behavior of the proposed DC-DC converter but will be replaced by the electronic load for the photovoltaic energy conversion system to be considered.(a) Proposed high step-up converter; (b) current flow in State 1; (c) current flow in State 2.
(a)
(b)
(c)


## 3. Proposed High Step-Up Converter

As generally acknowledged, the solar cell or PV generator is ideally modeled by one current source connected in parallel with one diode. The voltage across the turn-on diode is according to the illumination density. Therefore, in this paper, under a given illumination intensity at the MPP, the maximum output power of the solar cell can be obtained, and hence the corresponding output voltage and current can be known. So, at the MPP, the output voltage of the solar cell can be kept almost constant, whereas, not at the MPP, the output voltage of the solar cell is varied with the output power of the solar cell. However, in general, the DC-DC converter in the photovoltaic energy conversion system is the first stage, whose output voltage is kept constant because the second stage, AC-DC converter, can be designed to have its own input voltage controlled at some value. Consequently, for the convenience of the design and verification of the proposed high step-up converter, this converter is disconnected from the system and verified under the constant input voltage equal to the output voltage of the solar cell at the MPP, along with voltage loop control. After this, the designed converter is connected to the solar cell and controlled based on the proposed hybrid MPPT algorithm.Prior to going into this section, there are some symbols and assumptions to be given as follows. The input voltage isvi, the input current is ii, the output voltage is vo, the currents flowing through L1, L2, Cb, and Ce are iL1, iL2, ib, and ie, respectively, and the voltages across switches and diodes during the turn-on period and the blanking times between two MOSFET switches are zero. Besides, since the energy-transferring capacitors Cb and Ce, operating based on the charge pump principle, are abruptly charged to some voltages within a very short time which is much less than the switching period Ts, it is reasonably assumed that the voltage across the capacitor Cb is equal to vi, and the voltage across the capacitor Ce is equal to 2vi. Since this converter is also assumed to operate in the continuous conduction mode (CCM), there are two operating states in such a converter. Therefore, the following analyses contain the explanation of the current flow direction in each state, the description of the differential equations, the relationship between DC input voltage Vi and DC output voltage Vo, and the small-signal equations and model.Under the assumption that the value ofL1 is equal to that of L2, let
(1)L=L1+L2,iL1=iL2=i.


### 3.1. State  1  (t0~t1)

As shown in Figure2(b), S1 and S2 are turned on, S3 is turned off, D1 and D2 are forward biased, and Db is reverse biased. Since the voltage across Ce is equal to 2vi, L1 and L2 are to be magnetized. During this state, the output energy required is supplied from Co, Cb is discharged, and Ce is charged. Therefore, the corresponding differential equations are
(2)Ldidt=4vi,Codvodt=-voRL,ii=iL1+iL2+ie=2i+ie.


### 3.2. State  2  (t1~t0+Ts)

As depicted in Figure2(c), S1 and S2 are turned off, S3 is turned on, D1 and D2 are reverse biased, and Db is forward biased. During this state, vi plus L1 and L2 releases energy to the load, thereby causing L1 and L2 to be demagnetized. Besides, Cb is charged, and Ce is discharged. Therefore, the corresponding differential equations are
(3)Ldidt=3vi-vo,Codvodt=i-voRL,ii=i+ib.
Prior to obtaining the average equations from (2) and (3), there is a symbol 〈y〉 that is used to represent the average value of a variable y, where y indicates voltage or current as follows:
(4)〈y〉=1Ts∫0Tsydτ.
According to (2)–(4), the averaged equations can be obtained to be
(5)Ld〈i〉dt=(3+d)〈vi〉-(1-d)〈vo〉,Cod〈vo〉dt=(1-d)〈i〉-〈vo〉RL,〈ii〉=(1+d)〈i〉+(1-d)〈ib〉+d〈ie〉,
where d is a variable denoting the duty cycle of the PWM control signal for Q1.Based on the ampere-second balance,〈ie〉 and 〈ib〉 can be expressed as a function of 〈i〉 and a function of 〈i〉 and 〈ie〉, respectively, to be
(6)〈ie〉=(1-d)〈i〉d,〈ib〉=d(2〈i〉+〈ie〉)1-d.
And hence, by substituting (6) into (5), (5) can be rewritten as
(7)Ld〈i〉dt=(3+d)〈vi〉-(1-d)〈vo〉,Cod〈vo〉dt=(1-d)〈i〉-〈vo〉RL,〈ii〉=(3+d)〈i〉.
Prior to obtaining the small-signal AC model from (7), the perturbation and linearization of (7) are indispensable. First of all, 〈y〉 is represented by the corresponding DC quiescent value Y plus the superimposed small AC variation y^, along with the assumption that AC variation is small in magnitude compared to the DC quiescent value.Let(8)〈vi〉=Vi+v^i,|v^i|≪Vi,〈vo〉=Vo+v^o,|v^o|≪Vo,〈ii〉=Ii+i^i,|i^i|≪Ii,〈i〉=I+i^,|i^|≪I,d=D+d^,|d^|≪D.
Next, by substituting (8) into (7), the following equations are obtained:
(9)Ld(I+i^)dt=(3+D+d^)(Vi+v^i)-(1-D-d^)(Vo+v^o),Cod(Vo+v^o)dt=(1-D-d^)(I+i^)-(Vo+v^o)RL,Ii+i^i=(3+D+d^)(I+i^).
Consequently, the DC quiescent equations from (9) can be obtained to be
(10)0=(3+D)Vi-(1-D)Vo,0=(1-D)I-VoRL,Ii=(3+D)I.
And hence, the corresponding voltage conversion ratio of this converter from (10) can be obtained to be
(11)VoVi=3+D1-D.
On the other hand, with the second-order AC terms neglected, the small-signal AC equations can be obtained to be
(12)Ldi^dt=(Vo+Vi)d^+(3+D)v^i-(1-D)v^o,Codv^odt=-Id^+(1-D)i^-v^oRL,i^i=(3+D)i^+Id^.
And hence, the resulting small-signal AC model of the proposed high step-up converter is shown in Figure 3 according to (12), where T1 and T2 are the ideal transformers with the turns ratios of 1:(3+D) and (1-D):1, respectively. Accordingly, by taking the Laplace transform of (12), the relationship between v^o(s), v^i(s), and d^(s) can be expressed to be
(13)v^o(s)=Gvg(s)v^i(s)+Gvd(s)d^(s),
where(14)Gvg(s)=v^o(s)v^i(s)|d^(s)=0=(3+D)(1-D)×[11+s(L/(1-D)2RL)+s2(LCo/(1-D)2)],(15)Gvd(s)=v^o(s)d^(s)|v^i(s)=0=(Vo+Vi)(1-D)×[1-s(LI/(1-D)(Vo+Vi))1+s(L/(1-D)2RL)+s2(LCo/(1-D)2)],where Gvg(s) is the input-to-output transfer function and Gvd(s) is the control-to-output transfer function. From (15), it can be seen that the proposed converter has one right half-plane zero.Figure 3
Small-signal AC model for the proposed high step-up converter.


## 3.1. State  1  (t0~t1)

As shown in Figure2(b), S1 and S2 are turned on, S3 is turned off, D1 and D2 are forward biased, and Db is reverse biased. Since the voltage across Ce is equal to 2vi, L1 and L2 are to be magnetized. During this state, the output energy required is supplied from Co, Cb is discharged, and Ce is charged. Therefore, the corresponding differential equations are
(2)Ldidt=4vi,Codvodt=-voRL,ii=iL1+iL2+ie=2i+ie.


## 3.2. State  2  (t1~t0+Ts)

As depicted in Figure2(c), S1 and S2 are turned off, S3 is turned on, D1 and D2 are reverse biased, and Db is forward biased. During this state, vi plus L1 and L2 releases energy to the load, thereby causing L1 and L2 to be demagnetized. Besides, Cb is charged, and Ce is discharged. Therefore, the corresponding differential equations are
(3)Ldidt=3vi-vo,Codvodt=i-voRL,ii=i+ib.
Prior to obtaining the average equations from (2) and (3), there is a symbol 〈y〉 that is used to represent the average value of a variable y, where y indicates voltage or current as follows:
(4)〈y〉=1Ts∫0Tsydτ.
According to (2)–(4), the averaged equations can be obtained to be
(5)Ld〈i〉dt=(3+d)〈vi〉-(1-d)〈vo〉,Cod〈vo〉dt=(1-d)〈i〉-〈vo〉RL,〈ii〉=(1+d)〈i〉+(1-d)〈ib〉+d〈ie〉,
where d is a variable denoting the duty cycle of the PWM control signal for Q1.Based on the ampere-second balance,〈ie〉 and 〈ib〉 can be expressed as a function of 〈i〉 and a function of 〈i〉 and 〈ie〉, respectively, to be
(6)〈ie〉=(1-d)〈i〉d,〈ib〉=d(2〈i〉+〈ie〉)1-d.
And hence, by substituting (6) into (5), (5) can be rewritten as
(7)Ld〈i〉dt=(3+d)〈vi〉-(1-d)〈vo〉,Cod〈vo〉dt=(1-d)〈i〉-〈vo〉RL,〈ii〉=(3+d)〈i〉.
Prior to obtaining the small-signal AC model from (7), the perturbation and linearization of (7) are indispensable. First of all, 〈y〉 is represented by the corresponding DC quiescent value Y plus the superimposed small AC variation y^, along with the assumption that AC variation is small in magnitude compared to the DC quiescent value.Let(8)〈vi〉=Vi+v^i,|v^i|≪Vi,〈vo〉=Vo+v^o,|v^o|≪Vo,〈ii〉=Ii+i^i,|i^i|≪Ii,〈i〉=I+i^,|i^|≪I,d=D+d^,|d^|≪D.
Next, by substituting (8) into (7), the following equations are obtained:
(9)Ld(I+i^)dt=(3+D+d^)(Vi+v^i)-(1-D-d^)(Vo+v^o),Cod(Vo+v^o)dt=(1-D-d^)(I+i^)-(Vo+v^o)RL,Ii+i^i=(3+D+d^)(I+i^).
Consequently, the DC quiescent equations from (9) can be obtained to be
(10)0=(3+D)Vi-(1-D)Vo,0=(1-D)I-VoRL,Ii=(3+D)I.
And hence, the corresponding voltage conversion ratio of this converter from (10) can be obtained to be
(11)VoVi=3+D1-D.
On the other hand, with the second-order AC terms neglected, the small-signal AC equations can be obtained to be
(12)Ldi^dt=(Vo+Vi)d^+(3+D)v^i-(1-D)v^o,Codv^odt=-Id^+(1-D)i^-v^oRL,i^i=(3+D)i^+Id^.
And hence, the resulting small-signal AC model of the proposed high step-up converter is shown in Figure 3 according to (12), where T1 and T2 are the ideal transformers with the turns ratios of 1:(3+D) and (1-D):1, respectively. Accordingly, by taking the Laplace transform of (12), the relationship between v^o(s), v^i(s), and d^(s) can be expressed to be
(13)v^o(s)=Gvg(s)v^i(s)+Gvd(s)d^(s),
where(14)Gvg(s)=v^o(s)v^i(s)|d^(s)=0=(3+D)(1-D)×[11+s(L/(1-D)2RL)+s2(LCo/(1-D)2)],(15)Gvd(s)=v^o(s)d^(s)|v^i(s)=0=(Vo+Vi)(1-D)×[1-s(LI/(1-D)(Vo+Vi))1+s(L/(1-D)2RL)+s2(LCo/(1-D)2)],where Gvg(s) is the input-to-output transfer function and Gvd(s) is the control-to-output transfer function. From (15), it can be seen that the proposed converter has one right half-plane zero.Figure 3
Small-signal AC model for the proposed high step-up converter.


## 4. Hybrid Maximum Power Point Tracking

The proposed HMPPT algorithm combines the incremental conductance method and the fractional open-circuit voltage method, so as to reduce the required time between the startup and the maximum power point as well as to remove the perturbation on the PV output voltage at the maximum power point. As shown in Figure4, the duty cycle of the pulsewidth-modulated (PWM) control signal, Dmppt, is set to zero first so as to obtain the open voltage Voc from the PV simulator. After this, such a value is multiplied by the value of k so as to obtain the voltage reference Vref, which is used to determine which method is adopted. Above all, since the left side of the maximum power point has the slower slope than the right side of the maximum power point, the maximum power point tracking gets started from the left side of the maximum power point with Dmppt set to an initial value of Dini, which is close to the duty cycle which lets the proposed high step-up converter work under the rated output voltage. By doing so, the maximum power point can be stably and fast tracked. The corresponding basic operating principles are to be described in details as follows.Figure 4
Flow chart for the proposed HMPPT.As shown in Figure5, the P-V curves outputted from the PV simulator are taken into account. Therefore, let the voltage references Vref1 and Vref2 for the maximum illuminance and the minimum illuminance, respectively, fall on the left sides of the individual maximum power points. Accordingly, the value of k is set at 0.73. Hence, the lower bound value Vmppt_L and the upper bound value Vmppt_H correspond to Vref2 minus 5 V and Vref1 plus 5 V, respectively. If the tracking point falls within the interval between Vmppt_L and Vmppt_H, then the HMPPT algorithm is changed from the fractional open-circuit voltage method to the incremental conductance method. If the digital voltage signal Vpv below Vmppt_L, then the duty cycle of PWM control signal, Dmmpt, is increased by the incremental value ΔD, where ΔD is set to one. If Vpv beyond Vmppt_H, then Dmmpt is decreased by ΔD, where ΔD is also set to one. It is noted that if the interval between Vmppt_L and Vmppt_H is too large, then the voltage outputted from the PV simulator, vpv, is far from the maximum power point; otherwise, it is close to the maximum power point.Figure 5
P
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V curves obtained from the PV simulator.Furthermore, in order to makevpv reach the maximum power point as soon as possible, Dmmpt is initially set to Dini of 0.35, which is close to the duty cycle of the proposed high step-up converter operating under the rated output voltage. Furthermore, the minimum duty cycle Dmin is 25% and the maximum duty cycle Dmax is 45%. If Dmmpt is below Dmin or above Dmax, then Dmmpt will be set to Dini and the algorithm will go ahead from this; otherwise, the values of Vpv and Ipv will be updated and the algorithm will go ahead from this.OnceVpv falls between Vmmpt_L and Vmmpt_H, the tracking point enters into the incremental conductance region. Accordingly, whether the voltage difference between Vpv and Vold, dV, is zero or not will be checked first so as to avoid the denominator of the current difference between Ipv and Iold, dI, over dV being zero, where Vold and Iold are the previous values of Vpv and Ipv, respectively.From Figures4 and 6(a), as dV is not zero, the relationship between dI/dV and minus conductance, -I/V, is used to determine whether Dmmpt is increased or not. If dI/dV is equal to -I/V, then ΔD is zero, implying the tracking point is stabilized at the maximum power point. If dI/dV is larger than -I/V, then Dmmpt is increased by one; otherwise Dmmpt is decreased by one.Judgment for the incremental conductance method.
(a)
(b)From Figures4 and 6(b), as dV is zero, dI is used to determine whether Dmmpt is increased or not. If dI is zero, then ΔD is zero. In Figure 6(b), as the I-V curve is changed from curve 1 to curve 2, dI is positive, implying that the tracking point is on the left side of the maximum power point and hence increasing Dmmpt by one; as the I-V curve is changed from curve 1 to curve 3, dI is negative, implying the tracking point is on the right side of the maximum power point and hence decreasing Dmmpt by one. After this, VoldandIold are both set to Vpv and Ipv, respectively.


## 5. Experimental Results

Prior to this section, there are some specifications to be given. Table1 shows CSSS-100 solar array specifications, which the PV simulator will be used to construct the simulation environment. Table 2 shows the proposed converter specifications. Table 3 shows the component specifications.Table 1
CSSS-100 solar array specifications.
Item
Value
Max. power (Pmax)
100 W
Max. power voltage (Vmp)
76 V
Max. power current (Imp)
1.32 A
Open Voltage (Voc)
100 V
Short current (Isc)
1.65 ATable 2
Converter specifications.
Item
Value
Rated input voltage (Vi)
76 V
Rated output voltage (Vo)
400 V
Rated output current (Io)
1.32 A
Switching frequency (fs)
200 kHzTable 3
Component specifications.
Component
Value/product name
L
1 and L2
1.4 mH
C
b and Ce
220μF/220 V Electrolytic Capacitor
C
o
220μF/450 V Electrolytic Capacitor
S
1 and S2
FQA55N25
S
3
SPP20N60C3
D
1 and D2
SFF1008G
D
o
STTH12R06D
ADC
ADCS7476
FPGA
EP1C3T100C8NBefore verification of the proposed HMPPT, there are some experimental results to be given on the condition that the proposed converter is disconnected from the solar cell system with the input voltage of 76 V. Figure7(a) shows the gate driving signal for S1, vgs1, the current in Do, iDo, the current in L1, iL1, and the current in L2, iL2, at 25% of the rated load, whereas Figure 7(b) shows the gate driving signal for S1, vgs1, the current in Do, iDo, the current in L1, iL1, and the current in L2, iL2, at 50% of the rated load. From these results, it can be seen that the proposed converter can operate stably. In addition, Figure 8 shows the curve of efficiency versus load current. From Figure 8, it can be seen that the efficiency is above 82.5% all over the load range and can be up to 91%.Measured waveforms: (a) 25% load—(1)vgs1; (2) iDo; (3) iL1; (4)  iL2. (b) 50% load—(1)  vgs1; (2) iDo; (3)  iL1; (4)  iL2.
(a)
(b)Figure 8
Efficiency versus load current.In the following, the solar array is implemented by the PV simulator named PVS01203. Based on such a simulator, different illumination intensity levels are given to verify the proposed HMPPT algorithm.For the perturbation and observation method to be applied, under illumination intensity of 1000 W/cm2, Figure 9(a) shows the output voltage from the PV simulator, vpv, the output current from the PV simulator, ipv, and the output power from the PV simulator, ppv. For the proposed method to be applied, under illumination intensity of 1000 W/cm2, Figure 9(b) shows the output voltage from the PV simulator, vpv, the output current from the PV simulator, ipv, and the output power from the PV simulator, ppv. From these results, it can be seen that the setting time for the perturbation and observation method is about 6 s and the setting time for the proposed method is about 2.8 s, and this demonstrates that the proposed method has a faster tracking speed than the perturbation and observation method. Also, there is no perturbation on vpv at the maximum power point in the latter. In addition, under illumination intensity of 1000 W/cm2 with the proposed HMPPT method, Figure 10 shows the gate driving signal for S1, vgs1, the current in Do, iDo, the current in L1, iL1, and the current in L2, iL2. From Figure 10, it can be seen that the proposed converter can operate stably.Startup waveforms under 1000 W/cm2 illumination intensity: (a) based on the perturbation and observation method—(1)  vpv; (2) ipv; (3)  ppv. (b) Based on the proposed HMPPT method—(1)  vpv; (2) ipv; (3)  ppv.
(a)
(b)Figure 10
Measured waveforms for the proposed converter with the proposed HMPPT method applied under illumination intensity of 1000 W/cm2: (1)  vgs1; (2) iDo; (3)  iL1; (4)  iL2.On the other hand, Figures11(a) to 11(c) show the maximum power point tracking in the PV simulator under three illumination intensity levels of 1000 W/m2, 800 W/m2, and 600 W/m2, respectively. From these, it can be seen that the proposed method can track the maximum power point under different illumination intensity levels.P
-
V and I-V curves based on the proposed HMPPT method under illumination intensity: (a) 1000 W/cm2; (b) 800 W/cm2; (c) 600 W/ cm2.
(a)
(b)
(c)


## 6. Conclusions

In this paper, a high step-up converter and an HMPPT algorithm combining the fractional open-circuit voltage method and the incremental conductance method are presented and applied to a photovoltaic energy conversion system. Based on the PV simulator, the proposed converter and algorithm can be demonstrated via some experimental results, so as to reduce the time slap of the maximum power point tracking at startup as well as to obtain no perturbation on the PV output voltage at the maximum power point. Besides, based on digital control, the converter control and the HMPPT algorithm are quite easy to implement.



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