# FDTD-SPICE for Characterizing Metamaterials Integrated with Electronic Circuits

Authors: Zhengwei Hao; Soheil Saadat; Hossein Mosallaei
Journal: International Journal of Antennas and Propagation
 (2012)

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## Abstract

A powerful time-domain FDTD-SPICE simulator is implemented and applied to the broadband analysis of metamaterials integrated with active and tunable circuit elements. First, the FDTD-SPICE modeling theory is studied and details of interprocess communication and hybridization of the two techniques are discussed. To verify the model, some simple cases are simulated with results in both time domain and frequency domain. Then, simulation of a metamaterial structure constructed from periodic resonant loops integrated with lumped capacitor elements is studied, which demonstrates tuning resonance frequency of medium by changing the capacitance of the integrated elements. To increase the bandwidth of the metamaterial, non-Foster transistor configurations are integrated with the loops and FDTD-SPICE is applied to successfully bridge the physics of electromagnetic and circuit topologies and to model the whole composite structure. Our model is also applied to the design and simulation of a metasurface integrated with nonlinear varactors featuring tunable reflection phase characteristic.


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## Body

## 1. Introduction

In recent years, the subject of metamaterials integrated with electronic  circuits, nonlinear elements, and non-Foster transistor configurations have been drawing significant attention in research communities. Metamaterials are typically periodic structures created by array of resonant elements which are small and stationary compared to the wavelength of electromagnetic wave. The combination of metamaterials with circuit elements can bring novel and tunable characteristics to these materials. For instance combining loop-based metamaterials with varactors provides a means to electronically tune the performance by applying a DC voltage or a high-power signal without modifying the structure [1–4]. Alternatively, a non-Foster transistor configuration can be introduced to enhance the metamaterial bandwidth [5]. Active components can be also integrated with transmission line metamaterials to compensate the loss [6], and finally metasurface can be integrated with circuit elements to tailor their reflection phase performance [7].The complexity of the structure requires a powerful computational technique to bridge the physics of electromagnetic metamaterial with circuit configuration. In this paper, the Finite Difference Time Domain (FDTD) technique is combined with SPICE-like software to provide a capable numerical technique for time-domain full wave analysis of the composite structure. The technique is applied to the design and simulation of metamaterials integrated with circuit elements. Broadband performance is obtained with the focus on bandwidth and tunable behavior engineering.Section2 provides the details of FDTD-SPICE hybridization and shows the validation through some examples. In Section 3, the following three applications are explored: (a) loop-based metamaterial integrated with lumped capacitors to tune the resonance performance, (b) metamaterial integrated with non-Foster transistor configuration for bandwidth manipulation, and (c) a metasurface combined with varactors featuring tunable reflection phase.


## 2. FDTD-SPICE Computational Model

### 2.1. Hybridization of FDTD with SPICE

As a major computational electromagnetic modeling scheme, Finite Difference Time Domain technique can tackle problems by providing a full wave solution in time. It is a capable method for modeling a variety of scientific and engineering problems [8, 9]. On the other hand, the general-purpose analog electronic circuit simulator, SPICE [10], can solve complex circuit topologies in time domain. It makes great sense to combine FDTD with SPICE to feature a powerful numerical engine for solving metamaterials integrated with circuit configurations.FDTD uses Maxwell’s equations (1) and (2) in time domain to recursively calculate the electromagnetic fields at each position in three-dimensional space:
(1)ε∂E∂t+J(E)=∇×H,(2)μ∂H∂t+M(H)=∇×E.
While both equations can provide the coupling between FDTD and SPICE according to reference [8], the first equation is used in this paper. After some simple manipulations, Ampere’s Law of (1) can be written as [11]
(3)CdVdt+I(V)=I.
Equation (3) describes a circuit model as shown in Figure 1, where C=εA/dl is a capacitance that abstracted from the model (note that here C is not the intrinsic lattice capacitance of FDTD cell), dl is the cell size, and A is the area of one FDTD unit cell. I(V)=A*J(E) is the current across the SPICE element, and V=E*dl is the voltage across the element, I=A*∇×H is the whole current of the current source. Thus, for the cell containing SPICE element, instead of using (1) to update the electric field, SPICE can carry out (3) and obtain the voltage across the element and then pass it to FDTD program. From the voltage, it is easy to obtain E field afterward.Figure 1
Circuit model for Ampere’s Law equation that connects FDTD and SPICE.To determine the voltage across the corresponding element, SPICE software needs to run a transient simulation for a period ofΔt, which should be the same as FDTD time step. Then, in the next time step, regular FDTD method will update all the fields except the cell with SPICE element. For the SPICE element, SPICE program needs to run another Δt, starting from where it stopped last time. Before each run of SPICE, FDTD sends data that contains circuit information to SPICE. After each time step of SPICE simulation, it passes results back to FDTD. In this way, the FDTD and SPICE engines run alternatively until the end of the whole simulation time. With the help of SPICE, FDTD is ready to simulate any complex integrated configuration as long as it is provided in SPICE’s library. Since conventional FDTD can only model very simple circuit elements, SPICE function adds a big advantage to FDTD.The SPICE software used here is SPICE3f5. It has an interactive mode that can receive commands from and send results back to the interface. It also has “stop” and “resume” commands that can set a breakpoint after running some time steps in a transient simulation and then resume it. These features make it very suitable to be connected to FDTD.To exchange data between FDTD and SPICE, interprocess communication should be developed. Figure2 presents a complete picture of our FDTD-SPICE model. When a simulation begins, FDTD main program calls fork function which spawns two processes: the son process that will run SPICE, and the parent process which is the original FDTD process itself. Two sockets: Socket[0] and Socket[1], are created in the main program before it forks so that both of the two children have access to the sockets. Here these sockets act like two-way pipe, where FDTD process sends SPICE commands to Socket[0] and reads results from Socket[1], while SPICE process reads message from Socket[0] and sends results back to Socket[1]. FDTD process will be waiting for SPICE outputs while SPICE process is running and vice versa. These two processes then communicate through the two sockets at each time step until the end of the simulation.Figure 2
Flowchart for FDTD-SPICE simulation.While DC solution is needed in SPICE for many cases but not very trivial to be obtained with FDTD, literature [12, 13] addressed DC solution problem by separating the AC and DC components, which is helpful for the metasurface simulations of diode varactors with bias that presented in Section 3.Our FDTD code has been written in a very powerful manner and it has many features such as modeling periodic structures and linear dispersive metamaterials [14]. By applying auxiliary differential equation (ADE) method [15], it can also model nonlinear dispersive materials as well as gain materials. The absorbing wall is based on CPML [16] where one can truncate the computational domain very close to the structure. The code has been applied successfully to a variety of metamaterials composites [9, 17–19].


### 2.2. Test Results

Two cases are studied to validate the FDTD-SPICE model. All simulations in this paper use uniform gridding and are run on Sun Ultra45 workstation with 2 GHz CPU and 4 GB memory.In the first case as depicted in Figure3(a), one parallel RLC circuit is connected to a Gaussian pulse voltage source in order to obtain the impedance. There are about 8000 time steps in the calculation with each time step Δt=0.2ps, cell size Δx=0.15 mm. Including CPML boundary, the whole computational domain is modeled by 26×26×26 Yee’s cells. The FDTD process takes 456 seconds, while, since the circuit is simple, SPICE process takes only 10 seconds. Figure 3(b) shows both the FDTD-SPICE results and the analytical calculation for the real and imaginary parts of the impedance Z, which agree well with each other.(a) RLC circuit configuration and (b) its impedanceZ behavior. Great comparison between FDTD results and analytical model is illustrated.
(a)
(b)In the second case as shown in Figure4(a), one BFG403W transistor from Discrete Semiconductor is utilized in a single frequency simulation with a sinusoidal voltage source. The BJT has a saturation current IS=5.554 aA and the forward active current gain is BF=145. The calculation has 18000 time steps with each time step Δt=54.82 fs and cell size Δx=30 μm. Because of the complex property of BJT circuit, the cell size and time step are much smaller than those used in previous simulation. The whole computational domain has a size of 25×37×32 Yee’s cells. FDTD and SPICE processes take 1734 seconds and 41 seconds, respectively. Figure 4(b) shows the comparison for the waveform of voltage across resistor R2 in time domain, between FDTD-SPICE and complete SPICE simulation. An excellent agreement is demonstrated.(a) Transistor circuit configuration. (b) Output voltage waveform in time. The FDTD-SPICE simulation matched very well with pure SPICE simulation.
(a)
(b)


## 2.1. Hybridization of FDTD with SPICE

As a major computational electromagnetic modeling scheme, Finite Difference Time Domain technique can tackle problems by providing a full wave solution in time. It is a capable method for modeling a variety of scientific and engineering problems [8, 9]. On the other hand, the general-purpose analog electronic circuit simulator, SPICE [10], can solve complex circuit topologies in time domain. It makes great sense to combine FDTD with SPICE to feature a powerful numerical engine for solving metamaterials integrated with circuit configurations.FDTD uses Maxwell’s equations (1) and (2) in time domain to recursively calculate the electromagnetic fields at each position in three-dimensional space:
(1)ε∂E∂t+J(E)=∇×H,(2)μ∂H∂t+M(H)=∇×E.
While both equations can provide the coupling between FDTD and SPICE according to reference [8], the first equation is used in this paper. After some simple manipulations, Ampere’s Law of (1) can be written as [11]
(3)CdVdt+I(V)=I.
Equation (3) describes a circuit model as shown in Figure 1, where C=εA/dl is a capacitance that abstracted from the model (note that here C is not the intrinsic lattice capacitance of FDTD cell), dl is the cell size, and A is the area of one FDTD unit cell. I(V)=A*J(E) is the current across the SPICE element, and V=E*dl is the voltage across the element, I=A*∇×H is the whole current of the current source. Thus, for the cell containing SPICE element, instead of using (1) to update the electric field, SPICE can carry out (3) and obtain the voltage across the element and then pass it to FDTD program. From the voltage, it is easy to obtain E field afterward.Figure 1
Circuit model for Ampere’s Law equation that connects FDTD and SPICE.To determine the voltage across the corresponding element, SPICE software needs to run a transient simulation for a period ofΔt, which should be the same as FDTD time step. Then, in the next time step, regular FDTD method will update all the fields except the cell with SPICE element. For the SPICE element, SPICE program needs to run another Δt, starting from where it stopped last time. Before each run of SPICE, FDTD sends data that contains circuit information to SPICE. After each time step of SPICE simulation, it passes results back to FDTD. In this way, the FDTD and SPICE engines run alternatively until the end of the whole simulation time. With the help of SPICE, FDTD is ready to simulate any complex integrated configuration as long as it is provided in SPICE’s library. Since conventional FDTD can only model very simple circuit elements, SPICE function adds a big advantage to FDTD.The SPICE software used here is SPICE3f5. It has an interactive mode that can receive commands from and send results back to the interface. It also has “stop” and “resume” commands that can set a breakpoint after running some time steps in a transient simulation and then resume it. These features make it very suitable to be connected to FDTD.To exchange data between FDTD and SPICE, interprocess communication should be developed. Figure2 presents a complete picture of our FDTD-SPICE model. When a simulation begins, FDTD main program calls fork function which spawns two processes: the son process that will run SPICE, and the parent process which is the original FDTD process itself. Two sockets: Socket[0] and Socket[1], are created in the main program before it forks so that both of the two children have access to the sockets. Here these sockets act like two-way pipe, where FDTD process sends SPICE commands to Socket[0] and reads results from Socket[1], while SPICE process reads message from Socket[0] and sends results back to Socket[1]. FDTD process will be waiting for SPICE outputs while SPICE process is running and vice versa. These two processes then communicate through the two sockets at each time step until the end of the simulation.Figure 2
Flowchart for FDTD-SPICE simulation.While DC solution is needed in SPICE for many cases but not very trivial to be obtained with FDTD, literature [12, 13] addressed DC solution problem by separating the AC and DC components, which is helpful for the metasurface simulations of diode varactors with bias that presented in Section 3.Our FDTD code has been written in a very powerful manner and it has many features such as modeling periodic structures and linear dispersive metamaterials [14]. By applying auxiliary differential equation (ADE) method [15], it can also model nonlinear dispersive materials as well as gain materials. The absorbing wall is based on CPML [16] where one can truncate the computational domain very close to the structure. The code has been applied successfully to a variety of metamaterials composites [9, 17–19].


## 2.2. Test Results

Two cases are studied to validate the FDTD-SPICE model. All simulations in this paper use uniform gridding and are run on Sun Ultra45 workstation with 2 GHz CPU and 4 GB memory.In the first case as depicted in Figure3(a), one parallel RLC circuit is connected to a Gaussian pulse voltage source in order to obtain the impedance. There are about 8000 time steps in the calculation with each time step Δt=0.2ps, cell size Δx=0.15 mm. Including CPML boundary, the whole computational domain is modeled by 26×26×26 Yee’s cells. The FDTD process takes 456 seconds, while, since the circuit is simple, SPICE process takes only 10 seconds. Figure 3(b) shows both the FDTD-SPICE results and the analytical calculation for the real and imaginary parts of the impedance Z, which agree well with each other.(a) RLC circuit configuration and (b) its impedanceZ behavior. Great comparison between FDTD results and analytical model is illustrated.
(a)
(b)In the second case as shown in Figure4(a), one BFG403W transistor from Discrete Semiconductor is utilized in a single frequency simulation with a sinusoidal voltage source. The BJT has a saturation current IS=5.554 aA and the forward active current gain is BF=145. The calculation has 18000 time steps with each time step Δt=54.82 fs and cell size Δx=30 μm. Because of the complex property of BJT circuit, the cell size and time step are much smaller than those used in previous simulation. The whole computational domain has a size of 25×37×32 Yee’s cells. FDTD and SPICE processes take 1734 seconds and 41 seconds, respectively. Figure 4(b) shows the comparison for the waveform of voltage across resistor R2 in time domain, between FDTD-SPICE and complete SPICE simulation. An excellent agreement is demonstrated.(a) Transistor circuit configuration. (b) Output voltage waveform in time. The FDTD-SPICE simulation matched very well with pure SPICE simulation.
(a)
(b)


## 3. Applications on Metamaterials

This section presents applications of FDTD-SPICE method to some recent metamaterial designs, namely, loop-based composite metamaterial with capacitors, metamaterial integrated with non-Foster circuits, and nonlinear elements loaded metasurface. In all of the cases, uniform gridding, perfectly matched layers, and periodic boundary conditions are used. Since they all deal with plan wave incidence, total field/scattered field method is also utilized [17].


### 3.1. Metamaterial Loops Integrated with Passive Elements

A periodic structure made from metallic loops can artificially create a medium with permeability characteristics (positive and negative) [19]. The metamaterial structure to be simulated here is shown in Figure 5(a). It is a four-layer structure in x direction where each layer has loops periodic in y-z directions and the loops are terminated to capacitor Cp. The unit loop dimension is 4.8 mm and 1.8 mm in x and z directions, respectively. The excitation is a plane wave that has Ez/Hy components and propagates in -x direction with a Gaussian signature. A transmission line analogy can be obtained for plane wave propagation through the medium [19], which is embedded with a loop that has a self-inductance Lp and is terminated to a lumped capacitor Cp. By changing the circuit elements (Lp and/or Cp) in the equivalent transmission line model, the effective parameter of the medium can be tuned, as well as the property of the metamaterial.(a) Metamaterial constructed from array of loops terminated to capacitorsCp and (b) its transmission coefficient.
(a)
(b)FDTD-SPICE method is applied to model the structure and obtain the transmission coefficient as shown in Figure5(b). The loops are modeled in FDTD and the capacitors in SPICE. There are 15700 time steps in the calculation with each time step Δt=0.2 ps, cell size Δx=0.15 mm. The whole computational domain has a size of 216×8×20 Yee’s cells. FDTD and SPICE processes take 1669 seconds and 1319 seconds, respectively. Because of the multiple-port interprocess communication, SPICE process needs considerable simulation time, which may be improved by introducing batch data communication between processes. Figure 5(b) shows 4 simulation results. The red dots represent results from pure FDTD simulation with Cp=2.1 pF (Cp is also modeled in FDTD). Then the blue line comes from FDTD-SPICE simulation with the same parameter, and it matches well with red dots, which show the accuracy of our model. Changing the capacitor Cp allows tuning the resonance and as well as the equivalent permeability of the metamaterial. Figure 5(b) also shows the transmission coefficients for the metamaterial loops terminated to Cp=4.2 pF and Cp=8.4 pF lumped capacitors, depicted in black and magenta, respectively. Doubling capacitance would half the resonance frequency. As can be seen from Figure 5(b), the resonance frequency is shifted from 1.1 GHz down to 0.78 GHz and 0.55 GHz, respectively, according the value of capacitors.


### 3.2. Integration with Non-Foster Circuit Elements

Non-Foster elements have recently attracted significant interests due to their novel properties in offering negative impedance performance and successfully engineering the frequency dispersion characteristics of antennas, transmission lines, and metamaterials towards the goals of interests [20–23]. A non-Foster element can be realized using a Negative Impedance Converter (NIC) circuit by translating a given positive load into a negative one. NIC circuit is made from transistor elements and one would need a comprehensive modeling scheme to characterize them while they are integrated with metamaterials. It is also worth mentioning that the design of NIC circuit involves several challenging issues such as noise, biasing, and stability and special care must be taken to obtain a wideband performance for non-Foster circuit. The NIC stability (which is not the subject of this paper) has also been checked with the help of pole-zero analysis to ensure that the system has absolutely no pole in the Right-Half-Plane (RHP) of the complex S-plane.Here we explore the integration of NIC circuit with metamaterial loops [5] and its FDTD-SPICE simulation to investigate the bandwidth enhancement of the structure. A two-layer loop-based composite metamaterial with capacitors as shown in Figure 5(a) is utilized. The loops are terminated to capacitors Cp and inductors L(4 nH). By integrating NIC designs offering −2 nH inductance, we reduce the effect of the positive inductance and enhance the bandwidth. The NIC circuit used in this paper is based on Linvill’s model [24], and it is an example of Voltage Inversion NIC (VINIC). As shown in Figure 6(a), the circuit consists of two N-type BJTs and a lumped passive inductor L1=2 nH as the load. After adding the non-Foster circuit to the loop, the equivalent circuit model [19] for the transmission line is depicted in Figure 6(a), where the NIC configuration is included in a negative inductor Ln.(a) Basic non-Foster element: NIC configuration based on Linvill's design and equivalent circuit model for the loop-based metamaterial integrated with NIC negative inductor. (b) Transmission coefficient for metamaterial of loops terminated with (i)Cp=0.13 pF, L=4 nH; (ii) Cp=0.2 pF, L=4 nH, NIC circuit Ln=-2 nH; (iii) Cp=0.2 pF, L=2 nH.
(a)
(b)The simulation has 11600 time steps with each time stepΔt=0.274 ps, cell size Δx=0.15 mm. The whole computational domain has a size of 128×8×20 Yee’s cells. FDTD and SPICE processes take 686 seconds and 133 seconds, respectively. Because of the complexity of the NIC circuit model, SPICE needs more time than the test examples from previous section. Here three cases are performed. Firstly, metamaterial with loop terminated to capacitor Cp=0.13 pF and lumped inductor L=4 nH is simulated. As depicted by the blue curve in Figure 6(b), it has a resonance around 2.4 GHz. Secondly, to broaden the bandwidth, a NIC circuit Ln=-2 nH is added to inductor L=4 nH, making the whole inductance 2 nH. In order to make a fair comparison, the capacitor is made Cp=0.2 pF so that the two simulations have the same resonance. As can be observed from the red curve in Figure 6(b), the metamaterial integrated with non-Foster element has a wider bandwidth than the case without it (blue curve). Increasing the value of -Ln can enable a wider bandwidth performance (as has been comprehensively detailed in [5]).  Lastly, to validate the results of the second case, NIC circuit Ln=-2 nH together with inductor L=4 nH is replaced by one lumped inductor L=2 nH. As shown in Figure 6(b), the black curve follows the behavior of the second case.At the end we want to mention that the reason we have considered a positive 4 nH inductor in series with the −2 nH non-Foster element is to make sure the time-domain SPICE modeling is stable (the equivalent total inductance is positive,+2 nH).


### 3.3. Metasurface Integrated with Varactor Diodes

Metasurfaces have great potential for making low profile antennas [25], and achieving an electronically tunable reflection phase is of remarkable interest in this regard. This section presents the simulation for a structure of metasurface integrated with varactors. The metasurface used in this paper is similar to the one in [7], which is designed to act as an artificial magnetic conductor (AMC) and uses active NIC circuits as negative elements to increase the bandwidth. Here varactor diodes are integrated in the metamaterial and make the metasurface tunable in resonance frequency.Figure7(a) shows a metasurface structure consisting of periodic square metal patches and PEC ground plane with dielectric slab in between. It also presents the unit cell of the metasurface loaded with varactor diodes. The structure is periodic in y and z directions and the incidence plane wave is -x direction. The FDTD-SPICE method is applied to simulate the structure. There are 7000 time steps in the calculation with each time step Δt=0.953 ps, cell size Δx=0.5 mm. The whole computational domain has a size of 45×21×21 Yee’s cells. FDTD and SPICE processes take 386 seconds and 8 seconds, respectively. Figure 7(b) shows the reflection coefficient phase for the metasurface without varactor diodes, as well as those with diodes that have different biases. The green line, as a reference frequency response, represents the one without varactor diode, while the others are for results that have diode with different bias. The varactor diode model used here is Skywork’s SMV1232-079 Hyperabrupt Tuning Varactors [26]. When the diode is added to the structure, it increases the total capacitance therefore decreases the resonance frequency of the metasurface. As can been seen from Figure 8, typical capacitance values of the varactor diode decrease when the reverse bias voltage increases. The capacitance is a maximum while there is no reverse bias voltage. Thus for reverse bias with smaller voltage it should give larger shift in resonance frequency, which agrees well with the simulation results.(a) Metasurface structure with periodic square metal patches and its unit cell that loaded with varactor diodes. (b) Reflection phase for the metasurface. Controlling the bias of the diode tunes the resonance frequency.
(a)
(b)Figure 8
Performance data for SMV1232 Diode Varactor.


## 3.1. Metamaterial Loops Integrated with Passive Elements

A periodic structure made from metallic loops can artificially create a medium with permeability characteristics (positive and negative) [19]. The metamaterial structure to be simulated here is shown in Figure 5(a). It is a four-layer structure in x direction where each layer has loops periodic in y-z directions and the loops are terminated to capacitor Cp. The unit loop dimension is 4.8 mm and 1.8 mm in x and z directions, respectively. The excitation is a plane wave that has Ez/Hy components and propagates in -x direction with a Gaussian signature. A transmission line analogy can be obtained for plane wave propagation through the medium [19], which is embedded with a loop that has a self-inductance Lp and is terminated to a lumped capacitor Cp. By changing the circuit elements (Lp and/or Cp) in the equivalent transmission line model, the effective parameter of the medium can be tuned, as well as the property of the metamaterial.(a) Metamaterial constructed from array of loops terminated to capacitorsCp and (b) its transmission coefficient.
(a)
(b)FDTD-SPICE method is applied to model the structure and obtain the transmission coefficient as shown in Figure5(b). The loops are modeled in FDTD and the capacitors in SPICE. There are 15700 time steps in the calculation with each time step Δt=0.2 ps, cell size Δx=0.15 mm. The whole computational domain has a size of 216×8×20 Yee’s cells. FDTD and SPICE processes take 1669 seconds and 1319 seconds, respectively. Because of the multiple-port interprocess communication, SPICE process needs considerable simulation time, which may be improved by introducing batch data communication between processes. Figure 5(b) shows 4 simulation results. The red dots represent results from pure FDTD simulation with Cp=2.1 pF (Cp is also modeled in FDTD). Then the blue line comes from FDTD-SPICE simulation with the same parameter, and it matches well with red dots, which show the accuracy of our model. Changing the capacitor Cp allows tuning the resonance and as well as the equivalent permeability of the metamaterial. Figure 5(b) also shows the transmission coefficients for the metamaterial loops terminated to Cp=4.2 pF and Cp=8.4 pF lumped capacitors, depicted in black and magenta, respectively. Doubling capacitance would half the resonance frequency. As can be seen from Figure 5(b), the resonance frequency is shifted from 1.1 GHz down to 0.78 GHz and 0.55 GHz, respectively, according the value of capacitors.


## 3.2. Integration with Non-Foster Circuit Elements

Non-Foster elements have recently attracted significant interests due to their novel properties in offering negative impedance performance and successfully engineering the frequency dispersion characteristics of antennas, transmission lines, and metamaterials towards the goals of interests [20–23]. A non-Foster element can be realized using a Negative Impedance Converter (NIC) circuit by translating a given positive load into a negative one. NIC circuit is made from transistor elements and one would need a comprehensive modeling scheme to characterize them while they are integrated with metamaterials. It is also worth mentioning that the design of NIC circuit involves several challenging issues such as noise, biasing, and stability and special care must be taken to obtain a wideband performance for non-Foster circuit. The NIC stability (which is not the subject of this paper) has also been checked with the help of pole-zero analysis to ensure that the system has absolutely no pole in the Right-Half-Plane (RHP) of the complex S-plane.Here we explore the integration of NIC circuit with metamaterial loops [5] and its FDTD-SPICE simulation to investigate the bandwidth enhancement of the structure. A two-layer loop-based composite metamaterial with capacitors as shown in Figure 5(a) is utilized. The loops are terminated to capacitors Cp and inductors L(4 nH). By integrating NIC designs offering −2 nH inductance, we reduce the effect of the positive inductance and enhance the bandwidth. The NIC circuit used in this paper is based on Linvill’s model [24], and it is an example of Voltage Inversion NIC (VINIC). As shown in Figure 6(a), the circuit consists of two N-type BJTs and a lumped passive inductor L1=2 nH as the load. After adding the non-Foster circuit to the loop, the equivalent circuit model [19] for the transmission line is depicted in Figure 6(a), where the NIC configuration is included in a negative inductor Ln.(a) Basic non-Foster element: NIC configuration based on Linvill's design and equivalent circuit model for the loop-based metamaterial integrated with NIC negative inductor. (b) Transmission coefficient for metamaterial of loops terminated with (i)Cp=0.13 pF, L=4 nH; (ii) Cp=0.2 pF, L=4 nH, NIC circuit Ln=-2 nH; (iii) Cp=0.2 pF, L=2 nH.
(a)
(b)The simulation has 11600 time steps with each time stepΔt=0.274 ps, cell size Δx=0.15 mm. The whole computational domain has a size of 128×8×20 Yee’s cells. FDTD and SPICE processes take 686 seconds and 133 seconds, respectively. Because of the complexity of the NIC circuit model, SPICE needs more time than the test examples from previous section. Here three cases are performed. Firstly, metamaterial with loop terminated to capacitor Cp=0.13 pF and lumped inductor L=4 nH is simulated. As depicted by the blue curve in Figure 6(b), it has a resonance around 2.4 GHz. Secondly, to broaden the bandwidth, a NIC circuit Ln=-2 nH is added to inductor L=4 nH, making the whole inductance 2 nH. In order to make a fair comparison, the capacitor is made Cp=0.2 pF so that the two simulations have the same resonance. As can be observed from the red curve in Figure 6(b), the metamaterial integrated with non-Foster element has a wider bandwidth than the case without it (blue curve). Increasing the value of -Ln can enable a wider bandwidth performance (as has been comprehensively detailed in [5]).  Lastly, to validate the results of the second case, NIC circuit Ln=-2 nH together with inductor L=4 nH is replaced by one lumped inductor L=2 nH. As shown in Figure 6(b), the black curve follows the behavior of the second case.At the end we want to mention that the reason we have considered a positive 4 nH inductor in series with the −2 nH non-Foster element is to make sure the time-domain SPICE modeling is stable (the equivalent total inductance is positive,+2 nH).


## 3.3. Metasurface Integrated with Varactor Diodes

Metasurfaces have great potential for making low profile antennas [25], and achieving an electronically tunable reflection phase is of remarkable interest in this regard. This section presents the simulation for a structure of metasurface integrated with varactors. The metasurface used in this paper is similar to the one in [7], which is designed to act as an artificial magnetic conductor (AMC) and uses active NIC circuits as negative elements to increase the bandwidth. Here varactor diodes are integrated in the metamaterial and make the metasurface tunable in resonance frequency.Figure7(a) shows a metasurface structure consisting of periodic square metal patches and PEC ground plane with dielectric slab in between. It also presents the unit cell of the metasurface loaded with varactor diodes. The structure is periodic in y and z directions and the incidence plane wave is -x direction. The FDTD-SPICE method is applied to simulate the structure. There are 7000 time steps in the calculation with each time step Δt=0.953 ps, cell size Δx=0.5 mm. The whole computational domain has a size of 45×21×21 Yee’s cells. FDTD and SPICE processes take 386 seconds and 8 seconds, respectively. Figure 7(b) shows the reflection coefficient phase for the metasurface without varactor diodes, as well as those with diodes that have different biases. The green line, as a reference frequency response, represents the one without varactor diode, while the others are for results that have diode with different bias. The varactor diode model used here is Skywork’s SMV1232-079 Hyperabrupt Tuning Varactors [26]. When the diode is added to the structure, it increases the total capacitance therefore decreases the resonance frequency of the metasurface. As can been seen from Figure 8, typical capacitance values of the varactor diode decrease when the reverse bias voltage increases. The capacitance is a maximum while there is no reverse bias voltage. Thus for reverse bias with smaller voltage it should give larger shift in resonance frequency, which agrees well with the simulation results.(a) Metasurface structure with periodic square metal patches and its unit cell that loaded with varactor diodes. (b) Reflection phase for the metasurface. Controlling the bias of the diode tunes the resonance frequency.
(a)
(b)Figure 8
Performance data for SMV1232 Diode Varactor.


## 4. Conclusion

This paper develops a hybridized FDTD-SPICE model and applies it to the simulations of some novel metamaterials integrated with electronic circuits. The Maxwell’s equations are linked with SPICE through the interchange between electromagnetic fields and voltages across the SPICE element nodes. Interprocess communication technique with socket is used as it is crucial for FDTD and SPICE to exchange data at proper running time. Diagrammatic flowchart is discussed that demonstrates the detail of the execution process as well as the data exchanging with the help of sockets. To show the validity of the model, two simple cases that have analytical solution or pure SPICE results are investigated. Then, three kinds of metamaterial are studied and modeled by the FDTD-SPICE engine. First, loop-based metamaterial with lumped capacitor is investigated where changing the capacitance can vary the resonance frequency. Then, integration of metamaterial with non-Foster circuit element, which provides negative impedance and increases the bandwidth, is studied and characterized. Lastly, metasurface simulation with integrated nonlinear varactor elements shows a tunable reflection phase property for this metamaterial. The technique is very powerful and its accuracy is validated well. We expect our scheme to be of great engine for comprehensive simulation of metamaterials integrated with active and nonlinear circuits and allow exploring new artificial materials combined with a lot of potential complex circuits.



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*Source: 282159-2012-08-28.xml*