# Analytical Study on the Influence of Parasitic Elements in a Memristor

Authors: Kristopher J. Chandía; Mauro Bologna; Bernardo Tellini
Journal: Mathematical Problems in Engineering
 (2018)

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## Abstract

We study a memristive circuit with included parasitic elements, such as capacitance and inductance. In the multiple-scale scheme, we analytically show how the parasitic elements affect the voltage and the current. Finally, we provide an analytical expression for the intersection point coordinates, through which we discuss the functional behavior of the pinched hysteresis loop versus the operating frequency and the parasitic elements.


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## Body

## 1. Introduction

In 1971, Chua postulated the existence of a fourth fundamental element circuit, which was termed memristor [1]. In 2008, Williams and his team of HP laboratories announced the first successful realization of a memristor [2]. Later, many properties and applications have been visualized for memristor, including potential construction of high-density nonvolatile memories [3] and artificial neural networks [4, 5]. Several researchers proposed models to explain the memristor dynamics [6–10], fingerprints of memristors, and relevant nonlinear properties. In [8, 9], some essential features of memristors (fingerprints) are discussed. Both papers highlight three significant fingerprints:pinched hysteresis loop,the area of hysteresis lobe decreases as frequency increases, andpinched hysteresis loop becomes a single-valued function at infinite frequency. The main purpose of this work is to study the dynamics of a memristor considering their parasitic elements. Through the analytical multiple-scale analysis, we show how parasitic elements affect the fingerprints of memristors and we validate the results with those obtained from a numerical analysis. In particular, we show how the coordinates of the intersection point change as a result of a dominating capacitive or inductive behavior according to the adopted parameter values. The paper is organized as follows. In Section 2, we consider the HP’s memristor [2] and we write the equation that governs the memristor circuit when parasitic elements are added, that is, capacitance and inductance. In Section 3, we solve the nonlinear equation driving the circuit using the multiple-scale technique. In Section 4, we find the analytical expression for the displacement of the intersection point of the pinched hysteresis loop and we provide a discussion on the basis of numerical simulations and circuital analysis. Finally, we draw some conclusions.


## 2. Memristor with Parasitic Elements

In the work in [11], the authors considered a realistic memristive circuit, where parasitic elements are included (Figure 1). That work studied the fingerprints of two memristive systems (thermistors), obtaining results through experimental measurements and numerical simulations. The usual fingerprints for ideal memristive systems are modified by the existence of parasitic elements such as inductance L, capacitance C, small DC current source Ip, and DC voltage source Vp as shown in Figure 1. We consider a simplified version of the previous circuit as shown in Figure 2, where Vp and Ip are neglected.Figure 1
A memristor considering its parasitic elements: inductanceL, capacitance C, small DC current source Ip, and small DC voltage source Vp.Figure 2
A memristor considering its parasitic inductance and capacitance.Before building the equation for the circuit of Figure2, we recall that the memristance is defined according to the literature as [1](1)vM=ddtϕMq=ddqϕMqdqdt=Mqdqdt,where M(q) is the memristance by definition. According to Kirchhoff’s current law [12], the following expression must be satisfied:(2)dqLdt=dqdt+dqCdt,where qC represents electric charge in the capacitor. Due to the fact that the capacitor is connected in parallel with the ideal memristor, we are able to establish a relationship between qC and ϕM(q); that is,(3)qCC=dϕMdt.Using the previous result, we may rewrite (2) as(4)dqLdt=dqdt+Cd2ϕMdt2.We are now in a position to write the driving equation of the circuit of Figure 2. Indeed, from Kirchhoff’s voltage law [12], we have(5)vst=vLt+vMt=Ld2qLdt2+dϕMdt=Ld2qLdt2+Mqdqdt.Inserting (4) into (5) and with the help of (1), we obtain the circuit equation(6)vst=LCMqd3qdt3+Ld2qdt21+3CdMqdqdqdt+Mqdqdt+LCd2Mqdq2dqdt3,where L and C are the parasitic inductance and capacitance, respectively, and M(q) represents the memristance. We may find the circuit equation in terms of the function ϕM integrating (5) with respect to the time. We obtain(7)∫vstdt=ϕMq+LdqLdtUsing (4), (7) can be rewritten as follows:(8)∫vstdt=Ldqdt+1ω02d2ϕMdt2+ϕM,ω0≡1LC.We now focus on HP’s memristor. The analytical expression of memristance is given by the following expression:(9)Mq=Roff1-μvRonD2qt.Here D depends on the memristor length, whereas μv denotes the ion mobility, Ron⁡ denotes the resistance for completely doped memristor, and Roff⁡ denotes the resistance for completely undoped memristor. We can determine an expression for ϕM, given by(10)ϕM=∫Mqdq=Roffqt-q2t2q0,where q0=D2μvRon-1 and the integration constants are set to zero. Next, we consider a periodic voltage source,(11)vst=V0cos⁡ωt,and define the dimensionless quantities via the parameter ϕ0=Roffq0:(12)f=V0ωϕ0,r=1CRoffω,τ=ωt,Q=qq0,Φ=ϕϕ0.In terms of the dimensionless quantities, (9) and (10) can be rewritten as(13)MQ=ϕ0q01-Qt(14)ΦQ=Qt-Q2t2.We can invert (14) and, for Q, we obtain(15)Q=1±1-2Φ.Imposing the condition that  Q  takes real values, it is necessary that Φ<1/2. Plugging (15) into (8) and making the time transformation t=τ/ω, we obtain the equation for the function Φ:(16)εd2Φdτ2∓εr1-2ΦdΦdτ+Φ=fsin⁡τ,where the parameter ε is defined as(17)ε=ω2ω02.To determine the sign in (16) on which we will focus in the next section, we impose the constraint that the memristor has to be a passive memristor. A memristor is passive when the memristance is positive; that is, M(q)>0. This condition is satisfied when q(t)<q0 or, equivalently, in dimensionless variable, Q<1 (see (13)). The condition Q<1 implies that we have to choose the negative sign in (15) and consequently the positive sign in (16). This will be the subject of our study in the next section.


## 3. Dynamics of a Memristor with Parasitic Elements

In this section, we study (16) considering the positive sign of the coefficient of the first derivative of Φ, corresponding to the negative sign in (15). We consider ε as a small parameter due to the fact that parasitic elements have small values of capacitance and inductance (see [11, 13] for numerical data). In other words, we consider the case ω0≫ω or ε≪1. For what we said, our starting point is the exact equation(18)εd2Φdτ2+εr1-2ΦdΦdτ+Φ=fsin⁡τ.We define a suitable time scale T=τ/ε and a new perturbative parameter δ=ε. Replacing τ by Tε and ε by δ in (18), we obtain(19)d2ΦdT2+δr1-2ΦdΦdT+Φ=fsin⁡τ.We stress that (19) contains only one parameter δr and two time scales T and τ. We are now in the position to apply the multiple-scale method to (19). Following the procedure given in [14], we postulate a solution of the form(20)ΦT=∑n=0∞δnΦnT+,τ,where T+=T(1+a2δ2+⋯) is the fast variable and τ=δT is the slow variable. The first two derivatives of Φ(T) at the first-order approximation are given by (the reader can find these results in great detail in chapter IV of [14])(21)dΦdT=∂Φ0∂T++δ∂Φ1∂T++∂Φ0∂τ+Oδ2(22)d2ΦdT2=∂2Φ0∂T+2+δ∂2Φ1∂T+2+2∂2Φ0∂T+∂τ+Oδ2.Using the expansion in (20), we can write(23)11-2ΦT=11-2Φ0+δΦ11-2Φ03/2+Oδ2.To the zeroth-order expansion, we obtain the following differential equation:(24)d2dT+2Φ0T+,τ+Φ0T+,τ=fsin⁡τ.The solution for Φ0(T+,τ) is given by(25)Φ0T+,τ=Aτcos⁡T++Bτsin⁡T++f1-δ2sin⁡τ,where A and B are functions depending on the slow variable τ. At the order δ, using (22), we obtain the following differential equation:(26)d2Φ1dT+2+Φ1=-r1-2Φ0∂Φ0∂T+-2∂2Φ0∂T+∂τ.In order to ensure the passivity of memristance M(q), we know that Q<1 and consequently Φ0<1/2. We now assume that Φ0 is sufficiently far from the value 1/2 in such a way that we may expand square root as(27)11-2Φ0≃1+Φ0.With this further approximation, evaluating (26), we end up with(28)d2Φ1dT+2+Φ1=-2dBτdτ+rBτcos⁡T++2dAτdτ+rAτsin⁡T++r2sin⁡2T+Aτ2-Bτ2-rAτBτ.To avoid secular terms, we must vanish the resonant term coefficients, that is, the coefficients of cos⁡T+ and sin⁡T+ in (28). This procedure leads to the following system of differential equations:(29)dAτdτ+r2Aτ=0,dBτdτ+r2Bτ=0.The solutions for A(τ) and B(τ) are given by(30)Aτ=C1exp⁡-r2τ,Bτ=C2exp⁡-r2τ,where C1 and C2 are arbitrary constants depending on initial conditions for Φ0. By evaluating the initial conditions, we obtain(31)C1=Φini,C2=Φ˙ini-fδ1-δ2+rδ2Φini,where Φ0(T=0)=Φini and (dΦ0/dT)(T=0)=Φ˙ini. Finally, the expression for Φ0(T) is given by(32)Φ0T,τ=exp⁡-r2τΦinicos⁡T++rδ2Φini+Φ˙ini-fδ1-δ2sin⁡T++f1-δ2sin⁡τ,where τ=δT. In Figure 3, we compare the analytical expression obtained in (32) with a numerical simulation. The figure shows an excellent agreement between numerical and analytical solutions even during the transient period.Figure 3
First termΦ0 versus time T obtained in (32) (solid line) and numerical solution (dashed line). The parameter values are Φini=0.15, Φ˙ini=0.1, δ=0.05, f=0.3, and r=3.5. The axis units are dimensionless.Using (15), we plot the electric charge and compare it with the numerical solution. Figures 4 and 5 show a good agreement between numerical and analytical solutions. In Figure 4, we consider a shorter interval of time to appreciate the wavy part that is reproduced by the analytical solution.Figure 4
First termQ0 versus time T using (15) and numerical solution (dashed line) in the transient regime. The parameter values are Qini=0, Q˙ini=0, δ=0.05, f=0.1, and r=3.5. The axis units are dimensionless.Figure 5
First termQ0 versus time T using (15) and numerical solution (dashed line). The parameter values are Qini=0, Q˙ini=0, δ=0.05, f=0.1, and r=3.5. The axis units are dimensionless.


## 4. Behavior of Pinched Hysteresis Loop

As discussed in [11], parasitic elements modify the pinched hysteresis loop with respect to the loop of an ideal memristor. In this section, we will find the analytical coordinates of the intersection point. Under steady-state condition, we are allowed to neglect the exponential terms in (32). We consider as memristor the elements described in Figure 2, namely, the ideal memristor and the parasitic elements. Rewriting the electrical current (see (4)) and voltage (see (11)) of the memristor in terms of the dimensionless quantities given by (12), we have(33)dQLdτ=f1-δ2cosτ1-2f/1-δ2sinτ-sinτr,Vsτ=fcos⁡τ,where dQL/dτ is the electrical current and Vs(τ) is the voltage of the HP memristor in dimensionless notation. To determine the intersection point located in the i-v curve, we need to find the times τ1 and τ2 such that(34)dQLdττ=τ1=dQLdττ=τ2,(35)Vsτ1=Vsτ2.For the sake of brevity, we will focus on the first quadrant, where both cosines and sinus are positive quantities. From condition (35), we obtain(36)τ1=2nπ±τ2.The relationship τ1=2nπ+τ2 gives the identical solution corresponding to the fact that electrical current and voltage are periodic functions in stationary regime. Substituting the second equality, τ1=2nπ-τ2, into the electrical current expression (34), we obtain the following equation:(37)1-x21-ax-1-x21+ax=2xr,x≡sin⁡τ2,a≡2f1-δ2.We may further assume that a≪1, and thus we can write 1-ax~(1-ax/2), so(38)x=sin⁡τ2=1-4a2r2.In the range of validity of (38), the intersection point coordinates are(39)dQLdττ=τ2=f1-δ22ar1-2f/1-δ21-4/a2r2-1-4/a2r2r,(40)Vsτ2=2far.Note that, taking the limit L,C→0, r→∞ and δ→0 (see (12) and (17)) and from (39) and (40) we recover the ideal memristor with the intersection point located at the origin. In Figure 6, we plot several pinched hysteresis loops for different amplitude of the voltage source. The coordinates of the intersection point are well described by (38) and (39). For small δ and f, we compare our analytical solution with the numerical result as shown in Figure 7. Analogously, we may proceed with the third quadrant. In Figure 7, we can appreciate two lobes; the direction of the arrows represents the change of the variables voltage and current. In the upper lobe, the direction of the arrows (counterclockwise) is similar to the case found in an ohmic-inductive circuit. Conversely, in the lower lobe, the direction of the arrows is clockwise, similar to the case found in an ohmic-capacitive circuit. For the values used in Figure 7, the capacitive lobe (lower) is greater than the inductive lobe, so the current leads the voltage most of the time in a period for the stationary regime. To clarify this point, we plot the voltage and electrical current versus time to show this fact.Figure 6
Plot of the pinched hysteresis loop as function of the source voltage amplitudef.Figure 7
Plot ofi-v curve for δ=0.01, f=0.2, and r=65 in the steady-state condition. Numerical results (dashed line) and analytical solution (solid line). The axis units are dimensionless.In Figure8, we can appreciate how the current alternately leads and lags the voltage during a period. This fact is due to the nonlinear nature of memristor. Indeed the electrical current is not a pure sinusoidal signal and so we can find some time intervals, where the voltage lags the current and in other cases the voltage leads the current.Figure 8
Plot of the voltage (dashed line) and the electrical current for a period in stationary regime.δ=0.01, f=0.2, and r=65.In Figure9, we show the numerical results for δ=0.1, f=0.2, and r=15. We can see that the intersection point is located in the third quadrant according to a dominating inductive behavior as also shown in Figure 10.Figure 9
Plot ofi-v curve for δ=0.1, f=0.2, and r=15 in the steady-state condition (only numerical results are shown). The axis units are dimensionless.Figure 10
Plot of the voltage (dashed line) and the electrical current for a period in stationary regime.δ=0.1, f=0.2, and r=15.


## 5. Conclusion

In this paper, we considered a model of a memristor with included parasitic elements. We analyzed a system composed of a parasitic inductance in series with the parallel between an ideal memristance and a parasitic capacitance. Using the multiple-time-scale approach, we studied the dynamics of the flux and electric charge of memristor. The parasitic elements considered in the model modify the pinched hysteresis loop. We discussed the functional behavior of the pinched hysteresis loop versus the operating frequency and the parasitic elements. In particular, we showed that the intersection point moves apart from the origin of thei-v plane and we analytically determined its coordinates. Finally, our theoretical analysis is shown to be in excellent agreement with the numerical simulations.



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