# Experimental Evaluation on the Influence of RCD Snubbers in a 3-Level Thyristor Based MLCR CSC

Authors: Bhaba P. Das; Neville R. Watson; Yonghe Liu
Journal: Journal of Engineering
 (2016)

---

## Abstract

Multilevel current reinjection (MLCR) concept provides self-commutation capability to thyristors, enabling thyristor based current source converters (CSC) to operate under negative firing angle. It also lowers the input current harmonic distortion. This is achieved by using an auxiliary reinjection bridge. Extensive experimental results are presented in this paper to analyse the performance of the 3-level MLCR CSC for different snubber components across the reinjection bridge. The trade-off in the choice of the snubber circuit is illustrated, with its influence on the AC side line current and DC side output voltage of the 3-level MLCR CSC.


---

## Body

## 1. Introduction

In order to reduce the harmonic content in the line current caused by High Voltage Direct Current (HVDC) converters, different strategies have been proposed. These are (i) multipulse methods, (ii) multilevel methods, and (iii) pulse-width modulation (PWM) methods.Different methods for increasing the number of pulses using multipulse converters have been investigated [1]. The simplest method is by increasing the pulse number by using phase-shifting transformers. Multipulse converters such as 12-, 18-, 24-, and 36-pulse converter are used nowadays and the total harmonic distortion (THD) of the input line current of these converters has been reduced to around 15.2%, 10.1%, 7.5%, and 5.3%, respectively. Many modelling techniques for phase-shifting converter transformers have been also proposed in [2–4] to meet the IEEE 519 standards. However, the weakness of these methods is the increase in size and complexity of the transformer and the high costs involved due to multiple 6-pulse bridges. A DC side current injection method [5] improves the quality of the AC side line currents by using a three-phase current-controlled inverter which injects compensation currents in the AC side of the converter. However, this method uses a complex 18-pulse phase-shifting transformer.Multilevel converters give significantly lower switching losses and better harmonic performance [6–8] than equivalent series-connected converters operating at the same rating and carrier frequency but advantages of multilevel converter are counterbalanced by the need for self-commutated switches instead of thyristors, balancing of capacitors, and so forth. Modular current source converters (MCSC) utilise PWM techniques just like the PWM-voltage source converters (VSC). Two-level PWM-VSC or Modular Multilevel Converter (MMC) [9] has been used by the industry, for example, HVDC-light and HVDC-plus, respectively. However, they are only being used for medium voltage HVDC transmission. MCSC utilise selective harmonic elimination [10] as the PWM strategy but the use of thyristors in the main bridge is still not possible. Ongoing research in the field of MMC converters includes direct power control [11], neural network based sliding mode control [12], and fuzzy logic based control [13].It is now established that PWM-VSC/MMC/MCSC technology is well suited for the medium voltage levels but will not be able to catch up with the thyristor based technology in terms of high power handling capacity in the very near future. Thus, there is a clear incentive for research in the thyristor based HVDC technology to achieve the following:(i)
Achieve force commutation with thyristors.
(ii)
Operate at negative firing angles enabling reactive power export.
(iii)
Operate the thyristors under zero-current switching lowering the switching losses, voltage stress, and costs.
(iv)
Reduce harmonic distortion caused by thyristor based systems.The new concept of multilevel current reinjection (MLCR) [14] combines the advantages of DC-ripple reinjection [15, 16] and multilevel conversion and soft switching technique. Thyristor based MLCR current source converter (CSC) was proposed in [17] where the magnitude and duration of the reinjection current, used to minimize the harmonic content, were adjusted to ensure that the currents through the main bridge thyristors are forced to zero during the main bridge commutations instants. This possibility had the important implication that the thyristors do not need to rely on the line voltage to commutate and are capable of operating with firing angles that provide leading power-factor just like self-commutating switches. Based on this, the self-commutated HVDC MLCR CSC was introduced in [18].However, questions have been raised about the ability to force the main thyristors off using the reinjection bridge. In a real world implementation, there are inevitable stray capacitance and inductances which may influence the thyristor turn-off and simulation switching model may not fully represent the switching characteristics accurately. The question that needed answering was whether these would hinder the self-commutation ability with thyristors. For this proof of concept, a small-scale prototype of a 3-level MLCR CSC has been built in the laboratory. The experimental investigation (under steady-state conditions), presented here, shows that the line currents in AC side of MLCR CSC follow the theoretical current wave-shape well. This has clearly demonstrated that self-commutation ability is achievable in a practical system by the use of an auxiliary reinjection bridge.RCD snubber is necessary across the reinjection bridge switches to limit the sharp rise in voltage across it due to the sudden interruption of current flowing through it. This paper presents the experimental investigation of the influence of the RCD snubber across the reinjection switches in a 3-level thyristor based MLCR CSC performance. This paper is divided into the following sections: Section2 provides the brief introduction to the 3-level thyristor based MLCR CSC; Section 3 provides the PSCAD/EMTDC simulation results, with and without the RCD snubber circuit, of the performance of the 3-level MLCR CSC. Section 4 presents some of the main hardware modules while Section 5 presents the experimental results obtained. The trade-off in choice of the snubber circuit is explained clearly with respect to AC side line current and DC side voltage waveforms.


## 2. Three-Level Thyristor Based MLCR CSC

Figure1 shows the 3-level thyristor based MLCR CSC along with the reinjection circuit. The reinjection transformer is a single-phase two-winding transformer with 1 : 1 turns ratio. The primaries of the two single-phase transformers are connected across the DC bus through DC blocking capacitors (C). The DC current (I
D
C) flows through the reinjection IGBTs and load inductance (L
D
C) and the load. It is chopped into AC waveforms in the secondary windings of the reinjection transformer with the help of reinjection switches (S
p
1/S
n
1, etc.). These currents are coupled to the reinjection transformer primary winding to form multilevel currents I
j
1 and I
j
2 which combine with I
D
C to shape the DC bus currents I
1 and I
2 into multilevel waveforms. This reinjection circuit generates three current steps in I
1 and I
2. Two levels are generated due to reverse connected switches (S
p
1
/
S
n
1 and S
p
2
/
S
n
2) and one additional level is obtained by firing S
p
0
/
S
n
0 when I
j
1 and I
j
2 are both zero.Figure 1
Three-level thyristor based MLCR CSC with Linear Reinjection.


### 2.1. AC Side Current Waveforms

The theoretical analysis of the circuit shown in Figure1 allows I
a
(
ω
t
) to be determined from the time domain components of the AC side secondary currents I
a
Y
(
ω
t
) and I
c
a
D
(
ω
t
). This gives (1)
I
a
ω
t
=
1
k
n
I
a
Y
ω
t
+
3
I
c
a
D
ω
t
,where k
n is interface transformer turns ratio. The corresponding current waveforms are shown in Figure 2 where the resulting current (I
a) T
H
D
3
level of 7.77% is obtained.Figure 2
Current waveforms for 3-level thyristor based MLCR CSC with Linear Reinjection.


### 2.2. DC Side Voltage Waveforms

The DC side voltage waveforms (Figure3) are time referenced with respect to the AC side current waveform I
a (Figure 2). The DC side voltages across the individual bridges (V
y
(
ω
t
) and V
d
(
ω
t
)) are plotted in Figure 3 with respect to the peak phase source voltage (V
p
k) and can be expressed as for the first π
/
6 interval as(2)
V
y
ω
t
=
3
k
n
V
p
k
cos
⁡
ω
t
+
α
,
V
d
ω
t
=
3
k
n
V
p
k
cos
⁡
ω
t
+
α
-
π
6
,
V
x
ω
t
=
V
y
ω
t
+
V
d
ω
t
,where α is firing angle. The DC load voltage (V
D
C) is calculated as (3)
V
D
C
ω
t
=
V
x
ω
t
+
V
z
ω
t
≈
3.39
V
p
k
k
n
cos
⁡
α
.Figure 3
Theoretical DC voltage waveforms for 3-level thyristor based MLCR CSC forα = −45°.The harmonic spectrum ofV
D
C is shown in Figure 4. It can be clearly seen that the dominant harmonics are 24th, 48th, 72nd, 96th, and 120th which represents 24-pulse operation. A small amount of 12-pulse related harmonics such as 12th, 36th, and 60th can also be seen but the magnitude is negligible.Figure 4
Harmonic spectrum ofV
D
C of 3-level thyristor based MLCR CSC for α = −45°.


### 2.3. Reinjection Current Waveforms

Figure5 labels the various current waveforms in the reinjection circuit. The “chopping” of load current I
D
C occurs with the help of the reinjection IGBTs. The injection current I
i
n
j is a 3-level waveform composed of the following:(i)
When reinjection IGBT pairS
p
1
-
S
n
1 conducts, I
j
1
=
(
n
1
/
n
0
)
I
D
C
=
I
D
C.
(ii)
When reinjection IGBT pairS
p
0
-
S
n
0 conducts, I
j
1
=
0.
(iii)
When reinjection IGBT pairS
p
2
-
S
n
2 conducts, I
j
1
=
-
(
n
1
/
n
0
)
I
D
C
=
-
I
D
C.Figure 5
Reinjection current flow for a 3-level MLCR CSC.Reinjection currentsI
j
1 and I
j
2 add up to form I
i
n
j which is injected back to the midpoint of the 12-pulse converter. The theoretical current waveforms in the reinjection circuit are shown in Figure 6.Figure 6
Theoretical waveforms in the reinjection circuit.
(a)
I
S
p
1, I
S
p
0, and I
S
p
2 waveforms
(b)
I
S
1, I
S
0, and I
S
2 waveforms
(c)
I
j
1, I
j
2, and I
i
n
j waveforms


## 2.1. AC Side Current Waveforms

The theoretical analysis of the circuit shown in Figure1 allows I
a
(
ω
t
) to be determined from the time domain components of the AC side secondary currents I
a
Y
(
ω
t
) and I
c
a
D
(
ω
t
). This gives (1)
I
a
ω
t
=
1
k
n
I
a
Y
ω
t
+
3
I
c
a
D
ω
t
,where k
n is interface transformer turns ratio. The corresponding current waveforms are shown in Figure 2 where the resulting current (I
a) T
H
D
3
level of 7.77% is obtained.Figure 2
Current waveforms for 3-level thyristor based MLCR CSC with Linear Reinjection.


## 2.2. DC Side Voltage Waveforms

The DC side voltage waveforms (Figure3) are time referenced with respect to the AC side current waveform I
a (Figure 2). The DC side voltages across the individual bridges (V
y
(
ω
t
) and V
d
(
ω
t
)) are plotted in Figure 3 with respect to the peak phase source voltage (V
p
k) and can be expressed as for the first π
/
6 interval as(2)
V
y
ω
t
=
3
k
n
V
p
k
cos
⁡
ω
t
+
α
,
V
d
ω
t
=
3
k
n
V
p
k
cos
⁡
ω
t
+
α
-
π
6
,
V
x
ω
t
=
V
y
ω
t
+
V
d
ω
t
,where α is firing angle. The DC load voltage (V
D
C) is calculated as (3)
V
D
C
ω
t
=
V
x
ω
t
+
V
z
ω
t
≈
3.39
V
p
k
k
n
cos
⁡
α
.Figure 3
Theoretical DC voltage waveforms for 3-level thyristor based MLCR CSC forα = −45°.The harmonic spectrum ofV
D
C is shown in Figure 4. It can be clearly seen that the dominant harmonics are 24th, 48th, 72nd, 96th, and 120th which represents 24-pulse operation. A small amount of 12-pulse related harmonics such as 12th, 36th, and 60th can also be seen but the magnitude is negligible.Figure 4
Harmonic spectrum ofV
D
C of 3-level thyristor based MLCR CSC for α = −45°.


## 2.3. Reinjection Current Waveforms

Figure5 labels the various current waveforms in the reinjection circuit. The “chopping” of load current I
D
C occurs with the help of the reinjection IGBTs. The injection current I
i
n
j is a 3-level waveform composed of the following:(i)
When reinjection IGBT pairS
p
1
-
S
n
1 conducts, I
j
1
=
(
n
1
/
n
0
)
I
D
C
=
I
D
C.
(ii)
When reinjection IGBT pairS
p
0
-
S
n
0 conducts, I
j
1
=
0.
(iii)
When reinjection IGBT pairS
p
2
-
S
n
2 conducts, I
j
1
=
-
(
n
1
/
n
0
)
I
D
C
=
-
I
D
C.Figure 5
Reinjection current flow for a 3-level MLCR CSC.Reinjection currentsI
j
1 and I
j
2 add up to form I
i
n
j which is injected back to the midpoint of the 12-pulse converter. The theoretical current waveforms in the reinjection circuit are shown in Figure 6.Figure 6
Theoretical waveforms in the reinjection circuit.
(a)
I
S
p
1, I
S
p
0, and I
S
p
2 waveforms
(b)
I
S
1, I
S
0, and I
S
2 waveforms
(c)
I
j
1, I
j
2, and I
i
n
j waveforms


## 3. PSCAD/EMTDC Verification

This section presents the PSCAD/EMTDC simulation results of the thyristor based 3-level MLCR CSC. The converter is directly connected to a balanced 3-phase voltage source with series resistance and series inductance. The simulation is carried out under the conditions listed in the Appendix.


### 3.1. Waveforms without RCD Snubber

The voltage waveform across the reinjection IGBTS
p
1 as well as the current flowing through it, without the RCD snubber, is shown in Figure 7. It can be clearly seen that there is a sharp rise in voltage across V
S
p
1 whenever there is a current transition through it, that is, current transition from 0 to -
I
D
C or 0 to I
D
C. This effect was not considered while deriving the theoretical waveforms. As seen from Figure 8, these voltage spikes occur across the individual DC voltage waveform of the two 6-pulse bridges which in turn affect the voltages V
m and V
z. The spikes occur exactly 7.5° before and after the theoretical main bridge switching instant. Thus there is a need to limit the voltage d
v
/
d
t using RCD snubber to an acceptable value so that the voltage across the main bridge switches and DC blocking capacitor and the reinjection transformer are within their rated values.Figure 7
V
S
p
1 and I
S
1 with no snubber.Figure 8
Simulated DC voltage waveforms for 3-level thyristor based MLCR CSC forα = −45° without RCD snubber.The simulated AC side current waveforms are shown in Figure9. The simulated line current THD of 7.8% is very close to the calculated theoretical value.Figure 9
Simulated AC current waveforms for 3-level thyristor based MLCR CSC forα = −45° without RCD snubber.


### 3.2. Waveforms with RCD Snubbers

As illustrated in Figure10(b), the snubber capacitor size is a trade-off between d
v
/
d
t across the reinjection switches and switching time. A “normal” snubber is defined as the one which allows the current to reach the rated level at the same time the voltage reaches zero. A small snubber allows the current to rise faster while a large snubber slows the current rise rate. However, large capacitor values will provide overclamping. When the RCD snubber is used to control the rate of voltage rise at the IGBT, the capacitor must be completely charged and discharged during each cycle to be able to control the rate-of-rise of the drain voltage. The RC time constant of the snubber should be much smaller than the switching period. Usually, the time constant (
τ
R
C
) should be (1/10)th of the switching period. The value of snubber capacitor C
s
n is given by the following equation [19]:(4)
C
s
n
=
I
t
s
2
E
,where I is maximum IGBT current (assumed) = 2 A, t
s: ≈1.65 μs (3 times the value given in the datasheet of the IGBT), and E is the maximum expected voltage across IGBT: ≈0.9(
V
p
k
/
k
n
)
≈
36.72 V for the present application. Substituting these values in (4) gives C
s
n
=
0.045 μF. The value of R
s
n is determined by allowing the switching time constant (
τ
R
C
) to be less than 166.66 μs ((1/10)th of 600 Hz). With C
s
n
=
0.05 μF and R
s
n
=
1 kΩ, τ
R
C
=
50 μs.Figure 10
Snubber consideration for reinjection switches.
(a)
RCD snubber for reinjection IGBT
(b)
Voltage and current waveforms for (1) ideal and (2) small snubber and (3) normal snubber and (4) large snubberThree different cases are considered in this study, smallC
s
n
=
0.01 μF, large C
s
n
=
0.1 μF, and very large C
s
n
=
1 μF. The PSCAD/EMTDC results are presented in Figures 11–15. From Figure 11, with C
s
n
=
1 μF the voltage across V
S
p
1 is closest to its calculated value; however the rate of current rise for the switch S
p
1 is slowest. C
s
n
=
0.01 μF provides higher rate of current rise in S
p
1 and the current reinjection current resembles the theoretical current more closely. THD for line current I
a is obtained as 7.9%, 8.1%, and 8.7%, respectively, with C
s
n
=
0.01 μF, 0.1 μF, and 1 μF (Figures 12–14). The effectiveness of the MLCR scheme depends on the modification of the constant DC bus current into a 3-level DC bus current using reinjection current I
i
n
j. The use of small C
s
n is found to be the best even though it requires overrated reinjection switches as shown in Figure 11.Figure 11
Voltage across reinjection IGBTS
p
1 for different C
s
n.
(a)
V
S
p
1 and I
S
1 with C
s
n
=
0.01 μF
(b)
V
S
p
1 and I
S
1 with C
s
n
=
0.1 μF
(c)
V
S
p
1 and I
S
1 with C
s
n = 1 μFFigure 12
Simulated AC side current and DC bus waveforms for the 3-level thyristor based MLCR CSC.
(a)
I
a
y, I
c
a
D, and I
a for C
s
n
=
0.01 μF
(b)
I
a
y, I
c
a
D, and I
a for C
s
n
=
0.1 μF
(c)
I
a
y, I
c
a
D, and I
a for C
s
n
=
1 μFFigure 13
Simulated AC side current and DC bus waveforms for the 3-level thyristor based MLCR CSC.
(a)
I
1 and I
2 for C
s
n
=
0.01 μF
(b)
I
1 and I
2 for C
s
n
=
0.1 μF
(c)
I
1 and I
2 for C
s
n
=
1 μFFigure 14
Simulated Reinjection current and DC side voltage waveforms for the 3-level thyristor based MLCR CSC.
(a)
I
j
1, I
j
2, and I
i
n
j for C
s
n
=
0.01 μF
(b)
I
j
1, I
j
2, and I
i
n
j for C
s
n
=
0.1 μF
(c)
I
j
1, I
j
2, and I
i
n
j for C
s
n
=
1 μFFigure 15
Simulated Reinjection current and DC side voltage waveforms for the 3-level thyristor based MLCR CSC.
(a)
V
y, V
d, V
x, and V
D
C for C
=
0.01 μF
(b)
V
y, V
d, V
x, and V
D
C for C
=
0.1 μF
(c)
V
y,V
d, V
x, and V
D
C for C
=
1 μF


## 3.1. Waveforms without RCD Snubber

The voltage waveform across the reinjection IGBTS
p
1 as well as the current flowing through it, without the RCD snubber, is shown in Figure 7. It can be clearly seen that there is a sharp rise in voltage across V
S
p
1 whenever there is a current transition through it, that is, current transition from 0 to -
I
D
C or 0 to I
D
C. This effect was not considered while deriving the theoretical waveforms. As seen from Figure 8, these voltage spikes occur across the individual DC voltage waveform of the two 6-pulse bridges which in turn affect the voltages V
m and V
z. The spikes occur exactly 7.5° before and after the theoretical main bridge switching instant. Thus there is a need to limit the voltage d
v
/
d
t using RCD snubber to an acceptable value so that the voltage across the main bridge switches and DC blocking capacitor and the reinjection transformer are within their rated values.Figure 7
V
S
p
1 and I
S
1 with no snubber.Figure 8
Simulated DC voltage waveforms for 3-level thyristor based MLCR CSC forα = −45° without RCD snubber.The simulated AC side current waveforms are shown in Figure9. The simulated line current THD of 7.8% is very close to the calculated theoretical value.Figure 9
Simulated AC current waveforms for 3-level thyristor based MLCR CSC forα = −45° without RCD snubber.


## 3.2. Waveforms with RCD Snubbers

As illustrated in Figure10(b), the snubber capacitor size is a trade-off between d
v
/
d
t across the reinjection switches and switching time. A “normal” snubber is defined as the one which allows the current to reach the rated level at the same time the voltage reaches zero. A small snubber allows the current to rise faster while a large snubber slows the current rise rate. However, large capacitor values will provide overclamping. When the RCD snubber is used to control the rate of voltage rise at the IGBT, the capacitor must be completely charged and discharged during each cycle to be able to control the rate-of-rise of the drain voltage. The RC time constant of the snubber should be much smaller than the switching period. Usually, the time constant (
τ
R
C
) should be (1/10)th of the switching period. The value of snubber capacitor C
s
n is given by the following equation [19]:(4)
C
s
n
=
I
t
s
2
E
,where I is maximum IGBT current (assumed) = 2 A, t
s: ≈1.65 μs (3 times the value given in the datasheet of the IGBT), and E is the maximum expected voltage across IGBT: ≈0.9(
V
p
k
/
k
n
)
≈
36.72 V for the present application. Substituting these values in (4) gives C
s
n
=
0.045 μF. The value of R
s
n is determined by allowing the switching time constant (
τ
R
C
) to be less than 166.66 μs ((1/10)th of 600 Hz). With C
s
n
=
0.05 μF and R
s
n
=
1 kΩ, τ
R
C
=
50 μs.Figure 10
Snubber consideration for reinjection switches.
(a)
RCD snubber for reinjection IGBT
(b)
Voltage and current waveforms for (1) ideal and (2) small snubber and (3) normal snubber and (4) large snubberThree different cases are considered in this study, smallC
s
n
=
0.01 μF, large C
s
n
=
0.1 μF, and very large C
s
n
=
1 μF. The PSCAD/EMTDC results are presented in Figures 11–15. From Figure 11, with C
s
n
=
1 μF the voltage across V
S
p
1 is closest to its calculated value; however the rate of current rise for the switch S
p
1 is slowest. C
s
n
=
0.01 μF provides higher rate of current rise in S
p
1 and the current reinjection current resembles the theoretical current more closely. THD for line current I
a is obtained as 7.9%, 8.1%, and 8.7%, respectively, with C
s
n
=
0.01 μF, 0.1 μF, and 1 μF (Figures 12–14). The effectiveness of the MLCR scheme depends on the modification of the constant DC bus current into a 3-level DC bus current using reinjection current I
i
n
j. The use of small C
s
n is found to be the best even though it requires overrated reinjection switches as shown in Figure 11.Figure 11
Voltage across reinjection IGBTS
p
1 for different C
s
n.
(a)
V
S
p
1 and I
S
1 with C
s
n
=
0.01 μF
(b)
V
S
p
1 and I
S
1 with C
s
n
=
0.1 μF
(c)
V
S
p
1 and I
S
1 with C
s
n = 1 μFFigure 12
Simulated AC side current and DC bus waveforms for the 3-level thyristor based MLCR CSC.
(a)
I
a
y, I
c
a
D, and I
a for C
s
n
=
0.01 μF
(b)
I
a
y, I
c
a
D, and I
a for C
s
n
=
0.1 μF
(c)
I
a
y, I
c
a
D, and I
a for C
s
n
=
1 μFFigure 13
Simulated AC side current and DC bus waveforms for the 3-level thyristor based MLCR CSC.
(a)
I
1 and I
2 for C
s
n
=
0.01 μF
(b)
I
1 and I
2 for C
s
n
=
0.1 μF
(c)
I
1 and I
2 for C
s
n
=
1 μFFigure 14
Simulated Reinjection current and DC side voltage waveforms for the 3-level thyristor based MLCR CSC.
(a)
I
j
1, I
j
2, and I
i
n
j for C
s
n
=
0.01 μF
(b)
I
j
1, I
j
2, and I
i
n
j for C
s
n
=
0.1 μF
(c)
I
j
1, I
j
2, and I
i
n
j for C
s
n
=
1 μFFigure 15
Simulated Reinjection current and DC side voltage waveforms for the 3-level thyristor based MLCR CSC.
(a)
V
y, V
d, V
x, and V
D
C for C
=
0.01 μF
(b)
V
y, V
d, V
x, and V
D
C for C
=
0.1 μF
(c)
V
y,V
d, V
x, and V
D
C for C
=
1 μF


## 4. Hardware Modules

The major components of the experimental set-up consist of voltage sensing, thyristor driver circuit, IGBT driver circuit, and so forth. Each will be discussed in the following sections.


### 4.1. Voltage Transducer Circuit

Voltage sensors LEM LV25-P [20] are used to convert power level voltage into low voltage signals by scaling down the measured voltage to 5 V
R
M
S The Hall effect transducers provide the isolation between the high power system and the control electronic circuit. For a 12-pulse converter, six voltage sensors are used. The line voltages sensed are V
a
n, V
b
n, V
c
n, V
a
b, V
b
c, and V
c
a. The triggering signals for the Y
-
Y and Y
-
D connected converters are derived from the low voltage sensed signals V
c
a
Y and -
V
a
n
Y, respectively.The LV25-P scales down the power level voltage into low level signal when a current proportional to the measured voltage is passed through the resistorR
i
n (Figure 16(a)). For the best accuracy of LV25-P, R
i
n should be so selected that the voltage measured corresponds to a primary current (I
i
n
R
M
S) of 10 mA. The current conversion ratio is 2.5; hence, the nominal secondary current is 25 mA. This secondary current flows through an output series resistance R
o
u
t to give the scaled down voltage. The fabricated PCB for this purpose is shown in Figure 16(b). The maximum and minimum value of the series resistance R
o
u
t with a ±15 V supply are between 100 Ω and 350 Ω.Figure 16
Voltage transducer circuit and fabricated PCB.
(a)
Hall effect voltage transducer
(b)
Voltage sensor PCBs forY
-
Y and Y
-
D voltage sensingThe 12-pulse interface transformer rating is(
V
L
L
R
M
S
) 400 V : 50 V. The primary side input resistance is calculated as(5)
R
i
n
=
400
V
10
mA
≈
40
k
Ω
.A fixed value resistor of 40 kΩ/5 W is used.The output voltage is fixed at 5V
R
M
S. Therefore, the output resistance R
o
u
t is calculated as (6)
R
o
u
t
=
5
25
mA
≈
200
Ω
.A variable 500 Ω/0.6 W resistor is used.


### 4.2. Forward Converter Based Thyristor Driver Circuit

The thyristor driver circuit is based on the forward converter topology with isolation between the control and power circuit being provided by the 77205C pulse transformer [21] (Figure 17(a)).Figure 17
Forward converter based thyristor driver circuit and PCB detail.
(a)
Forward converter based thyristor driver circuit
(b)
Six-pulse phase controlled thyristor converter PCBWhen the MOSFET is on, diodeD
2 conducts and V
s
e
c
=
5 V is available across the secondary winding of the pulse transformer. V
s
e
c drives gate current I
g in the gate-cathode junction of the thyristor to turn it on. For I
g
≈
200 mA, the gate drive resistor R
g
=
12.5 Ω. When the MOSFET is off, diode D
1 returns the energy stored in the pulse transformer back to the supply. The 6-pulse thyristor PCB is shown in Figure 17(b) which uses BT152800R thyristors [22].


### 4.3. Generating of Reinjection Pulses for 3-Level MLCR

In order to produce the firing sequence needed to generate the 3-levelI
i
n
j, the firing sequences of the reinjection IGBTs are synchronised with the main bridge switching. In Figure 18 it is shown that each reinjection turn-on pulse is delayed from the main bridge switching pulse by 52.5° and the width of the turn-on pulse is 15°. Based on the six main bridge switching pulses, six reinjection turn-on pulses are derived and these are added together from the reinjection pulse for reinjection IGBT pair S
p
1
/
S
n
1. Following a similar procedure, the reinjection pulse for reinjection IGBT pair S
p
2
/
S
n
2 is also derived as shown in Figure 19. A minimum dead time of 10 μs is selected between S
p
1
/
S
n
1 and S
p
0
/
S
n
0 and S
p
2
/
S
n
2 and the derivation of the reinjection pulse for S
p
0
/
S
n
0 is shown in Figure 20.Figure 18
Generation of reinjection pulse for reinjection IGBTS
p
1
/
S
n
1.Figure 19
Generation of reinjection pulse for reinjection IGBTS
p
2
/
S
n
2.Figure 20
Generation of reinjection pulse for reinjection IGBTS
p
0
/
S
n
0.


### 4.4. Optocoupler Based IGBT Driver Circuit

The isolated gate driver ACPL-312T [23] is used for this purpose. The response of optocoupler depends on the value of gate resistance (R
g). R
g is calculated from the peak gate current (I
G
p
e
a
k) of 2.5 A (from ACPL-312T datasheet). V
O
L is obtained from Figure 6 in the ACPL-312T datasheet, assuming temperature = 25°. Consider(7)
R
g
≥
V
c
c
-
V
O
L
I
G
p
e
a
k
=
15
-
3.5
2.5
=
4.6
Ω
.The value of the gate resistance has a significant impact on the dynamic performance of IGBTs. A smaller gate resistor charges and discharges the power transistor input capacitance faster, reducing switching times and switching losses. The trade-off is that this could lead to higher voltage oscillations. At lowerR
g values, the voltage supplied by the ACPL-312T is not an ideal voltage step. Since the maximum peak gate current of the driver must be equal to or lower than I
G
p
e
a
k, choosing R
g
=
10 Ω is a good trade-off.Once the logical signals (reinjection pulses for reinjection switches) are available, these are fed to the IGBT driver circuit. The driver circuit is shown in Figure21. Since there are six reinjection switches (IXGP20N [24]) for a 3-level MLCR CSC, six isolated DC-DC converters are required for the ACPL-312T. The isolated DC-DC converter 0515S [25] from Tracopower is used here. V
c
c
=
15 V is chosen because the output voltage (V
o) of ACPL-312T goes high when V
c
c
-
V
e
e is between 13.5 V and 30 V. Input resistance for ACPL-312T, R
i
n, is calculated as follows (input current I
i
n of ACPL-312T needs to be limited between 7 mA and 16 mA): (8)
R
i
n
=
15
-
1.5
10
m
A
≈
1.5
k
Ω
.Figure 21
ACPL-312T IGBT driver circuit.A decoupling capacitor of0.1
μF is placed across V
c
c and V
e
e, very close to the optocoupler itself to filter out any noise coming from the isolated DC-DC converter.


### 4.5. DC Blocking Capacitor

A 400 V/1 mF (PEH200 Series,±
20
%) electrolytic capacitor is used as the DC blocking capacitor. This unit is rated for a total of 5.9 A based on an equivalent series resistance (ESR) of 76 mΩ at a frequency of 100 Hz and equivalent series inductance (ESL) of 16 nH which gives Z
100
H
z
=
1.59 Ω. The maximum average steady-state DC voltage for this 3-level MLCR CSC prototype is ≈138 V, I
D
C
=
1.38 A. The RMS value of reinjection currents I
j
1 and I
j
2
=
0.707
×
1.38
=
0.975 A ≈ 1 A which is well under the rating of PEH200 capacitor. Figure 22 shows the set-up for the reinjection transformer along with the DC blocking capacitors.Figure 22
Three-level MLCR CSC prototype and associated auxiliaries: the DC side reinjection transformer.


## 4.1. Voltage Transducer Circuit

Voltage sensors LEM LV25-P [20] are used to convert power level voltage into low voltage signals by scaling down the measured voltage to 5 V
R
M
S The Hall effect transducers provide the isolation between the high power system and the control electronic circuit. For a 12-pulse converter, six voltage sensors are used. The line voltages sensed are V
a
n, V
b
n, V
c
n, V
a
b, V
b
c, and V
c
a. The triggering signals for the Y
-
Y and Y
-
D connected converters are derived from the low voltage sensed signals V
c
a
Y and -
V
a
n
Y, respectively.The LV25-P scales down the power level voltage into low level signal when a current proportional to the measured voltage is passed through the resistorR
i
n (Figure 16(a)). For the best accuracy of LV25-P, R
i
n should be so selected that the voltage measured corresponds to a primary current (I
i
n
R
M
S) of 10 mA. The current conversion ratio is 2.5; hence, the nominal secondary current is 25 mA. This secondary current flows through an output series resistance R
o
u
t to give the scaled down voltage. The fabricated PCB for this purpose is shown in Figure 16(b). The maximum and minimum value of the series resistance R
o
u
t with a ±15 V supply are between 100 Ω and 350 Ω.Figure 16
Voltage transducer circuit and fabricated PCB.
(a)
Hall effect voltage transducer
(b)
Voltage sensor PCBs forY
-
Y and Y
-
D voltage sensingThe 12-pulse interface transformer rating is(
V
L
L
R
M
S
) 400 V : 50 V. The primary side input resistance is calculated as(5)
R
i
n
=
400
V
10
mA
≈
40
k
Ω
.A fixed value resistor of 40 kΩ/5 W is used.The output voltage is fixed at 5V
R
M
S. Therefore, the output resistance R
o
u
t is calculated as (6)
R
o
u
t
=
5
25
mA
≈
200
Ω
.A variable 500 Ω/0.6 W resistor is used.


## 4.2. Forward Converter Based Thyristor Driver Circuit

The thyristor driver circuit is based on the forward converter topology with isolation between the control and power circuit being provided by the 77205C pulse transformer [21] (Figure 17(a)).Figure 17
Forward converter based thyristor driver circuit and PCB detail.
(a)
Forward converter based thyristor driver circuit
(b)
Six-pulse phase controlled thyristor converter PCBWhen the MOSFET is on, diodeD
2 conducts and V
s
e
c
=
5 V is available across the secondary winding of the pulse transformer. V
s
e
c drives gate current I
g in the gate-cathode junction of the thyristor to turn it on. For I
g
≈
200 mA, the gate drive resistor R
g
=
12.5 Ω. When the MOSFET is off, diode D
1 returns the energy stored in the pulse transformer back to the supply. The 6-pulse thyristor PCB is shown in Figure 17(b) which uses BT152800R thyristors [22].


## 4.3. Generating of Reinjection Pulses for 3-Level MLCR

In order to produce the firing sequence needed to generate the 3-levelI
i
n
j, the firing sequences of the reinjection IGBTs are synchronised with the main bridge switching. In Figure 18 it is shown that each reinjection turn-on pulse is delayed from the main bridge switching pulse by 52.5° and the width of the turn-on pulse is 15°. Based on the six main bridge switching pulses, six reinjection turn-on pulses are derived and these are added together from the reinjection pulse for reinjection IGBT pair S
p
1
/
S
n
1. Following a similar procedure, the reinjection pulse for reinjection IGBT pair S
p
2
/
S
n
2 is also derived as shown in Figure 19. A minimum dead time of 10 μs is selected between S
p
1
/
S
n
1 and S
p
0
/
S
n
0 and S
p
2
/
S
n
2 and the derivation of the reinjection pulse for S
p
0
/
S
n
0 is shown in Figure 20.Figure 18
Generation of reinjection pulse for reinjection IGBTS
p
1
/
S
n
1.Figure 19
Generation of reinjection pulse for reinjection IGBTS
p
2
/
S
n
2.Figure 20
Generation of reinjection pulse for reinjection IGBTS
p
0
/
S
n
0.


## 4.4. Optocoupler Based IGBT Driver Circuit

The isolated gate driver ACPL-312T [23] is used for this purpose. The response of optocoupler depends on the value of gate resistance (R
g). R
g is calculated from the peak gate current (I
G
p
e
a
k) of 2.5 A (from ACPL-312T datasheet). V
O
L is obtained from Figure 6 in the ACPL-312T datasheet, assuming temperature = 25°. Consider(7)
R
g
≥
V
c
c
-
V
O
L
I
G
p
e
a
k
=
15
-
3.5
2.5
=
4.6
Ω
.The value of the gate resistance has a significant impact on the dynamic performance of IGBTs. A smaller gate resistor charges and discharges the power transistor input capacitance faster, reducing switching times and switching losses. The trade-off is that this could lead to higher voltage oscillations. At lowerR
g values, the voltage supplied by the ACPL-312T is not an ideal voltage step. Since the maximum peak gate current of the driver must be equal to or lower than I
G
p
e
a
k, choosing R
g
=
10 Ω is a good trade-off.Once the logical signals (reinjection pulses for reinjection switches) are available, these are fed to the IGBT driver circuit. The driver circuit is shown in Figure21. Since there are six reinjection switches (IXGP20N [24]) for a 3-level MLCR CSC, six isolated DC-DC converters are required for the ACPL-312T. The isolated DC-DC converter 0515S [25] from Tracopower is used here. V
c
c
=
15 V is chosen because the output voltage (V
o) of ACPL-312T goes high when V
c
c
-
V
e
e is between 13.5 V and 30 V. Input resistance for ACPL-312T, R
i
n, is calculated as follows (input current I
i
n of ACPL-312T needs to be limited between 7 mA and 16 mA): (8)
R
i
n
=
15
-
1.5
10
m
A
≈
1.5
k
Ω
.Figure 21
ACPL-312T IGBT driver circuit.A decoupling capacitor of0.1
μF is placed across V
c
c and V
e
e, very close to the optocoupler itself to filter out any noise coming from the isolated DC-DC converter.


## 4.5. DC Blocking Capacitor

A 400 V/1 mF (PEH200 Series,±
20
%) electrolytic capacitor is used as the DC blocking capacitor. This unit is rated for a total of 5.9 A based on an equivalent series resistance (ESR) of 76 mΩ at a frequency of 100 Hz and equivalent series inductance (ESL) of 16 nH which gives Z
100
H
z
=
1.59 Ω. The maximum average steady-state DC voltage for this 3-level MLCR CSC prototype is ≈138 V, I
D
C
=
1.38 A. The RMS value of reinjection currents I
j
1 and I
j
2
=
0.707
×
1.38
=
0.975 A ≈ 1 A which is well under the rating of PEH200 capacitor. Figure 22 shows the set-up for the reinjection transformer along with the DC blocking capacitors.Figure 22
Three-level MLCR CSC prototype and associated auxiliaries: the DC side reinjection transformer.


## 5. Experimental Results

Real world capacitors often have ±1%–±20% variation in the capacitance values while resistors also have ±1%–±5% variation; thus exact DC bus currents (I
1 and I
2) may not be possible in hardware implementation. However, for comparison with the theoretical waveforms, the experimental and theoretical waveforms are overlapped together. Two different types of PCBs with C
s
n: 0.01 μF and 1 μF (Figure 23) are fabricated and the results are summarized in this section. The experimental V
D
C obtained from the prototype is 96.3 V and I
D
C
=
0.97 A with α = −45°.Figure 23
Two reinjection PCBs used in the prototype.
(a)
Three-level reinjection PCB,C
s
n: 0.01 μF
(b)
Three-level reinjection PCB,C
s
n: 1 μF


### 5.1. Current through Reinjection IGBTs

Figure24 shows the current flowing through reinjection IGBTs S
p
1, S
p
0, and S
p
2. For C
s
n
=
0.01 μF (Figure 24(a)), these waveforms follow the theoretical waveform closely with I
S
p
1
≈
I
D
C for almost the entire theoretical duration of 15°. As observed from Figure 24(b), with C
s
n
=
1
μ
F, I
S
p
1
≈
I
D
C for less than half of the theoretical duration. These waveforms constitute the “chopping” of I
D
C and formation of the reinjection currents.Figure 24
Experimental currentsI
S
p
1, I
S
p
0, and I
S
p
2 through reinjection IGBTs.
(a)
I
S
p
1, I
S
p
0, and I
S
p
2,  C
s
n
=
0.01 μF
(b)
I
S
p
1, I
S
p
0, and I
S
p
2, C
s
n
=
1 μF


### 5.2. Reinjection Currents Waveforms

Figure25 shows the reinjection currents I
j
1, I
j
2, and I
i
n
j on the primary side of the reinjection transformer. I
i
n
j is composed of I
j
1 and I
j
2. Again, with C
s
n
=
1 μF reinjection current I
i
n
j is not following the theoretical I
i
n
j “perfectly” whereas, with C
s
n
=
0.01 μF, I
i
n
j follows the theoretical wave-shape.Figure 25
Reinjected current waveformsI
j
1, I
j
2, and I
i
n
j.
(a)
I
j
1, I
j
2, and I
i
n
j, C
s
n
=
0.01 μF
(b)
I
j
1, I
j
2, and I
i
n
j, C
s
n
=
1 μF


### 5.3. DC Bus Currents Waveforms

The injected current waveformI
i
n
j modifies the DC bus currents as shown in Figure 26. This DC bus current is a 3-level waveform with I
1,2
=
0, I
1,2
=
I
D
C, and I
1,2
=
2
I
D
C as the three different levels of DC bus current waveform.Figure 26
Experimental DC bus currentsI
1, I
2, and I
D
C.
(a)
I
1, I
2, and I
D
C, C
s
n
=
0.01 μF
(b)
I
1, I
2, and I
D
C, C
s
n
=
1 μF


### 5.4. AC Side Secondary Line Current Waveforms

The modified AC side secondary line currentsI
a
Y and I
a
D are shown in Figure 27. With C
s
n
=
0.01 μF, experimental I
a
Y and I
a
D follow the theoretical current wave-shape. Current spikes are observed in I
a
Y and I
a
D with C
s
n
=
1 μF. These spikes are observed at the same instants when the main bridge thyristors are triggered. However, these spikes are not observed with C
s
n
=
0.01 μF.Figure 27
Secondary side line currentsI
a
Y and I
a
D.
(a)
I
a
Y and I
a
D, C
s
n
=
0.01 μF
(b)
I
a
Y and I
a
D, C
s
n
=
1 μF


### 5.5. AC Side Primary Line Current Waveform

The modified primary side line currentI
a is shown in Figure 28. The effect of using a “very large” C
s
n is clearly observed (Figure 28(b)). I
a with C
s
n
=
1 μF is highly distorted although a multistep waveform can be observed. With C
s
n
=
0.01 μF, I
a follows the theoretical waveform closely and a 24-step I
a is obtained.Figure 28
Primary side line currentI
a.
(a)
I
a, C
s
n
=
0.01 μF
(b)
I
a, C
s
n
=
1 μF


### 5.6.Y
-
Y and Y
-
D Connected DC Voltage Waveform

The DC voltage waveforms for bothY
-
Y and Y
-
D connected 6-pulse bridges are shown in Figure 29. With C
s
n
=
0.01 μF, the experimental waveform follows the theoretical one while, with C
s
n
=
1 μF, the transitions are delayed by about 7.5° which is also observed in PSCAD/EMTDC simulation result. However, very large voltage d
v
/
d
t, as predicted by PSCAD/EMTDC, is absent.Figure 29
DC voltage waveformsV
y and V
d.
(a)
V
y and V
d, C
s
n
=
0.01 μF
(b)
V
y and V
d, C
s
n
=
1 μF


### 5.7. 12-Pulse DC Voltage Waveform

The 12-pulse DC voltage obtained for both the values ofC
s
n is shown in Figure 30.Figure 30
12-pulse DC voltage waveformV
x.
(a)
V
x, C
s
n
=
0.01 μF
(b)
V
x, C
s
n
=
1 μF


### 5.8. Reinjection Transformer Secondary Side Voltage Waveform

The reinjection transformer secondary side voltageV
m obtained is shown in Figure 31. V
m with C
s
n
=
1
μ
F follows the theoretical V
m more closely but is delayed by about 7.5°. V
m with C
s
n
=
0.01
μ
F has higher d
v
/
d
t during transitions (Figure 31(a)).Figure 31
Reinjection transformer secondary side voltageV
m.
(a)
V
m, C
s
n
=
0.01 μF
(b)
V
m, C
s
n
=
1 μF


### 5.9. Three-Level MLCR CSC DC Voltage Waveform

The DC voltage waveformV
D
C is shown in Figure 32. Voltage d
v
/
d
t observed in V
m with C
s
n
=
0.01 μF is clearly reflected across V
D
C whereas the voltage d
v
/
d
t transitions are not observed in V
D
C with C
s
n
=
1 μF. Nevertheless, V
D
C has 24 pulses in both the cases which implies that ripple voltage is getting added to V
x giving it 24-pulse characteristics.Figure 32
Three-level MLCR CSC DC voltage waveformV
D
C.
(a)
V
D
C, C
s
n
=
0.01 μF
(b)
V
D
C, C
s
n
=
1 μF


## 5.1. Current through Reinjection IGBTs

Figure24 shows the current flowing through reinjection IGBTs S
p
1, S
p
0, and S
p
2. For C
s
n
=
0.01 μF (Figure 24(a)), these waveforms follow the theoretical waveform closely with I
S
p
1
≈
I
D
C for almost the entire theoretical duration of 15°. As observed from Figure 24(b), with C
s
n
=
1
μ
F, I
S
p
1
≈
I
D
C for less than half of the theoretical duration. These waveforms constitute the “chopping” of I
D
C and formation of the reinjection currents.Figure 24
Experimental currentsI
S
p
1, I
S
p
0, and I
S
p
2 through reinjection IGBTs.
(a)
I
S
p
1, I
S
p
0, and I
S
p
2,  C
s
n
=
0.01 μF
(b)
I
S
p
1, I
S
p
0, and I
S
p
2, C
s
n
=
1 μF


## 5.2. Reinjection Currents Waveforms

Figure25 shows the reinjection currents I
j
1, I
j
2, and I
i
n
j on the primary side of the reinjection transformer. I
i
n
j is composed of I
j
1 and I
j
2. Again, with C
s
n
=
1 μF reinjection current I
i
n
j is not following the theoretical I
i
n
j “perfectly” whereas, with C
s
n
=
0.01 μF, I
i
n
j follows the theoretical wave-shape.Figure 25
Reinjected current waveformsI
j
1, I
j
2, and I
i
n
j.
(a)
I
j
1, I
j
2, and I
i
n
j, C
s
n
=
0.01 μF
(b)
I
j
1, I
j
2, and I
i
n
j, C
s
n
=
1 μF


## 5.3. DC Bus Currents Waveforms

The injected current waveformI
i
n
j modifies the DC bus currents as shown in Figure 26. This DC bus current is a 3-level waveform with I
1,2
=
0, I
1,2
=
I
D
C, and I
1,2
=
2
I
D
C as the three different levels of DC bus current waveform.Figure 26
Experimental DC bus currentsI
1, I
2, and I
D
C.
(a)
I
1, I
2, and I
D
C, C
s
n
=
0.01 μF
(b)
I
1, I
2, and I
D
C, C
s
n
=
1 μF


## 5.4. AC Side Secondary Line Current Waveforms

The modified AC side secondary line currentsI
a
Y and I
a
D are shown in Figure 27. With C
s
n
=
0.01 μF, experimental I
a
Y and I
a
D follow the theoretical current wave-shape. Current spikes are observed in I
a
Y and I
a
D with C
s
n
=
1 μF. These spikes are observed at the same instants when the main bridge thyristors are triggered. However, these spikes are not observed with C
s
n
=
0.01 μF.Figure 27
Secondary side line currentsI
a
Y and I
a
D.
(a)
I
a
Y and I
a
D, C
s
n
=
0.01 μF
(b)
I
a
Y and I
a
D, C
s
n
=
1 μF


## 5.5. AC Side Primary Line Current Waveform

The modified primary side line currentI
a is shown in Figure 28. The effect of using a “very large” C
s
n is clearly observed (Figure 28(b)). I
a with C
s
n
=
1 μF is highly distorted although a multistep waveform can be observed. With C
s
n
=
0.01 μF, I
a follows the theoretical waveform closely and a 24-step I
a is obtained.Figure 28
Primary side line currentI
a.
(a)
I
a, C
s
n
=
0.01 μF
(b)
I
a, C
s
n
=
1 μF


## 5.6.Y
-
Y and Y
-
D Connected DC Voltage Waveform

The DC voltage waveforms for bothY
-
Y and Y
-
D connected 6-pulse bridges are shown in Figure 29. With C
s
n
=
0.01 μF, the experimental waveform follows the theoretical one while, with C
s
n
=
1 μF, the transitions are delayed by about 7.5° which is also observed in PSCAD/EMTDC simulation result. However, very large voltage d
v
/
d
t, as predicted by PSCAD/EMTDC, is absent.Figure 29
DC voltage waveformsV
y and V
d.
(a)
V
y and V
d, C
s
n
=
0.01 μF
(b)
V
y and V
d, C
s
n
=
1 μF


## 5.7. 12-Pulse DC Voltage Waveform

The 12-pulse DC voltage obtained for both the values ofC
s
n is shown in Figure 30.Figure 30
12-pulse DC voltage waveformV
x.
(a)
V
x, C
s
n
=
0.01 μF
(b)
V
x, C
s
n
=
1 μF


## 5.8. Reinjection Transformer Secondary Side Voltage Waveform

The reinjection transformer secondary side voltageV
m obtained is shown in Figure 31. V
m with C
s
n
=
1
μ
F follows the theoretical V
m more closely but is delayed by about 7.5°. V
m with C
s
n
=
0.01
μ
F has higher d
v
/
d
t during transitions (Figure 31(a)).Figure 31
Reinjection transformer secondary side voltageV
m.
(a)
V
m, C
s
n
=
0.01 μF
(b)
V
m, C
s
n
=
1 μF


## 5.9. Three-Level MLCR CSC DC Voltage Waveform

The DC voltage waveformV
D
C is shown in Figure 32. Voltage d
v
/
d
t observed in V
m with C
s
n
=
0.01 μF is clearly reflected across V
D
C whereas the voltage d
v
/
d
t transitions are not observed in V
D
C with C
s
n
=
1 μF. Nevertheless, V
D
C has 24 pulses in both the cases which implies that ripple voltage is getting added to V
x giving it 24-pulse characteristics.Figure 32
Three-level MLCR CSC DC voltage waveformV
D
C.
(a)
V
D
C, C
s
n
=
0.01 μF
(b)
V
D
C, C
s
n
=
1 μF


## 6. Conclusion

The theory, PSCAD/EMTDC simulation results, hardware prototype, and experimental results of a 3-level thyristor based MLCR CSC have been presented in detail in this paper. The reinjection current forces the main bridge thyristor to commutate under zero current thereby allowing it to be switched at negative firing angles. It is possible to achieve self-commutation for thyristors using an auxiliary reinjection bridge.From experimental investigation, it is observed that the deviation of the actual waveforms from the theoretical waveforms is mainly due to the use of a “very large” snubber capacitor. With a “very large” snubber capacitor value, interface transformer secondary side current showed currentd
i
/
d
t which happened exactly 7.5° before the current passed through that particular thyristor. This is when the thyristor is switched on. The voltage transitions were also delayed by 7.5° with a “very large” snubber capacitor. With a “small” snubber capacitor value, current waveform follows the theoretical waveforms very closely; however voltage d
v
/
d
t can be observed in the output DC voltage waveform.The use of “small” snubber capacitor value is recommended to reduce line current distortion, as the modification of DC bus current is the key to achieve both self-commutation for thyristors and lower harmonic distortion.



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*Source: 2490926-2016-07-14.xml*