# Chip-Level HARQ Chase Combining for HSUPA

Authors: Mohamed Et Tolba; Samir Saoudi; Raphaël Visoz; Tarik Ait-Idir
Journal: Research Letters in Communications
 (2009)

---

## Abstract

Hybrid automatic repeat request (HARQ) is used in high-speed uplink packet access (HSUPA) to increase
the data rate. Chase combining is the simplest of HARQ algorithms. It provides a time diversity and requires a small memory. In this paper, we propose a technique to increase the chase combining efficiency. In this
method, HARQ transmissions are seen as additional receive antennas which are jointly combined at chip-level
using a space-time linear minimum square error (LMMSE). We demonstrate that the chase combining diversity
gain is considerably increased especially for high-order modulation.


---

## Body

## 1. Introduction

High-speed  uplink packet  access  (HSUPA)  is designed to reach high data rates in universal
mobile telecommunications system (UMTS) uplink. Its implementation includes new
technologies such as fast scheduling as well as hybrid automatic repeat request
(HARQ). There are two well-known HARQ algorithms used for HSUPA: chase
combining and incremental redundancy (IR) [1]. In chase combining algorithm, when a received packet
is erroneous, it is saved in the receiver buffer and a negative acknowledgment
(NACK) is sent to the transmitter in order to retransmit the packet. At the
receiver end, the retransmitted packet is combined, before decoding, with the
previously saved one [2]. This results in a time diversity gain for multipath
channels. In the IR approach, each retransmission carries additional
redundancy, and a coding gain is provided after combining different HARQ
transmissions.The conventional rake receiver with receive diversity
is used for detecting HARQ transmission in HSUPA system. It has been
demonstrated that this receiver provides good performance for high spreading
factors with binary phase-shift keying (BPSK) modulation. However, it exhibits
a significant performance degradation in the case of low spreading factors with
high-order modulation. The chip-level LMMSE equalizer has been proposed for
HSUPA as a solution to this performance degradation. It was subject to many
studies in recent years. In [3], authors have shown that the LMMSE chip-level
equalizer with receive diversity provides a significant performance enhancement
for high speed downlink packet access (HSDPA). The chip LMMSE has been extended
to MIMO multicode CDMA system in [4] without taking account of HARQ. In [5], the LMMSE is jointly
applied with HARQ at symbol-level for space-time bit interleaved coded
modulation (STBICM) systems over multiple input multiple output (MIMO) channel
with intersymbol interference (ISI).Soft bit-level combining is the simplest way to
combine HARQ transmissions before decoding. In addition to its implementation
simplicity, it has been shown that this method offers a considerable gain for
HSUPA [1]. However,
its performance is severely degraded in fading channels when it is used with
chase combining for high-order modulation. To overcome this performance
degradation, we propose a chip-level combining method based on LMMSE chip
equalizer which is an interference resistant receiver. In this method, HARQ
transmissions are seen as additional receive antennas. Hence, the receive
diversity gain is increased. The different HARQ transmissions (receive
antennas) are jointly exploited by a single LMMSE filter to provide the
equalized chip as the combining result. In this manner, we jointly benefit from
the time diversity provided by the multipath channel, and the space diversity
offered by the receive antennas. It is shown that the proposed method
outperforms the soft bit-level combining. A considerable gain is provided in
the case of high-order modulation.


## 2. HSUPA System Overview

To reach the
required quality of service, HSUPA introduces a new transport channel named
enhanced dedicated channel (E-DCH) which supports sophisticated signal
processing operations. For error detection, it uses a cyclic redundancy check
(CRC) code which adds 24 bits to each HSUPA transport block. The CRC code is
followed by a1/3 turbo code to protect E-DCH data against channel
impairment. After channel coding, a rate matching operation is applied to adapt
the number of bits at the output of turbo code to the desirable data rate. One
or several E-DCH dedicated physical data channels (E-DPDCHs) are then used to
carry the E-DCH data [6]. The E-DPDCHs are separately interleaved and a bit to
symbol mapping is applied for each E-DPDCH. In the case of BPSK modulation,
each bit is mapped to a symbol which takes value in {−1,+1}.
Recently, the 16-quadrature amplitude modulation (QAM) is also specified for
HSUPA. Its constellation is built using two orthogonal 4-pulse amplitude
modulation (PAM) constellations. In 4-PAM, a set of two consecutive bits, bk,kk+1 is converted to a real-valued symbol sk given by  (1)sk=−15⋅bk(2+bk+1).  After bit to
symbol mapping, each physical channel is spread with a real-valued orthogonal
variable spreading factor (OVSF) code. The spreading factor may be different
from one physical channel to another. The spreading factor SF=2 is allowed for
HSUPA, especially for high data rates. After the spreading, each physical
channel is weighted by a gain factor in order to compensate the difference
between spreading factors. After that, the physical channels are IQ
(in-phase/quadratue-phase) multiplexed to form a single complex-valued stream
of chips which is scrambled and sent through a multipath channel. A chip-spaced
channel model of length L is assumed in this work. The signal is
received by two antennas at the receiver end. A chip LMMSE equalizer of length 2E+1 is jointly applied to the two received signals
for channel equalization. After despreading, the signal is converted to the
log-likelihood ratios (LLR) required by the turbo decoder. Before the decoding
process, the LLR sequence is deinterleaved and inversely rate-matched. The
decoder is followed by a CRC decoder for residual error detection. When a
packet is detected to be in error, it is saved and a NACK is sent to the transmitter which retransmits
the packet. At the receiver, the retransmitted packet is combined with the
previously received one. This increases the probability of correct decoding.


## 3. System Model

Consider an
observation window of length2E+1,
and let us denote by xm the vector corresponding to the transmitted
multicode chip at the instant mTc,
where Tc is the chip duration. When the HARQ is not
considered, the received signal at the base station is expressed as   (2)(ym1ym2)=(H1H2)xm+(nm1nm2), where ymi=[ym−Ei,…,ymi,…,ym+Ei]T is the received signal at the ith(i=1,2) antenna when the vector xm=[xm−E−L+1,…,xm,…,xm+E]T is transmitted through the multipath channel
represented by the (2E+1)×(2E+L) Toeplitz matrix Hi between the transmit antenna and the ith receive antenna. nmi=[nm−Ei,…,nmi,…,nm+Ei]T is a vector of complex white Gaussian noise
samples each of which has the power spectral density N0.
The received signals ym1 and ym2 are jointly delivered to a space-time LMMSE
chip equalizer to reduce the interference effect. The equalizer output
corresponding to the mth chip is expressed as  (3)x˜m=wHym, where w is the space-time LMMSE filter of size 2(2E+1), (⋅)H denotes the Hermitian operator, and ym=[ym1Tym1T]T is the concatenation of the received signals.
The space-time LMMSE filter is expressed as  (4)w=(HHH+N0EcI)−1HE+L,
where H=[H1H2]T.
Its size is 2(2E+1)×(2E+L). HE+L is the (E+L)th column of the matrix H,
and Ec is the total chip energy. After chip
equalization, the despreading process is performed. The resulting signal is
then used to compute LLR values which are need by turbo decoding.When HARQ soft bit-level combining is considered, chip
equalization, despreading, and LLR values computation are performed
individually for each HARQ transmission. If a block is erroneous after turbo
decoding, its corresponding LLRs are saved to be combined with those of
retransmitted block [5].


## 4. Chip-Level Combining

In the
chip-level combining approach, each HARQ transmission is seen as two additional
receive antennas. The transmissions are jointly exploited by the LMMSE chip
equalizer as shown in Figure1. Let ym(p,q) denote the received vector of the mth chip on the pth antenna at qth HARQ transmission, and nm(p,q) denote the noise vector corresponding to the mth chip on the pth antenna at qth HARQ transmission.Figure 1
Chip-level combining.The system model afterjth transmission is expressed as (see [7])  (5)Ym(j)=H(j)xm+nm(j),
where Ym(j)=[(ym(1,1))T,(ym(2,1))T,…,(ym(1,j))T,(ym(2,j))T], nm(j)=[(nm(1,1))T,(nm(2,1))T,…,(nm(1,j))T,(nm(2,j))T],
and H(j) is the channel matrix after jth transmission. It is written as follows:  (6)H(j)=(H(1,1)H(2,1)⋮H(1,j)H(2,j)),
where H(p,q)(p=1,2;q=1,…,j) is a Toeplitz matrix of size (2E+1)×(2E+L) given by  (7)H(p,q)=(hL−1(p,q)⋯h0(p,q)0⋯00hL−1(p,q)⋯h0(p,q)⋮⋮⋱⋱00⋯0hL−1(p,q)⋯h0(p,q)),hl(p,q)(0≤l≤L−1) in (7) are the channel taps associated to the pth receive antenna of the qth HARQ transmission. The time delay between two
successive HARQ transmissions, round-trip delay (RTD),  is taken into account in the
propagation channel generation. HARQ transmissions are separately received in
time by two receive antennas. At the receiver side, with the aid of a buffer
and concatenation procedure expressed in (6), each HARQ transmission can be
viewed as a source of two more virtual antennas. In other words, the delay
diversity will translate into space diversity which is exploited by a
chip-level LMMSE equalizer. The resulting chip after LMMSE filter is expressed
by  (8)x˜m(j)=(w(j))HYm(j),
where w(j) is written as  (9)w(j)=(H(j)(H(j))H+N0EcI)−1HE+L(j)=A−1HE+L(j), where HE+L(j) is the (E+L)th column of the matrix H(j).
The computation of the matrix inversion in (9) is done using the QR
decomposition of the matrix A [8].Chip-level combining method can be implemented using a
recursive technique. This allows to get similar computationnal complexity and a
slightly increased memory requirement compared with soft bit-level combining
where HARQ transmissions are separately equalized at the chip-level.


## 5. Simulation and Results

Computer
simulations are done for HSUPA system. The transmitter is implemented according
to 3GPP technical specifications [9]. The predefined modulation and coding schemes (MCSs)
simulated in this work are shown in Table 1. For both MCSs two physical
channels are spread with SF=2,
and the two others are spread with SF=4. The
transmission is done over a multipath channel which has a profile similar to
that of ITU-Pedestrian B which is considered to be block fading. Because of the
low mobility of HSUPA mobile, its speed is fixed at 3 Km/h. LMMSE chip filter
of length 15 is applied for channel equalization. Perfect channel knowledge is
assumed at the receiver. SISO decoding is performed using the Max-Log-MAP
algorithm with eight iterations. In the following, we label the soft bit-level
combining method, Method 1. The proposed combining method is labeled Method
2. Simulations are done for chase combining using Method 1 and Method
2. The two methods are compared in terms of block error rate (BLER) which
is computed as function of received Ec/N0 per antenna. Note that received Ec/N0 is averaged over HARQ transmissions. Figure 2
shows the BLER results for MCS1. After two and three HARQ transmissions, we observe
that Method 2 outperforms Method 1. A gain of 0.3 dB is provided
after three transmissions for BLER=10−2.
Figure 3 plots the BLER results, obtained with two and three HARQ transmissions
for MCS2. It is seen that Method 2 provides a significant gain over Method
1 for two and three HARQ transmissions. The proposed technique (Method 2)
offers an additional gain of 3dB at 10−2 with three HARQ transmissions. It is also
observed that the performance obtained by Method 1 after three
transmissions is reached by Method 2 with only two transmissions. This
significant increase of chase combining efficiency with Method 2 is due
to the space diversity offered by the receive antennas, and the time diversity
provided by the chase algorithm. Moreover, the different transmissions are
jointly exploited by the LMMSE chip equalizer which is an
interference-resistant detector.Table 1
MCSs configurations.
MCSNumber of codesMin SFCoding rateModulationMax. bit rate (kbps)1420.703BPSK4050.02420.70416-QAM8109.0Figure 2
Simulation results for MCS1.Figure 3
Simulation results for MCS2.


## 6. Conclusion

In this paper,
we have proposed a new technique for HARQ chase combining based on the LMMSE
chip equalizer in HSUPA system. In this method, each transmission is seen as
two additional receive antennas at the input of the LMMSE filter. The proposed
method has been compared with the soft bit-level combining for two and three
transmissions. Simulation results have demonstrated a significant increase in
chase combining efficiency when using the proposed method especially for 16-QAM
modulation.



---

*Source: 230276-2009-03-10.xml*