# An Advanced Control and Extensible Configuration for Static Var Generator

Authors: Chao Zhang; Aimin Zhang; Ying Cui; Tao Wen
Journal: Mathematical Problems in Engineering
 (2016)

---

## Abstract

An extensible configuration is proposed for static var generator (SVG) with advanced controller included for reactive power compensation of grid. Compared with the traditional configurations, the major advantage of such system configuration is that the power modules are very flexible and easy to extend or reduce without changing the main equipment of SVG under the different voltage levels. Furthermore, in order to solve the problems of modeling uncertainty, nonlinearities, and outside disturbance by using proportion integration (PI) controller, an advanced controller is proposed based on auto disturbance rejection control (ADRC). By controlling the amount and direction of reactive current, the reactive power is generated or absorbed from SVG into power grid with fast response, which can realize the excellent dynamic compensation for both the internal and external interferences. Simulations results show that the proposed controller has better performance of the transient and steady state than PI controller. Moreover, the verification tests are executed in 380 V, 6.5 kVA experiment systems, suggesting that the excellent dynamic performance and strong robustness are achieved.


---

## Body

## 1. Introduction

As a member of flexible alternate current transmission system (FACTS), static var generator (SVG) is being widely applied to compensate the reactive power with fast response time by generating or absorbing reactive power continuously in power system [1–3]. Especially recently, the topological structure of the SVG draws more attention in high-power applications for its conspicuous properties regarding extremely small volume, high efficiency, quick response speed, and minimal interaction with the supply grid. However, since the SVG is a nonlinear and complex system, many nonidea factors may deteriorate the performance of the reactive power compensation, such as limited bandwidth of the output current, nonlinear time delay caused by the signal detecting circuit, outside disturbance in high voltage environment, and incompatible SVG control system under different voltage levels.In the past few years, a great deal of research has been done to deal with these problems. The most widely used control technique is proportion integration (PI) controllers [4–6]. PI controllers have been designed to regulate the ac system voltage and the dc capacitor voltage based on decoupled control ofd-q axis currents and voltages. Satisfactory performances have been achieved for the SVG with PI controllers. However, there are some drawbacks which have not yet been considered by using PI controller. For example, the performance of this control system depends on the accuracy of the mathematical model in SVG [7]. However, in real-time implementation, precise compensating which requires accurate PI parameters cannot be completely achieved due to significant system uncertainties. These uncertainties include external disturbances, unpredictable parameter variations, and unmodeled plant nonlinear dynamics, which will deteriorate the dynamic performance of SVG significantly. Furthermore, these PI controller gains often remain constant in the operation of the SVG [7, 8]. Since the PI controller gain cannot adapt to the factors such as grid voltage and system load, the system model, closed-loop eigenvalues, and dynamic performance will change when the grid voltage and the system load change. The dynamic reactive power compensation cannot be achieved. Thus, a lot of advanced methods combined with PI controller are trying to overcome these problems, such as particle swarm optimization [9], neural networks [10], and artificial immunity [11]. In literature [12], adaptive control and linear robust control have been reported for their antiexternal disturbance ability. In literature [13], a popular dead-beat current controller is used. This control method has the high bandwidth and the fast reference current tracking speed. However, in these methods, the steady-state performance of SVG is improved, but the dynamic performance is not improved significantly.One of the most serious problems of the existing SVG is that the protection control unit (PCU) of the SVG generally is the fixed structure and cannot be adapted [8]. Nevertheless, the configuration of the SVG requires major changes when it operates in different voltage levels. Thus, the reliability and security cannot be guaranteed when the network voltage exceeds the rated voltage of each cluster. As a result, the PCU between different voltage levels is incompatible in most present SVG projects [12–16].To overcome these obstacles, an advanced SVG control system is proposed in this paper, in which the reactive current is commutated into power grid reliably and efficiently, which can accomplish a successful reactive compensation. Improvements are achieved as follows: First, a new configuration of ADRC controller is first applied for reactive current control in SVG and it realizes excellent dynamic compensation for the internal and external interferences. Second, to achieve the compatibility of PCU on the different voltage levels, the configuration of the extensible SVG is constructed. Simulations show that the adaptability of the parameters is better and the robustness and stability of ADRC controller are stronger than PI controller. Finally, a series of verification tests is achieved in the 380 V 6.5 kVA experimental system. The viability and effectiveness of the proposed SVG are verified.


## 2. Design of SVG

### 2.1. Configuration and Modulation of SVG

Figure1 shows the configuration of SVG cascading 12 H-bridge pulse-width modulation (PWM) converters in 380 V, 6.5 kVA experiment system.Figure 1
(a) Configuration of SVG. (b) Actual hardware view of SVG.
(a)
(b)As shown in Figure1(a), v
s
a, v
s
b, and v
s
c are the three-phase voltage of grid, i
l
a, i
l
b, and i
l
c are the three-phase current of grid, v
c
a, v
c
b, and v
c
c are the three-phase current of SVG, and i
a, i
b, and i
c are the three-phase current of SVG. V
d
c is the DC capacitor voltage. The SVG is constituted of twelve converters, and each converter contains four IGBT switches and one electrolytic capacitor. In addition, to guarantee the stability and reliability of the actual SVG, many situations should be considered in practical industrial fields, such as the harmonic current and overload. In the designed SVG, the IGBTs should be selected as 1.6 times rated current, which is reserved enough safety margin to improve the overload capability. Therefore, the AC inductor and the resistor are equipped between the grids and three-phase SVG served as a current smoother not only to attenuate the high frequency current harmonics that the SVG generates but also to filter out switch ripples. The circuit parameters of the 380 V, 6.5 kVA are shown as follows: system voltage V
s
=
380
V; rate reactive Q
=
6.6
k
V
A; total inductance L
=
12
m
H; total resistance R
=
10
Ω; number of cascaded cells N
=
4; switching frequency f
s
=
500
H
z; DC capacitor capacitance C
=
2800
μ
F; DC-side voltage V
d
c
=
50
V; maximum reactive current i
q
=
5.67
A.


### 2.2. Carriers Phase-Shifted Sinusoidal Pulse-Width Modulation (CPS-SPWM)

The carriers phase-shifted sinusoidal pulse-width modulation switching (CPS-SPWM) technology is adopted to operate the switches, which can generate sinusoidal wave voltage with least harmonics. This technology can be briefly explained by two H-bridge pulse-width modulation (PWM) converters. Figure2 shows circuit configuration of two H-bridge cascaded PWM converters.Figure 2
Two H-bridge cascaded PWM converters.The SPWM pulses are generated through sine wave compared with triangular wave. Two triangle carrier wave signals have the same frequency and they are phase shifted byπ
/
2 from each other. To simplify, carrier wave ratio and amplitude modulation ratio are defined as k
c
=
4 and M
=
0.8, respectively. The sequence diagram of cascaded 2 H-bridge pulse-width modulation (PWM) converters is shown in Figure 3.Figure 3
The sequence diagram of cascaded 2 H-bridge PWM converters.The driving signalT is obtained by triangular wave modulation involving triangle carrier wave and modulating wave. As shown in Figure 3, the CPS-SPWM modulation principle is analyzed as follows:(1)
If initial phase of triangular wave is zero, the driving signalT
1 can turn on the switch S
1 of model A, and the complementary driving signal T
2 of T
1 can turn on the switch S
2 of model A.
(2)
If initial phase of triangular wave is zero, the driving signal ofT
3 can turn on the switch S
3 of model A, and the complementary driving signal T
4 of T
3 can turn on the switch S
4 of model A.
(3)
If initial phase of triangular wave is one, the driving signalT
1
′ can turn on the switch S
1
′ of model B, and the complementary driving signal T
2
′ of T
1
′ can turn on the switch S
2
′ of model B.
(4)
If initial phase of triangular wave is one, the driving signalT
3
′ can turn on switch S
3
′ of model B, and the complementary driving signal T
4
′ of T
3
′ can turn on switch S
4
′ of model B.Figure4 shows the sequence diagram of the actual PWM converters.Figure 4
Sequence diagrams of the actual H-bridge PWM converters.


## 2.1. Configuration and Modulation of SVG

Figure1 shows the configuration of SVG cascading 12 H-bridge pulse-width modulation (PWM) converters in 380 V, 6.5 kVA experiment system.Figure 1
(a) Configuration of SVG. (b) Actual hardware view of SVG.
(a)
(b)As shown in Figure1(a), v
s
a, v
s
b, and v
s
c are the three-phase voltage of grid, i
l
a, i
l
b, and i
l
c are the three-phase current of grid, v
c
a, v
c
b, and v
c
c are the three-phase current of SVG, and i
a, i
b, and i
c are the three-phase current of SVG. V
d
c is the DC capacitor voltage. The SVG is constituted of twelve converters, and each converter contains four IGBT switches and one electrolytic capacitor. In addition, to guarantee the stability and reliability of the actual SVG, many situations should be considered in practical industrial fields, such as the harmonic current and overload. In the designed SVG, the IGBTs should be selected as 1.6 times rated current, which is reserved enough safety margin to improve the overload capability. Therefore, the AC inductor and the resistor are equipped between the grids and three-phase SVG served as a current smoother not only to attenuate the high frequency current harmonics that the SVG generates but also to filter out switch ripples. The circuit parameters of the 380 V, 6.5 kVA are shown as follows: system voltage V
s
=
380
V; rate reactive Q
=
6.6
k
V
A; total inductance L
=
12
m
H; total resistance R
=
10
Ω; number of cascaded cells N
=
4; switching frequency f
s
=
500
H
z; DC capacitor capacitance C
=
2800
μ
F; DC-side voltage V
d
c
=
50
V; maximum reactive current i
q
=
5.67
A.


## 2.2. Carriers Phase-Shifted Sinusoidal Pulse-Width Modulation (CPS-SPWM)

The carriers phase-shifted sinusoidal pulse-width modulation switching (CPS-SPWM) technology is adopted to operate the switches, which can generate sinusoidal wave voltage with least harmonics. This technology can be briefly explained by two H-bridge pulse-width modulation (PWM) converters. Figure2 shows circuit configuration of two H-bridge cascaded PWM converters.Figure 2
Two H-bridge cascaded PWM converters.The SPWM pulses are generated through sine wave compared with triangular wave. Two triangle carrier wave signals have the same frequency and they are phase shifted byπ
/
2 from each other. To simplify, carrier wave ratio and amplitude modulation ratio are defined as k
c
=
4 and M
=
0.8, respectively. The sequence diagram of cascaded 2 H-bridge pulse-width modulation (PWM) converters is shown in Figure 3.Figure 3
The sequence diagram of cascaded 2 H-bridge PWM converters.The driving signalT is obtained by triangular wave modulation involving triangle carrier wave and modulating wave. As shown in Figure 3, the CPS-SPWM modulation principle is analyzed as follows:(1)
If initial phase of triangular wave is zero, the driving signalT
1 can turn on the switch S
1 of model A, and the complementary driving signal T
2 of T
1 can turn on the switch S
2 of model A.
(2)
If initial phase of triangular wave is zero, the driving signal ofT
3 can turn on the switch S
3 of model A, and the complementary driving signal T
4 of T
3 can turn on the switch S
4 of model A.
(3)
If initial phase of triangular wave is one, the driving signalT
1
′ can turn on the switch S
1
′ of model B, and the complementary driving signal T
2
′ of T
1
′ can turn on the switch S
2
′ of model B.
(4)
If initial phase of triangular wave is one, the driving signalT
3
′ can turn on switch S
3
′ of model B, and the complementary driving signal T
4
′ of T
3
′ can turn on switch S
4
′ of model B.Figure4 shows the sequence diagram of the actual PWM converters.Figure 4
Sequence diagrams of the actual H-bridge PWM converters.


## 3. SVG Controller Design

### 3.1. Current ADRC Controller of SVG

Figure5 shows the block diagram of the proposed controller for SVG.Figure 5
Control block diagram for the 10 kV 2 MVA SVG.The proposed controller involves the current inner loop control and dc voltage external loop control, triangular wave generator, and PWM generator. The first three parts are achieved in the ARM, while the last three parts are achieved in the FPGA.In addition, the DC voltage external loop control can provide reference currentsi
d
∗ and i
q
∗ that served as the input of current inner loop control. The conventional proportion integration (PI) control is widely adopted for the DC voltage external loop control and achieves good performance [15–18]. Therefore, we focus on the advanced ADRC control for the current inner loop control in SVG control system.Referring to Figure1, the following set of voltage and current equations can be expressed as follows:(1)
L
d
i
a
d
t
=
v
s
a
-
v
c
a
-
R
i
a
L
d
i
b
d
t
=
v
s
b
-
v
c
b
-
R
i
b
L
d
i
c
d
t
=
v
s
c
-
v
c
c
-
R
i
c
,where L and R are the total AC inductance and resistance, respectively, the three-phase voltage of grid v
s
a
=
2
U
s
sin
⁡
ω
t, v
s
b
=
2
U
s
sin
⁡
(
ω
t
-
12
0
°
), and v
s
c
=
2
U
s
sin
⁡
(
ω
t
+
12
0
°
), and the three-phase voltage of SVG v
c
a
=
N
M
V
d
c
sin
⁡
ω
t
-
δ, v
c
b
=
N
M
V
d
c
sin
⁡
ω
t
-
δ
-
12
0
°, and v
c
c
=
N
M
V
d
c
sin
⁡
ω
t
-
δ
-
12
0
°. N is the number of cascaded converters, M is the modulation ratio, δ is the phase angle difference between v
s and v
c. V
d
c is the DC capacitor voltage.By applying the transformationT
a
b
c
-
d
q, (1) ind-q axis are expressed as(2)
L
d
i
d
d
t
=
v
s
d
-
v
c
d
-
R
i
d
+
ω
L
i
q
L
d
i
q
d
t
=
v
s
q
-
v
c
q
-
R
i
q
-
ω
L
i
d
,where i
d and i
q are the active current and reactive current of the SVG, respectively. v
c
d and v
c
q are the output voltage of SVG; v
s
d and v
s
q are thed-q coordinate of three-phase voltage of grid, which are regarded as uncertain items because thed-q coordinate of three-phase voltage is impossible to measure accurately. Since ω
L
i
q and -
ω
L
i
d are coupled with each other by the AC inductance L, which can be regarded as coupled items, based on the ADRC control theory, the sum of coupled items and the sum of uncertain items ϖ
d
=
ω
L
·
I
q
+
v
s
d and ϖ
d
=
-
ω
L
·
I
d
+
v
s
q are considered as inner disturbances, which can be compensated by ADRC. Therefore, (2) can be rewritten as follows:(3)
L
d
i
d
d
t
=
-
R
i
d
+
ϖ
d
-
v
c
d
,
L
d
i
q
d
t
=
-
R
i
q
+
ϖ
q
-
v
c
q
.And, then, we design ADRC for the active currenti
d and the reactive current i
q, respectively.Figure6 shows the block diagram of current inner loop control based on ADRC.Figure 6
Block diagram of current inner loop control based on ADRC.As shown from Figure6 for reactive current ADRC controller, the ADRC consists of tracking differentiator (TD), extended state observer (ESO), and nonlinear state error feedback (NLSEF). The input signals are the reference reactive current i
q
∗ and the real-time detected value of the reactive current i
q. The output signal is the voltage of SVG, which is regarded as the control variable. The TD can trace the reference voltage quickly and acquire the tracking signal v
1 by filtering. The input signal of NLSEF ξ
1 is obtained by subtracting the tracking signal v
1 from the state estimation signal z
1. Finally, the current inner control is achieved by subtracting the disturbance estimate signals which is obtained in ESO from the output result u
0 of NLSEF.The design processes of the active currenti
d and the reactive current i
q are symmetric and similar. As an example, the ADRC of reactive current i
q is illustrated in detail. Three steps are required to illustrate the proposed ADRC controller.Step 1.
The reactive currenti
q
∗ is the input reference signal, which is obtained by dc voltage external loop control. The TD is designed via linear differential element and its expression is(4)
v
˙
1
=
r
1
fal
⁡
v
1
-
i
q
∗
,
α
1
,
δ
1
,where v
1 is the tracking signal of the reference current i
q
∗ and v
˙
1 is the differential signal of v
1. r
1 is the velocity factor reflecting the changing rules of TD. The larger r
1 will result in the faster response speed, while it also leads to the bigger overshoot. δ
1 and α
1 are the adjustable control parameters. α
1 determines the nonlinear form, and δ
1 determines the size of the fal function linear range. By selecting r, δ
1, and α
1 properly, TD can smooth the step changes in the input signals with fast response and small overshoot.Step 2.
ESO is the core part of ADRC, which can observe and estimate the actual reactive current and unknown disturbances dynamically. Whether the actual reactive current and the unknown disturbances can be estimated accurately with ESO directly influences the control effect of ADRC.
The ESO for the reactive currenti
q
∗ is expressed as(5)
ξ
=
z
1
-
i
q
z
˙
1
=
z
2
-
r
21
fal
⁡
ξ
,
α
2
,
δ
2
+
b
v
c
q
∗
z
˙
2
=
-
r
22
fal
⁡
ξ
,
α
2
,
δ
2
,where the fal function fal
⁡
ξ
,
α
2
,
δ
2 is(6)
fal
⁡
ξ
,
a
,
δ
=
ξ
α
sign
⁡
ξ
ξ
>
δ
ξ
δ
1
-
α
ξ
≤
δ
,where i
q is the known reactive current. z
1 is the state estimation signal of the reactive current i
q. ξ is the control deviation of the system. z
2 is the estimation signals of the internal and external disturbances. v
c
q
∗ is the control variable. b is the feedback coefficient of v
c
q
∗. r
21, r
22, α
2, and δ
2 are the adjustable control parameters. r
21 has an effect on damped oscillation, and r
22 has an effect on the delay of z
2. The larger r
21 can damp the system oscillation, while it leads to system divergence. Similarly, the delay can be reduced by increasing r
21, which also results in system oscillation. Consequently, the mutual coordination is required by selecting r
21 and r
22.Step 3.
Nonlinear state error feedback (NLSEF) unit can be used to calculate the control variable of the reactive power adjustment for the current inner loop control. But the selection of NLSEF unit parameters is very difficult in the practical application. Thus, we will propose a simplified and linear method to achieve NLSEF:(7)
ξ
1
=
z
1
-
v
1
u
0
=
r
3
fal
⁡
ξ
1
,
α
3
,
δ
3
v
s
q
=
u
0
-
z
2
b
,where ξ
1 is the difference value between the tracking signal v
1 and the state estimation signal z
1. u
0 is the control variable without the disturbance feedback compensation. r
3 is the speed factor. f
a
l function is defined as (6). b is the feedback coefficient representing the relationship between the control variable v
c
q
∗ and the state variable of the ESO.Finally, by combining NLSEF with the observed disturbances, the simplified ADRC can be realized. As a result, the current inner control of SVG is achieved.


### 3.2. Extensible Configuration of SVG Control System

Three main parts is included in the SVG control system involving protect and control unit (PCU), valve control unit (VCU), and power modules. The PCU is the core part. While SVG system is protected and controlled by sending and receiving the control commands, the VCU can execute the commands and manage the power modules directly. The power module is viewed as the PWM converter.Figure7 shows the configuration of SVG control system.Figure 7
Control block of SVG control system.As shown in Figure7, the PCU sends the digitized currents and voltages of grid to PCU. After the calculation, the related information and control commands are transmitted to the VCU. Each VCU encodes the received commands and sends these to control the corresponding power modules. Similarly, the VCU can receive the feedback from the power modules and send these to the PCU. Finally, though analyzing the feedback and the real-time power information, some new commands are transmitted to control the SVG which can generate the expected reactive current to achieve the purpose of dynamic compensation.Figure8 shows the structure drawing of PCU and VCU in SVG control system.Figure 8
Structure drawing of PCU and VCU in SVG control system.In Figure8, it is noted that only one VCU is included in SVG control system. To ensure the reliability and stability of SVG, each power module should be reserved enough safety margin that is 0.5 times the maximum voltage value in the proposed control system. Thus, the voltage level of grid is on more than 4000 V because the maximum voltage value is 2000 V for each power module. The 380 V, 6.5 kVA SVG experimental system with twelve power modules satisfied this requirement. But in higher voltage levels, operation safety cannot be guaranteed. The extensible SVG control system is proposed to solve this problem.Figure9 shows the structure drawing of PCU and extensible VCU in SVG control system. Different from the existing technologies, the control scale can be adjusted by increasing and decreasing the number of VCUs without changing other equipment. For example, in the 10 kV 2 MVA SVG experimental system, three VCUs and 36 power modules are assigned to SVG control system, resulting in 12 power modules in each VCU. And, then, the voltage value of each power module is less than 834 V satisfying design requirement. Therefore, by adding two VCUs to the SVG control system, the requirement is guaranteed. As a result, the proposed SVG control systems not only improve the availability of PCU but also short design cycle and cost of SVG control system.Figure 9
Structure drawing of PCU and the extensible VCU in SVG control system.


## 3.1. Current ADRC Controller of SVG

Figure5 shows the block diagram of the proposed controller for SVG.Figure 5
Control block diagram for the 10 kV 2 MVA SVG.The proposed controller involves the current inner loop control and dc voltage external loop control, triangular wave generator, and PWM generator. The first three parts are achieved in the ARM, while the last three parts are achieved in the FPGA.In addition, the DC voltage external loop control can provide reference currentsi
d
∗ and i
q
∗ that served as the input of current inner loop control. The conventional proportion integration (PI) control is widely adopted for the DC voltage external loop control and achieves good performance [15–18]. Therefore, we focus on the advanced ADRC control for the current inner loop control in SVG control system.Referring to Figure1, the following set of voltage and current equations can be expressed as follows:(1)
L
d
i
a
d
t
=
v
s
a
-
v
c
a
-
R
i
a
L
d
i
b
d
t
=
v
s
b
-
v
c
b
-
R
i
b
L
d
i
c
d
t
=
v
s
c
-
v
c
c
-
R
i
c
,where L and R are the total AC inductance and resistance, respectively, the three-phase voltage of grid v
s
a
=
2
U
s
sin
⁡
ω
t, v
s
b
=
2
U
s
sin
⁡
(
ω
t
-
12
0
°
), and v
s
c
=
2
U
s
sin
⁡
(
ω
t
+
12
0
°
), and the three-phase voltage of SVG v
c
a
=
N
M
V
d
c
sin
⁡
ω
t
-
δ, v
c
b
=
N
M
V
d
c
sin
⁡
ω
t
-
δ
-
12
0
°, and v
c
c
=
N
M
V
d
c
sin
⁡
ω
t
-
δ
-
12
0
°. N is the number of cascaded converters, M is the modulation ratio, δ is the phase angle difference between v
s and v
c. V
d
c is the DC capacitor voltage.By applying the transformationT
a
b
c
-
d
q, (1) ind-q axis are expressed as(2)
L
d
i
d
d
t
=
v
s
d
-
v
c
d
-
R
i
d
+
ω
L
i
q
L
d
i
q
d
t
=
v
s
q
-
v
c
q
-
R
i
q
-
ω
L
i
d
,where i
d and i
q are the active current and reactive current of the SVG, respectively. v
c
d and v
c
q are the output voltage of SVG; v
s
d and v
s
q are thed-q coordinate of three-phase voltage of grid, which are regarded as uncertain items because thed-q coordinate of three-phase voltage is impossible to measure accurately. Since ω
L
i
q and -
ω
L
i
d are coupled with each other by the AC inductance L, which can be regarded as coupled items, based on the ADRC control theory, the sum of coupled items and the sum of uncertain items ϖ
d
=
ω
L
·
I
q
+
v
s
d and ϖ
d
=
-
ω
L
·
I
d
+
v
s
q are considered as inner disturbances, which can be compensated by ADRC. Therefore, (2) can be rewritten as follows:(3)
L
d
i
d
d
t
=
-
R
i
d
+
ϖ
d
-
v
c
d
,
L
d
i
q
d
t
=
-
R
i
q
+
ϖ
q
-
v
c
q
.And, then, we design ADRC for the active currenti
d and the reactive current i
q, respectively.Figure6 shows the block diagram of current inner loop control based on ADRC.Figure 6
Block diagram of current inner loop control based on ADRC.As shown from Figure6 for reactive current ADRC controller, the ADRC consists of tracking differentiator (TD), extended state observer (ESO), and nonlinear state error feedback (NLSEF). The input signals are the reference reactive current i
q
∗ and the real-time detected value of the reactive current i
q. The output signal is the voltage of SVG, which is regarded as the control variable. The TD can trace the reference voltage quickly and acquire the tracking signal v
1 by filtering. The input signal of NLSEF ξ
1 is obtained by subtracting the tracking signal v
1 from the state estimation signal z
1. Finally, the current inner control is achieved by subtracting the disturbance estimate signals which is obtained in ESO from the output result u
0 of NLSEF.The design processes of the active currenti
d and the reactive current i
q are symmetric and similar. As an example, the ADRC of reactive current i
q is illustrated in detail. Three steps are required to illustrate the proposed ADRC controller.Step 1.
The reactive currenti
q
∗ is the input reference signal, which is obtained by dc voltage external loop control. The TD is designed via linear differential element and its expression is(4)
v
˙
1
=
r
1
fal
⁡
v
1
-
i
q
∗
,
α
1
,
δ
1
,where v
1 is the tracking signal of the reference current i
q
∗ and v
˙
1 is the differential signal of v
1. r
1 is the velocity factor reflecting the changing rules of TD. The larger r
1 will result in the faster response speed, while it also leads to the bigger overshoot. δ
1 and α
1 are the adjustable control parameters. α
1 determines the nonlinear form, and δ
1 determines the size of the fal function linear range. By selecting r, δ
1, and α
1 properly, TD can smooth the step changes in the input signals with fast response and small overshoot.Step 2.
ESO is the core part of ADRC, which can observe and estimate the actual reactive current and unknown disturbances dynamically. Whether the actual reactive current and the unknown disturbances can be estimated accurately with ESO directly influences the control effect of ADRC.
The ESO for the reactive currenti
q
∗ is expressed as(5)
ξ
=
z
1
-
i
q
z
˙
1
=
z
2
-
r
21
fal
⁡
ξ
,
α
2
,
δ
2
+
b
v
c
q
∗
z
˙
2
=
-
r
22
fal
⁡
ξ
,
α
2
,
δ
2
,where the fal function fal
⁡
ξ
,
α
2
,
δ
2 is(6)
fal
⁡
ξ
,
a
,
δ
=
ξ
α
sign
⁡
ξ
ξ
>
δ
ξ
δ
1
-
α
ξ
≤
δ
,where i
q is the known reactive current. z
1 is the state estimation signal of the reactive current i
q. ξ is the control deviation of the system. z
2 is the estimation signals of the internal and external disturbances. v
c
q
∗ is the control variable. b is the feedback coefficient of v
c
q
∗. r
21, r
22, α
2, and δ
2 are the adjustable control parameters. r
21 has an effect on damped oscillation, and r
22 has an effect on the delay of z
2. The larger r
21 can damp the system oscillation, while it leads to system divergence. Similarly, the delay can be reduced by increasing r
21, which also results in system oscillation. Consequently, the mutual coordination is required by selecting r
21 and r
22.Step 3.
Nonlinear state error feedback (NLSEF) unit can be used to calculate the control variable of the reactive power adjustment for the current inner loop control. But the selection of NLSEF unit parameters is very difficult in the practical application. Thus, we will propose a simplified and linear method to achieve NLSEF:(7)
ξ
1
=
z
1
-
v
1
u
0
=
r
3
fal
⁡
ξ
1
,
α
3
,
δ
3
v
s
q
=
u
0
-
z
2
b
,where ξ
1 is the difference value between the tracking signal v
1 and the state estimation signal z
1. u
0 is the control variable without the disturbance feedback compensation. r
3 is the speed factor. f
a
l function is defined as (6). b is the feedback coefficient representing the relationship between the control variable v
c
q
∗ and the state variable of the ESO.Finally, by combining NLSEF with the observed disturbances, the simplified ADRC can be realized. As a result, the current inner control of SVG is achieved.


## 3.2. Extensible Configuration of SVG Control System

Three main parts is included in the SVG control system involving protect and control unit (PCU), valve control unit (VCU), and power modules. The PCU is the core part. While SVG system is protected and controlled by sending and receiving the control commands, the VCU can execute the commands and manage the power modules directly. The power module is viewed as the PWM converter.Figure7 shows the configuration of SVG control system.Figure 7
Control block of SVG control system.As shown in Figure7, the PCU sends the digitized currents and voltages of grid to PCU. After the calculation, the related information and control commands are transmitted to the VCU. Each VCU encodes the received commands and sends these to control the corresponding power modules. Similarly, the VCU can receive the feedback from the power modules and send these to the PCU. Finally, though analyzing the feedback and the real-time power information, some new commands are transmitted to control the SVG which can generate the expected reactive current to achieve the purpose of dynamic compensation.Figure8 shows the structure drawing of PCU and VCU in SVG control system.Figure 8
Structure drawing of PCU and VCU in SVG control system.In Figure8, it is noted that only one VCU is included in SVG control system. To ensure the reliability and stability of SVG, each power module should be reserved enough safety margin that is 0.5 times the maximum voltage value in the proposed control system. Thus, the voltage level of grid is on more than 4000 V because the maximum voltage value is 2000 V for each power module. The 380 V, 6.5 kVA SVG experimental system with twelve power modules satisfied this requirement. But in higher voltage levels, operation safety cannot be guaranteed. The extensible SVG control system is proposed to solve this problem.Figure9 shows the structure drawing of PCU and extensible VCU in SVG control system. Different from the existing technologies, the control scale can be adjusted by increasing and decreasing the number of VCUs without changing other equipment. For example, in the 10 kV 2 MVA SVG experimental system, three VCUs and 36 power modules are assigned to SVG control system, resulting in 12 power modules in each VCU. And, then, the voltage value of each power module is less than 834 V satisfying design requirement. Therefore, by adding two VCUs to the SVG control system, the requirement is guaranteed. As a result, the proposed SVG control systems not only improve the availability of PCU but also short design cycle and cost of SVG control system.Figure 9
Structure drawing of PCU and the extensible VCU in SVG control system.


## 4. Simulation and Experiment Discussion

In order to verify the performance of the proposed ADRC controller, the comparative simulations are constructed based on the conventional PI and the proposed ADRC, respectively. The model of 380 V 6.5 kVA SVG is established in PSCAD environment. Figure10 shows the result of contrastive dynamic response of the reactive current i
q.Figure 10
(a) Dynamic response ofi
q when L
=
12
m
H and R
=
0.3
Ω. (b) Dynamic response of changing from 1 to −1.
(a)
(b)Figure10 shows the comparison of the transient responses of the reactive current i
q when reactive current reference i
q
∗ is changing. It can be seen clearly that the transient response of the states controlled is more faster and the system tends to be stable more rapidly under the proposed ADRC controller. On the contrary, more time is needed for the transient responses to converge to the stable state by using PI controller in a longer finite time. As a result, the better performance of transient and steady state by using the proposed ADRC controller is verified.In addition, the experimental platform of 380 V 6.5 KVA SVG is constructed in laboratory environment based on the proposed configuration and control system. The 380 V 6.5 KVA SVG consists of 12 H-bridge pulse-width modulation (PWM) converters, and 4 converters are involved in each phase.To further verify the proposed SVG control system, the var generator (VG) is applied in this experiment, which can generate the set reactive current. Simultaneously, the proposed SVG can generate the compensating current that prevents the reactive current from flowing into the grid. In current inner loop control, the experimental waveforms of the current of A-phase cluster are observed, recorded by the oscilloscope.The current inner loop control consists of four parts involving startup process, stopping process, steady-state process, and dynamic process.Figure11 shows the experimental result in the startup process and stopping process. When the VG generating the reactive current starts running, the SVG generating the compensating current also starts running right away and generates the corresponding compensating current to compensate the reactive current. Similarly, when the output of VG stops running, the SVG also stops running at once. The residual current of the grid has a very small instantaneous change while the whole process is very quick and has no impact on the grid.Figure 11
(a) The experimental result in the startup process. (b) The experimental result in stopping process. (1) Yellow line: reactive current. (2) Green line: compensating current. (3) Blue line: residual current of grid.
(a)
(b)Figure12(a) shows the experimental results of the full load test based on ADRC in steady-state process, where the yellow line is the reactive current, the green line is the compensating current, and the blue line is the residual current of grid. The reactive current is compensated effectively and the residual current of the grid is quite small. As a result, by using the proposed control method, the compensating current can trace the reactive current and compensate the reactive current with the small distortion and great sinusoidal shape. In addition, Figure 12(b) shows the process of overload test. It can be seen clearly that the load capability of SVG is improved greatly and operating reliability of SVG in practical industrial field is enhanced effectively. However, SVG is not suggested for long-term operation in overload state because the long-term overload capability of SVG leads to damaged circuit hardware.Figure 12
(a) Experimental results verify the effect of current inner control in steady-state process. (b) Experimental results verify the effect of current inner control in overload state. (1) Yellow line: reactive current. (2) Green line: compensating current. (3) Blue line: residual current of grid.
(a)
(b)Figure13 shows the dynamic performance of SVG. In the dynamic process, the VG generates the reactive current and decreases output current suddenly. Meanwhile, the proposed SVG can generate the compensating current with the same mutative value. The residual current of the grid has a transient distorting and then returns to the steady state immediately. The dynamic response of SVG is very fast.Figure 13
Dynamic performance of SVG in the dynamic process. (1) Yellow line: reactive current. (2) Green line: compensating current. (3) Blue line: residual current of grid.As a result, the SVG can track the reference command current accurately and compensate the reactive current rapidly when the reactive current changes suddenly by the current inner loop control. The compensation precision of SVG is high and the dynamic response of SVG is fast.


## 5. Conclusions

This paper has analyzed the configuration of SVG and designed an advanced control system. The improvement is achieved in three aspects:(1)
To solve the problems of nonlinear and strong coupling in electrical power system, the active disturbance rejection controller (ADRC) is first applied for current feedback decoupling control strategy. To guarantee the adaptability and robustness, the control strategy regards the uncertainties and disturbances from the circumstance outside as the total disturbance that can be evaluated and compensated automatically. By comparing the ADRC with the proportion integration differentiation (PID), better dynamic performance and steady performance are achieved by using ADRC.
(2)
In order to solve the problem of poor compatibility for SVG under different voltage grade, an extended control and protection system of SVG is designed. By increasing and decreasing the number of valve control unit, the control scale can be adjusted without changing other equipment. Thus, original system can satisfy different needs for different control object.
(3)
On the basis of the control and protection system, an actual SVG is constructed with reduced proportion in the laboratory environment. A series of verifications tests are executed in experimental system for verifying modulation technology, control strategy, and software and hardware of control system. These verifications establish the foundation for the perfect prospect in industry application of SVG.



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*Source: 2095973-2016-06-26.xml*